ESE 372 / Spring 2013 / Lecture 17

Bandwidth of Common Emitter amplifier

Low freq.  Midband High freq. 

band band

Low freq. band: Gain falls off due to effect of coupling and bypass capacitors.
Midband: All capacitors and delay effects can be neglected.
High freq. band: Gain falls off due to the internal capacitive effects in transistor.

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ESE 372 / Spring 2013 / Lecture 17

Low frequency response
Need FA Equivalent circuit for low frequency small signal analysis
VBE ≈ 0.7V
VCE > 0.3V

j  f f Li
Ti f  
1  j  f f Li
1
f L1 
2  π  C1  R in  R S 
1
f L2 
2  π  C 2  R out  R L 
1
f L3 
CE
2 π  rπ  R S || R B 
β 1

Coupling and bypass capacitors result into

high pass filters (as could be expected).

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ESE 372 / Spring 2013 / Lecture 17
Internal Capacitive Effects in BJT

n+ p n-

Depletion region 
capacitance of  Depletion region 
forward biased  capacitance of 
reverse biased 
BE‐junction W2
 TF  CB‐junction
C BEJ  2  C BEJ 0 2  Dn CCBJ 0
CCBJ  m
1  VCB 
 Vbi 

Carrier accumulation in the base.
QSTORED   TF  I C
QSTORED C  CCBJ
CTF    TF  g m
VBE Equivalent small signal cap 
between Base and Collector.
Equivalent small signal cap 
C  C BEJ  CTF between Emitter and Base.
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ESE 372 / Spring 2013 / Lecture 17
Unity‐gain bandwidth of BJT
The maximum frequency for BJT to function as transistor.

Unity‐gain bandwidth
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ESE 372 / Spring 2013 / Lecture 17

Maximum value of unity‐gain bandwidth

Total time delay

Minimum possible
time delay
Ultimate limit for BJT speed

BJT‐based circuits have smaller bandwidth than unity‐gain bandwidth fT
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ESE 372 / Spring 2013 / Lecture 17
Bandwidth of CE amplifier
Simplified small‐signal equivalent circuit

More convenient format for 
Small‐signal  determination of bandwidth
equivalent circuit

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ESE 372 / Spring 2013 / Lecture 17
Bandwidth of CE amplifier
Simplified small‐signal equivalent circuit

Miller capacitor

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ESE 372 / Spring 2013 / Lecture 17

Metal Oxide Semiconductor Field Effect Transistor

* npn-BJT

* n-MOSFET
Transconductance and
output IVs look similar to
Zero DC gate those of BJT
Drain
current!
Gate
Source

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ESE 372 / Spring 2013 / Lecture 17
MOSFET structure

Oxide layer thickness

Let us consider this structure without gate.

Channel length
pn-junction pn-junction

When VDS is applied either (1) or (2)

pn-junction is reversed biased and no no electrons
current can flow between source and
drain.
Equivalently, the pn-junction barrier
prevents electron injection from source just holes
to channel, hence, no current.
NEED Gate to make channel conduct!

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ESE 372 / Spring 2013 / Lecture 17
MOS capacitor

Oxide layer thickness

Metal

Oxide

Channel length
Semiconductor

Voltage applied to gate controls the

channel conductivity type and value.

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ESE 372 / Spring 2013 / Lecture 17
MOSFET channel inversion

Assume VDS is zero but VGS is applied.

Part of the applied voltage will drop
across oxide layer but part of it will drop
Channel across semiconductor, i.e. electric field
will penetrate inside Si and will change
Channel length width the conductivity of the Si near the
interface between Si and SiO2. (this is
field effect in the name of transistor)

Metal Low VGS High VGS

For VGS > VT
Inversion layer is
Oxide formed at the interface,
i.e. conducting channel
is created between
Semiconductor Negative source and drain when
mobile gate-to-source voltage
holes are Negative charge of is near threshold.
pushed immobile electrons
from charge of
interface ionized
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ESE 372 / Spring 2013 / Lecture 17
MOSFET channel inversion

Now, if VDS is applied the current will

flow between drain and source!

Mobile charge of
Plenty of electrons
electrons Immobile charge of
ionized acceptors

Oxide layer C  ε OX  ε 0  W  L  C '  W  L

OX OX
capacitance t OX
“Both pn-junctions are forward biased”
Voltage needed to create
QB before QI can appear

Once QI is created – all extra voltage will go to oxide layer

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MOSFET current through channel
W is design parameter so all charges in MOSFETs are calculated per unit area

For we got thin layer of mobile charge

Channel
resistance

Mobility of
electrons
in channel

Concentration of electrons
in channel

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MOSFET current through channel for small drain-to-source voltages

Transconductance
Aspect ratio process parameter

We got voltage-controlled resistor, not transistor yet.

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MOSFET Operation
We assumed so far that inversion layer charge is uniformly distributed over
channel length, but it is not true. This is good approximation for very small
drain-to-source voltages < 100 mV.
For positive VDS the inversion layer charge density
per unit area decreases from source-to-drain

Hence channel conductivity decreases from source-to-drain

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MOSFET Operation

The same current for each dR

Drain current saturates with drain-to-source voltage

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ESE 372 / Spring 2013 / Lecture 17
MOSFET Operation in saturation

The drain current saturates to the value determined by VGS.

Current saturation occurs when channel is pinched-off near
drain, i.e. inversion layer charge disappears near drain. After
that – all extra VDS goes to pinch-off region and does not
change field of concentration inside the channel.

Drain current becomes independent of drain-to-source voltage

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ESE 372 / Spring 2013 / Lecture 17
MOSFET input/output IV characteristics

Output IV

linear

* Dependence of the drain current on quadratic

control voltage VGS is either linear or
quadratic – slower than exponential like
in BJT, hence we expect smaller
transconductance from MOSFET as
compared to BJT

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MOSFET large signal equivalent circuit

Channel length modulation parameter

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Enhancement and Depletion mode MOSFETs

Enhancement mode
Depletion mode
“normally off”
“normally on”

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Enhancement p-MOSFET
Mobile charge in inversion layer - holes

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