National University of Sciences & Technology (NUST)

School of Electrical Engineering and Computer Science (SEECS)

Department of Electrical Engineering

EE-313 Electronic Circuit Design

Course Code: EE-313 Semester: Fall 2019
Credit Hours: 3+1 Prerequisite Codes: EE-215
Instructor: Mansoor Shaukat Discipline: Electrical Engineering
Office: Room A-120 Telephone: 90852103
Lecture Days: As per time table E-mail: mansoor.shaukat@seecs.edu.pk
Class Room: As per time table Consulting Hours: Thru E-mail
Lab Engineer: As per time table Lab Engineer Email: @seecs.edu.pk
Knowledge Group: Electronics, Power and Control Updates on LMS: As required

Course Description:
This is the second course in the sequence of the two courses on microelectronic circuits. The objective of this
course is to provide the students an insight into analysis and design of electronic circuits that find extensive
application in such fields as computers, control systems, digital instrumentation, and communications etc. The
course begins with an introduction to single-stage IC amplifiers and continues with differential and multistage
amplifiers, in both their bipolar and MOSFET forms followed by various output stages. Frequency response of
amplifiers, feedback analysis with focus on practical circuit applications of negative feedback and stability
problems in feedback amplifiers are also presented. The dc and small-signal analysis of the operational
amplifier is studied in detail.

Course Learning Outcomes:

CLO Description BT PLOs

After the completion of the course the students will be able to: Level
1. Describe and understand the concept of Single-Stage Integrated Amplifiers, their biasing, C2 1
current mirrors, frequency response and the effect of the active load on the performance.
2. Explain the working principle of Differential Amplifiers based on MOS and BJT transistors, C2 1
as well as the non-ideal characteristics of differential amplifier and their frequency
response
3. Describe the concept of four basic feedback topologies with the help of different transistor C2 1
based electrical circuits.
4. Design and analyze operational amplifier circuits C5 3
5. Conduct experiments as well as analyze and interpret experimental data P4 4
6. Use state of the art trainer boards and PSpice/ Proteus software to design, analyze and P4 5
simulate electronic circuits based mainly on diodes and transistors.
7. Exhibit good professional and ethical behavior while adhering to lab safety rules. A3 8
8. Function effectively both individually and as a member of a team A3 9

Mapping of CLOs to Program Learning Outcomes

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 National University of Sciences & Technology (NUST)
School of Electrical Engineering and Computer Science (SEECS)
Department of Electrical Engineering

PLOs/CLOs CLO CLO CLO CLO CLO CLO CLO CLO

1 2 3 4 5 6 7 8
PLO 1 (Engineering Knowledge) √ √ √
PLO 2 (Problem Analysis)
PLO 3 (Design/Development of Solutions) √
PLO 4 (Investigation) √
PLO 5 (Modern tool usage) √
PLO 6 (The Engineer and Society)
PLO 7 (Environment and Sustainability)
PLO 8 (Ethics) √
PLO 9 (Individual and Team Work) √
PLO 10 (Communication)
PLO 11 (Project Management)
PLO 12 (Lifelong Learning)

Assessment Modules, Weightages, and Mapping to CLOs

Assessments/CLOs CLO CLO CLO CLO CLO CLO CLO CLO

1 2 3 4 4 5 6 7
Quizzes: 10% of the theory part √ √ √ √
Assignments: 5% of the theory part √ √ √ √
OHTs: 35% of the theory part √ √
Labs:25% of the course √ √ √ √
End Semester Exam:50% of theory part √ √ √ √

Books:
Text Book: Microelectronics Circuits 6th Edition; by Sedra & Smith, Oxford University Press
Reference
Books: Fundamentals of Microelectronics by Behzad Razavi, John Wiley & Sons Inc

Main Topics to be Covered:

The course spans over a number of different topics as under:
Chapter No 7
Building Blocks of Integrated-Circuit Amplifiers
IC Design Philosophy
Comparison of the MOSFET and the BJT
IC Biasing
Current Sources
Current Mirrors
Current Steering Circuits
The Amplifiers with Active Loads
The CS and CE Amplifiers with Active Loads
The CG and CB Amplifiers with Active Loads
The CS and CE Amplifiers with Source (Emitter)
Degeneration
The Source and Emitter Followers
Some Useful Transistor Pairings

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 National University of Sciences & Technology (NUST)
School of Electrical Engineering and Computer Science (SEECS)
Department of Electrical Engineering

Chapter No 8 The MOS Differential Pair

Small-Signal Operation
Differential and Multistage Amplifiers Common-Mode Gain
Common-Mode Rejection Ratio (CMRR)
The BJT Differential Pair
Basic Operation
Large Signal Operation
Small Signal Operation
Other Non-ideal Characteristics of Differential Amplifier
Differential Amplifier with Active Loads

Chapter No 9:
Low frequency Response of BJT
Frequency Response Low frequency Respose of MOSFET
Intenal Capacitances in BJT & MOSFET
High frequency respose of BJT
High frequency response of MOSFET

Chapter No 10 The General Feedback Structure

Properties of Negative Feedback
Feedback Four Basic Feedback Topologies
The Series-Shunt Feedback Amplifiers
The Series-Series Feedback Amplifiers
The Shunt-Shunt Feedback Amplifiers
The Shunt-Series Feedback Amplifiers
The Stability Problem

Chapter No 11 Classification of Output Stages

Class A Output Stage
Output Stages and power Amplifiers Class B Output Stage
Class AB Output Stage
Biasing the Class AB Circuit
CMOS Class AB Output Stages
Power BJT
Variations on the Class
Configuration
IC Power Amplifiers

Chapter No 12 The 741 Op-Amp Circuit

Operational – Amplifier Circuits
The Input Stage
The Second Stage
The Output Stage
DC Analysis of the 741
Small-Signal Analysis of Input Stage
Small-Signal Analysis of Second Stage
Small-Signal Analysis of Output Stage
Gain, Frequency Response and Slew Rate

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 National University of Sciences & Technology (NUST)
School of Electrical Engineering and Computer Science (SEECS)
Department of Electrical Engineering

Main Topics / Lecture Breakdown:

No. Topics Sections Lectures
1 Building Blocks of Integrated-Circuit Ch7 8
Amplifiers
2 Differential and Multistage Amplifiers Ch8 8
OHT-1
3 Frequency Response Ch9 8
4 Feedback Ch10 8
OHT-2
5 Output Stages and power Amplifiers Ch11 8
6 Operational – Amplifier Circuits Ch12 8
End Semester Exam
Total Lectures: 48

Lab Experiments:
Lab 01: Simulation Using Advanced Features of PSpice
Lab 02: Common Emitter Amplifier
Lab 03: Cascade amplifier
Lab04: Current Sources
Lab05: BJT Current Mirror Circuit
(BJT Wilson Current Mirror)
Lab 06: BJT Current Mirror Circuit
(BJT Wilder Current Source)
Lab 07: Differential Pair with resistive Load
Lab 08: Differential pairs with active load
Lab 09: Differential amplifier
(common mode gain and common mode rejection ratio)
Lab 10 and 11: Differential pair
(Mismatching and offset Null adjustment )
Lab 12 and 13: Operational amplifier with negative Feedback
Lab 14: Operational amplifier feedback topology
Lab 15: Lab Exam

Tools / Software Requirement:

OrCAD Pspice is required for both simulation and some of the lab exercises. The use of MATLAB will also be
encouraged for solution of problems and different simulations.

Grading Policy:
Quiz Policy: The quizzes will be unannounced and normally last for ten minutes. The question framed is
to test the concepts involved in last few lectures. Number of quizzes that will be used for
evaluation is at the instructor’s discretion. Grading for quizzes will be on a fixed scale of 0 to
10. A score of 10 indicates an exceptional attempt towards the answer and a score of 1
indicates your answer is entirely wrong but you made a reasonable effort towards the
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 National University of Sciences & Technology (NUST)
School of Electrical Engineering and Computer Science (SEECS)
Department of Electrical Engineering

solution. Scores in between indicate very good (8-9), good (6-7), satisfactory (4-5), and poor
(2-3) attempt. Failure to make a reasonable effort to answer a question scores a 0.
Assignment Policy: In order to develop comprehensive understanding of the subject, assignments will be given.
Late assignments will not be accepted / graded. All assignments will count towards the total.
The students are advised to do the assignment themselves. Copying of assignments is highly
discouraged and violations will be dealt with severely by referring any occurrences to the
disciplinary committee. The questions in the assignment are meant to be challenging to give
students confidence and extensive knowledge about the subject matter and enable them to
prepare for the exams.
Lab Conduct: The labs will be conducted for three hours every week. A lab handout will be given in advance
for study and analysis. The lab handouts will also be placed on LMS. The students are to
submit their results by giving a lab report at the end of lab for evaluation. One lab report per
group will be required. However, students will also be evaluated by oral viva during the lab.
Plagiarism: SEECS maintains a zero tolerance policy towards plagiarism. While collaboration in this
course is highly encouraged, you must ensure that you do not claim other people’s work/
ideas as your own. Plagiarism occurs when the words, ideas, assertions, theories, figures,
images, programming codes of others are presented as your own work. You must cite and
acknowledge all sources of information in your assignments. Failing to comply with the
SEECS plagiarism policy will lead to strict penalties including zero marks in assignments and
referral to the academic coordination office for disciplinary action.

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