Академический Документы
Профессиональный Документы
Культура Документы
Shanthi Pavan
Nagendra Krishnapura
4 January 2008
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DSP
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...0100011011...
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Continuous-time Discrete -time Continuous-time
Continuous-amplitude Discrete -amplitude Continuous-amplitude
Interface Electronics
(Signal Conditioning)
(A-D and D-A Conversion)
7V
LSB
6VLSB
5VLSB
4VLSB
3VLSB
2VLSB
V
LSB
0
0
Ts 2Ts 3Ts 4Ts 5Ts 6Ts 7Ts 8Ts 9Ts 10Ts
7V
LSB
6V
LSB
5V
LSB
4V
LSB
3V
LSB
2V
LSB
V
LSB
0
0 1 2 3 4 5 6 7 8 9 10
7V
LSB
6V
LSB
5V
LSB
4V
LSB
3V
LSB
2V
LSB
V
LSB
0
0 1 2 3 4 5 6 7 8 9 10
7VLSB
6VLSB
5VLSB
1.0
4VLSB
3V
LSB
2VLSB
V
LSB
fb
0 0
0 0
Ts 2Ts 3Ts 4Ts 5Ts 6Ts 7Ts 8Ts 9Ts 10Ts f 2f
s s
Z ∞
Xct (f ) = xct (t) exp(−j2πft)dt
−∞
7VLSB
6V
LSB
5V
LSB 1.0
4V
LSB
3V
LSB
2VLSB
V
LSB
0 0
0 1 2 3 4 5 6 7 8 9 10 0 0.5 1 1.5 2
∞
X
Xd [ν] = xd [n] exp(−j2πνn)
n=−∞
7V
LSB
6VLSB
5VLSB
4VLSB
3VLSB
2VLSB
V
LSB
0
0
Ts 2Ts 3Ts 4Ts 5Ts 6Ts 7Ts 8Ts 9Ts 10Ts
7V
LSB
6VLSB
5VLSB
1.0
4VLSB
3V
LSB
2VLSB
VLSB
f
b
0 0
0 0
Ts 2Ts 3Ts 4Ts 5Ts 6Ts 7Ts 8Ts 9Ts 10Ts f 2f
s s
∞
1 X
Xd [ν] = Xct (νfs − n)
Ts n=−∞
1.0
fb
0
0
fs 2fs
Reconstruction filter
1.0
fb
0
0
fs 2fs
1.0
fb
0
0
fs 2fs
7V
LSB
6VLSB
5VLSB
4VLSB
3VLSB
2VLSB
V
LSB
0
0
Ts 2Ts 3Ts 4Ts 5Ts 6Ts 7Ts 8Ts 9Ts 10Ts
7V
LSB
6VLSB
5VLSB
4VLSB
3VLSB
2VLSB
V
LSB
0
0
Ts 2Ts 3Ts 4Ts 5Ts 6Ts 7Ts 8Ts 9Ts 10Ts
6VLSB
5VLSB
4V
LSB
3V
LSB
2VLSB
VLSB
0
0
VLSB 2VLSB 3VLSB 4VLSB 5VLSB 6VLSB 7VLSB
Spectra of quantized sinewave before and after sampling Quantized sampled sinewave spectrum
0 0
−5 −5
−10 −10
dB
dB
−15 −15
−20 −20
−25 −25
−30 −30
0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.2 0.4 0.6 0.8 1
f/f f/f
s s
Spectra of quantized sinewave before and after sampling Quantized sampled sinewave spectrum
0 0
−5 −5
−10 −10
dB
dB
−15 −15
−20 −20
−25 −25
−30 −30
0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.2 0.4 0.6 0.8 1
f/f f/f
s s
y v y v
Σ
e = v-y
Modelled as an additive error
-VLSB/2 VLSB/2
V /2
LSB
−V
LSB
f
0 fs/2
Se(ν)
area=V2LSB/12
V2LSB/6
ν
0 1/2
1.0
f
b
0
0
fs 2fs
1.0
fb
0
0
fs 2fs
1.0
2
VLSB/6fs
f
b
0
0
fs 2fs
1.0
fb
0
0
fs/2 fs
1.0
V2 /6f
LSB s f
b
0
0
fs/2 fs
Sample at fs ≫ 2fin
Oversampling ratio OSR = fs /2fin
Filter the noise using a filter of bandwidth fb
2 /12/OSR
Mean squared value of error = VLSB
Increased signal to quantization noise ratio
1.0
V2 /6f
LSB s f
b
0
0
fs/2 fs
y v y v
Σ
e = v-y
Hard nonlinearity
Modelled as additive error
u high y v
Σ gain
+
-
u high y v
Σ gain
+
-
u high gain y v
Σ at low freq.
+
-
u z-1 y v
+ Σ 1-z-1
-
e
u z -1
y + v
+Σ
+ Σ 1-z-1
-
V z −1 /1 − z −1
STF = =
U 1 + z −1 /1 − z −1
= z −1
V 1
NTF = =
E 1 + z −1 /1 − z −1
= 1 − z −1
1.0
0
0 fs/2
1.0 1.0
2 2
VLSB/6fs VLSB/6f
fb s fb
0 0
0 0
fs/4 fs/2 fs/4
Z fb
ve2 = Sve (f )df
0
2
VLSB
Z fb
= 4 sin2 (πf /fs )df
6fs 0
2
VLSB
Z fb
≈ 4 (πf /fs )2 df
6fs 0
2
VLSB π 2 2fb 3
=
12 3 fs
2 3
VLSB π 2
1
=
12 3 OSR
u v
+ Σ H(z) A/D
-
Loop filter
D/A
X z Y V
- z-1
z-1
X z Y1 z Y V
- z-1 - z-1
z-1
E(1-z-1)
X z Y1 V
- z-1
z-1
U
L0 Y V
L1
U. STF(z) E U. STF(z)
U
L0
E.(NTF(z) -1) Y E. NTF(z) V
L1
15 15
10 10
5 5
0 0
−5 −5
−10 −10
−15 −15
−20 −20
0 100 200 0 100 200
Quantizer input for OBG=1.5 and OBG=3.5
Y V
Gain = ?
Y V
Gain = ?
E(v .y )
Gain = E(y .y ) .
Makes intuitive sense.
E(v .y ) is the average value of v .y .
E(v .y ) is a measure of how much the output “resembles”
the input.
Y V
Gain = ?
1 fs
Vin Vout
0 L
t
Very Slow Ramp VDAC
(0 to 1 over 1 second)
15
10
log(Quantizer Input)
−5
−10 MSA
−15
0 0.2 0.4 0.6 0.8 1
ADC Input
0.7
0.6
3−bit quantizer
0.5
0.4
2 3 4 5 6 7 8
Out of Band Gain
|NTF| 5
0
0 0.2 0.4 0.6 0.8 1
ω/π
Properly chosen poles reduce OBG of the NTF, enhancing
stability.
However, stability comes at the expense of increased
in-band noise.
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters
A Systematic NTF Design Procedure
Commonly used pole positions : Butterworth, Chebyshev,
Inv. Chebyshev etc.
Coefficients for these approximations readily gotten from
MATLAB.
Schreier’s Delta-Sigma Toolbox is an invaluable design aid.
One should understand what the toolbox does.
1.5
NTF
H
|H|
0.5
0
0 0.2 0.4 0.6 0.8 1
ω/π
−40
Butterworth
−60
−80
|NTF|
Inverse Chebyshev
−100
−120
−140
0 0.01 0.02 0.03 0.04
ω/π
Xin(z) V(z)
+ L(z) +
-
Xin(z) V(z)
+ L(z) +
-
0.6
0.4
0.2
C1
log(|1 + aejω|
−0.2
C2
−0.4
−0.6
−0.8
0 0.2 0.4 0.6 0.8 1
ω/π
= Zero
20
10
−10
C2
10 log |NTF|
−20
−30
C1
−40
−50
−60
−70
0 0.2 0.4 0.6 0.8 1
ω/π
10
−10
20 log |NTF|
−20
−30
−40
−50
−60
−70
0 0.2 0.4 0.6 0.8 1
ω/π
10
−10
20 log |NTF|
−20
−30
−40
−50
−60
−70
0 0.2 0.4 0.6 0.8 1
ω/π
−10
−20
20 log |NTF|
−30
−40
−50
−60
−70
0 0.05 0.1 0.15 0.2 0.25 0.3
ω/π
10
−10
20 log |NTF|
−20
−30
−40
−50
−60
−70
0 0.2 0.4 0.6 0.8 1
ω/π
U 1 1 k1 Y V
+ +
- z-1 z-1
U 1 1 k1
+ +
- z-1 - z-1
k2/k1
U 1 1 k1 Y V
+ +
- - z-1 z-1
γ
- 1 1 k1
U +
+
- z-1 - z-1
k2/k1
DAC
Vdac(t)
In Out
In Out
DAC
n t t
NRZ DAC RZ DAC
Vout [n]
L(s) ADC
-
DAC
Vdac(t)
e[n]
L(s)
-
p(t)
Vdac(t)
1
NRZ DAC
L(s)
-
p(t)
Vdac(t)
1
NRZ DAC
Ts
p(t) L(s)
l[n] = p(t)*l(t)
Break the loop after the sampler. kTs
1 1
1
s
1 t 1 t
k1 e(n)
Ts= 1
Vin 1 1 k2 Vout
+ s s + +
-
k1
Ts= 1
1 1 k2
s s +
1.5
Ts=1
Vin (t) 1 1 1 Vout [n]
s s + ADC
-
DAC
Vdac(t)
DAC
Vdac(t)
L(s) DAC
Vdac(t)
L(s) DAC
Vdac(t)
L(s) DAC
Vdac(t)
L(s) DAC
Vdac(t)
e[n]
Vin (t) Vout [n]
L(s) Σ +
-
L(z)
e[n]
Vin (t) Vout [n]
L(s) Σ +
-
L(z)
Alias
Rejection
∆f ∆f + fs f
Signal band
L(∆f )
Alias rejection is | L(∆f +fs ) |
Implicit anti-aliasing without an explicit filter !
Valuable feature of CT Delta-Sigma modulators.
|L|(dB)
Nominal
Higher OBG for the NTF.
Reduced maximum RC smaller
stable amplitude.
Closer to instability.
log (f)
Signal band
|L|(dB)
RC larger
Lower OBG for the NTF.
Increased maximum Nominal
stable amplitude.
“More” stable.
log (f)
Signal band
20
kp=0.7
kp=1
−20
|NTF (ejω)| (dB)
kp=1.3
−40
−60
−80
−100
0.2 0.4 0.6 0.8 1
ω/π
|NTF|
NOMINAL ω π
|NTF|
FAST LOOP ω π
|NTF|
NOMINAL ω π
|NTF|
SLOW LOOP ω π
e(n)
Ts= 1
Vin 1 Vout
+ s +
-
1 1
1
s
1 t 1 t
1 1
1
s
1 t 1 t
1 1
1
s
td 1 t td 1 2 t
1 1
1
s
td 1 t td 1 2 t
td=1
td=0.5
td=0
1
td=0.5
td=1
1
1 td 1 2 3 t 1
1 +
s +
td 1 t 1 td 1 2 3t
? 1 2 3 t
e(n)
Ts= 1
Vin 1 Vout
+ s + + td
-
k
k e(n)
Ts= 1
Vin 1 Vout
+ s + + td
-
-k
e(n)
Ts= 1
Vin 1 Vout
+ s + + td
-
-k
e(n)
Ts= 1
Vin Vout
+ H(s) + + td
-
-k
DAC
Vdac[n]
∆t t
DAC
Vdac(t)
vx vy
vx vy
ADC DAC
Clock
vx vy
vx vy
ADC DAC
Clock
vx vy
vx vy
ADC DAC
tdel
Clock
vx vx
ADC + ADC
Clock Clock
e(n)
DAC
Vdac(t)
vx vy
DAC DAC +
Clock Clock
e1(t)
y(n+1)
y(n-1)
= +
ERROR
[y(n)-y(n-1)]∆tn
[y(n+1)-y(n)]∆tn+1
y(n+1)
y(n-1)
= +
2y(n+1)∆tn+1
ERROR
2y(n-1)∆tn-1
2y(n-1)∆tn-1/2
2y(n+1)∆tn+1
y(n+1)
y(n)
∆Τn ∆Τn+2
σ2
Z π
2
σdy ≈ lsb |(1 − e−jω ) NTF (ejω )|2 dω
π 0
u v
+ Σ H(z) A/D
-
Loop filter
D/A
IDAC IDAC
b1φ2 C
b’1φ2+φ1
b2φ2 C Cf
φ2
Vref b’2φ2+φ1 − v
φ1 A/D
+
b’8φ2+φ1
b1-8 = thermometer coded v
b1
R
b’1
b2 Cf
R
Vref b’2 − v
A/D
+
b’8
b1-8 = thermometer coded v
b1ILSB
b2ILSB Cf
− v
A/D
+
VLSB VLSB
IDAC
IDAC
0 1 2 3 4 5 6 7 8
quantizer output v
Itot=8ILSB+Σk∆Ik
b1*Itot
IDAC
IDAC
0 1
quantizer output v
u v
+ Σ H(z) A/D
-
Loop filter
nonlinearly related
~
~ u in the to u in the signal band
signal band
D/A
(nonlinear)
u v w
+ Σ H(z) A/D D/A
-
Loop filter (nonlinear)
D/A
(ideal)
IDAC
IDAC
0 1 2 3 4 5 6 7 8
quantizer output v
INL
quantizer output v
Iout [0] = 0
Iout [8] = 8n=1 In
P
6
Ideal output
−3
x 10
3
2
DAC error
1
0
−1
−2
−3
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters
Effects of DAC nonlinearity
σ /I = 0.001 (0.1%)
I LSB
40
Ideal output
DAC error
20
−20
−40
−60
−80
−100
−120
0 fb 2fb 3fb 4fb
Distortion
Increased in band quantization noise
I8
I7
I6
I5
I4
I3
I2
I1
1 1 1 1 3 3 3 3
5
IDAC/ILSB
0
0 1 2 3 4 5 6 7 8
v
b1 b1 b1
b2 b2 b2
b3 b3 b3
b4 b4 b4
b5 b5 b5
b6 b6 b6
b7 b7 b7
b8 b8 b8
c1 c2 c3 c4 c5 c6 c7 c8 c1 c2 c3 c4 c5 c6 c7 c8 c1 c2 c3 c4 c5 c6 c7 c8
cycle 1 cycle 2
c1 c2 c3 c4 c5 c6 c7 c8 c1 c2 c3 c4 c5 c6 c7 c8
cycle 3 cycle 4
Fixed connections Randomized connections
M × M switching matrix
In each cycle, randomly choose a set of connections
Converts distortion to white noise
M! possible connections in the switch
matrix (9! = 362880)—use a smaller subset
Switch matrix introduces delay in the loop
−20
−40
−60
−80
−100
−120
0 f 2f 3f 4f
b b b b
u v
+ Σ H(z) A/D
-
Loop filter
butterfly
D/A scrambler
I8
I7
I6
I5
I4
I3
I2
I1
1 2 2 3 3 0 4 7 3 5 3 2
INL
dac output IDAC
0 1 2 3 4 5 6 7 8
quantizer output v
DNL
0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8
time
dac
output
error
time
pattern repeats
after 8 cycles
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters
Data weighted averaging—dc input
v
rotator D/A
v 1
D/A 1-z-1
1-z-1
D/A
Ik=ILSB+∆Ik extended
I1 I2 I8 I1 I2 I8
IDAC
INL
D/A input
I8 I8
I7 I7
I6 I6
I5 I5
I4 I4
I3 I3
I2 I2
I1 I1
I8 I8
I7 I7
I6 I6
I5 I5
I4 I4
I3 I3
I2 I2
I1 I1
accumulated v 1 3 5 8 11
difference of successive outputs
quantizer output v 1 2 2 3 3
INL(v’)
v 1 v’
-1
D/A Σ 1-z-1
1-z
INL
D/A input
b1 c1
b2 c2
b3 c3 s0
b4 c4
b5 c5
b6 c6 MUX
b7 c7
b8 c8
s0 s1 s2 s0
−20
−40
−60
−80
−100
−120
0 f 2f 3f 4f
b b b b
u v
+ Σ H(z) A/D
-
Loop filter
barrel
D/A shifter
thermometer
accumulator to
binary
I8
I7
I6
I5
I4
I3
I2
I1
1 2 2 3 3 0 4 7 3 5 3 2
I8
I7
I6
Double I5
Index
Averaging I4
I3
I2
I1
1 2 2 3 3 0 4 7 3 5 3 2
I8
I7
I6
Bidirectional I
5
Data
Weighted I4
Averaging I3
I2
I1
1 2 2 3 3 0 4 7 3 5 3 2
su sy vector
Σ quantizer
-min() M bits
-
se +
H2-1 Σ
sv
Mismatch shaped by the transfer function Hmismatch
Deviation from exact shaping due to the constraint
|sv | = |v |
Complex hardware
u v v’
+ Σ H(z) A/D f(v)
-
Loop filter
look up table
~
~ u in the nonlinearly related
signal band to u in the signal band
D/A
(nonlinearity f(v))
/4 /18
∆Σ ADC f(v)
/4 /18
∆Σ ADC 214 Σ
f(v)-1 /10
/4 /10 /10 /4
∆Σ ADC 26 Σ ∆Σ mod.
/10 /3
f(v)-1 ∆Σ mod.
I0 Iout
φ φ φ φ
φ φ
More complicated
Might require calibration
120
Peak SQNR
115
SNR (dB)
110
Peak SJNR (50ps jitter)
105
100
Peak SJNR (100ps jitter)
95
1.5 2 2.5 3 3.5
Out of Band Gain
4 30 % Lower
3.5
3
|NTF(e )|
2.5
jω
Nominal
2
30 % Higher
1.5
0.5
0
0 0.1 0.2 0.3 0.4 0.5
ω/π
125 −0.8
120 −1
115 −1.2
110 −1.4
105 −1.6
0.7 0.8 0.9 1 1.1 1.2 1.3 1.4
[RC]nom/[RC]
10
5
Quantizer Output
−5
−10
k1
+ ω1 ω2 ω3 k2
- s s s
k3
+ ω1 ω2 ω3
- s - s s
-
R1 vom1
R2 vop2
R3
vip + + + vom3
100K - 400K - 500K -
A1 A2 A2
vim + + + vop3
- vop1 - vom2 -
idacp
1.05346pF Cs 730fF 8.6264pF
R11 Rf
vop1
R21 R11 = 337 K
vop2
R31 R21 = 506 K
vop3 + vom
- R31 = 112 K
A2
vom3 + vop Rf = 200K
-
vom2
Cs = 172fF
vom1
Vi Ri
− Rest of Loop Filter
+
....
Rf
Excess Delay
Compensation
DAC2
DAC1
Vi Ri
− Rest of Loop Filter
+
....
Cx Rf
DAC1
Vtail
M7 M4 M9 M41 M71
IQ IQ
M6 M2 M21 M61
biasn2
M3 M31
cmfbn1
gnda
(a)
vdda
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters
Second Opamp
CMFB First Stage Second Stage
vdda
Rz
Vbiasp Vbiasp Cc
M3 M3 M6
Vcmfb
v1m v1p vop vom
Cc2
M7
v1m Vbiasp
M2
Vcmref Cc2
M11
Vcm M16
gnda
Vbot
Vref<0> d<15>
ip
im
....
....
Vref<15> d<0>
ip 15
im
to DEM/DAC
Vref<0> db<0>
Vbot
Vtop
L La C2MOS
Cb M1 M4
LC LC
ip op
X LR
im Y om
LC LC
L Cb La M2 M3
Ld
Vrefm Vcm L
(a) gnda
Ld
L , La
(b)
LC
LR
Td
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters
Effect of Random Offset in the Comparators
125
120
115
SNR (dB)
110
105
100
95
0 0.1 0.2 0.3 0.4
σoffset (in LSB)
4 - Bit Adder
Therm. to 4
Binary S<0:3>
A<0:3>
Converter D Q
4
+
D Q
B<0:3> Cout
Ci n
4
dem_clk
in<0:14>15 15 Latch 15
Barrel Shifter
( FLASH <0:14>
O/P ) DAC_in<0:14>
EN ( DAC I/P )
dem_clkd
1.6 MΩ
Vrefm
dacm
R1 I
(a)
gnd
Vdda
(b) R
(Vrefp - Vcm)(15/R)
I Rx Vrefp
gnd −
+
C1 Cext
vdd +-
I Rx Vrefm
(Vcm - Vrefm)(15/R)
R
gnd
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters
Test Setup and Die Layout
REFERENCES
FLASH ADC/DEM/DAC
LOOP FILTER
Vip
4 bits
Vcm Σ∆ Converter To Logic Analyzer
Vim
Differential
Audio
Source Vrefp Vrefm
1 µF
Vcmref
0.9 V
0.1 nF
80
60
SNR (dB)
40
20
SNR
SNDR
0
93.5 dB
−20
−100 −80 −60 −40 −20 0
Input Power (dB FS)
−20
−40
PSD (dB)
−60
−80
−100
0 5 10 15 20
Frequency (kHz)
−20
PSD (dB)
−40
−60
−80
−100
0 1 2
10 10 10
Frequency (kHz)