EC6202

UNIT III AMPLIFIERS

BJT SMALL SIGNAL MODEL – ANALYSIS OF CE, CB, CC AMPLIFIERS- GAIN
AND FREQUENCY RESPONSE – MOSFET SMALL SIGNAL MODEL– ANALYSIS OF
CS AND SOURCE FOLLOWER – GAIN AND FREQUENCY RESPONSE – HIGH
FREQUENCY ANALYSIS.
BJT SMALL SIGNAL MODEL – ANALYSIS OF CE AMPLIFIERS:
 Let us consider the common emitter amplifier circuits using self bias or voltage divider
bias as shown in the figure (a) in the absence of input signal, only DC voltage are present
in the circuit. This is known as zero signal or no signal condition or quiescent condition
for the amplifier.

FIG: (a) Common Emitter Amplifier Circuit.

 The DC collector emitter voltage, VCE the DC collector current IC and DC base current IB
is the quiescent operation point for the amplifier. On this DC quiescent operating point
we superimpose AC signal by application of AC sinusoidal voltage at the input. Due to
this base current varies sinusoidally, as shown in figure (b).

FIG: (b) IBQ is quiescent DC base current

 As the result the collector current and the output voltage, VCEQ will also vary sinusoidally
about their quiescent values, as shown in the figure (c) and d (d).

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 The collector current varies above and below its Q point value in phase with the base
current, and the collector to emitter voltage varies above and below its Q point value 1800
out of phase with base voltage.

FIG: (c) & (d) Output Collector Current.

 Thus for common emitter amplifier there is a phase shift of 180 0 between input and
output voltages. When one cycle of input is completed, one cycle of output will also be
completed. This means the frequency of output sinusoidal is the same as the frequency of
input sinusoid. This is the amplification process; frequency of the output signal does not
change; only the magnitude of the output is larger than that of input.
h- Parameter for common emitter amplifier:

FIG: CE configuration hybrid model.

The function of components in the CE amplifier circuits are as follows.
 Biasing circuit: the resistance R1, R2 and RE forms the voltage divider biasing circuit for
the CE amplifier. It sets the proper operating point for the CE amplifier.
 Input capacitor C1: this capacitor couples the signal to the base of the transistor. It
blocks any DC component present in the signal and passes only AC signal for
amplification. Because of this biasing condition are maintained constant.
 Emitter by pass capacitor CE: an emitter by pass capacitor CE is connected in parallel
with the emitter resistance, RE to provide a low reactance path to the amplified AC signal.
If it is not inserted, the amplified AC signal passing through RE will cause a voltage drop
across it. This will reduce the output voltage reducing the gain of the amplifier.
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ANALYSIS OF CB AMPLIFIERS:
 The figure (a) shows common base circuit. The signal source is coupled to the emitter of
the transistor via capacitor C1. The load resistance RL is coupled to the collector of the
transistor via capacitor C2.

FIG :( a) Common Base Amplifier Circuit

 The positive going pulse of input source increases the emitter voltage. As base voltage is
constant, the forward bias of emitter base junction reduces. This reduces I b, reducing IC
and hence the drop across RC.
h- Parameter for common base amplifier:

FIG: CB configuration hybrid model.

 Since Vo = VCC – IC RC, the reduction in IC results in an increase in V o. Therefore we can

say that positive going input produce positive going output and similarly negative going
input produces negative going output and there is no phase shift between input and output
in a common base amplifier.
ANALYSIS OF CC AMPLIFIERS:
 The figure (a) shows common collector circuit. The DC biasing is provided by R1, R2
and RE. The load resistance is capacitor coupled to the emitter terminal of the transistor.
When a signal is applied via to the base of the transistor, V B is increased and decreased as
the signal goes positive and negative, respectively.
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 From the figure we can write VE = VB – VBE. Considering VBE fairly constant, we say
that variation in the VB appears at emitter and emitter voltage VE will vary same as base
voltage VB.

FIG :( a) Common Collector Circuit

 Since the emitter is output terminal, it can be noted that the output voltage from a
common collector circuit is the same as its input voltage.
h- Parameter for common collector amplifier:

FIG: CC configuration hybrid model.

 In other words, we can say that in common collector circuit emitter terminal follows the
signal voltage applied to the base. Hence the common collector circuit is also known as
an emitter follower.
GAIN AND FREQUENCY RESPONSE:
 An amplifier should ideally provide the same amplification for all frequencies.
 The degree to which this is done is usually indicated by a curve, known as frequency
response curve of the amplifier.
 This curve is a plot of the voltage gain of an amplifier against the frequency of input
signal. A typical frequency response of an RC coupled amplifier is shown in figure (a &
b).
 To plot this curve input voltage to the amplifier is kept constant and frequency of input
signal is continuously varied.
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 The output voltage at each frequency o input signal is noted and the gain of the amplifier
is calculated. The output voltage or the voltage gain of the amplifier is then plotted
against frequency.

FIG: (a) RC coupled CE amplifier

 The frequency response is nearly ideal over a wide range of mid frequency. Only at low
and high frequency ends, the gain deviates from ideal characteristics. The decreases in
voltage gain with frequency is called roll off.

FIG: (b) Frequency response of an RC coupled amplifier

Cut – off frequencies and bandwidth:
 To indicate how constant amplifiers voltage gain is with frequency variation. We may
specify the range of frequencies over which the gain does not deviate more than 70.7% of
the maximum gain at some reference mid frequency. The two frequencies at which
voltage gain starts decreasing below 70.7% are indicated by F1 and F2. These are called
the lower cut-off and upper cut-off frequencies respectively.
 Bandwidth of the amplifier is defined as the difference between F2 and F1 i.e bandwidth
of the amplifier = F2 – F1.

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 The frequency F2 lies in high frequency region, while the frequency F1 lies in low
frequency region.
 These two frequencies are also referred to as half power frequencies since gain or output
voltage drop to 70.7% of maximum value and this represent a power level of one half the
power at the reference frequency in mid frequency region.
Advantage of RC coupling:
 It requires resistors and capacitor which are very cheap, light in weight and small in size.
 Its frequency response is excellent over the audio frequency range.
 The nonlinear distortion due to RC coupling is minimum because it does not employ any
inductive components such as coil or transformer.
 Its overall amplification is greater than the amplification provided by other coupling.
Disadvantage of RC coupling:
 Impedance matching is not possible with RC coupling.
 Amplifier becomes noisy with age and in the humid environment.
Application:
 Used in all audio small signal amplifiers.
 Used in record players, tape recorders, public address systems, radio receivers and
television receivers.
MOSFET SMALL SIGNAL MODEL:
 The figure (a) shows N-channel, enhancement mode MOSFET common source circuit
with a time varying (AC) voltage source in series with a the DC source. Assume the time
varying input signal is sinusoidal.
 The figure (a) shows the MOSFET characteristics DC load line and Q point where the
DC load line and Q point are function of VGS, VDD, RD and the MOSFET parameters.
 For the output voltage to be a linear function of the input voltage, the MOSFET biased in
the saturation region.
 The figures (b) show sinusoidal variations in the gate to source voltage drain current and
drain to source voltage, as a result of the sinusoidal source Vi.
 The total gate to source voltage is the sum of VGSQ and Vi.

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 As Vi increases, the instantaneous value of VGS increases, and the bias point moves up
the load line. A larger value of VGS means a larger drain current and a smaller value of
VDS.

 From figure (a) we see that the output voltage is

VDS  VO  VDD – i D R D ---------- (1)

 The small signal drain current is related to small signal gate to source voltage by the
transconductance gm. The relationship is given by,
Id
gm = = 2K(VGSQ - VT) ---------- (2)
Vgs
 Using equation (1) we obtain
Vo = VDD - (IDQ + id)RD = (VDD - IDQRD) - idRD ---------- (3)
 The output voltage is also a combination of DC and AC values. The time varying output
signal is the time varying drain to source voltage, or
Vo = Vds = -idRD ---------- (4)
 From the equation (2) we have
id = gmVgs ---------- (5)
 In summary, the following relationship exists between the time varying signals for the
circuit in figure (a).

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 The equations are given in terms of the instantaneous AC values, as well as the phasors.
We have,
Vgs = Vi ---------- (6)
and
id = gmVgs ---------- (7)
Also
Vds = -idRD ---------- (8)
 The figure (c) shows the AC equivalent circuit. Here, the DC source in the figure (a) are
made zero. From the equivalent circuit for the NMOS amplifier circuit, we can draw a
small equivalent circuit for the MOSFET.

FIG: (c) AC equivalent circuit of common source amplifier with NMOS transistor

 The figure (d) shows the small signal low frequency AC equivalent circuit for N channels
MOSFET. The relation of Id by V gs is included as a current source gmVgs connected from
drain to source. The input impedance is represented by the open circuit at its input
terminals since gate current IG is zero.

FIG: (d) Small signal equivalent circuit, including output resistance for NMOS transistor
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 We know that the circuit has the finite output resistance of a MOSFET biased in the
saturation region because of the non zero slope in the iD versus VDS curve.
We also know that,
iD = K[(VGS - VT)2 (1 + λVDS)] ---------- (9)
 Where λ is the channel length modulation parameter and is a positive quantity. The small
signal output resistance is defined as,

 iD 
-1

ro =   VGS = VGSQ = Const ---------- (10)

 VDS 
ro = [λK(VGSQ - VT)2 ]-1  [λIDQ]-1 ---------- (11)
 This is small signal output resistance is also a function of the Q point parameters. The

figure (e) shows the small signal equivalent circuit of common source circuit is shown in

figure (a)

FIG: (e) Small signal equivalent circuit of common source circuit with NMOS transistor
model
ANALYSIS OF CS AND SOURCE FOLLOWER:
Some of the basic common source amplifiers are,

 Common source configuration

 Common source amplifier with source resistor

 Common source circuits with source bypass capacitor

Common source configuration:

 The figure (a) shows the common source circuit with voltage divider biasing and
coupling capacitor. The MOSFET is biased near the middle of the saturation region by
R1 and R2 resistor to work as an amplifier.

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FIG: (a) Common source circuit with voltage divider biasing and coupling
 Assume that the signal frequency is sufficiently large for the coupling capacitor to act
essentially as a short circuit. The signal source is represented by a thevenin equivalent
circuit, in which the signal voltage source Vs, is in series with an equivalent source
resistance RSi. Here Rsi should be much less than the amplifier input resistance, R i =
R1‖R2 in order to minimize loading effects.
 From the figure (b) shows the resulting small signal equivalent circuit.

FIG: (b) Small signal equivalent circuit

The resulting small signal equivalent circuit
Vo = -gmVgs(ro  RD) ---------- (1)
The input gate to source voltage is
 Ri 
Vgs =   Vi ---------- (2)
 Ri + Rsi 
So the small signal voltage gain is
Vo  Ri 
Av = = -gm(ro  RD).   ---------- (3)
Vi  Ri + Rsi 

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 Since RSi is not zero the amplifier input signal Vi is less than the signal voltage. This is

known as loading effect. It reduces the voltage gain of the amplifier.

 The input resistance is Ris = R1 ‖R2

 The output resistance is Ro = RD ‖ ro

 We can relate the AC drain current to the AC drain to source voltage as Vds = -Id(RD)

 The figure (c) shows the DC load line the transition point, and the Q point which is in the

saturation region.

FIG: (C) DC load line and transition point separating saturation and non-saturation
regions
Common source amplifier with source resistor:
The figure (d) shows the common source amplifier with source resistor.

FIG: (d) Common source amplifier with source resistor

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 The source resistor is introduced to stabilize the Q point against variation in the MOSFET
parameters. However like in BJT circuit, a source resistor reduces the signal gain.
Common source circuits with source bypass capacitor:
 A source by pass capacitor connected across the source resistor in the common source
circuit will minimize the loss in the small signal voltage gain, while maintaining Q point
stability.

FIG: (e) Common source circuit with source by pass capacitor

 The Q point stability can be further increased by replacing the source resistor with a
constant current source. The figure (e) shows common source circuit with source by pass
capacitor. It acts as short circuit for AC signal and open circuit for DC signal.
SOURCE FOLLOWER:
 The figure (f) shows the common drain amplifier circuit. It is also known as grounded
drain amplifier. In this amplifier circuit, drain is used as a signal ground and hence RD is
not needed. The input signal is coupled via CC1 to the MOSFET gate and the output
signal at the MOSFET source is coupled via C C2 to a load resistance RL.

FIG: (f) Common drain amplifier

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 Since RL is in effect connected in series with the source terminal of the MOSFET it is

more convenient to use the MOSFET to use the MOSFETs model for the analysis. This

is shown in figure (g).

FIG: Small signal equivalent circuit for CD amplifier

Analysis:
R i = RG ----------- (1)

Ri RG
Vi = Vs = Vs ----------- (2)
Ri + Rsi RG + Rsi
 From the figure (g) it can be seen that the load résistance R L is in parallel with ro and
1
resistance in series with RL ‖ ro
gm
 The input voltage Vi appears across the total resistance and hence by applying the voltage
divider rule, we have
Vi X (RL  ro)
Vo = ----------- (3)
1 / gm + (RL  ro)
Vo (RL  ro)
AV = = ----------- (4)
Vi 1 / gm + (RL  ro)
 The open circuit voltage gain AVo (RL = ∞) is given as

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ro ----------- (5)
A Vo =
1 / gm + ro
1
 Since ro >> the open circuit voltage gain tends to unity, however it is always less than
gm
unity.
 Usually RL << ro and hence the voltage gain by equation (4) becomes
Vo RL Since RL <<ro ----------- (6)
AV = =
Vi 1 / gm + RL

The overall voltage gain of the CD amplifier is given by

Vo Vo Vi (RL  ro) RG
A Vs = GV = X = X ----------- (7)
Vs Vi Vs 1 / gm + (RL  ro) RG + Rsi
The output resistance Ro is given by
1 1
Ro =  ro = ----------- (8)
gm gm

GAIN AND FREQUENCY RESPONSE – HIGH FREQUENCY ANALYSIS:

 The figure (a) shows the CS MOSFET amplifier. Its gain at low frequency due to the

effect of CC1, Cs and CC2. Its gain at high frequency due to the effect of C gs and Cgd.

FIG :(a) CS MOSFET amplifier

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The figure (b) shows the frequency response of CS MOSFET amplifier

FIG: (b) Frequency response of CS MOSFET amplifier

High frequency response:

 The figure (c) shows the equivalent circuit for CS MOSFET amplifier

FIG: (c) equivalent circuit for CS MOSFET amplifier

 Let us consider the output node. The load current is g m vgs – Igd, where gm vgs is the
output current of the MOSFET and Igd is the current supplied through the very small
capacitance Cgd.
 At frequencies in the vicinity of fH, the Igd is very small and can be neglected hence, we
can write
Vo  -ILR'L = -gmVgsR'L Where R'L = -ro  RD  RL ----------- (1)
 Now consider the input node. We can replace C gd at the input side with the equivalent
capacitance Ceq using miller’s theorem. This is shown in figure (d)

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FIG :( d) Input node

By miller theorem, equivalent capacitance is given by,

Ceq  1  AV  C  1  AV  Cgd ----------- (2)

Since input voltage is Vgs, we have

Vo -gmVgsR'L
Av = = = -gmR'L ----------- (3)
Vi Vgs
Total input capacitance Cin can be given by,
Cin = Cgs + Ceq = Cgs + (1+ gmR'L)Cgd ----------- (4)
The total resistance is given by,
R'si = Rsi  RG ----------- (5)
By considering input circuit as a simple time constant circuit we have
τ = RC = R'SiCin ----------- (6)
1 1
ωH = ω0 = = ----------- (7)
τ R'siCin
1
fH = ----------- (8)
2πR'SiCin

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