Lesson Plan in Computer System and

Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
November 13, 2019
Topic: Computer System Concept

Objective:
At the end of this lesson, the learner should be able to cite the basic concept of
computer system.

Discussion:
 A computer is a data processing machine which is operated automatically under the
control of a list of instructions called a program stored in its main memory.
 The von Neumann Architecture
 Inside a computer, data and control information (instructions) are all represented in
binary format which uses only two basic symbols: “0” and “1”.
 A machine instruction is represented as a sequence of bits (binary digits)
o What has to be done (the operation code).
o To whom the operation applies (source operands).
o Where does the result go (destination operand).
o How to continue after the operation is finished.
 Four types of Machine instructions
o Data transfer between memory and CPU registers
o Arithmetic and logic operations
o Program control
o I/O transfer
 Control Unit performs the control by question how are the elements inside the CPU and
the interface to the external data path controlled (synchronized) in order to work
properly.
 Main Memory is used to store the program and data which are currently manipulated by
the CPU. And Secondary Memory provides the long-term storage of large amounts of
data or program.

Activity:
Draw in your understanding how you see the flow of data or instruction inside a
computer system.
Lesson Plan in Computer System and
Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
November 20, 2019
Topic: General Computer Architecture

Objective:
At the end of this lesson, the student should be able to understand the general
architecture of a computer.

Discussion:
 CPU performs the necessary arithmetic and logic operations and controls the timing and
general operation of the comupter system.
 The microprocessor or CPU reads each instruction from the memory, decodes it and
executes it. It processes the data as required in the instructions. The process is in the
form of arithmetic and logical operations. The data is retrieved from memory or taken
from an input device and the result of processing is stored in the memory or delivered to
an appropriate output device, all as per the instructions.
 Accumulator Register – known as result register and it is an 8-bit register used in various
arithmetic and logical operations.
 General Purpose Registers or Scratch Pad Memory
 Instruction Register – this 8-bit register stores the next instruction to be executed.
 Program counter – this is a 16-bit register which holds the address of the next instruction
that has to be fetched from the main memory and loaded into the instruction register.
 Stack Pointer – this is also a 16-bit register and is used by the programmer to maintain a
stack in the memory while using subroutines.
 Status Register or Condition Flags
 Dedicated Registers
 Non-pipelining processing

Activity:
Quiz
Lesson Plan in Computer System and
Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
November 27, 2019
Topic: RISC and CISC Computer Architectures

Objective:
At the end of this lesson, the student should be able to understand RISC and CISC
architectures of computer

Discussion:
 The RISC architecture is an attempt to produce more CPU power by simplifyin the
instruction set of the CPU known as Reduced Instruction Set Computers (RISCs), and
it’s represent an important innovation in the area of computer organization.
 Evaluation of Program Execution
 What is really better RISCs or CISCs
Lesson Plan in Computer System and
Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
December 4, 2019
Topic: Computer Memory Systems

Objective:
At the end of this lesson, the student should have knowledge of computer memory
systems.

Motivation:
How does the human brain work?

Discussion:
Main memory is a fast, random access, expensive memory located close to the CPU but
not inside. The main memory store program and data which are currently manipulated by the
CPU. Secondary memory is slow, cheap, direct access memory and located remotely from the
CPU.

A cache memory is a small, very fast memory that retains copies of recently used information
from main memory. It operated transparently to the programmer, automatically deciding which
values to keep and which to overwrite. There are two types of cache systems: unified and split
caches.

A cache memory is a small amount of fast memory placed between the processor and main
memory and located either on the processor chip or on a separate module.

The operations between main memory and cache memory requires algorithm to map main
memory blocks into cache lines. A method is needed to determine which main memory block
occupies into cache lines.
Lesson Plan in Computer System and
Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
December 11, 2019
Topic: Computer Instructions Pipelining

Objective:
At the end of this lesson, the student should have knowledge of computer instructions
pipelining

Discussion:
Instruction execution is extremely complex and involves several operations which are
executed successively, this implies a large amount of hardware, but only one part of this
hardware works at a given moment. The instruction cycle consists of many stages, each stage
has its own function during instruction execution, these stages are: fetch instruction (FI), decode
(DI), fetch operands (FO), and execute instruction (EI).

Pipelining is an implementation technique whereby multiple instructions are overlapped in

execution. Pipeline technique is a strategy to solve a problem of how to execute multiple
instruction in short time without additional hardware but only by letting different parts of the
hardware to work for different instructions at the same time.

In two stage pipeline the instruction goes through two stages only fetch instruction (FI) and
execute instruction (EI).

In six stage pipeline the instruction complete the process passing six stages: fetch instruction
(FI), decode instruction (DI), calculate operand address (CO), fetch operand (FO), execute
instruction (EI) and write operand (WO).
Structure hazards occur when a certain resources memory, functional unit are requested by
more than one instruction at the same time.
Lesson Plan in Computer System and
Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
January 22, 2020
Topic: Superscalar System Architecture

Objective:
At the end of this lesson, student should be able to understand superscalar system
architecture

Discussion:
A superscalar architecture is one in which several instructions can be initiated
simultaneously and executed independently. Pipelining allows several instructions to be
executed at the same time, but they have to be in different pipeline stages at a given
moment.

Super pipelining is based on dividing the stages of a pipeline into sub stages and thus
increasing the number of instructions which are supported by the pipeline at a given moment

Superscalar architecture allows several instructions to be issued and completed per

clock cycle, consists of a number of pipelines that are working in parallel.

The ability of a superscalar processor to execute instructions in parallel is determined by

two policies which limits the process of superscalar execution.
Lesson Plan in Computer System and
Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
January 29, 2020
Topic: Parallel Computation Systems

Objective:
At the end of this lesson, the student should be able to have knowledge of parallel
computation systems

Discussion:
Parallel computations systems are important because of high performance of operation’s
needs.

As mentioned in above section that one solution to the need for high performance is
using parallel computer or architectures in which several CPUs are running in order to solve a
certain application. Such computers have been organized in very different ways.

A single instruction single data stream SISD is uniprocessor machine able to execute a
single instruction which operated on single data stream. In SISD machine instructions are
processed sequentially and hence computer adopted this model are called sequential
computers.

An SIMD computer system is a multiprocessor machine able to execute the same

instruction in all the CPUs but operate in different data stream. Machines based on SIMD are
suitable for scientific computing because of they involve lots on matrix operation.

A multiple instruction single data computer system is a multiprocessor machine capable

to execute different instruction on different processor but all of them operate on same data.

A MIMD computer system is multiprocessor machine have ability to execute multiple

instructions on multiple data sets.
 In shared memory MIMD model all the processor are connected to a single memory and
able to access to this memory.

In distributed memory system MIMD model all processors have their own local memory,
known as loosely coupled multiprocessor system.
Lesson Plan in Computer System and
Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
February 5, 2020
Topic: An Overview of Networks

Objective:
At the end of this topic, student should have understood the basic of networks.

Discussion:
These three topics – LANs, IP and TCP – are often called layers; they constitute the Link
layer, the Internetwork layer, and the Transport layer respectively. Together with the Application
layer (the software you use), these form the “four-layer model” for networks. A layer, in this
context, corresponds strongly to the idea of a programming interface or library, with the
understanding that a given layer communicates directly only with the two layers immediately
above and below it. An application hands off a chunk of data to the TCP library, which in turn
makes calls to the IP library, which in turn calls the LAN layer for actual delivery. An application
does not interact directly with the IP and LAN layers at all.

The LAN layer is in charge of actual delivery of packets, using LAN-layer-supplied

addresses. It is often conceptually subdivided into the “physical layer” dealing with, e.g., the
analog electrical, optical or radio signaling mechanisms involved, and above that an abstracted
“logical” LAN layer that describes all the digital – that is, non-analog – operations on packets.
The physical layer is generally of direct concern only to those designing LAN hardware; the
kernel software interface to the LAN corresponds to the logical LAN layer.
Lesson Plan in Computer System and
Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
February 12, 2020
Topic: Data Rate, Throughput and Bandwidth

Objective:
At the end of this topic, the student should understand the important things in networking

Discussion:
Any one network connection –eg at the LAN layer – has a data rate: the rate at which
bits are transmitted.In some LANs (eg Wi-Fi) the data rate can vary with time. Throughput refers
to the overall effective transmission rate, taking into account things like transmission overhead,
protocol inefficiencies and perhaps even competing traffic. It is generally measured at a higher
network layer than the data rate.

The term bandwidth can be used to refer to either of these, though we here use it mostly as a
synonym for data rate. The term comes from radio transmission, where the width of the
frequency band available is proportional, all else being equal, to the data rate that can be
achieved.

In discussions about TCP, the term goodput is sometimes used to refer to what might also be
called “application-layer throughput”: the amount of usable data delivered to the receiving
application. Specifically, retransmitted data is counted only once when calculating goodput but
might be counted twice under some interpretations of “throughput”.

Data rates are generally measured in kilobits per second (kbps) or megabits per second (Mbps);
the use of the lower-case “b” here denotes bits. In the context of data rates, a kilobit is 103bits
(not 210) and a megabitis 106bits. Somewhat inconsistently, we follow the tradition of using kB
and MB to denote data volumes of 210and 220bytes respectively, with the upper-case B
denoting bytes. The newer abbreviations KiB and MiB would be more precise, but the
consequences of confusion are modest.
Lesson Plan in Computer System and
Networks

Prepared by:
Michael Rey C. Bermillo
Grade 11 ICT
February 19, 2020
Topic: Packets

Objective:
At the end of this topic, the student should understand the importance of packets in
understanding networking.

Discussion:
Packets are modest-sized buffers of data, transmitted as a unit through some shared set
of links. Of necessity, packets need to be prefixed with a header containing delivery information.
In the common case known as datagram forwarding, the header contains a destination address;
headers in networks using so-called virtual-circuit forwarding contain instead an identifier for the
connection. Almost all networking today (and for the past 50 years) is packet-based, although
we will later look briefly at some “circuit-switched” options for voice telephony.
At the LAN layer, packets can be viewed as the imposition of a buffer (and addressing)
structure on top of low-level serial lines; additional layers then impose additional structure.
Informally, packets are often referred to as frames at the LAN layer, and as segments at the
Transport layer.
The maximum packet size supported by a given LAN (eg Ethernet, Token Ring or ATM)
is an intrinsic attribute of that LAN. Ethernet allows a maximum of 1500 bytes of data. By
comparison, TCP/IP packets originally often held only 512 bytes of data, while early Token Ring
packets could contain up to 4 kB of data. While there are proponents of very large packet sizes,
larger even than 64 kB, at the other extreme the ATM (Asynchronous Transfer Mode) protocol
uses 48 bytes of data per packet, and there are good reasons for believing in modest packet
sizes.