Академический Документы
Профессиональный Документы
Культура Документы
Line EMI
– + VOUT
Input Filter 400 VDC
VREF
VCC
10 2 5 4 3 16
VREF
ENA PKLMT MULTOUT ISENSE CAOUT GTDRV
VSENSE 11
6 IAC
UC3854
8 VRMS VAOUT 7
15 14 13 12 1 9
VCC VREF
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
UC1854, UC2854, UC3854
SLUS336A – JUNE 1998 – REVISED DECEMBER 2016 www.ti.com
Table of Contents
1 Features .................................................................. 1 8.4 Device Functional Modes........................................ 11
2 Applications ........................................................... 1 9 Application and Implementation ........................ 12
3 Description ............................................................. 1 9.1 Application Information............................................ 12
4 Revision History..................................................... 2 9.2 Typical Application .................................................. 12
5 Device Comparison Table..................................... 3 10 Power Supply Recommendations ..................... 16
6 Pin Configuration and Functions ......................... 3 11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
7 Specifications......................................................... 5
11.2 Layout Example .................................................... 17
7.1 Absolute Maximum Ratings ...................................... 5
7.2 ESD Ratings.............................................................. 5 12 Device and Documentation Support ................. 18
7.3 Recommended Operating Conditions....................... 6 12.1 Documentation Support ........................................ 18
7.4 Thermal Information .................................................. 6 12.2 Related Links ........................................................ 18
7.5 Electrical Characteristics........................................... 6 12.3 Receiving Notification of Documentation Updates 18
7.6 Typical Characteristics .............................................. 8 12.4 Community Resources.......................................... 18
12.5 Trademarks ........................................................... 18
8 Detailed Description ............................................ 10
12.6 Electrostatic Discharge Caution ............................ 18
8.1 Overview ................................................................. 10
12.7 Glossary ................................................................ 18
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 11 13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
• Added Applications section, Device Information table, Pin Configuration and Functions section, Specifications
section, ESD Ratings table, Recommended Operating Conditions table, Detailed Description section, Application
and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1
• Added Thermal Information table ........................................................................................................................................... 6
• Changed IAC value in both Multiplier Output vs Multiplier Inputs images from mA to µA. ................................................... 8
GTDRV
PKLMT
GND
VCC
NC
GND 1 16 GTDRV
PKLMT 2 15 VCC
3
20
19
CAOUT 3 14 CT
ISENSE 4 13 SS CAOUT 4 18 CT
IAC 6 11 VSENSE NC 6 16 NC
12
13
11
9
Not to scale
Not to scale
VAOUT
VRMS
NC
VREF
ENA
Pin Functions
PIN
CDIP, I/O DESCRIPTION
NAME PDIP, PLCC
SOIC
Current amplifier output. This is the output of a wide-bandwidth operational amplifier that senses line
current and commands the pulse-width modulator (PWM) to force the correct current. This output
CAOUT 3 4 O swings close to GND, allowing the PWM to force zero duty cycle when necessary. The current
amplifier remains active even if the IC is disabled. The current-amplifier output stage is an NPN
emitter-follower pullup and an 8-kΩ resistor to ground.
Oscillator timing capacitor. A capacitor from CT to GND sets the PWM oscillator frequency.
Use Equation 1:
CT 14 18 I 1.25
F=
RSET ´ CT (1)
Enable. ENA is a logic input that enables the PWM output, voltage reference, and oscillator. ENA
also releases the soft-start clamp, allowing SS to rise. When not in use, connect ENA to a 5-V supply
ENA 10 13 I
or pull ENA high with a 22-kΩ resistor. The ENA pin is not intended to be used as a high speed
shutdown to the PWM output.
Ground. All voltages are measured with respect to GND. VCC and VREF must be bypassed directly
to GND with an 0.1-µF or larger ceramic capacitor. The timing capacitor discharge current also
GND 1 2 —
returns to this pin, so the lead from the oscillator timing capacitor to GND must also be as short and
as direct as possible.
Gate drive. The output of the PWM is a totem-pole MOSFET gate driver on GTDRV. This output is
internally clamped to 15 V so that the IC operates with VCC as high as 35 V. Use a series gate
GTDRV 16 20 O resistor of at least 5 Ω to prevent interaction between the gate impedance and the GTDRV output
driver that might cause the GTDRV output to overshoot excessively. Some overshoot of the GTDRV
output is always expected when driving a capacitive load.
Input AC current. This input to the analog multiplier is a current. The multiplier is tailored for very low
distortion from this current input (IAC) to MULTOUT, this is the only multiplier input that must be used
for sensing instantaneous line voltage. The nominal voltage on IAC is 6 V, in addition to a resistor
IAC 6 8 I
from IAC to rectified 60 Hz, connect a resistor from IAC to REF. If the resistor to VREF is one-fourth
of the value of the resistor to the rectifier, then the 6-V offset is cancelled, and the line current has
minimal cross-over distortion.
Current-sense minus. This is the inverting input to the current amplifier. This input and the non-
ISENSE 4 5 I inverting input, MULTOUT, remain functional down to and below GND. Take care to avoid taking
these inputs below –0.5 V because they are protected with diodes to GND.
Multiplier output and current-sense plus. The output of the analog multiplier and the non-inverting
input of the current amplifier are connected together at MULTOUT. The cautions about taking
MULTOUT 5 7 I/O ISENSE below –0.5 V also apply to MULTOUT. As the multiplier output is a current, this is a high-
impedance input similar to ISENSE, so the current amplifier can be configured as a differential
amplifier to reject GND noise. Figure 9 shows an example of using the current amplifier differentially.
1, 6,
NC — — No connection
11, 16
Peak current limit. The threshold for PKLMT is 0 V. Connect this input to the negative voltage on the
PKLMT 2 3 I current-sense resistor as shown in Figure 9. Use a resistor to VREF to offset the negative current-
sense signal up to GND.
Oscillator charging current and multiplier limit set. A resistor from RSET to GND programs oscillator
RSET 12 15 I charging current and maximum multiplier output. Multiplier output current does not exceed 3.75 V
divided by the resistor from RSET to GND.
Soft start. SS remains at GND as long as the device is disabled or VCC is too low. SS pulls up to
over 8 V by an internal 14-mA current source when both VCC becomes valid and the IC is enabled.
SS acts as the reference input to the voltage amplifier if SS is below VREF. With a large capacitor
SS 13 17 I
from SS to GND, the reference to the voltage regulating amplifier rises slowly, and increases the
PWM duty cycle slowly. In the event of a disable command or a supply dropout, SS quickly
discharges to ground and disables the PWM.
Voltage amplifier output. This is the output of the operational amplifier that regulates output voltage.
Like the current amplifier, the voltage amplifier remains active even if the IC is disabled with either
ENA or VCC. This means that large feedback capacitors across the amplifier stay charged through
VAOUT 7 9 O
momentary disable cycles. Voltage amplifier output levels below 1 V inhibit multiplier output. The
voltage amplifier output is internally limited to approximately 5.8 V to prevent overshoot. The voltage
amplifier output stage is an NPN emitter-follower pullup and an 8-kΩ resistor to ground.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2) (3) (4) (5)
MIN MAX UNIT
Supply voltage VCC 35 V
VSENSE, VRMS 11
Input Voltage ISENSE, MULTOUT 11 V
PKLMT 5
50% duty cycle 1.5
Gate driver current Input current A
Continuous 0.5
Input current RSET, IAC, PKLMT, ENA 10 mA
Power dissipation 1 W
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages with respect to GND.
(3) All currents are positive into the specified terminal.
(4) ENA input is internally clamped to approximately 14 V.
(5) Consult Unitrode Integrated Circuits databook for information regarding thermal specifications and limitations.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metricsapplication
report.
120 120
Phase Phase
100 100
Margin Margin
degrees 80 degrees 80
60 60
Open-Loop 40 Open-Loop 40
Gain 20 Gain 20
dB 0 dB 0
-20 -20
0.1 1 10 100 1000 10000 0.1 1 10 100 1000 10000
Frequency Frequency
kHz kHz
Figure 1. Current Amplifier Gain and Phase vs Frequency Figure 2. Voltage Amplifier Gain and Phase vs Frequency
100% 600
70% 200
1 10 100
RSET, k Ω 100
0
0 100 200 300 400 500 600 700 800
IAC, μ A
Figure 3. Gate-Drive Maximum Duty Cycle Figure 4. Multiplier Output vs Voltage On MULTOUT
600 250
VRMS=1.5V VRMS=3V
500 VA Out=5V
VA Out=3.5V 200
400
150
300 VA Out=3V
VA Out=2.5V Mult Out
Mult Out
μA μA 100
200
VA Out=2V
VA Out=1.25V
50
100 VA Out=1.25V
0 0
0 100 200 300 400 500 0 100 200 300 400 500
IAC, mA IAC, mA
VMULTOUT = 0 V VMULTOUT = 0 V
Figure 5. Multiplier Output vs Multiplier Inputs Figure 6. Multiplier Output vs Multiplier Inputs
0 0
0 100 200 300 400 500 0 100 200 300 400 500
IAC, μ A IAC, μA
VMULTOUT = 0 V VMULTOUT = 0 V
Figure 7. Multiplier Output vs Multiplier Inputs Figure 8. Multiplier Output vs Multiplier Inputs
8 Detailed Description
8.1 Overview
The UC3854 provides active power factor correction for systems that otherwise would draw non-sinusoidal
current from sinusoidal power lines. This device implements all the control functions necessary to build a power
supply capable of optimally using available power-line current while minimizing line current distortion.
The UC3854 uses average current-mode control to accomplish fixed-frequency current control with stability and
low distortion. The UC3854, with average current mode control, allows the boost stage to move between
continuous and discontinuous modes of operation without a performance change. Unlike peak current-mode,
average current control accurately maintains sinusoidal line current without slope compensation and with minimal
response to noise transients.
The UC3854 implements all the control functions necessary to build a power supply capable of optimally using
available power-line current while minimizing line-current distortion. The UC3854 contains a voltage amplifier, an
analog multiplier and divider, a current amplifier, and a fixed-frequency PWM. In addition, the UC3854 contains a
power MOSFET compatible gate driver, 7.5-V reference, line anticipator, load-enable comparator, low-supply
detector, and over-current comparator.
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
6A Vrec
~
+Vout
- +
1mH
0.1µF
UHV806
~
R19
511k
t°
Vcc
1µF 385 VDC Out
450µF
+
~ ~
R3
-
10k
R14
0.25 Ohms
GND GND
Isense
Vrec
Multi_Out
Vcc
620pF R8
24K
C10 470pF
C2 D6
100uF D1 C8
22V C5
R11
GND 62pF 10k
GND GND 0.1uF GND
D5
R16
220k
R7
180k
C7
15
7
9
CA OUT
PKLMT
REF
ISEN
VCC
MULT OUT
VA OUT
47nF
ENA U1
10 16
ENA GT DRV
11 VSENSE
RSET
6 C3
GND
IAC
R4
SS
CT
8 0.1uF
VRMS
910k
13
14
12
R5
D4
91k IN5820
C4 C1
C11 C6 R6 R1
0.01uF 820pF
0.1uF 0.5uF 20k 15k
GND
Boost inductor is fabricated with ARNOLD MPP toroidal core part number A-438381-2, using a 55-turn primary and a
13-turn secondary.
Additional controls of an auxiliary nature are provided. They are intended to protect the switching power
MOSFETS from certain transient conditions.
IAC (Line Waveform): To force the line current waveshape to follow the line voltage, a sample of the power line
voltage in waveform is introduced at IAC. This signal is multiplied by the output of the voltage amplifier in the
internal multiplier to generate a reference signal for the current control loop.
This input is not a voltage, but a current (hence IAC), and is set up by the 220-kΩ and 910-kΩ resistive divider
(see Figure 12). The voltage at IAC is internally held at 6 V, and the two resistors are chosen so that the current
flowing into IAC varies from zero (at each zero-crossing) to about 400 µA at the peak of the waveshape. The
following formulas are used to calculate these resistors:
Vpk 260VAC ´ 2
R AC = = = 910 k
IACpk 400 mA
where
• VPK is the peak line voltage (2)
R
RREF= AC = 220 k
4 (3)
ISENSE and MULTOUT (Line Current): The voltage drop across the 0.25-Ω current-sense resistor is applied to
ISENSE and MULTOUT as shown. The current-sense amplifier also operates with high low-frequency gain, but
unlike the voltage amplifier, it is set up to give the current-control loop a very wide bandwidth. This bandwidth
enables the line current to follow the line voltage as closely as possible. In the present example, this amplifier
has a zero at about 500 Hz, and a gain of about 18 dB thereafter.
VRMS (RMS Line Voltage): An important feature of the UC3854 preregulator is that it operates with a three-to-
one range of input line voltages, covering everything from low line in the US (85 VAC) to high line in Europe (255
VAC). This is done using line feedforward, which keeps the input power constant with varying input voltage
(assuming constant load power). To do this, the multiplier divides the line current by the square of the RMS value
of the line voltage. The voltage applied to VRMS, proportional to the average of the rectified line voltage and
proportional to the RMS value, is squared in the UC3854, and then used as a divisor by the multiplier block. The
multiplier output, at MULTOUT, is a current that increases with the current at IAC and the voltage at VAOUT, and
decreases with the square of the voltage at VRMS.
PWM Frequency: The PWM oscillator frequency in Figure 9 is 100 kHz. This value is determined by CT at pin CT
and RSET at pin RSET. RSET must be chosen first because it affects the maximum value of IMULT according to the
equation Equation 4.
-3.75 V
IMULTMAX =
RSET (4)
This effectively sets a maximum PWM-controlled current. With RSET = 15 k,
-3.75 V
IMULTMAX = = -250 µA
15 k (5)
Also note that the multiplier output current never exceeds twice IAC.
With the 4-kΩ resistor from MULTOUT to the 0.25-Ω current-sense resistor, the maximum current in the current-
sense resistor is:
-IMULTMAX ´ 4 k
IMAX = = -4 A
0.25 W (6)
Having thus selected RSET, the current sense resistor, and the resistor from MULTOUT to the current sense
resistor, calculate CT for the desired PWM oscillator frequency from Equation 7.
1.25
CT =
F ´ RSET (7)
700 1000
600
Rise Time
500
Fall Time
400
ns
300 100pF
Frequency
200 kHz 100 200pF
100
500pF
0
0 0.01 0.02 0.03 0.04 0.05
1nF
Load Capacitance, μF
10nF 5nF 3nF 2nF
10
1 10 100
RSET, k Ω
Figure 10. Gate-Drive Rise and Fall Time Figure 11. Oscillator Frequency vs RSET and CT
11 Layout
12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 6-Feb-2020
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
5962-9326101MEA ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9326101ME
A
UC1854J/883B
UC1854J ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 UC1854J
UC1854J883B ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9326101ME
A
UC1854J/883B
UC2854BJ ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -40 to 85 UC2854BJ
UC2854DW ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2854DW
& no Sb/Br)
UC2854DWTR ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2854DW
& no Sb/Br)
UC2854DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2854DW
& no Sb/Br)
UC2854N ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 UC2854N
& no Sb/Br)
UC3854DW ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3854DW
& no Sb/Br)
UC3854DWG4 ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3854DW
& no Sb/Br)
UC3854DWTR ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3854DW
& no Sb/Br)
UC3854DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3854DW
& no Sb/Br)
UC3854N ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 UC3854N
& no Sb/Br)
UC3854NG4 ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 UC3854N
& no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 6-Feb-2020
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com 6-Feb-2020
Addendum-Page 3
GENERIC PACKAGE VIEW
DW 16 SOIC - 2.65 mm max height
7.5 x 10.3, 1.27 mm pitch SMALL OUTLINE INTEGRATED CIRCUIT
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224780/A
www.ti.com
PACKAGE OUTLINE
DW0016A SCALE 1.500
SOIC - 2.65 mm max height
SOIC
10.5 2X
10.1 8.89
NOTE 3
8
9
0.51
16X
0.31
7.6
B 0.25 C A B 2.65 MAX
7.4
NOTE 4
0.33
TYP
0.10
SEE DETAIL A
0.25
GAGE PLANE
0.3
0 -8 0.1
1.27
0.40 DETAIL A
(1.4) TYPICAL
4220721/A 07/2016
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.
5. Reference JEDEC registration MS-013.
www.ti.com
EXAMPLE BOARD LAYOUT
DW0016A SOIC - 2.65 mm max height
SOIC
1 16
16X (0.6)
SYMM
14X (1.27)
8 9
R0.05 TYP
(9.3)
4220721/A 07/2016
NOTES: (continued)
www.ti.com
EXAMPLE STENCIL DESIGN
DW0016A SOIC - 2.65 mm max height
SOIC
1 16
16X (0.6)
SYMM
14X (1.27)
8 9
R0.05 TYP
(9.3)
4220721/A 07/2016
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third
party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,
damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable
warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2020, Texas Instruments Incorporated