Ankur Agarwal

Contact Address: House No.-xxx, xxx Cross,

xxxxxxxxNagar
Bangalore-560038
Contact No.: 099xxxxxxxxx3
Email: exxxxxx@gmail.com

Objective: To integrate my knowledge and ability to perform under challenging circumstances

and use this combination to achieve high performance standard and have a fast
paced growth in a company, which grows along with the growth of its employee.
Skills/Tools:

• VLSI Design Tools : Tanner EDA Tools (S-Edit, L-Edit, T-Spice, W-

Edit) FPGA Advantage 5.2 (HDL Designer
Series, ModelSim)
• Hardware Description Language : VHDL ,Verilog
• DSP Tool : Matlab 6.1
• Languages : C, Assembly (8085,8086, 8051),Data Structure
• Platforms : Windows 98/XP, Red Hat LINUX-9

Qualification Profile:

• M Tech (VLSI Design & CAD) 7.82 (June 2006)

Thapar Institute of Engineering & Technology, Deemed University, Patiala (Punjab)

• B. Tech (Electronics & Instrumentation) 8.07 (June, 2005)

I.E.T.M.J.P.Rohilkhand university,Bareilly(U.P.)

Intermediate 71% (May, 1999)

S.K.A .Janta Inter College,Bulandshahar (U.P.) (Under U.P. Board)

• Matriculation 70.0% (May, 1997)

Janta Inter College,Bulandshahar(U.P.) (Under U.P. Board)

Projects:

1. Two stage on-chip Operational amplifier design (Using Tanner EDA Tools)
An optimum design of Two-stage operational amplifier with p input stage satisfying a
particular set of specifications was developed and verified with various applications.
Development of design was based on symbolic analysis, interpretation of given cells and
derivation of bias conditions using MOS equation in desired region of operation. The op-
amp was simulated using BISM 3 parameters.

2. Designing And Stacking Of Circular Microstrip Antenna(Using MATLAB)

In this design of circular microstrip antenna and then stacking of circular microstrip
antenna and calculation of input impedance,VSWR,reurnloss before and after
stacking.The simulation is done using the help of MATLAB.

3. Monitoring system based on 8051 microcontroller and its programming

Seminars:

1. Nanotechnology
Topics Covered: About nanotechnology, Advantages and disadvantages of
nanotechnology, Its application in various fields.

2.
Dynamic and Dominologic
Topic Covered: Introduction of dynamic and domino logic.
Summer Internship:

1. Central Electronics Ltd., Sahibabad

Period:14 June 2004 to 13 July 2004.
Achievements:

• GATE SCORE: 91.4 (2004)

• Won various prizes in quizzes organized at school and institute level.

Extracurricular activities:

• Was the member of various committees in ECCS’06 held at TIET, Patiala.

• Acted as control committee coordinator of ‘YUVANSH’ cultural festival organized at
Rohilkhand University (May 2004).
• Acted as an Executive body member of ‘Electronica’ a technical organization at IET,
Bareilly (2001-03).
• Acted as member of ‘Phenomenon’ a cultural organization at IET, Bareilly (2003-04).

Personal Profile: Father’s Name : xxxxxxx Agarwal

Date of Birth : 23rd October 1982
Nationality : Indian
Gender : Male
Marital Status : Single
Permanent Address : xxxx kunj, xxxx,xxxxxxxx
Bulandshahar(U.P)-202394
Languages Known : English, Hindi.
Hobbies : Listening songs (Hindi),
Watching T.V, Interacting with people.
Strength : Dedicated, Hard Working, Result oriented,
Co-ordinating, Team activities,Will power.

References:

(1) Mrs. Xxxxx Agarwal

Asstt. Professor, Deptt. Of ECED
xxxx, xxxx (xxx.)
Email: axxxxx@yahoo.com

Statement of self assessment:

I am dedicated to my work and can put continuous efforts to bring out positive results. I like to
accept challenges in life. A strong will power and rational approach are my additional assets.

(Ankur Agarwal)