Anote2 SC 0112 1330 Final PDF

1 2 3 4 5
SYSTEM DC/DC
Anote2.0 Block Diagram INPUTS
TPS51120
OUTP
Intel CPU Project code : 91.4T001.001 DCBATOUT

5V_S3
3D3V_S
A
CLK GEN
Meron 2M/4M SV
PCB NO : 06234 SYSTEM DC/DC
CY28548LFXCT 3 FSB:667 or 800 MHz Revision : SC ISL6268CAZ
3~6 INPUTS OUTPU
Host BUS DCBATOUT 1D05V_
667/800MHz SYSTEM DC/DC

UMA solution CRT 17 TPS51116
DDRII Slot 1 DDRII 667 Channel A Crestline-GM/PM INPUTS OUTPU
533/667 15
AGTL+ CPU I/F DDR I/F DISCRETE solution S-VIDEOOUT18
DCBATOUT
1D8V_S
0D9V_S
DDRII Slot 2 DDR II 667 Channel B
INTEGRATED GRAHPICS
533/667 16 LVDS, CRT I/F
8~14
PCIe x16 Nvidia G72MV CHARGER
46~52 14" WXGA LCD ISL6255
19
INPUTS OUTPU
B
1394 1394 DMI I/F
BT+
28
Ricoh 100MHz
CAMERA DCBATOUT 20V 3.
R5C832 5V 10
SD/SDIO/MMC PCI
CardReader
MS/MS Pro/xD INTEL BLUE
27
TOOTH CPU DC/DC
ICH8-M USB 2.0 USB x 4 26
ISL6262ACRZ 3
INPUTS OUTPU
BOARDCOM PCIE 10 USB 2.0/1.1 ports
RJ45
BCM5906/ BCM5787 ETHERNET (10/100/1000Mb)
CONN 31 30
SATA SATA-HDD DCBATOUT VCC_CO
High Definition Audio 25
ATA 66/100
PATA ODD
AMOM
C
RJ11 HD Audio
ACPI 1.1
LPC I/F
25
PCB LAYER
MODEM
CONN
CX20548 PCI/PCI BRIDGE LPC Bus L1: Signal 1
20~23
L2: VCC
HD AUDIO L3: Signal 2
MIC IN CODEC
L4: Signal 3
PCIE x 1
CX20549-12Z PCIE+USB 2.0 KBC

32 WBC8763L L5: GND
Power Switch 55
Ricoh R5538
31
L6: Signal 4
OP AMP
HP
MX4410 34 G-SENSOR
Thermal 53
Mini-Card Flash ROM Touch Int.
New Card & Fan
D 802.11a/b/g/n 1MB 53 Pad 54 KB54 <Core Design>
OP AMP 31 29 G792 24
APA2031 33 Wistron Corpo
21F, 88, Sec.1, Hsin Tai W u Rd.,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Block Diagram
2CH SPEAKER Size Document Number
1.5W
A3
Anote2.0 INTEL
Date: Friday, January 12, 2007 Sheet 1 of
1 2 3 4 5
A B C D E
INTEL ICH8-M STRAP PIN <21,23> +RTCVCC +RTCVCC
<4,5,6,7,8,11,12,13,21,23,39> 1D05V_S0 1D05V_S0
<3,10,12,23,42> 1D25V_S0 1D25V_S0

Signal Usage/When Sampled Comment XOR Chain Entrance Strap <30> 1D2V_LAN_S5 1D2V_LAN
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 ICH_RSVDtp3 AZ_DOUT_ICH Description
<31,57> 1D5V_NEW _S0 1D5V_NE
PCIE Port Config 1 bit1, pulled low at rising edge of PWROK.When TP3 not 0 0 RSVD
4 Rising Edge of PWROK pulled low at rising edge of PWROK,sets bit1 of 0
1
1
0
Enter XOR Chain
Normal Operation(default)
RPC.PC(Config Registers:offset 224h) 1 1 Set PCIE port cofig bit1
<10,12,13,15,16,40,42,45> 1D8V_S3 1D8V_S3
HDA_SYNC PCIE Port Config 1 bit0, Sets bit0 of RPC.PC(Config Registers:Offset 224h)
Rising Edge of PWROK. <30,31> 2D5V_LAN_S5 2D5V_LAN
GNT2# PCIE Port Config 2 bit0, Sets bit2 of RPC.PC(Config Registers:Offset 224h)
Rising Edge of PWROK.
<24,38,44,53,54,55> 3D3V_AUX_S5 3D3V_AU
GPIO20 Reserved Weak Internal PULL-DOWN.NOTE:This signal should <30,31> 3D3V_LAN_S5 3D3V_LAN
not be pull HIGH.
<3,10,11,12,13,15,16,17,18,19,20,21,22,23,24,25,27,28,29,30,31,32,34,35,36,38,39,41,42,45,46,47,50,52,53,54,55,56,57,58> 3D3V_S0 3D3V_S0
Sampled low:Top-Block Swap mode(inverts A16 for all A16 swap override strap
GNT3# Top-Block Swap Override. cycles targeting FWH BIOS space). <19,20,21,22,23,26,29,30,31,32,38,40,43,45,53,54,55,58> 3D3V_S5 3D3V_S5
Rising Edge of PWROK. Note: Software will not be able to clear the PCI_GNT#3 low = A16 swap override enable
Top-Swap bit until the system is rebooted high = default <29,38,43> 5V_AUX_S5 5V_AUX_S
without GNT3# being pulled down. BOOT BIOS Strap
PCI_GNT#0 SPI_CS#1 BOOT BIOS Location
GNT0# Boot BIOS Destination Controllable via Boot BIOS Destination bit <17,19,22,23,24,25,33,35,36,39,41,42,45,46,54,56,57> 5V_S0 5V_S0
SPI_CS1# Selection. (Config Registers:Offset 3410h:bit 11:10). 0 1 SPI
Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. 1 0 PCI <23,26,38,40,45,56> 5V_S5 5V_S5
1 1 LPC(Default)
Integrated VccSus1_05 <43,44> AD+ AD+
VccSus1_5 and VccCL1_5 Enables integrated VccSus1_05,VccSus1_5 and integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN VRM Enable/Disable.Always VccCL1_5 VRM when sampled high <19,36,37,38,39,40,41,43,45,56> DCBATOUT DCBATOU
SM_INTVRMEN High=Enable Low=Disable
sampled.
<10,15,16,40> DDR_VREF_S3 DDR_VRE
3 Integrated VccLAN1_05 Enables integrated VccLAN1_05,VccCL1_05 VRM
integrated VccLan1_05VccCL1_05
LAN100_SLP VccCL1_05 VRM enable when sampled high LAN100_SLP High=Enable Low=Disable
/Disable. Always sampled. <19> LCDVDD_S0 LCDVDD_
<5,6,37> VCC_CORE_S0 VCC_COR

SATALED# PCIE LAN REVERSAL.Rising This signal has weak internal pull-up. DEFAULE HIGH
Edge of PWROK. set bit27 of MPC.LR(Device28:Function0:Offset D8)
If sampled high, the system is strapped to the No Reboot Strap
SPKR No Reboot. "No Reboot" mode(ICH8M will disable the TCO Timer SPKR LOW = Defaule
Rising Edge of PWROK. system reboot feature). The status is readable
via the NO REBOOT bit.(Offset:3410h:bit5)
High=No Reboot
TP3 XOR Chain Entrance.

Rising Edge of PWROK.
This signal should not be pull low unless using
XOR Chain testing. INTEL ICH8-M INTEGRATED
GPIO33/
Internal Pull-Up.If sampled low,the Flash Descriptor
Flash Descriptor Security Security will be overidden.if high,the Security
HDA_DOCK_EN# Override Strap measures defined in the Flash Descriptor will be in
PULL-UPS and PULL-DOWNS
Rising Edge of PWROK. effect.
8.2K PULL HIGH
This should only be used in manufacturing SIGNAL Resistor Type/Value
environments HDA_BIT_CLK PULL-DOWN 20K
HDA_RST# NONE
HDA_SDIN[3:0] PULL-DOWN 20K
2 HDA_SDOUT PULL-DOWN 20K
HDA_SYNC PULL-DOWN 20K
INTEL CRESTLINE STRAP PIN GNT[3:0]

GPIO[20]
PULL-UP 20K
PULL-DOWN 20K
CFG Strap LOW 0 HIGH 1 LDA[3:0]#/FHW[3:0]# PULL-UP 20K
CFG 5 LAN_RXD[2:0] PULL-UP 20K
DMI X 2 DMI X 4
CFG 8 LDRQ[0] PULL-UP 20K
Low Power PCI Express Normal Low Power mode
CFG 9 LDRQ[1]/GPIO23 PULL-UP 20K
PCI Express Graphics Lane Reversal Normal Mode(Lanes
Lane Reversal number in order) PME# PULL-UP 20K
CFG 16
FSB Dynamic ODT Disabled Enabled PWRBTN# PULL-UP 20K
CFG 19
DMI Lane Reserved Normal Operation Reserved Lane SATALED# PULL-UP 20K
CFG 20 Only PCIE or SDVO PCIE and SDVO are
Concurrent SDVO/PCIE is operation operation simultaneous SPI_CS1# PULL-UP 20K
SDVO_CTRL_DATA NO SDVO Card SDVO Card Present SPI_CLK PULL-UP 20K
Present
SDVO Present SPI_MOSI PULL-UP 20K
CFG 12 XOR/ALL-Z SPI_MISO PULL-UP 20K
1 CFG 13
<Core Design>
LL(00) Reserved TACH_[3:0] PULL-UP 20K
Wistron Corp
LH(01) XOR Mode Enabled
HL(10) All Z Mode Enabled SPKR PULL-DOWN 20K
HH(11) Normal Operation 21F, 88, Sec.1, Hsin Tai W u R
TP[3] PULL-UP 20K Taipei Hsien 221, Taiwan, R.O
USB[9:0][P,N] PULL-DOWN 15K Title
CL_RST# TBD Table of Content

Size Document Number
A3
Anote2.0 INTE
A B C D E
3D3V_S0 5 3D3V_S0_CK505 4 3 2 1
L22
1 2
Cypress Setting
MLB-160808-18-GP
SRC0 CLK_MCH_DREFCLK
1
1
C405 C408 C446 C424 C444 C438 C425 C459
3D3V_S0_CK505 1D25V_S0_CK505 SRC1 MCH_SSCDREFCLK
SC1U10V3KX-3GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
X3
X-14D31818M-30GP
2
1
1
SC33P50V2JN-3GP
C448 C455
SC33P50V2JN-3GP
16
46
62
23
19
27
43
52
33
56
U36
9
VDD_48
VDD_PLL3
VDD_IO
VDD_PLL3_IO
VDD_SRC_IO
VDD_SRC_IO
VDD_SRC_IO
VDD_CPU_IO
VDD_SRC
VDD_CPU
VDD_PCI
VDD_REF
61 RN67 1 4 SRN0J-6-GP CLK_CPU_BCL
1D25V_S0 1D25V_S0_CK505 CPUT0
CPUC0 60 2 3 CLK_CPU_BCL
L23 C410 SC4D7P50V2CN-1GP CLK_XTAL_IN 3 58 RN66 1 4 SRN0J-6-GP CLK_MCH_BC
CLK_XTAL_OUT XN CPUT1
1 2 2 XOUT CPUC1 57 2 3 CLK_MCH_BC
1 2
MLB-160808-18-GP 54 RN65 1 4 SRN0J-6-GP CPUCLK_ITP_2
SRCT8/CPU2_ITPT
1
1
C463 C465 C420 C423 C431 C440 C460 C464 <22> CLK_48M_ICH 1 2 FSA 17 53 2 3 DY CPUCLK_ITP_2
USB_48/FSA SRCC8/CPU2_ITPC
SC1U10V3KX-3GP
R224 33R2J-2-GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
2
2
51 RN64 1 4 SRN0J-6-GP CLK_PCIE_GF
SRCT7/CR#_F
<22> H_STP_PCI# 45 PC_STOP# SRCC7/CR#_E 50 2 3 DIS CLK_PCIE_GF
<22> H_STP_CPU# 44 CPU_STOP#
48 RN63 1 4 SRN0J-6-GP CLK_PCIE_MIN
SRCT6
SRCC6 47 2 3 CLK_PCIE_MIN
7 41 RN62 2 3 SRN0J-6-GP CLK_PCIE_NE

<15,16,22> ICH_SMBCLK SCLK SRCT10
<15,16,22> ICH_SMBDATA 6 SDATA SRCC10 42 1 4 CLK_PCIE_NE
R260 1 2 10KR2J-3-GP 3D3V_S0
<22> CK_PW RGD 63 CKPWRGD/PWRDWN# SRCT1/CR#_H 40 NEW CARD_CLK
SRCC1/CR#_G 39 LAN_CLKREQ#
C 37 RN61 2
R257 1 DY
3 SRN0J-6-GP
2 10KR2J-3-GP 3D3V_S0
CLK_PCIE_LAN
R267 33R2J-2-GP SRCT9
<22> CLKSATAREQ# 1 2 8 PCI0/CR#_A SRCC9 38 1 4 CLK_PCIE_LAN
R261 1 2 33R2J-2-GP 10
<10> CLKREQ#_B R255 33R2J-2-GP PCI2_TME PCI1/CR#_B RN59
<35> PCLK_FW H 1 2 11 PCI2/TME SRCT4 34 2 3 SRN0J-6-GP CLK_MCH_3G
<27> PCLK_PCM R252 1 2 33R2J-2-GP 12 35 1 4 CLK_MCH_3G
R238 33R2J-2-GP 27_SEL PCI3 SRCC4
<55> PCLK_KBC 1 2 13 PCI4/GCLK_SEL
<20> CLK_PCI_ICH R220 1 2 33R2J-2-GP ITP_EN 14 31 RN52 2 3 SRN0J-6-GP CLK_PCIE_ICH
PCIF0/ITP_EN SRCT3/CR#_C
SRCC3/CR#_D 32 1 4 CLK_PCIE_ICH
28 RN53 2 3 SRN0J-6-GP CLK_PCIE_SA

SRCT2/SATAT
SRCC2/SATAC 29 1 4 CLK_PCIE_SA
FSB 64
FSC FSB/TEST_MODE
<22> CLK_14M_ICH 1 2 5 REF0/FSC/TEST_SEL
R272 15R2J-GP 24 RN54 2 3 SRN0J-6-GP
SRCT1/LCDT_100/27M_NSS DREFCLKSS_100M
55 NC#55 SRCC1/LCDT_100/27M_SS 25 1 4 UMA DREFCLKSS_100M
RN55 3 SRN0J-6-GP
VSS_PLL3
20 2
VSS_SRC
VSS_SRC
VSS_SRC
VSS_CPU
VSS_REF
SRCT0/DOT96T DREFCLK_96M <1
VSS_PCI
3D3V_S0_CK505 21 1 4 UMA
VSS_48
VSS_IO
SRCC0/DOT96C DREFCLK_96M# <
GND
1
1
C434
C432
C412
C442
1
CY28548LFXC-1-GP
2
18
15
1
22
30
36
49
59
26
65
R256
10KR2J-3-GP R209 1 DIS 2 0R2J-2-GP VGA_27M <47
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
R208 1 DY 2 255R2F-L-GP VGA_27M_SS

2
PCI2_TME
B
1
R263 3D3V_S0_CK505
10KR2J-3-GP
DY
Cypress Setting
2
1
R230
FS_C FS_B FS_A CPU 2K2R2J-2-GP
DIS
1 0 1 100M
2
3D3V_S0_CK505 27_SEL UMA =0
0 0 1 133M
DIS =1
1
0 1 0 200M
0 1 1 166M R232
1
10KR2J-3-GP
R228 UMA
10KR2J-3-GP 27_SEL PIN 20 PIN 21 PIN 24 PI
2
ITP_EN Output 0 DOT96T DOT96C SRCT1/LCDT_100 SRCT1
2
ITP_EN
1 2 FSC 1 SRCT0 SRCC0 27M_NSS 27
0 SRC8 <4> CPU_BSEL2
1
R268 10KR2J-3-GP
R214 1 CPU_ITP 1 2 FSB
10KR2J-3-GP <4> CPU_BSEL1
DY R294 0R2J-2-GP
FSA
<4> CPU_BSEL0 1 2
R227 2K2R2J-2-GP
2
R213 1 2 1KR2J-1-GP MCH_CLKSEL0 <10>

A R299 1 2 1KR2J-1-GP MCH_CLKSEL1 <10>
<Core Design>
R269 1 2 1KR2J-1-GP MCH_CLKSEL2 <10>

Wistron Corp
Design Note: 21F, 88, Sec.1, Hsin Tai W u R
Taipei Hsien 221, Taiwan, R.O
1. All of Input pin didn't have internal pull up resistor.
Title
2. Clock Request (CR) function are enable by registers.
3. CY28548 integrated serial resistor of differential clock, Clock generator CY2854
so put 0 ohm serial resistor in the schematic. Size Document Number
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
layout note:Zo =55
<8> H_A#[3..35] ohm , 0.5" MAX for
GTLREF
U57A 1 OF 4
H_A#3 J4 H1 H_ADS# 1D05V_S0

A3# ADS# H_ADS# <8>
H_A#4 L5 E2 H_BNR#
A4# BNR# H_BNR# <8>
H_A#5 L4 G5 H_BPRI#
A5# BPRI# H_BPRI# <8>
H_A#6
ADDR GROUP 0
K5 A6# <8> H_D#[0..63]
1
H_A#7 M3 H5 H_DEFER#
A7# DEFER# H_DEFER# <8>
H_A#8 N2 F21 H_DRDY# R156 U57B 2 OF 4
D D
CONTROL
A8# DRDY# H_DRDY# <8> 56R2J-4-GP
H_A#9 J1 E1 H_DBSY#
A9# DBSY# H_DBSY# <8>
H_A#10 N3 H_D#0 E22 Y22 H_D#32
H_A#11 A10# H_BR0# H_D#1 D0# D32# H_D#33
P5 A11# BR0# F1 H_BR0# <8> F24 D1# D33# AB24
2
H_A#12 P2 H_D#2 E26 V24 H_D#34
H_A#13 A12# H_IERR# H_D#3 D2# D34# H_D#35
L2 A13# IERR# D20 G22 D3# D35# V26
H_A#14 P4 B3 H_INIT# H_D#4 F23 V23 H_D#36
A14# INIT# H_INIT# <21> D4# D36#
H_A#15 H_D#5 H_D#37
DATA GRP0
P1 G25 T22
DATA GRP2
H_A#16 A15# H_LOCK# H_D#6 D5# D37# H_D#38
R1 H4 H_LOCK# <8> E25 U25
H_ADSTB#0 A16# LOCK# H_D#7 D6# D38# H_D#39
<8> H_ADSTB#0 M1 ADSTB0# E23 D7# D39# U23
C1 H_D#8 K24 Y25 H_D#40
RESET# H_RESET# <7,8> D8# D40#
H_REQ#0 K3 F3 H_RS#0 H_D#9 G24 W22 H_D#41
<8> H_REQ#0 REQ0# RS0# H_RS#0 <8> D9# D41#
H_REQ#1 H2 F4 H_RS#1 H_D#10 J24 Y23 H_D#42
<8> H_REQ#1 REQ1# RS1# H_RS#1 <8> D10# D42#
H_REQ#2 K2 G3 H_RS#2 H_D#11 J23 W24 H_D#43
<8> H_REQ#2 REQ2# RS2# H_RS#2 <8> D11# D43#
H_REQ#3 J3 G2 H_TRDY# H_D#12 H22 W25 H_D#44
<8> H_REQ#3 REQ3# TRDY# H_TRDY# <8> D12# D44#
H_REQ#4 L1 H_D#13 F26 AA23 H_D#45
<8> H_REQ#4 REQ4# D13# D45#
G6 H_HIT# H_D#14 K22 AA24 H_D#46
HIT# H_HIT# <8> D14# D46#
H_A#17 Y2 E4 H_HITM# H_D#15 H23 AB25 H_D#47
A17# HITM# H_HITM# <8> D15# D47#
H_A#18 U5 H_DSTBN#0 J26 Y26 H_DSTBN#2
A18# 1D05V_S0 <8> H_DSTBN#0 DSTBN0# DSTBN2# H_DSTBN#2 <8>
H_A#19 R3 AD4 ITP_BPM#0 H_DSTBP#0 H26 AA26 H_DSTBP#2
A19# BPM0# <8> H_DSTBP#0 DSTBP0# DSTBP2# H_DSTBP#2 <8>
H_A#20 W6 AD3 ITP_BPM#1 H_DINV#0 H25 U22 H_DINV#2
A20# BPM1# <8> H_DINV#0 DINV0# DINV2# H_DINV#2 <8>
XDP/ITP SIGNALS
H_A#21 U4
ADDR GROUP 1 AD1 ITP_BPM#2
H_A#22 A21# BPM2# ITP_BPM#3
Y5 AC4 ITP_BPM#[3..0] <7>
H_A#23 A22# BPM3# H_D#16 H_D#48
U1 AC2 ITP_PRDY# <7> N22 AE24
A23# PRDY# D16# D48#
1
H_A#24 R4 AC1 ITP_PREQ# <7> H_D#17 K25 AD24 H_D#49
H_A#25 A24# PREQ# R158 H_D#18 D17# D49# H_D#50
T5 AC5 ITP_TCK <7> P26 AA21
H_A#26 A25# TCK 68R2-GP H_D#19 D18# D50# H_D#51
T3 AA6 ITP_TDI <7> R23 AB22
H_A#27 A26# TDI H_D#20 D19# D51# H_D#52
W2 AB3 ITP_TDO <7> L23 AB21
H_A#28 A27# TDO H_D#21 D20# D52# H_D#53
W5 AB5 ITP_TMS <7> M24 AC26
A28# TMS D21# D53#
2
H_A#29 H_THERMDA,H_THERMDC are differential H_D#22 H_D#54
DATA GRP1
Y4 AB6 L22 AD20
DATA GRP3
A29# TRST# ITP_TRST# <7> D22# D54#
H_A#30 U2 C20 H_D#23 M23 AE22 H_D#55
H_A#31 A30# DBR# ITP_DBR# <7,22> H_D#24 D23# D55# H_D#56
V4 A31# P25 D24# D56# AF23
H_A#32 W3 H_D#25 P23 AC25 H_D#57
H_A#33 A32# H_D#26 D25# D57# H_D#58
AA4 A33# THERMAL CPU_PROCHOT# <36>
P22 D26# D58# AE21
H_A#34 AB2 H_D#27 T24 AD21 H_D#59
H_A#35 A34# H_D#28 D27# D59# H_D#60
AA3 D21 R24 AC22
H_ADSTB#1 A35# PROCHOT# H_THERMDA H_D#29 D28# D60# H_D#61
<8> H_ADSTB#1 V1 A24 L25 AD23
ADSTB1# THRMDA H_THERMDC H_THERMDA <24> H_D#30 D29# D61# H_D#62
B25 T25 AF22
C <21> H_A20M#
<21> H_FERR#
H_A20M#
H_FERR#
A6
A5
A20M#
FERR#
THRMDC
THERMTRIP#
C7 H_THERMTRIP#
H_THERMTRIP# <10,21>
H_THERMDC <24>
<8> H_DSTBN#1
H_D#31
H_DSTBN#1
N25
L26
D30#
D31#
DSTBN1#
D62#
D63#
DSTBN3#
AC23
AE25
H_D#63
H_DSTBN#3
H_DSTBN#3 <8>
C
H_IGNNE# H_DSTBP#1 H_DSTBP#3
ICH
<21> H_IGNNE# C4 <8> H_DSTBP#1 M26 AF24 H_DSTBP#3 <8>

IGNNE# DSTBP1# DSTBP3#
1
H_DINV#1 N24 AC20 H_DINV#3
<8> H_DINV#1 DINV1# DINV3# H_DINV#3 <8>
D5 C642
<21> H_STPCLK# STPCLK# SC100P50V2JN-3GP
C6 HCLK A22 CLK_CPU_BCLK V_CPU_GTLREF AD26 R26 COMP0 1 2
<21> H_INTR LINT0 BCLK0 CLK_CPU_BCLK <3> GTLREF COMP0
2
B4 A21 CLK_CPU_BCLK# TPAD28 TP18 TEST1 C23 MISC U26 COMP1 R445 1 2 27D4R2F-L1-GP
<21> H_NMI LINT1 BCLK1 CLK_CPU_BCLK# <3> TEST1 COMP1
TPAD28 TP20 TEST2 COMP2 R449 2 54D9R2F-L1-GP
<21> H_SMI#
A3 SMI# DY TPAD28 TP17 TEST3
D25
C24
TEST2 COMP2 AA1
Y1 COMP3 R186
1
1 2 27D4R2F-L1-GP
TPAD28 TP25 CPU_RSVD01 TEST4 TEST3 COMP3
M4
RSVD#M4 this cap must near CPU AF26
TEST4
R185 54D9R2F-L1-GP
TPAD28 TP27 CPU_RSVD02 N5 TPAD28 TP47 TEST5 AF1 E5 H_DPRSTP#
RSVD#N5 TEST5 DPRSTP# H_DPRSTP# <10,21,36>
2
TPAD28 TP33 CPU_RSVD03 T2 C369 TPAD28 TP14 TEST6 A26 B5 H_DPSLP#
RSVD#T2 TEST6 DPSLP# H_DPSLP# <21>
RESERVED
TPAD28 TP35 CPU_RSVD04 V3 D24 H_DPWR#

RSVD#V3 DPWR# H_DPWR# <8>
TPAD28 TP13 CPU_RSVD05 B2 SCD1U16V2KX-3GP CPU_BSEL0 B22 D6 H_PWRGOOD
RSVD#B2 <3> CPU_BSEL0 BSEL0 PWRGOOD H_PWRGOOD <21>
1
TPAD28 TP16 CPU_RSVD06 C3 CPU_BSEL1 B23 D7 H_CPUSLP#
RSVD#C3 <3> CPU_BSEL1 BSEL1 SLP# H_CPUSLP# <8>
TPAD28 TP22 CPU_RSVD07 D2 CPU_BSEL2 C21 AE6 PSI#
TPAD28 TP21 CPU_RSVD08 RSVD#D2 <3> CPU_BSEL2 BSEL2 PSI# PSI# <36>
D22
TPAD28 TP19 CPU_RSVD09 RSVD#D22
D3
TPAD28 TP23 CPU_RSVD10 RSVD#D3
F6
RSVD#F6 1D05V_S0 BGA479-SKT6-GPU3
TPAD28 TP15 CPU_RSVD11 B1
KEY_NC
62.10079.001
2
BGA479-SKT6-GPU3 PLACE C173 close to the TEST4 PIN,
R452
Close to CPU 1KR2F-3-GP make sure TEST3,TEST4,TEST5 trace
62.10079.001 pin AD26 routing is reference to GND and
away other noisy signals
1 1
Z0=55 ohm V_CPU_GTLREF
with in Resistor Placed

R451
500mils . 2KR2F-3-GP within 0.5" of CPU
pin. Trace should
be at least 25 mils
2
CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0

1D05V_S0
away from any other
166 0 1 1 toggling signal .
B COMP[0,2] trace B
200 0 1 0 width is 18 mils.
1
COMP[1,3] trace
R157
56R2J-4-GP width is 4 mils .
DY
2
B
CPU_PROCHOT# E
DY
C OCP# <22>
Q12
MMBT3904WT1G-GP
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Meron(1/3)-AGTL+/XDP
Size Document Number Rev
Custom
Anote2.0 INTEL SC
Date: Friday, January 12, 2007 Sheet 4 of 58
5 4 3 2 1
5 4 3 2 1
VCC_CORE_S0 VCC_CORE_S0
U57C 3 OF 4
A7 VCC VCC AB20

A9 VCC VCC AB7
A10 AC7
D A12
A13
VCC
VCC
VCC
VCC AC9
AC12
VCC VCC
A15 VCC VCC AC13
A17 VCC VCC AC15
A18 VCC VCC AC17
A20 VCC VCC AC18
B7 VCC VCC AD7
B9 VCC VCC AD9
B10 VCC VCC AD10
B12 VCC VCC AD12
B14 VCC VCC AD14
B15 VCC VCC AD15
B17 VCC VCC AD17
B18 VCC VCC AD18
B20 VCC VCC AE9
C9 VCC VCC AE10
C10 VCC VCC AE12
C12 VCC VCC AE13
C13 VCC VCC AE15
C15 VCC VCC AE17
C17 VCC VCC AE18
C18 VCC VCC AE20
D9 VCC VCC AF9
D10 VCC VCC AF10
D12 VCC VCC AF12
D14 VCC VCC AF14
D15 VCC VCC AF15
D17 VCC VCC AF17
D18 VCC VCC AF18
C E7
E9
VCC VCC AF20 1D05V_S0
VCC
E10 VCC VCCP G21
E12
E13
VCC VCCP V6
J6
Ivccp boot= 4.5A
VCC VCCP
E15 VCC VCCP K6
E17
E18
VCC VCCP M6
J21
Ivccp stable= 2.5A
VCC VCCP
E20 VCC VCCP K21
F7 VCC VCCP M21
F9 VCC VCCP N21
F10 VCC VCCP N6
F12 VCC VCCP R21
F14 VCC VCCP R6
F15 VCC VCCP T21
F17 T6 1D5V_SB_S0
VCC VCCP
F18 VCC VCCP V21
F20 VCC VCCP W21 layout note:
AA7
AA9
VCC
B26 C639 place C3 near Ivcca =130mA
VCC VCCA
AA10 VCC VCCA C26 PIN B26
1
1
AA12
SCD01U16V2KX-3GP
VCC CPU_VID0 CPU_VID[0..6] <36> C634

AA13 VCC VID0 AD6
AA15 AF5 CPU_VID1 SC10U10V5ZY-1GP
VCC VID1
2
AA17 AE5 CPU_VID2

VCC VID2 CPU_VID3
AA18 VCC VID3 AF4
AA20 AE3 CPU_VID4
VCC VID4 CPU_VID5
AB9 VCC VID5 AF3
AC10 AE2 CPU_VID6
VCC VID6
B AB10
AB12
VCC
VCC
AB14 VCC VCCSENSE AF7 VCC_SENSE
VCC_SENSE <36> Length match within
AB15
AB17
VCC 25 mils . The trace
VCC
AB18 VCC VSSSENSE AE7 VSS_SENSE
VSS_SENSE <36>
width/space/other is
20/7/25 .
BGA479-SKT6-GPU3
VCC_CORE_S0
VCC_SENSE 1 2
R197 100R2F-L1-GP-U
VSS_SENSE 1 2
R192100R2F-L1-GP-U
Close to CPU pin

within 500mils
A <Core Design>
Wistron Corp
21F, 88, Sec.1, Hsin Tai W u R
Title
Meron(2/3)-AGTL+/PWR
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
VCC_CORE_S0
1
C686
C675
C676
C677
C678
C679
C680
C261
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
U57D 4 OF 4 Place these capacitors on L1
2
A4 P6
(North side ,Secondary Layer)
D A8
A11
VSS
VSS
VSS
VSS P21
P24
VSS VSS
A14 VSS VSS R2
A16 VSS VSS R5
A19 VSS VSS R22
A23 VSS VSS R25
AF2 T1 VCC_CORE_S0
VSS VSS
B6 VSS VSS T4
B8 VSS VSS T23
B11 VSS VSS T26
B13 VSS VSS U3
1
B16 U6
C273
C274
C260
C687
C688
C683
C684
C685
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
VSS VSS
B19 VSS VSS U21
B21 VSS VSS U24 Place these capacitors on L1
2
B24 V2
C5
VSS VSS
V5
VSS VSS
C8 VSS VSS V22
C11 VSS VSS V25
C14 VSS VSS W1
C16 VSS VSS W4
C19 VSS VSS W23
C2 VSS VSS W26
C22 VSS VSS Y3
C25 VSS VSS Y6
D1 VSS VSS Y21
D4 VSS VSS Y24
D8
D11
D13
VSS
VSS
VSS
VSS
AA2
AA5
AA8
Mid Frequencd
VSS VSS
C D16
D19
VSS
VSS
VSS
VSS
AA11
AA14 Decoupling
D23 VSS VSS AA16
D26 VSS VSS AA19
E3 VSS VSS AA22
E6 VSS VSS AA25
E8 AB1 VCC_CORE_S0
VSS VSS
E11 VSS VSS AB4
E14 VSS VSS AB8
E16 VSS VSS AB11
E19 VSS VSS AB13
E21 VSS VSS AB16
E24 VSS VSS AB19
1
F5 AB23 Place these capacitors on L1
C358
C340
C341
C277
C276
C368
C375
C360
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
VSS VSS
F8 AB26
F11
VSS VSS
AC3
VSS VSS
2
F13 VSS VSS AC6
F16 VSS VSS AC8
F19 VSS VSS AC11
F2 VSS VSS AC14
F22 VSS VSS AC16
F25 VSS VSS AC19
G4 VSS VSS AC21
G1 VSS VSS AC24
G23 VSS VSS AD2 DY DY DY DY DY DY DY DY
G26 VSS VSS AD5
H3 VSS VSS AD8
H6 VSS VSS AD11
H21 VSS VSS AD13
B H24
J2
VSS
VSS
VSS
VSS
AD16
AD19
J5 VSS VSS AD22
J22 VSS VSS AD25
J25 AE1 1D05V_S0
VSS VSS
K1 VSS VSS AE4
K4 VSS VSS AE8
K23 VSS VSS AE11
K26 VSS VSS AE14
L3 VSS VSS AE16
L6 VSS VSS AE19 Place these
2
2
L21 AE23
L24
VSS VSS
AE26 C298 C285 C324 C279 C286 C314 inside socket
VSS VSS
M2 VSS VSS A2 SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP cavity on L1
1
1
M5 VSS VSS AF6 (North side
M22 VSS VSS AF8
M25 AF11 Secondary)
VSS VSS
N1 VSS VSS AF13
N4 VSS VSS AF16
N23 VSS VSS AF19
N26 VSS VSS AF21
P3 VSS VSS A25
VSS AF25
BGA479-SKT6-GPU3
A <Core Design>
Wistron Corp
Title
Meron(3/3)-GND&Bypass
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
D
ITP Connector
1D05V_S0
1
R579
1
54D9R2F-L1-GP
R190 R193 R200
2
51R2F-2-GP 51R2F-2-GP 39D2R2F-L-GP
DY
2
<4> ITP_TDI TP208 TPAD28
<4> ITP_TMS TP209 TPAD28

<4> ITP_TRST# TP210 TPAD28
<4> ITP_TCK TP211 TPAD28
<4> ITP_TDO R196 1 2 22D6R2F-L1-GP TP212 TPAD28

<3> CPUCLK_ITP_200M# DY TP213 TPAD28
<3> CPUCLK_ITP_200M TP214 TPAD28
C
<4,8> H_RESET# R189 1 2 22D6R2F-L1-GP TP216 TPAD28

<4> ITP_PREQ# DY TP217 TPAD28
<4> ITP_PRDY# TP218 TPAD28

ITP_BPM#3
TP219 TPAD28
<4> ITP_BPM#[3..0]
ITP_BPM#2
TP220 TPAD28
ITP_BPM#1
1D05V_S0 TP221 TPAD28
ITP_BPM#0
TP222 TPAD28
<4,22> ITP_DBR# TP223 TPAD28

TP224 TPAD28
1
1
R198 R199
27D4R2F-L1-GP 680R2J-3-GP C332
SCD1U10V2KX-4GP
2
2
DY
A <Core Design>
Wistron Corpo
Title
Meron(3/3)-GND&Bypass
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
D D
U58A 1 OF 10
<4> H_D#[0..63] H_D#0 H_A#3 H_A#[3..35] <4>
E2 J13
H_D#1 H_D#0 H_A#3 H_A#4
G2 B11
H_D#2 H_D#1 H_A#4 H_A#5
G7 C11
H_D#3 H_D#2 H_A#5 H_A#6
M6 H_D#3 H_A#6 M11
H_D#4 H7 C15 H_A#7
H_D#5 H_D#4 H_A#7 H_A#8
H3 F16
H_D#6 H_D#5 H_A#8 H_A#9
G4 L13
H_D#7 H_D#6 H_A#9 H_A#10
F3 G17
H_D#8 H_D#7 H_A#10 H_A#11
N8 H_D#8 H_A#11 C14
H_D#9 H2 K16 H_A#12
H_D#10 H_D#9 H_A#12 H_A#13
M10 B13
H_D#11 H_D#10 H_A#13 H_A#14
N12 H_D#11 H_A#14 L16
H_D#12 N9 J17 H_A#15
H_D#13 H_D#12 H_A#15 H_A#16
H5 B14
H_D#14 H_D#13 H_A#16 H_A#17
P13 H_D#14 H_A#17 K19
H_D#15 K9 P15 H_A#18
H_D#16 H_D#15 H_A#18 H_A#19
M2 R17
H_D#17 H_D#16 H_A#19 H_A#20
W10 B16
H_D#18 H_D#17 H_A#20 H_A#21
Y8 H_D#18 H_A#21 H20
H_D#19 V4 L19 H_A#22
H_D#20 H_D#19 H_A#22 H_A#23
M3 D17
H_D#21 H_D#20 H_A#23 H_A#24
J1 H_D#21 H_A#24 M17
H_D#22 N5 N16 H_A#25
H_D#23 H_D#22 H_A#25 H_A#26
N3 J19
H_D#24 H_D#23 H_A#26 H_A#27
W6 H_D#24 H_A#27 B18
H_D#25 W9 E19 H_A#28
H_D#26 H_D#25 H_A#28 H_A#29
layout note : N2 H_D#26 H_A#29 B17
H_D#27 Y7 B15 H_A#30
C Route H_SCOMP and H_SCOMP# with trace width, spacing
and impedance (55 ohm) same as FSB data traces
H_D#28
H_D#29
Y9
P4
H_D#27
H_D#28
H_A#30
H_A#31 E17
C18
H_A#31
H_A#32
C
H_D#30 H_D#29 H_A#32 H_A#33
W3 A19
H_D#31 H_D#30 H_A#33 H_A#34
N1 B19
H_D#32 H_D#31 H_A#34 H_A#35
AD12 H_D#32 H_A#35 N19
H_D#33 AE3
H_D#34 H_D#33 H_ADS#
AD9 H_D#34 H_ADS# G12 H_ADS# <4>
HOST
H_D#35 AC9 H17 H_ADSTB#0
H_D#36 H_D#35 H_ADSTB#0 H_ADSTB#1 H_ADSTB#0 <4>
AC7 G20 H_ADSTB#1 <4>
H_D#37 H_D#36 H_ADSTB#1 H_BNR#
AC14 C8 H_BNR# <4>
H_D#38 H_D#37 H_BNR# H_BPRI#
AD11 H_D#38 H_BPRI# E8
H_D#39 H_BR0# H_BPRI# <4>
AC11 F12 H_BR0# <4>
H_D#40 H_D#39 H_BREQ# H_DEFER#
AB2 H_D#40 H_DEFER# D6 H_DEFER# <4>
H_D#41 AD7 C10 H_DBSY#
H_D#42 H_D#41 H_DBSY# H_DBSY# <4>
AB1 AM5 CLK_MCH_BCLK CLK_MCH_BCLK <3>
H_D#43 H_D#42 HPLL_CLK
Y3 AM7 CLK_MCH_BCLK# CLK_MCH_BCLK# <3>
H_D#44 H_D#43 HPLL_CLK# H_DPWR#
AC6 H8 H_DPWR# <4>
H_D#45 H_D#44 H_DPWR# H_DRDY#
AE2 K7 H_DRDY# <4>
H_D#46 H_D#45 H_DRDY# H_HIT#
AC5 E4 H_HIT# <4>
H_D#46 H_HIT#
Layout Note : H_D#47 AG3 H_D#47 H_HITM# C6 H_HITM#
H_HITM# <4>
H_D#48 AJ9 G10 H_LOCK#
H_RCOMP / H_VREF / H_SWNG H_D#49 AH8
H_D#48 H_LOCK#
B7 H_TRDY#
H_LOCK# <4>
H_D#49 H_TRDY# H_TRDY# <4>
trace width and spacing is 10/20 H_D#50 AJ14
H_D#50
1D05V_S0 1D05V_S0 H_D#51 AE9
H_D#52 H_D#51
AE11
1D05V_S0 H_D#53 H_D#52
AH12
H_D#54 H_D#53 H_DINV#0
AJ5 H_D#54 H_DINV#0 K5 H_DINV#0 <4>
H_D#55 AH5 L2 H_DINV#1
H_D#55 H_DINV#1 H_DINV#1 <4>
1
H_D#56 AJ6 AD13 H_DINV#2

1 H_D#56 H_DINV#2 H_DINV#2 <4>
1
R460 R465 H_D#57 AE7 AE13 H_DINV#3
54D9R2F-L1-GP
54D9R2F-L1-GP
1KR2F-3-GP 221R2F-2-GP H_D#58 H_D#57 H_DINV#3 H_DINV#3 <4>
R470 R469 AJ7
H_D#59 H_D#58 H_DSTBN#0
AJ2 M7 H_DSTBN#0 <4>
H_D#59 H_DSTBN#0
B H_D#60 AE5 H_D#60 H_DSTBN#1 K3 H_DSTBN#1
H_DSTBN#1 <4> B
2
H_VREF H_RCOMP H_SWNG H_D#61 AJ3 AD2 H_DSTBN#2

H_D#61 H_DSTBN#2 H_DSTBN#2 <4>
2
H_D#62 AH2 AH11 H_DSTBN#3

H_D#62 H_DSTBN#3 H_DSTBN#3 <4>
1
H_D#63 AH13
SCD1U16V2ZY-2GP
H_D#63
1
R461 C712 R468 R463 L7 H_DSTBP#0

24D9R2F-L-GP H_DSTBP#0 H_DSTBP#1 H_DSTBP#0 <4>
2KR2F-3-GP C714 K2
100R2F-L1-GP-U
H_DSTBP#1 H_DSTBP#1 <4>

2
SCD1U16V2ZY-2GP H_SWNG B3 AC2 H_DSTBP#2

H_SWING H_DSTBP#2 H_DSTBP#2 <4>
2
H_RCOMP C2 AJ10 H_DSTBP#3

H_RCOMP H_DSTBP#3 H_DSTBP#3 <4>
2
Layout Note : H_SCOMP W1 H_SCOMP H_REQ#0 M14 H_REQ#0

H_REQ#0 <4>
H_SCOMP# W2 E13 H_REQ#1
Layout Note : Place C33 near H_SCOMP# H_REQ#1
A11 H_REQ#2 H_REQ#1 <4>
H_REQ#2 H_REQ#2 <4>
Place C32 within 100 mils of NB pin B3 of NB <4,7> H_RESET#
B6 H_CPURST# H_REQ#3 H13 H_REQ#3
H_REQ#3 <4>
E5 B12 H_REQ#4
<4> H_CPUSLP# H_CPUSLP# H_REQ#4 H_REQ#4 <4>
E12 H_RS#0
H_VREF H_RS#0 H_RS#1 H_RS#0 <4>
B9 D7
H_AVREF H_RS#1 H_RS#2 H_RS#1 <4>
A9 D8
H_DVREF H_RS#2 H_RS#2 <4>
CRESTLINE-GP-U
A <Core Design>
A
Wistron Corporation
Title
CRESTLINE(1/7)-AGTL+/DMI/DDR2
Custom
Anote2.0 INTEL SC
5 4 3 2 1
5 4 3 2 1
DDR_A_D[0..63] <15>
DDR_B_D[0..63] <16>
DDR_A_BS[0..2] <15>
DDR_B_BS[0..2] <16>
DDR_A_DM[0..7] <15>
D DDR_B_DM[0..7] <16>
DDR_A_DQS[0..7] <15>
DDR_B_DQS[0..7] <16>
DDR_A_DQS#[0..7] <15>
DDR_B_DQS#[0..7] <16>
DDR_A_MA[0..14] <15>
DDR_B_MA[0..14] <16>
U58D 4 OF 10 U58E 5 OF 10
DDR_A_D0 AR43 BB19 DDR_A_BS0 DDR_B_D0 AP49 AY17 DDR_B_BS0

DDR_A_D1 SA_DQ0 SA_BS0 DDR_A_BS1 DDR_B_D1 SB_DQ0 SB_BS0 DDR_B_BS1
AW44 SA_DQ1 SA_BS1 BK19 AR51 SB_DQ1 SB_BS1 BG18
DDR_A_D2 BA45 BF29 DDR_A_BS2 DDR_B_D2 AW50 BG36 DDR_B_BS2
DDR_A_D3 SA_DQ2 SA_BS2 DDR_B_D3 SB_DQ2 SB_BS2
AY46 SA_DQ3 AW51 SB_DQ3
DDR_A_D4 AR41 BL17 DDR_A_CAS# DDR_B_D4 AN51 BE17 DDR_B_CAS#
DDR_A_D5 SA_DQ4 SA_CAS# DDR_A_CAS# <15> DDR_B_D5 SB_DQ4 SB_CAS# DDR_B_CAS# <16>
AR45 SA_DQ5 AN50 SB_DQ5
DDR_A_D6 AT42 AT45 DDR_A_DM0 DDR_B_D6 AV50 AR50 DDR_B_DM0
DDR_A_D7 SA_DQ6 SA_DM0 DDR_A_DM1 DDR_B_D7 SB_DQ6 SB_DM0 DDR_B_DM1
AW47 SA_DQ7 SA_DM1 BD44 AV49 SB_DQ7 SB_DM1 BD49
DDR_A_D8 BB45 BD42 DDR_A_DM2 DDR_B_D8 BA50 BK45 DDR_B_DM2
BF48 SA_DQ9 SA_DM3 AW38 BB50 SB_DQ9 SB_DM3 BL39
DDR_A_D10 BG47 AW13 DDR_A_DM4 DDR_B_D10 BA49 BH12 DDR_B_DM4
BJ45 SA_DQ11 SA_DM5 BG8 BE50 SB_DQ11 SB_DM5 BJ7
DDR_A_D12 BB47 AY5 DDR_A_DM6 DDR_B_D12 BA51 BF3 DDR_B_DM6
BG50 SA_DQ13 SA_DM7 AN6 AY49 SB_DQ13 SB_DM7 AW2
DDR_A_D14 BH49 DDR_B_D14 BF50
DDR_A_D15 SA_DQ14 DDR_A_DQS0 DDR_B_D15 SB_DQ14 DDR_B_DQS0
BE45 SA_DQ15 SA_DQS0 AT46 BF49 SB_DQ15 SB_DQS0 AT50
DDR_A_D16 AW43 BE48 DDR_A_DQS1 DDR_B_D16 BJ50 BD50 DDR_B_DQS1
DDR_A_D17 SA_DQ16 SA_DQS1 DDR_A_DQS2 DDR_B_D17 SB_DQ16 SB_DQS1 DDR_B_DQS2
BE44 SA_DQ17 SA_DQS2 BB43 BJ44 SB_DQ17 SB_DQS2 BK46
C DDR_A_D18
DDR_A_D19
BG42
BE40
SA_DQ18 SA_DQS3 BC37
BB16
DDR_A_DQS3
DDR_A_DQS4
DDR_B_D18
DDR_B_D19
BJ43
BL43
SB_DQ18 SB_DQS3 BK39
BJ12
DDR_B_DQS3
DDR_B_DQS4
BF44 SA_DQ20 SA_DQS5 BH6 BK47 SB_DQ20 SB_DQS5 BL7
DDR_A_D21 BH45 BB2 DDR_A_DQS6 DDR_B_D21 BK49 BE2 DDR_B_DQS6
BG40 SA_DQ22 SA_DQS7 AP3 BK43 SB_DQ22 SB_DQS7 AV2
DDR_A_D23 BF40 AT47 DDR_A_DQS#0 DDR_B_D23 BK42 AU50 DDR_B_DQS#0
DDR_A_D24 SA_DQ23 SA_DQS#0 DDR_A_DQS#1 DDR_B_D24 SB_DQ23 SB_DQS#0 DDR_B_DQS#1
DDR SYSTEM MEMORRY A
AR40 BD47 BJ41 BC50
DDR SYSTEM MEMORY B

AW40 SA_DQ25 SA_DQS#2 BC41 BL41 SB_DQ25 SB_DQS#2 BL45
DDR_A_D26 AT39 BA37 DDR_A_DQS#3 DDR_B_D26 BJ37 BK38 DDR_B_DQS#3
AW36 SA_DQ27 SA_DQS#4 BA16 BJ36 SB_DQ27 SB_DQS#4 BK12
DDR_A_D28 AW41 BH7 DDR_A_DQS#5 DDR_B_D28 BK41 BK7 DDR_B_DQS#5
AY41 SA_DQ29 SA_DQS#6 BC1 BJ40 SB_DQ29 SB_DQS#6 BF2
DDR_A_D30 AV38 AP2 DDR_A_DQS#7 DDR_B_D30 BL35 AV3 DDR_B_DQS#7
DDR_A_D31 SA_DQ30 SA_DQS#7 DDR_B_D31 SB_DQ30 SB_DQS#7
AT38 SA_DQ31 BK37 SB_DQ31
DDR_A_D32 AV13 BJ19 DDR_A_MA0 DDR_B_D32 BK13 BC18 DDR_B_MA0
DDR_A_D33 SA_DQ32 SA_MA0 DDR_A_MA1 DDR_B_D33 SB_DQ32 SB_MA0 DDR_B_MA1
AT13 SA_DQ33 SA_MA1 BD20 BE11 SB_DQ33 SB_MA1 BG28
DDR_A_D34 AW11 BK27 DDR_A_MA2 DDR_B_D34 BK11 BG25 DDR_B_MA2
AV11 SA_DQ35 SA_MA3 BH28 BC11 SB_DQ35 SB_MA3 AW17
DDR_A_D36 AU15 BL24 DDR_A_MA4 DDR_B_D36 BC13 BF25 DDR_B_MA4
AT11 SA_DQ37 SA_MA5 BK28 BE12 SB_DQ37 SB_MA5 BE25
DDR_A_D38 BA13 BJ27 DDR_A_MA6 DDR_B_D38 BC12 BA29 DDR_B_MA6
BA11 SA_DQ39 SA_MA7 BJ25 BG12 SB_DQ39 SB_MA7 BC28
DDR_A_D40 BE10 BL28 DDR_A_MA8 DDR_B_D40 BJ10 AY28 DDR_B_MA8
BD10 SA_DQ41 SA_MA9 BA28 BL9 SB_DQ41 SB_MA9 BD37
DDR_A_D42 BD8 BC19 DDR_A_MA10 DDR_B_D42 BK5 BG17 DDR_B_MA10
AY9 SA_DQ43 SA_MA11 BE28 BL5 SB_DQ43 SB_MA11 BE37
DDR_A_D44 BG10 BG30 DDR_A_MA12 DDR_B_D44 BK9 BA39 DDR_B_MA12
AW9 SA_DQ45 SA_MA13 BJ16 BK10 SB_DQ45 SB_MA13 BG13
DDR_A_D46 BD7 BJ29 DDR_A_MA14 DDR_B_D46 BJ8 BE24 DDR_B_MA14
SA_DQ46 SA_MA14 SB_DQ46 SB_MA14
B DDR_A_D47
DDR_A_D48
BB9
BB5
SA_DQ47
SA_DQ48 SA_RAS# BE18 DDR_A_RAS#
DDR_A_RAS# <15>
DDR_B_D47
DDR_B_D48
BJ6
BF4
SB_DQ47
SB_DQ48 SB_RAS# AV16 DDR_B_RAS#
DDR_B_RAS# <16>
DDR_A_D49 AY7 AY20 SA_RCVEN# DDR_B_D49 BH5 AY18 SB_RCVEN#
SA_DQ49 SA_RCVEN# TP36 SB_DQ49 SB_RCVEN# TP46
DDR_A_D50 AT5 DDR_B_D50 BG1
DDR_A_D51 SA_DQ50 DDR_A_W E# DDR_B_D51 SB_DQ50 DDR_B_W E#
AT7 SA_DQ51 SA_WE# BA19 DDR_A_W E# <15> BC2 SB_DQ51 SB_WE# BC17 DDR_B_W E# <16>
DDR_A_D52 AY6 DDR_B_D52 BK3
DDR_A_D53 SA_DQ52 DDR_B_D53 SB_DQ52
BB7 SA_DQ53 BE4 SB_DQ53
DDR_A_D54 AR5 DDR_B_D54 BD3
AR8 SA_DQ55 BJ2 SB_DQ55
DDR_A_D56 AR9 DDR_B_D56 BA3
AN3 SA_DQ57 BB3 SB_DQ57
DDR_A_D58 AM8 DDR_B_D58 AR1
AN10 SA_DQ59 AT3 SB_DQ59
DDR_A_D60 AT9 DDR_B_D60 AY2
AN9 SA_DQ61 AY3 SB_DQ61
DDR_A_D62 AM9 DDR_B_D62 AU2
AN11 SA_DQ63 AT2 SB_DQ63
CRESTLINE-GP-U CRESTLINE-GP-U
A <Core Design>
Wistron Corp
Title
CRESTLINE(2/7)-DDR2 A/B CH
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
SC2D2U10V3ZY-1GP
SCD01U25V2KX-3GP
1D8V_S3
FOR Calero: 80.6 ohm
1
U58B 2 OF 10 Crestline: 20 ohm
R453
C699
C701
P36 AV29 M_CLK_DDR0 1KR2F-3-GP
RSVD#P36 SM_CK0 M_CLK_DDR0 <15>
2
D D
P37 BB23 M_CLK_DDR1
RSVD#P37 SM_CK1 M_CLK_DDR2 M_CLK_DDR1 <15>
R35 BA25
RSVD#R35 SM_CK3 M_CLK_DDR2 <16>
2
N35 AV23 M_CLK_DDR3 SM_RCOMP_VOH
RSVD#N35 SM_CK4 M_CLK_DDR3 <16>
AR12
RSVD#AR12
1
AR13 AW30M_CLK_DDR#0
RSVD#AR13 SM_CK#0 M_CLK_DDR#0 <15>
AM12 BA23 M_CLK_DDR#1 R450
RSVD#AM12 SM_CK#1 M_CLK_DDR#1 <15> 3K01R2F-3-GP
AN13 AW25M_CLK_DDR#2
RSVD#AN13 SM_CK#3 M_CLK_DDR#2 <16>
J12 AW23M_CLK_DDR#3
RSVD#J12 SM_CK#4 M_CLK_DDR#3 <16>
AR37
RSVD#AR37
2
AM36 BE29 DDR_CKE0_DIMMA SM_RCOMP_VOL
RSVD#AM36 SM_CKE0 DDR_CKE0_DIMMA <15>
DDR MUXING
AL36 AY32 DDR_CKE1_DIMMA
RSVD#AL36 SM_CKE1 DDR_CKE1_DIMMA <15>
1
AM37 BD39 DDR_CKE2_DIMMB
RSVD#AM37 SM_CKE3 DDR_CKE2_DIMMB <16>
SCD01U25V2KX-3GP
D20 BG37 DDR_CKE3_DIMMB R446
RSVD#D20 SM_CKE4 DDR_CKE3_DIMMB <16>
2
1KR2F-3-GP
SC2D2U10V3ZY-1GP
BG20 DDR_CS0_DIMMA#
C693
C690
SM_CS#0 DDR_CS0_DIMMA# <15>
BK16 DDR_CS1_DIMMA#
SM_CS#1 DDR_CS1_DIMMA# <15>
2
BG16 DDR_CS2_DIMMB#
SM_CS#2 DDR_CS2_DIMMB# <16>
H10 BE13 DDR_CS3_DIMMB#
RSVD#H10 SM_CS#3 DDR_CS3_DIMMB# <16>
B51
RSVD#B51 M_ODT0
RSVD
BJ20 BH18
RSVD#BJ20 SM_ODT0 M_ODT1 M_ODT0 <15>
BK22 BJ15
RSVD#BK22 SM_ODT1 M_ODT2 M_ODT1 <15>
BF19 BJ14
RSVD#BF19 SM_ODT2 M_ODT3 M_ODT2 <16>
BH20 BE16
RSVD#BH20 SM_ODT3 M_ODT3 <16>
BK18
RSVD#BK18 SM_RCOMP_VOH
BJ18 BK31
RSVD#BJ18 SM_RCOMP_VOH SM_RCOMP_VOL 1D8V_S3
BF23 BL31
RSVD#BF23 SM_RCOMP_VOL
BG23
RSVD#BG23 SM_RCOMP
BC23 BL15 1 2
RSVD#BC23 SM_RCOMP
BD24
RSVD#BD24 SM_RCOMP#
BK14 SM_RCOMP# R458 1
R459
2 20R2F-GP
20R2F-GP
Discrete must be DY
AR49 DDR_VREF_S3
SM_VREF#AR49 DDR_VREF_S3
BH39 AW4
RSVD#BH39 SM_VREF#AW4
AW20
RSVD#AW20
BK20
RSVD#BK20
B42 DREFCLK_96M
DPLL_REF_CLK DREFCLK_96M <3>
B44 C42 DREFCLK_96M# <3>
RSVD#B44 DPLL_REF_CLK# DREFCLK_96M#
C C44 H48 DREFCLKSS_100M <3>
C
RSVD#C44 DPLL_REF_SSCLK
A35 H47 DREFCLKSS_100M# <3>
RSVD#A35 DPLL_REF_SSCLK# DREFCLKSS_100M
B37
RSVD#B37 CLK_MCH_3GPLL
B36 K44 CLK_MCH_3GPLL <3>
RSVD#B36 PEG_CLK CLK_MCH_3GPLL# DREFCLKSS_100M#
B34 K45 CLK_MCH_3GPLL# <3>
CLK
3D3V_S0 RSVD#B34 PEG_CLK#
C34
RSVD#C34
1
2
3
4
AN47 DMI_TXN0 DIS
DMI_RXN0 DMI_TXN0 <22> SRN0J-7-GP
AJ38 DMI_TXN1
DMI_RXN1 DMI_TXN1 <22> RN51
MCH_CLKSEL0 P27 AN42 DMI_TXN2
<3> MCH_CLKSEL0 CFG0 DMI_RXN2 DMI_TXN2 <22>
PM_EXTTS#0 1 2 MCH_CLKSEL1 N27 AN46 DMI_TXN3
<3> MCH_CLKSEL1 CFG1 DMI_RXN3 DMI_TXN3 <22>
8
7
6
5
R170 10KR2J-3-GP MCH_CLKSEL2 N24
<3> MCH_CLKSEL2 CFG2 DMI_TXP0
CFG[17:3] have internal pull up C21 AM47 DMI_TXP0 <22>
DMI
CFG3 DMI_RXP0 DMI_TXP1
CFG[19:18] have internal pull down C23 AJ39 DMI_TXP1 <22>
PM_EXTTS#1 CFG5 CFG4 DMI_RXP1 DMI_TXP2
1 2 TP45 F23 AN41 DMI_TXP2 <22>
R173 10KR2J-3-GP CFG6 CFG5 DMI_RXP2 DMI_TXP3
TP38 N23 AN45 DMI_TXP3 <22>
CFG7 CFG6 DMI_RXP3
From Astro demo schematic TP44 G23
CFG7
CFG8 DMI_RXN0
CFG
TP43 J20 AJ46
CLKREQ#_B CFG9 CFG8 DMI_TXN0 DMI_RXN1 DMI_RXN0 <22>
1 2 C20 AJ41
R172 10KR2J-3-GP CFG10 CFG9 DMI_TXN1 DMI_RXN2 DMI_RXN1 <22>
TP37 R24 AM40
CFG11 CFG10 DMI_TXN2 DMI_RXN3 DMI_RXN2 <22>
TP42 L23 AM44
CFG11 DMI_TXN3 DMI_RXN3 <22>
1
CFG09 R188 TP39 CFG12 J23

2K2R2J-2-GP CFG13 CFG12 DMI_RXP0
TP40 E23 AJ47
CFG13 DMI_TXP0 DMI_RXP0 <22>
0= Lane reserved DY E20 AJ42 DMI_RXP1
CFG14 DMI_TXP1 DMI_RXP2 DMI_RXP1 <22>
K23 AM39
1= Normal TP41 CFG16 M20 AM43 DMI_RXP3
2
M24
CFG18 CFG17
TP34 L32
CFG19 CFG18
TP32 N33
CFG20 CFG19
TP28 L35
CFG20
GRAPHICS VID
PM_PWROK 1 DY 2 PM_POK_R E35 DFGT_VID0
GFX_VID0 TP29
R168 0R2J-2-GP A39 DFGT_VID1
GFX_VID1 TP86
1 2 PM_BMBUSY# G41 C38 DFGT_VID2
<22,36> VGATE_PWRGD <22> PM_BMBUSY# PM_BM_BUSY# GFX_VID2 TP87
R166 0R2J-2-GP H_DPRSTP# L39 B39 DFGT_VID3
<4,21,36> H_DPRSTP# PM_DPRSTP# GFX_VID3 TP85
PM_EXTTS#0 L36 E36 DFGT_VR_EN
B <15> PM_EXTTS#0 PM_EXT_TS#0 GFX_VR_EN TP30 1D25V_S0 B
PM_EXTTS#1
PM
J36
<16> PM_EXTTS#1 PM_POK_R PM_EXT_TS#1
AW49
PLT_RST_R# PWROK
AV20
H_THERMTRIP# RSTIN#
N20
<4,21> H_THERMTRIP# DPRSLPVR THERMTRIP#
G36
<22,36> DPRSLPVR DPRSLPVR
2
R442
AM49 1KR2F-3-GP
CL_CLK CL_CLK <22>
BJ51 AK50 CL_DATA <22>
NC#BJ51 CL_DATA CLPWROK_MCH
BK51 AT43 1 2 PM_PWROK <22,24>
ME
NC#BK51 CL_PWROK
1
2 1 PLT_RST_R# BK50 AN49 R167 0R2J-2-GP
<20,29,31,35,46,58> PLT_RST1# NC#BK50 CL_RST# CL_RST# <22>
R194 100R2J-2-GP BL50 AM50 CL_VREF
NC#BL50 CL_VREF
BL49
NC#BL49
1
BL3
NC#BL3
1
BL2 R441
NC#BL2 C667 392R2F-GP
NC
BK1
NC#BK1 ICH_SDVO_CLK
BJ1 H35 TP31
NC#BJ1 SDVO_CTRL_CLK
2
E1 K36 ICH_SDVO_DATA
NC#E1 SDVO_CTRL_DATA TP26
SCD1U16V2KX-3GP
2
A5 G39
NC#A5 CLKREQ# MCH_ICH_SYNC# CLKREQ#_B <3>
C51 G40
NC#C51 ICH_SYNC# MCH_ICH_SYNC# <22>
B50
MISC
NC#B50
A50
NC#A50
A49 A37 TEST1_GMCH 1 2
NC#A49 TEST1
BK2 R32 TEST2_GMCH1 2 R174
NC#BK2 TEST2 R176 0R2J-2-GP
20KR2J-L2-GP
CRESTLINE-GP-U
A A
<Core Design>
Wistron Corporation
Title
CRESTLINE(3/7)-AGTL+/DMI/DDR2
C
Anote2.0 INTEL SC
5 4 3 2 1
5 4 3 2 1
Strap Pin Table
010 = FSB 800MHz
CFG[2:0] FSB Freq select 011 = FSB 667MHz
Others = Reserved
CFG5 (DMI select) 0 = DMI x 2

1 = DMI x 4 *
D CFG6 Reserved
1D05V_S0 0 = Reserved
3D3V_S0 CFG7 (CPU Strap) 1 = Mobile CPU *
0 = Normal mode
2
CFG8 (Low power PCIE) 1 = Low Power mode *
R171
3
4
24D9R2F-L-GP
RN21 CFG9 0 = Reverse Lane
SRN10KJ-5-GP (PCIE Graphics Lane Reversal) 1 = Normal Operation *
1
UMA PEGCOMP trace
U58C 3 OF 10
width and spacing CFG[11:10] Reserved
2
1
<19> LBKLT_CTL J40 L_BKLT_CTRL PEG_COMPI N43 PEGCOMP is 20/25 mils.

RN20 H39 M43
<50,55> BLON_IN L_BKLT_EN PEG_COMPO
3D3V_S0 3 2 E39 L_CTRL_CLK 00 = Reserved
4 1 E40 L_CTRL_DATA PEG_RXN[15..0] <46> 01 = XOR Mode Enabled
<19,50> LDDC_CLK C37 L_DDC_CLK PEG_RX#0 J51 PEG_RXN0 CFG[13:12] (XOR/ALLZ) 10 = All Z Mode Enabled
<19,50> LDDC_DATA
SRN10KJ-5-GP UMA D35 L_DDC_DATA PEG_RX#1 L51 PEG_RXN1 11 = Normal Operation (Default)*
K40 N47 PEG_RXN2
<19,50> LCDVDD_EN L_VDD_EN PEG_RX#2 PEG_RXN3
PEG_RX#3 T45
1 2 LVDS_IBG L41 LVDS_IBG PEG_RX#4 T50 PEG_RXN4 CFG[15:14] Reserved
R169 UMA 2K4R2F-GP L43 U40 PEG_RXN5
TP24 LVDS_VBG PEG_RX#5
N41 Y44 PEG_RXN6
LVDS_VREFH PEG_RX#6
For Crestline : 2.4 Kohm N40 LVDS_VREFL PEG_RX#7 Y40 PEG_RXN7 0 = Disable
For Calero : 1.5Kohm <19> GMH_TXACLK- D46 LVDSA_CLK# PEG_RX#8 AB51 PEG_RXN8 CFG16 (FSB Dynamic ODT) 1 = Enable *
C <19> GMH_TXACLK+ C45 LVDSA_CLK PEG_RX#9 W49 PEG_RXN9
PEG_RXN10
LVDS
<19> GMH_TXBCLK- D44 LVDSB_CLK# PEG_RX#10 AD44
<19> GMH_TXBCLK+ E42 LVDSB_CLK PEG_RX#11 AD40 PEG_RXN11 CFG[18:17] Reversed
AG46 PEG_RXN12
PEG_RX#12 PEG_RXN13
<19> GMH_TXAOUT0- G51 LVDSA_DATA#0 PEG_RX#13 AH49
<19> GMH_TXAOUT1- E51 LVDSA_DATA#1 PEG_RX#14 AG45 PEG_RXN14 SDVO_CTRLDATA 0 = No SDVO Device Present *
<19> GMH_TXAOUT2- F49 LVDSA_DATA#2 PEG_RX#15 AG41 PEG_RXN15 1 = SDVO Device Present
C48 LVDSA_DATA#3 PEG_RXP[15..0] <46>
J50 PEG_RXP0
PEG_RX0
<19> GMH_TXAOUT0+ G50 LVDSA_DATA0 PEG_RX1 L50 PEG_RXP1 0 = Normal Operation *
<19> GMH_TXAOUT1+ E50 LVDSA_DATA1 PEG_RX2 M47 PEG_RXP2 CFG19(DMI Lane Reversal) (Lane number in Order)
F48 U44 PEG_RXP3
<19> GMH_TXAOUT2+ LVDSA_DATA2 PEG_RX3
D47 LVDSA_DATA3 PEG_RX4 T49 PEG_RXP4 1 = Reverse lane
T41 PEG_RXP5
PEG_RX5 PEG_RXP6
<19> GMH_TXBOUT0- G44 LVDSB_DATA#0 PEG_RX6 W45
<19> GMH_TXBOUT1- B47 LVDSB_DATA#1 PEG_RX7 W41 PEG_RXP7 0 = Only PCIE or SDVO is operationa
<19> GMH_TXBOUT2- B45 LVDSB_DATA#2 PEG_RX8 AB50 PEG_RXP8 CFG20(PCIE/SDVO consurrent) 1 = PCIE/SDVO are operating simu.
PEG_RXP9
PCI_EXPRESS GRAPHICS
PEG_RX9 Y48
AC45 PEG_RXP10
PEG_RX10 PEG_RXP11
<19> GMH_TXBOUT0+ E44 LVDSB_DATA0 PEG_RX11 AC41
A47 AH47 PEG_RXP12
<19> GMH_TXBOUT1+ LVDSB_DATA1 PEG_RX12 PEG_RXP13
<19> GMH_TXBOUT2+ A45 LVDSB_DATA2 PEG_RX13 AG49
AH45 PEG_RXP14
M_COMP PEG_RX14 PEG_RXP15
PEG_RX15 AG42
M_LUMA
<18> M_LUMA M_CRMA GTXN0 C6581 SCD1U10V2KX-4GP PEG_TXN0 PEG_TXN[15..0] <46>
<18> M_CRMA PEG_TX#0 N45 2DIS
E27 U39 GTXN1 C6461 2DIS SCD1U10V2KX-4GP PEG_TXN1
TVA_DAC PEG_TX#1
1
G27 U47 GTXN2 C6661 2DIS SCD1U10V2KX-4GP PEG_TXN2

TVB_DAC PEG_TX#2 GTXN3 C6441 SCD1U10V2KX-4GP PEG_TXN3
K27 N51 2DIS
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
TVC_DAC PEG_TX#3
B R50 GTXN4 C6691 2DIS SCD1U10V2KX-4GP PEG_TXN4
R457
R455
R178
PEG_TX#4
DIS GTXN5 C6481 2DIS SCD1U10V2KX-4GP PEG_TXN5
TV
F27 TVA_RTN PEG_TX#5 T42

1D5V_SB_S0 R456 1 2 0R2J-2-GP J27 Y43 GTXN6 C6711 2DIS SCD1U10V2KX-4GP PEG_TXN6
TVB_RTN PEG_TX#6
2
L27 W46 GTXN7 C6501 2DIS SCD1U10V2KX-4GP PEG_TXN7

R454 1 TVC_RTN PEG_TX#7
2 0R2J-2-GP 0 in DIS 0 in DIS 0 in DIS PEG_TX#8 W38 GTXN8 C6641 2DIS SCD1U10V2KX-4GP PEG_TXN8
UMA M35 TV_DCONSEL0 PEG_TX#9 AD39 GTXN9
GTXN10
C6521
C6601
2DIS SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PEG_TXN9
PEG_TXN10
3D3V_S0 1 2 P33 TV_DCONSEL1 PEG_TX#10 AC46 2DIS
R175 UMA 2K2R2J-2-GP AC49 GTXN11 C6621 2DIS SCD1U10V2KX-4GP PEG_TXN11
PEG_TX#11 GTXN12 C6381 SCD1U10V2KX-4GP PEG_TXN12
PEG_TX#12 AC42 2DIS
M_BLUE AH39 GTXN13 C6361 2DIS SCD1U10V2KX-4GP PEG_TXN13
<17> M_BLUE M_GREEN PEG_TX#13 GTXN14 C6551 SCD1U10V2KX-4GP PEG_TXN14
<17> M_GREEN PEG_TX#14 AE49 2DIS
M_RED AH44 GTXN15 C6561 2DIS SCD1U10V2KX-4GP PEG_TXN15
<17> M_RED PEG_TX#15
PEG_TXP[15..0] <46>
1
M45 GTXP0 C6571 2DIS SCD1U10V2KX-4GP PEG_TXP0

PEG_TX0 GTXP1 C6451 SCD1U10V2KX-4GP PEG_TXP1
H32 T38 2DIS
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
CRT_BLUE PEG_TX1 GTXP2 C6651 SCD1U10V2KX-4GP PEG_TXP2

G32 T46 2DIS
R177
R183
R179
CRT_BLUE# PEG_TX2
R184 1
DIS K29 CRT_GREEN PEG_TX3 N50 GTXP3 C6431 2DIS SCD1U10V2KX-4GP PEG_TXP3
1D05V_S0 2 0R2J-2-GP J29 CRT_GREEN# PEG_TX4 R51 GTXP4 C6681 2DIS SCD1U10V2KX-4GP PEG_TXP4
2
F29 U43 GTXP5 C6471 2DIS SCD1U10V2KX-4GP PEG_TXP5

R180 1 CRT_RED PEG_TX5
2 0R2J-2-GP 0 in DIS 0 in DIS 0 in DIS GTXP6 C6701 2DIS SCD1U10V2KX-4GP PEG_TXP6
VGA
E29 CRT_RED# PEG_TX6 W42

UMA 1
R447
2
1K3R3-GP PEG_TX7 Y47 GTXP7
GTXP8
C6491
C6631
2DIS SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PEG_TXP7
PEG_TXP8
PEG_TX8 Y39 2DIS
K33 AC38 GTXP9 C6511 2DIS SCD1U10V2KX-4GP PEG_TXP9
<17> GMCH_DDC_CLK CRT_DDC_CLK PEG_TX9 GTXP10 C6591 SCD1U10V2KX-4GP PEG_TXP10
<17> GMCH_DDC_DATA G35 CRT_DDC_DATA PEG_TX10 AD47 2DIS
RN22 1 4 CRT_VSYNC E33 AC50 GTXP11 C6611 2DIS SCD1U10V2KX-4GP PEG_TXP11
<17> GMCH_VSYNC CRTIREF C32 CRT_VSYNC PEG_TX11 GTXP12 C6371 SCD1U10V2KX-4GP PEG_TXP12
<17> GMCH_HSYNC 2 3 CRT_TVO_IREF PEG_TX12 AD43 2DIS
SRN33J-5-GP-U CRT_HSYNC F33 AG39 GTXP13 C6351 2DIS SCD1U10V2KX-4GP PEG_TXP13
CRT_HSYNC PEG_TX13
UMA PEG_TX14 AE50 GTXP14 C6541 2DIS SCD1U10V2KX-4GP PEG_TXP14
RN80 AH43 GTXP15 C6531 2DIS SCD1U10V2KX-4GP PEG_TXP15
PEG_TX15
1 4
A 2 3
<Core Design>
DIS
SRN0J-6-GP CRESTLINE-GP-U
Wistron Corp
FOR Calero: 255 ohm Taipei Hsien 221, Taiwan, R.O
Crestline: 1.3k ohm
Title
CRESTLINE(4/7)-VGA/LVDS/T
A3
Anote2.0 INTEL
5 4 3 2 1
A B C D E
3D3V_S0 3D3V_S0
1D25V_S0 R584
1 2
L19 1 2 IND-10UH-106-GP
0R3-0-U-GP
L18 1 2
BLM18PG181SN-3GP
1
TC32
1
IND-10UH-106-GP C268 C269 C253 C270
1
C681 C682
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
L33
SCD022U16V2KX-3GP
ST100U4VBM-11-GP
2
2
2
2
1D05V_S0
1
DY DY C112, C109, C113 = > Change from 0402 to 0603
2
4 C306
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC2D2U6D3V3KX-GP
1D25V_S0 VCCA_DAC
SCD1U10V2KX-4GP
SCD47U10V2KX-GP
SCD1U10V2KX-4GP
1
1
U58H 8 OF 10
C718 C383 C377 C365 C364 C385 TC27
L21 1 2 IND-1UH-36-GP U13 ST220
VTT
2
1
1
L36 1
J32 VCC_SYNC VTT U12 DY
2 IND-1UH-36-GP C694 C704 C696 C695
SCD1U10V2KX-4GP
VTT U11
SCD1U10V2KX-4GP
SCD022U16V2KX-3GP
SCD022U16V2KX-3GP
SCD1U10V2KX-4GP
A33 VCCA_CRT_DAC VTT U9
2
1
1
B33 VCCA_CRT_DAC VTT U8
C388 R467
CRT
VTT U7
D51R3F-2-GP U5
VTT
2
C389 C384 C715 A30 U3

VCCA_DAC_BG VTT
1
1
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VTT U2
1 2
C719 B32 U1
VSSA_DAC_BG VTT
SC22U6D3V5MX-2GP
VTT
VTT T13
2
2
DY VTT T11
1D25V_S0
VTT T10
2
VCCA_DPLLA B49 T9
VCCA_DPLLA VTT
VTT T7
VCCA_DPLLB
SC22U6D3V5MX-2GP
SC1U10V2KX-1GP
H49 VCCA_DPLLB VTT T6
C342 C326
PLL
VTT T5
1
VCCA_HPLL AL2 T3
VCCA_HPLL VTT
VTT T2
1D25V_S0 VCCA_MPLL AM2 R3
VCCA_MPLL VTT
2
3
VTT R2 DY 1D25V_S0
POWER
SCD01U16V2KX-3GP
VTT R1
A LVDS
R163 1 2 0R3-0-U-GP VCCA_PEG A41 VCCA_LVDS R187
1
1
C282 B41 AT23 1 2
3D3V_S0 VSSA_LVDS VCC_AXD
SC10U6D3V5KX-1GP
SC1U10V2KX-1GP
VCC_AXD AU28
R164 1D25V_S0 0R3-0-U-GP
SCD1U10V2KX-4GP
VCC_AXD AU24
1
1R2F-GP K50 AT29 C347 C344
AXD
R201 VCCA_PEG_BG VCC_AXD
VCC_AXD AT25
2
1
C267
SC10U6D3V5KX-1GP
1 2 K49 AT30
A PEG
VSSA_PEG_BG VCC_AXD
2
C387 C390 C346 C350
1
1
0R5J-5-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
VCC_AXD_NCTF AR29
2
1
C255
1D25V_S0
1
TC16 U51 VCCA_PEG_PLL
2
2
ST100U4VBM-11-GP
B23 VCC_AXF
VCC_AXF
2
DY R182
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC22U6D3V6KX-1GP
AXF
VCC_AXF B21
VCCA_SM 1R2F-GP
SCD1U10V2KX-4GP
AW18 VCCA_SM VCC_AXF A21
1
AV19 C263 C336 C315
VCCA_SM
2
1
C264 AU19 AJ50
VCCA_SM VCC_DMI
SC10U6D3V5KX-1GP
AU18 VCCA_SM
1
AU17 C327
VCCA_SM
2
1D25V_S0 BK24
VCC_SM_CK
AT22 BK23
A SM
SM CK
VCCA_SM VCC_SM_CK
2
SCD01U16V2KX-3GP
AT21 VCCA_SM VCC_SM_CK BJ24
AT19 VCCA_SM VCC_SM_CK BJ23
AT18 VCCA_SM
1
SC22U6D3V5MX-2GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
AT17 VCCA_SM
AR17 C275 3D3V_S0 1D05V_S0
VCCA_SM_NCTF
1
C271 C320 C321 AR16 A43

VCCA_SM_NCTF VCC_TX_LVDS
2
2
D18
R444
2
BC29 C40 1 2 K A
A CK
VCCA_SM_CK VCC_HV
HV
SCD1U10V2KX-4GP
BB29 VCCA_SM_CK VCC_HV B40
10R2J-2-GP
RB521S-30TE61-GP
1
C25 VCCA_TVA_DAC
B25 AD51 C674
VCCA_TVA_DAC VCC_PEG
C27 VCCA_TVB_DAC VCC_PEG W50
2
TV
PEG
B27 VCCA_TVB_DAC VCC_PEG W51
B28 VCCA_TVC_DAC VCC_PEG V49
1D5V_SB_S0 A28 V50 I= 1200ma
VCCA_TVC_DAC VCC_PEG
1D05V_S0
M32 AH50
TV/CRT
VCCD_CRT VCC_RXR_DMI
DMI
L29 VCCD_TVDAC VCC_RXR_DMI AH51
DY 1D25V_S0
N28 VCCD_QDAC
1
A7 TC5 C266 C265
VTTLF
VTTLF
1
C323 C305 C311
ST220U2D5VBM-LGP
SCD1U10V2KX-4GP
SC22U6D3V5MX-2GP
AN2 VCCD_HPLL VTTLF F2
SC10U6D3V5KX-1GP
SCD022U16V2KX-3GP
VTTLF AH1
2
SCD1U10V2KX-4GP U48 VCCD_PEG_PLL
2
C308 C322 1D8V_S3
DY
SCD1U10V2KX-4GP
SCD022U16V2KX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
J41
LVDS
VCCD_LVDS
2
1
H42 VCCD_LVDS
1
C278 C386 C717 C716 C713
SCD47U10V2KX-GP
SCD47U10V2KX-GP
SCD47U10V2KX-GP
2
2
1
C313
2
SC22U6D3V5MX-2GP
1 CRESTLINE-GP-U <Core Design>

2
DY
Wistron Corpo
1
C380
SC22U6D3V5MX-2GP Title
CRESTLINE(5/7)-PWR
2

A3
Anote2.0 INTEL
A B C D E
5 4 3 2 1
1D05V_S0
1D05V_S0 LIB C
U58F 6 OF 10
AT35 T17
VCC VCC_AXG_NCTF
AT34 T18
VCC VCC_AXG_NCTF
AH28 T19
VCC VCC_AXG_NCTF
AC32 T21
U58G 7 OF 10 VCC VCC_AXG_NCTF
AC31 T22
VCC VCC_AXG_NCTF
1
TC8 C295 C316 C290 C299 AK32 T23
1D05V_S0 VCC VCC_AXG_NCTF
ST220U2D5VBM-LGP
AB33 AJ31 T25
VCC_NCTF VCC VCC_AXG_NCTF
VCC CORE
SC22U6D3V5MX-2GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD1U16V2ZY-2GP
AB36 AJ28 U15
2
AB37 AH32 U16
D AC33
AC35
VCC_NCTF
VCC_NCTF
VSS_NCTF
VSS_NCTF
T27
T37
AH31
AH29
VCC
VCC
VCC_AXG_NCTF
VCC_AXG_NCTF
U17
U19 D
AC36 U24 C331 AF32 U20
VCC_NCTF VSS_NCTF VCC VCC_AXG_NCTF
1
AD35 U28 U21
VCC_NCTF VSS_NCTF VCC_AXG_NCTF
SC22U6D3V5MX-2GP
AD36 V31 U23
AF33 V35 U26
2
AF36 AA19 V16
AH33 AB17 R30 V17
VCC_NCTF VSS_NCTF VCC VCC_AXG_NCTF
VSS NCTF
AH35 AB35 V19
AH36 AD19 V20
AH37 AD37 V21
AJ33 AF17 V23
AJ35 AF35 V24
AK33 AK17 Y15
AK35
AK36
AK37
VCC_NCTF
VCC_NCTF
VCC_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
AM17
AM24
AP26
POWER VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
Y16
Y17
Y19
AD33 AP28 AU32 Y20
VCC_NCTF VSS_NCTF VCC_SM VCC_AXG_NCTF
VCC NCTF
AJ36 AR15 1D8V_S3 AU33 Y21
AM35 AR19 AU35 Y23
AL33 AR28 AV33 Y24
AL35 AW33 Y26
VCC_NCTF VCC_SM VCC_AXG_NCTF
AA33 AW35 Y28
1
AA35 TC25 C289 C310 C304 AY35 Y29
ST220U2D5VBM-LGP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD01U16V2KX-3GP
AA36 BA32 AA16
AP35 BA33 AA17
2
AP36
VCC_NCTF DY BA35
VCC_SM VCC_AXG_NCTF
AB16
AR35 BB33 AB19
AR36 BC32 AC16
Y32 BC33 AC17
Y33 BC35 AC19
Y35 BD32 AD15
VCC SM
VCC GFX NCTF

C
Y36
Y37
T30
VCC_NCTF
VCC_NCTF
VCC_NCTF
POWER BD35
BE32
BE33
VCC_SM
VCC_SM
VCC_SM
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
AD16
AD17
AF16 C
T34 A3 BE35 AF19
VCC_NCTF VSS_SCB VCC_SM VCC_AXG_NCTF
VSS SCB
T35 B2 BF33 AH15

U29 C1 BF34 AH16
U31 BL1 BG32 AH17
U32 BL51 BG33 AH19
U33 A51 BG35 AJ16
U35 BH32 AJ17
U36 BH34 AJ19
V32 BH35 AK16
V33 BJ32 AK19
VCC_NCTF 1D05V_S0 VCC_SM VCC_AXG_NCTF
V36 BJ33 AL16
V37 BJ34 AL17
AT33 BK32 AL19
VCC_AXM VCC_SM VCC_AXG_NCTF
VSS AXM
AT31 BK33 AL20

AK29 BK34 AL21
AK24 BK35 AL23
1D05V_S0 VCC_AXM VCC_SM VCC_AXG_NCTF
AK23 BL33 AM15
VCC_AXM 1D05V_S0 VCC_SM VCC_AXG_NCTF
AJ26 AU30 AM16
AJ23 AM19
VCC_AXM VCC_AXG_NCTF
1
AL24 AM20
VCC_AXM_NCTF C272 C262 VCC_AXG_NCTF
AL26 AM21
VCC_AXM_NCTF VCC_AXG_NCTF
SC10U10V5KX-2GP
SC10U10V5KX-2GP
AL28 R20 AM23
VCC_AXM_NCTF 2 VCC_AXG VCC_AXG_NCTF
2
AM26 T14 AP15
VCC_AXM_NCTF VCC_AXG VCC_AXG_NCTF
VSS AXM NCTF
AM28 W13 AP16

AM29 W14 AP17
1
AM31 C334 C352 C351 C361 Y12 AP19
VCC_AXM_NCTF TC12 VCC_AXG VCC_AXG_NCTF
AM32 AA20 AP20
1
C288 C330 C300 C301 C287
ST220U2D5VBM-LGP
SC1U10V3KX-3GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SCD1U16V2ZY-2GP
AM33 AA23 AP21
2
AP29 AA26 AP23
AP31 AA28 AP24
2
2
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
AP32 AB21 AR20

AP33 AB24 AR21
B AL29
VCC_AXM_NCTF
VCC_AXM_NCTF
AB29
VCC_AXG
VCC_AXG
VCC_AXG_NCTF
VCC_AXG_NCTF
AR23 B
VCC GFX
AL31 AC20 AR24
AL32 AC21 AR26
AR31 AC23 V26
AR32 AC24 V28
AR33 AC26 V29
VCC_AXM_NCTF DY AC28
VCC_AXG VCC_AXG_NCTF
Y31
VCC_AXG VCC_AXG_NCTF
AC29
VCC_AXG
AD20
VCC_AXG
AD23
CRESTLINE-GP-U VCC_AXG VCCSM_LF1
AD24 AW45
VCC_AXG VCC_SM_LF
VCC SM LF
AD28 BC39 VCCSM_LF2
VCC_AXG VCC_SM_LF VCCSM_LF3
AF21 BE39
AF26 BD17
AA31 BD4
VCC_AXG VCC_SM_LF
1
1
C356 C338 C343 AH20 AW8 VCCSM_LF6
AH21 AT6
VCC_AXG VCC_SM_LF
SCD1U16V2ZY-2GP
SCD22U10V2KX-1GP
AH23
SC4D7U6D3V3KX-GP
VCC_AXG
2
1
AH24 C378 C379 C381 C710 C283 C284 C281
VCC_AXG
AH26
VCC_AXG
SCD22U10V2KX-1GP
AD31
VCC_AXG
2
1D05V_S0 3D3V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD22U10V2KX-1GP
SCD47U10V2KX-GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
AJ20
D10 VCC_AXG
AN14
R160 VCC_AXG
A K 2 1
CH751H-40PT-1GP
10R2J-2-GP CRESTLINE-GP-U
A A
<Core Design>
Wistron Corporation
Title
Size
CRESTLINE(6/7)-PWR/GND
Document Number Rev
Custom
Anote2.0 INTEL SC
5 4 3 2 1
5 4 3 2 1
U58I 9 OF 10 U58J10 OF 10
A13 VSS VSS AW24 C46 VSS VSS W11

A24 AW5 D13 W47
D AA21
AA24
VSS
VSS
VSS
VSS AW7
AY10
D24
D3
VSS
VSS
VSS
VSS W5
W7
VSS VSS VSS VSS
AA29 VSS VSS AY24 D32 VSS VSS Y13
AB20 VSS VSS AY37 D39 VSS VSS Y2
AB28 VSS VSS AY45 E10 VSS VSS Y49
AB31 VSS VSS AY47 E16 VSS VSS Y5
AC10 VSS VSS AY50 E24 VSS VSS Y50
AC13 VSS VSS B10 E28 VSS VSS Y11
AC3 VSS VSS B20 E32 VSS VSS P29
AC39 VSS VSS B24 E47 VSS VSS T29
AC43 VSS VSS B29 F19 VSS VSS T31
AC47 VSS VSS B30 F36 VSS VSS T33
AD1 VSS VSS B35 F4 VSS VSS R28
AD21 VSS VSS B38 F40 VSS
AD26 VSS VSS B43 F50 VSS
AD29 VSS VSS B46 G1 VSS
AD3 VSS VSS B5 G13 VSS
AD41 VSS VSS B8 G16 VSS VSS AA32
AD45 VSS VSS BA1 G19 VSS VSS AB32
AD49 VSS VSS BA17 G24 VSS VSS AD32
AD5 VSS VSS BA18 G28 VSS VSS AF28
AD50 VSS VSS BA2 G29 VSS VSS AF29
AD8 VSS VSS BA24 G33 VSS VSS AT27
AE10 VSS VSS BB12 G42 VSS VSS AV25
AE14 VSS VSS BB25 G45 VSS VSS H50
AE6 VSS VSS BB40 G48 VSS
AF20 VSS VSS BB44 G8 VSS
C AF23
AF24
VSS VSS BB49
BB8
H24
H28
VSS
VSS VSS VSS
AF31 VSS VSS BC16 H4 VSS
AG2
AG38
AG43
VSS
VSS
VSS
VSS
BC24
BC25
BC36
H45
J11
J16
VSS
VSS VSS
VSS VSS VSS
AG47 VSS VSS BC40 J2 VSS
AG50 VSS VSS BC51 J24 VSS
AH3 VSS VSS BD13 J28 VSS
AH40
AH41
AH7
VSS
VSS VSS VSS
VSS
BD2
BD28
BD45
J33
J35
J39
VSS
VSS
VSS VSS VSS
AH9 VSS VSS BD48 K12 VSS
AJ11 VSS VSS BD5 K47 VSS
AJ13 VSS VSS BE1 K8 VSS
AJ21 VSS VSS BE19 L1 VSS
AJ49 VSS VSS BF12 L33 VSS
AK20 VSS VSS BF16 L49 VSS
AK21 VSS VSS BF36 M28 VSS
AK26 VSS VSS BG19 M42 VSS
AL1 VSS VSS BG39 M50 VSS
B AM11
AM13
VSS
VSS
VSS
VSS
BG48
BG5
M9
N11
VSS
VSS
AM3 VSS VSS BG51 N14 VSS
AM4 VSS VSS BH17 N17 VSS
AN1 VSS VSS BH46 N36 VSS
AN38 VSS VSS BH8 N39 VSS
AN39 VSS VSS BJ11 N44 VSS
AN7 VSS VSS BJ4 P19 VSS
AP4 VSS VSS BJ42 P2 VSS
AP48 VSS VSS BJ46 P23 VSS
AP50 VSS VSS BK15 P3 VSS
AR11 VSS VSS BK17 P50 VSS
AR2 VSS VSS BK25 R49 VSS
AR39 VSS VSS BK29 T39 VSS
AR7 VSS VSS BK44 U41 VSS
AT10 VSS VSS BK6 U45 VSS
AT14 VSS VSS BK8 U50 VSS
AT41 VSS VSS BL11 V2 VSS
AT49 VSS VSS BL13 V3 VSS
AU1 VSS VSS BL19
AU23 VSS VSS BL22
AU29 VSS VSS BL37
AU3 BL47 CRESTLINE-GP-U
VSS VSS
AU36 C12
A AU49
VSS
VSS
VSS
VSS C16
<Core Design>
AU51 VSS VSS C19
AV39
AV48
VSS
VSS
VSS
VSS
C28
C29 Wistron Corp
AW1 C33 21F, 88, Sec.1, Hsin Tai W u R
VSS VSS Taipei Hsien 221, Taiwan, R.O
AW12 VSS VSS C36
AW16 VSS VSS C41
Title
CRESTLINE(7/7)-PWR/GND
CRESTLINE-GP-U Size Document Number
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
CN21
MH1 MH1 MH2 MH2

<9> DDR_A_DQS#[0..7]
DDR_A_MA0 102 13 DDR_A_DQS0
DDR_A_MA1 A0 DQS0 DDR_A_DQS1
<9> DDR_A_D[0..63] 101 A1 DQS1 31
<9> DDR_A_DM[0..7] 99 A3 DQS3 70
<9> DDR_A_DQS[0..7] 97 A5 DQS5 148
<9> DDR_A_MA[0..14] 92 A7 DQS7 188
DDR_A_MA8 93 11 DDR_A_DQS#0
DDR_A_MA9 A8 DQS0# DDR_A_DQS#1
91 A9 DQS1# 29
D DDR_A_MA10 105 49 DDR_A_DQS#2
<9> DDR_A_BS[0..2] A10/AP DQS2#
Layout Note: DDR_A_MA11 90 68 DDR_A_DQS#3
Place near DM1 89 A12 DQS4# 129
DDR_A_MA13 116 146 DDR_A_DQS#5
<9> DDR_A_MA14 86 A14 DQS6# 167
84 186 DDR_A_DQS#7
DDR_A_BS2 A15 DQS7#
85 A16_BA2
10 DDR_A_DM0
DDR_A_BS0 DM0 DDR_A_DM1
107 BA0 DM1 26
1D8V_S3 DDR_A_BS1 106 52 DDR_A_DM2
BA1 DM2 DDR_A_DM3
DM3 67
DDR_A_D0 5 130 DDR_A_DM4
DDR_A_D1 DQ0 DM4 DDR_A_DM5
7 DQ1 DM5 147
DDR_A_D2 17 170 DDR_A_DM6
C708 C702 C697 C711 C691 C359 C337 C318 C371 TC13 DDR_A_D3 DQ2 DM6 DDR_A_DM7 3D3V_S0
19 DQ3 DM7 185
1
1
DDR_A_D4 4
DDR_A_D5 DQ4 M_CLK_DDR0
6 DQ5 CK0 30 M_CLK_DDR0 <10>
ST220U2D5VBM-LGP
DDR_A_D6 M_CLK_DDR#0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
14 DQ6 CK0# 32 M_CLK_DDR#0 <10>
2
2
DY DDR_A_D7 16 164 M_CLK_DDR1 M_CLK_DDR1 <10>
DDR_A_D8 DQ7 CK1 M_CLK_DDR#1
23 DQ8 CK1# 166 M_CLK_DDR#1 <10>
DDR_A_D9 25
DDR_A_D10 DQ9 SA0
35 DQ10 SA0 198
DDR_A_D11 37 200 SA1
DDR_A_D12 DQ11 SA1
20 DQ12
DDR_A_D13 22 199
DDR_A_D14 DQ13 VDD_SPD
36 DQ14
DDR_A_D15 38 1D8V_S3
DDR_A_D16 DQ15
43 DQ16 VDD 81
1
DDR_A_D17 45 82 C422 C417
DDR_A_D18 DQ17 VDD SCD1U16V2ZY-2GP SC2D2U6D3V3KX-GP
55 DQ18 VDD 87
DDR_A_D19 57 88
DQ19 VDD
2
Layout Note: DDR_A_D20 44 95
DDR_A_D21 DQ20 VDD
Place one cap close to every 2 pullup 46 DQ21 VDD 96
DDR_A_D22 56 103
C
resistors terminated to +0.9VS DDR_A_D23 DQ22 VDD
58 DQ23 VDD 104
DDR_A_D24 61 111
DDR_A_D25 DQ24 VDD
63 DQ25 VDD 112
DDR_A_D26 73 117
DDR_A_D27 DQ26 VDD
75 DQ27 VDD 118
DDR_A_D28 62
DDR_A_D29 DQ28
64 DQ29 VSS 2
0D9V_S3 DDR_A_D30 74 3
DDR_A_D31 DQ30 VSS
76 DQ31 VSS 8
DDR_A_D32 123 9
DDR_A_D33 DQ32 VSS
125 DQ33 VSS 12
DDR_A_D34 135 15
C317 C363 C335 C328 C370 C302 C303 C354 C348 C297 C294 C291 C373 DDR_A_D35 DQ34 VSS
137 DQ35 VSS 18
1
DDR_A_D36 124 21
DDR_A_D37 DQ36 VSS
126 DQ37 VSS 24
DDR_A_D38
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
134 DQ38 VSS 27

2
DDR_A_D39 136 28
DDR_A_D40 DQ39 VSS
141 DQ40 VSS 33
DDR_A_D41 143 34
DDR_A_D42 DQ41 VSS
151 DQ42 VSS 39
DDR_A_D43 153 40
DDR_A_D44 DQ43 VSS
140 DQ44 VSS 41
DDR_A_D45 142 42
DDR_A_D46 DQ45 VSS
152 DQ46 VSS 47
DDR_A_D47 154 48
DDR_A_D48 DQ47 VSS
157 DQ48 VSS 53
DDR_A_D49 159 54
DDR_A_D50 DQ49 VSS SA0 R215 1
173 DQ50 VSS 59 2 10KR2J-3-GP
DDR_A_D51 175 60
DDR_A_D52 DQ51 VSS
158 DQ52 VSS 65
DDR_A_D53 160 66
DDR_A_D54 DQ53 VSS SA1 R222 1
174 DQ54 VSS 71 2 10KR2J-3-GP
DDR_A_D55 176 72
DDR_A_D56 DQ55 VSS
179 DQ56 VSS 77
B DDR_A_D57 181 78
DDR_A_D58 DQ57 VSS
189 DQ58 VSS 121
DDR_A_D59 191 122
DDR_A_D60 DQ59 VSS
180 DQ60 VSS 127
DDR_A_D61 182 128
DDR_A_D62 DQ61 VSS
192 DQ62 VSS 132
Layout Note: DDR_A_D63 194 133
0D9V_S3 DQ63 VSS
Place these resistors VSS 138
<10> PM_EXTTS#1 50 NC#50 VSS 139
RN32 SRN56J-4-GP RN24 SRN56J-4-GP closely DM1,all 69 144
DDR_A_MA8 DDR_A_BS2 NC#69 VSS
1 4 3 2 trace length Max=1.5" 83 NC#83 VSS 145
DDR_A_MA5 2 3 4 1 DDR_CKE0_DIMMA 120 149
NC#120 VSS
163 NC#163/TEST VSS 150
RN36 SRN56J-4-GP RN31 SRN56J-4-GP 155
DDR_A_MA3 DDR_A_MA7 DDR_CS0_DIMMA# VSS
1 4 3 2 <10> DDR_CS0_DIMMA# 110 CS0# VSS 156
DDR_A_MA1 2 3 4 1 DDR_A_MA6 <10> DDR_CS1_DIMMA# DDR_CS1_DIMMA# 115 161
DDR_CKE0_DIMMA CS1# VSS
<10> DDR_CKE0_DIMMA 79 CKE0 VSS 162
RN43 SRN56J-4-GP RN28 SRN56J-4-GP <10> DDR_CKE1_DIMMA DDR_CKE1_DIMMA 80 165
DDR_A_RAS# DDR_A_MA12 DDR_A_RAS# CKE1 VSS
2 3 4 1 <9> DDR_A_RAS# 108 RAS# VSS 168
DDR_CS0_DIMMA# 1 4 3 2 DDR_A_MA9 <9> DDR_A_CAS# DDR_A_CAS# 113 171
DDR_A_WE# CAS# VSS
<9> DDR_A_WE# 109 WE# VSS 172
RN40 SRN56J-4-GP RN35 SRN56J-4-GP 177
DDR_A_MA10 DDR_A_MA4 ICH_SMBCLK VSS
1 4 4 1 <3,16,22> ICH_SMBCLK 197 SCL VSS 178
DDR_A_BS0 2 3 3 2 DDR_A_MA2 ICH_SMBDATA 195 183
<3,16,22> ICH_SMBDATA SDA VSS
VSS 184
RN44 SRN56J-4-GP RN39 SRN56J-4-GP <10> M_ODT0 M_ODT0 114 187
DDR_A_WE# DDR_A_MA0 DDR_VREF_S3 M_ODT1 ODT0 VSS
1 4 3 2 <10> M_ODT1 119 ODT1 VSS 190
DDR_CS1_DIMMA# 2 3 4 1 DDR_A_BS1 193
DDR_VREF_S3 VSS
1 VREF VSS 196
RN48 SRN56J-4-GP RN47 SRN56J-4-GP
M_ODT1 2 3 4 1 M_ODT0 201 202
GND GND
1
DDR_A_CAS# 1 4 3 2 DDR_A_MA13
C201 C211
RN23 SRN56J-4-GP SCD1U16V2ZY-2GP SC2D2U16V5ZY-2GP SKT-SODIMM20020U3GP
2
A DDR_CKE1_DIMMA 1 4 3 2 DDR_A_MA14
2 3 4 1 DDR_A_MA11
RN27 SRN56J-4-GP <Core Design>
High 5.2mm
Wistron Corp
21F, 88, Sec.1, Hsin Tai Wu Rd.
Taipei Hsien 221, Taiwan, R.O.C
Title
DDRII-SODIMM SLOT1
Custom
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
<9> DDR_B_DQS#[0..7]
<9> DDR_B_D[0..63]
CN20
<9> DDR_B_DM[0..7]
DDR_B_MA0 102 108 DDR_B_RAS# DDR_B_RAS# <9>
<9> DDR_B_DQS[0..7] A0 RAS#
DDR_B_MA1 101 109 DDR_B_WE# DDR_B_WE# <9>
DDR_B_MA2 A1 WE# DDR_B_CAS#
<9> DDR_B_MA[0..14] 100 A2 CAS# 113 DDR_B_CAS# <9>
DDR_B_MA3 99
DDR_B_MA4 A3 DDR_CS2_DIMMB#
D Layout Note: <9> DDR_B_BS[0..2] 98 A4 CS0# 110 DDR_CS2_DIMMB# <10> D
DDR_B_MA5 97 115 DDR_CS3_DIMMB#
Place near DM2 DDR_B_MA6 A5 CS1# DDR_CS3_DIMMB# <10>
94 A6
DDR_B_MA7 92 79 DDR_CKE2_DIMMB DDR_CKE2_DIMMB <10>
DDR_B_MA8 A7 CKE0 DDR_CKE3_DIMMB
93 A8 CKE1 80 DDR_CKE3_DIMMB <10>
DDR_B_MA9 91
DDR_B_MA10 A9 M_CLK_DDR2
105 A10/AP CK0 30 M_CLK_DDR2 <10>
DDR_B_MA11 90 32 M_CLK_DDR#2 M_CLK_DDR#2 <10>
DDR_B_MA12 A11 CK0#
89 A12
1D8V_S3 DDR_B_MA13 116 164 M_CLK_DDR3
A13 CK1 M_CLK_DDR3 <10>
DDR_B_MA14 86 166 M_CLK_DDR#3 M_CLK_DDR#3 <10>
<9> DDR_B_MA14 A14 CK1#
84 A15
DDR_B_BS2 85 10 DDR_B_DM0
A16/BA2 DM0 DDR_B_DM1
DM1 26
C689 C374 C703 C345 C333 C706 C692 DDR_B_BS0 107 52 DDR_B_DM2
BA0 DM2 3D3V_S0
1
1
DDR_B_BS1 106 67 DDR_B_DM3
BA1 DM3 DDR_B_DM4
DM4 130
DDR_B_DM5
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DM5 147
2
2
DDR_B_D0 5 170 DDR_B_DM6
DDR_B_D1 DQ0 DM6 DDR_B_DM7
7 DQ1 DM7 185
DDR_B_D2 17
DDR_B_D3 DQ2
19 DQ3
DDR_B_D4 4 195 ICH_SMBDATA
DQ4 SDA ICH_SMBDATA <3,15,22>
DDR_B_D5 6 197 ICH_SMBCLK
DQ5 SCL ICH_SMBCLK <3,15,22>
DDR_B_D6 14
DDR_B_D7 DQ6
16 DQ7 VDDSPD 199
DDR_B_D8 23
DDR_B_D9 DQ8 SB0
25 DQ9 SA0 198
DDR_B_D10 35 200 SB1
DQ10 SA1
1
DDR_B_D11 37 C421 C416
DDR_B_D12 DQ11
20 DQ12 NC#50 50 PM_EXTTS#0 <10> SCD1U16V2ZY-2GP SC2D2U6D3V3KX-GP
Layout Note: DDR_B_D13 22 69
DQ13 NC#69
2
DDR_B_D14 36 83
Place one cap close to every 2 pullup DDR_B_D15 DQ14 NC#83
38 DQ15 NC#120 120
resistors terminated to +0.9VS DDR_B_D16 43 163
DDR_B_D17 DQ16 NC#163/TEST
C 45 DQ17 C
DDR_B_D18 55 1D8V_S3
DDR_B_D19 DQ18
57 DQ19 VDD 81
DDR_B_D20 44 82
DDR_B_D21 DQ20 VDD
46 DQ21 VDD 87
DDR_B_D22 56 88
0D9V_S3 DDR_B_D23 DQ22 VDD
58 DQ23 VDD 95
DDR_B_D24 61 96 3D3V_S0
DDR_B_D25 DQ24 VDD
63 DQ25 VDD 103
DDR_B_D26 73 104
DDR_B_D27 DQ26 VDD
75 DQ27 VDD 111
C353 C362 C293 C372 C325 C312 C366 C357 C349 C339 C329 C319 C307 DDR_B_D28 62 112
DQ28 VDD
1
DDR_B_D29 64 117
DDR_B_D30 DQ29 VDD
74 DQ30 VDD 118
DDR_B_D31
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
76 DQ31
2
DDR_B_D32 123 3
DDR_B_D33 DQ32 VSS
125 DQ33 VSS 8
DDR_B_D34 135 9
DDR_B_D35 DQ34 VSS SB1 R223 1
137 DQ35 VSS 12 2 10KR2J-3-GP
DDR_B_D36 124 15
DDR_B_D37 DQ36 VSS
126 DQ37 VSS 18
DDR_B_D38 134 21 SB0 R216 1 2 10KR2J-3-GP
DDR_B_D39 DQ38 VSS
136 DQ39 VSS 24
DDR_B_D40 141 27
DDR_B_D41 DQ40 VSS
143 DQ41 VSS 28
DDR_B_D42 151 33
DDR_B_D43 DQ42 VSS
153 DQ43 VSS 34
DDR_B_D44 140 39
DDR_B_D45 DQ44 VSS
142 DQ45 VSS 40
DDR_B_D46 152 41
DDR_B_D47 DQ46 VSS
154 DQ47 VSS 42
DDR_B_D48 157 47
DDR_B_D49 DQ48 VSS
159 DQ49 VSS 48
DDR_B_D50 173 53
DDR_B_D51 DQ50 VSS
175 DQ51 VSS 54
B DDR_B_D52 158 59 B
DDR_B_D53 DQ52 VSS
160 DQ53 VSS 60
DDR_B_D54 174 65
DDR_B_D55 DQ54 VSS
176 DQ55 VSS 66
Layout Note: DDR_B_D56 179 71
0D9V_S3 DDR_B_D57 DQ56 VSS
Place these resistors 181 DQ57 VSS 72
DDR_B_D58 189 77
RN38 SRN56J-4-GP closely DM2,all DDR_B_D59 DQ58 VSS
RN30 191 78
DDR_B_MA5 DDR_B_MA12 DDR_B_D60 DQ59 VSS
1 4 4 1 trace length Max=1.5" 180 DQ60 VSS 121
DDR_B_MA1 2 3 3 2 DDR_B_MA9 DDR_B_D61 182 122
DDR_B_D62 DQ61 VSS
192 DQ62 VSS 127
RN42 SRN56J-4-GP RN25 SRN56J-4-GP DDR_B_D63 194 128
DDR_B_MA10 DDR_B_MA14 DQ63 VSS
1 4 4 1 VSS 132
DDR_B_BS0 2 3 3 2 DDR_CKE3_DIMMB DDR_B_DQS#0 11 133
DDR_B_DQS#1 DQS0# VSS
29 DQS1# VSS 138
RN41 SRN56J-4-GP RN34 SRN56J-4-GP DDR_B_DQS#2 49 139
DDR_B_MA0 DQS2# VSS
2 3 4 1 DDR_B_MA3 DDR_B_DQS#3 68 DQS3# VSS 144
DDR_B_BS1 1 4 3 2 DDR_B_MA8 DDR_B_DQS#4 129 145
DDR_B_DQS#5 DQS4# VSS
146 DQS5# VSS 149
RN45 SRN56J-4-GP RN33 SRN56J-4-GP DDR_B_DQS#6 167 150
DDR_CS2_DIMMB# DDR_B_MA6 DDR_B_DQS#7 DQS6# VSS
1 4 4 1 186 DQS7# VSS 155
DDR_B_RAS# 2 3 3 2 DDR_B_MA11 156
DDR_B_DQS0 VSS
13 DQS0 VSS 161
RN46 SRN56J-4-GP RN37 SRN56J-4-GP DDR_B_DQS1 31 162
DDR_B_WE# DDR_B_MA4 DDR_B_DQS2 DQS1 VSS
1 4 4 1 51 DQS2 VSS 165
DDR_B_CAS# 2 3 3 2 DDR_B_MA2 DDR_B_DQS3 70 168
DDR_B_DQS4 DQS3 VSS
131 DQS4 VSS 171
RN50 SRN56J-4-GP RN49 SRN56J-4-GP DDR_B_DQS5 148 172
DDR_CS3_DIMMB# M_ODT2 DDR_B_DQS6 DQS5 VSS
1 4 3 2 169 DQS6 VSS 177
M_ODT3 2 3 4 1 DDR_B_MA13 DDR_B_DQS7 188 178
SRN56J-4-GP DQS7 VSS
VSS 183
RN29 SRN56J-4-GP RN26 <10> M_ODT2 M_ODT2 114 184
DDR_B_MA7 DDR_B_BS2 DDR_VREF_S3 M_ODT3 OTD0 VSS
1 4 4 1 <10> M_ODT3 119 OTD1 VSS 187
2 3 3 2 DDR_CKE2_DIMMB 190
DDR_VREF_S3 VSS
1 VREF VSS 193
A SRN56J-4-GP 2 196 A
VSS VSS
1
202 GND GND 201

C630 C633 <Core Design>
SCD1U16V2ZY-2GP SC2D2U16V5ZY-2GP MH1 MH2
MH1 MH2
2
DDR2-200P-22-GP-U1
Wistron Corporation
62.10017.A61
Title
High 9.2mm
2nd source:62.10017.A61
DDRII-SODIMM SLOT2
Custom
Anote2.0 INTEL SC
5 4 3 2 1
A B C D E
CRT I/F & CONNECTOR

5V_CRT_S0
U44 DY 5V_S0 5V_CRT_S0

JVGA_HS 5 4 CRT_G
CRT_R 6 3 D1
4 7 2 A K
JVGA_VS 8 1 CRT_B
CH751H-40PT-1GP
1
2
PACDN009MR-GP-U 5V_S0
RN1
Layout Note: SRN2K2J-1-GP

Place these resistors Size= 0603
2
close to the CRT-out
4
3
connector R367
L24
R132
UMA
<11> M_RED 1 2 0R2J-2-GP RED 1 2 CRT_R 0R3-0-U-GP CN12
<47> NV_RED R128 1 2 0R2J-2-GP
1
DIS BLM18BB470SN1-GP 9 +5V DDC_CLK 15 DDC_CLK_CON
DDC_DATA_CON
L26 DDC_DATE 12
R125
UMA HSYNC 13 JVGA_HS
<11> M_GREEN 1 2 0R2J-2-GP GREEN 1 2 CRT_G CRT_R 1 RED VSYNC 14 JVGA_VS
<47> NV_GREEN R120 1 2 0R2J-2-GP CRT_G 2 GREEN
DIS BLM18BB470SN1-GP
CRT_B 3 BLUE
L25 GND 5
R130
UMA GND 6
<11> M_BLUE 1 2 0R2J-2-GP BLUE 1 2 CRT_B 3D3V_S0 4 NC#4 GND 7
<47> NV_BLUE R124 1 2 0R2J-2-GP 11 8
NC#11 GND
1
1
DIS R368 R370 R369
C568 C571 C570
BLM18BB470SN1-GP
C567 C566 C565
GND 10
NP2 NP2 GND 16
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
2 NP1 NP1 GND 17
1
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
R569
2
3 10KR2J-3-GP
VIDEO-15-76-GP
1
C4 C1
2
20.20719.015 C2 C3
DY DY
SC33P50V2JN-3GP
SC22P50V2JN-4GP
SC33P50V2JN-3GP
SC22P50V2JN-4GP
<55> CRT_IN#
2
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector. 3D3V_S0 3D3V_S0
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT

CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
1
R366
10KR2F-2-GP
5V_S0
4
3
2 RN79
SRN2K2J-1-GP
Hsync & Vsync level shift
1
2
14
VGA_SHIFT_ON
R39
R119
UMA U43
<11> GMCH_HSYNC 1 2 0R2J-2-GP 2 3 HSYNC_5 1 2 JVGA_HS
<47> NV_HSYNC R112 1 2 0R2J-2-GP UMA
DIS U11A TSAHCT125PW -GP
0R2J-2-GP
<11> GMCH_DDC_DATA
R138
R55
1 2 0R2J-2-GP 4 3 DDC_DATA_CON
1 2 0R2J-2-GP
14
<47> NV_DDC_DATA
7
4
R38 DIS 5 2
R123
UMA
<11> GMCH_VSYNC 1 2 0R2J-2-GP 5 6 VSYNC_5 1 2 JVGA_VS 6 1
<47> NV_VSYNC R116 1 2 0R2J-2-GP
DIS U11B TSAHCT125PW -GP
0R2J-2-GP 2N7002DW -7F-GP
UMA
7
R142 1 2 0R2J-2-GP
<11> GMCH_DDC_CLK
R60 1 2 0R2J-2-GP
<47> NV_DDC_CLK
DIS DDC_CLK_CON
1 <Core Design>
Wistron Corpo
Title
CRT Connector
A3
Anote2.0 INTEL
A B C D E
5 4 3 2 1
TV OUT PORT <57> TV_LUMA

<57> TV_CRMA
D
L28
UMA CN14
<11> M_CRMA R145 2 1 0R2J-2-GP TV_CRMA_R 1 2
<47> NV_CRMA R64 2 1 0R2J-2-GP 5 GND
1
DIS C572 C573 1
BLM18BB470SN1-GP TV_LUMA GND
3 LUMA
R372
2
150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP TV_CRMA 4 CRMA
2 GND
2
6 GND
MINDIN4-41-GP
22.10021.J11
D14 3D3V_S0
L27
R143 2
UMA TV_LUMA_R
2
<11> M_LUMA 1 0R2J-2-GP 1 2
<47> NV_LUMA R62 2 1 0R2J-2-GP 1 TV_LUMA 3
1
DIS C575 C574
BLM18BB470SN1-GP C6
1
R373 SCD1U16V2ZY-2GP
DY
2
150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP DY
BAV99-7-F-GP
2
3D3V_S0
Place this 2 resistors D3
close to the TV-out 2
connector
1
B TV_CRMA 3
C7
1 SCD1U16V2ZY-2GP
2
DY DY
BAV99-7-F-GP
<Core Design>
A
Wistron Corpora
21F, 88, Sec.1, Hsin Tai Wu Rd., H
Title
TV Connector
A4
Anote2.0 INTEL
5 4 3 2 1
LED / INVERTER INTERFACE
LCD/INV CONN ATI LVDS INTERFACE
DCBATOUT
1
R13 3 2 NV_TXACLK- <47>
0R6J-3-GP VGA_TXACLK-
RES 1206 VGA_TXACLK+ 4 1 NV_TXACLK+ <47>
5V_USB_CAM LCDVDD_S0 SRN0J-6-GP RN9 DIS
2
VGA_TXAOUT0+ 3 2 NV_TXAOUT0+ <47>
VGA_TXAOUT0- 4 1 NV_TXAOUT0- <47>
SRN0J-6-GP RN3 DIS
DY
1
C29 C31 C32 4 1 NV_TXAOUT1- <47>
SCD1U50V3ZY-GP SC10U25V0KX-3GP SC1000P50V2JN-GP VGA_TXAOUT1-
DIS
2
SRN0J-6-GP RN5

ACES-CONN40C-GP-U
VGA_TXAOUT2- 4 1 NV_TXAOUT2- <47>
42
SRN0J-6-GP RN7 DIS
VGA_TXAOUT0- 21 20
1
VGA_TXAOUT0+ 22 19 3D3V_S0
23 18 W EBCAM_GPIO TP3 TPAD28 C35 C37
SC10U10V5ZY-1GP
24 17 3 2
SCD1U16V2ZY-2GP
VGA_TXAOUT1- VGA_TXBCLK+ NV_TXBCLK- <47>
2
1
VGA_TXAOUT1+ 25 16 VGA_TXBCLK- 4 1 NV_TXBCLK+ <47>
C36
RN11 DIS
26 15
27 14 SCD1U10V2KX-4GP SRN0J-6-GP
VGA_TXAOUT2- LDDC_CLK <11,50>
2
VGA_TXAOUT2+ 28 13 LDDC_DATA <11,50>
29 12 VGA_TXBOUT0+ 3 2 NV_TXBOUT0- <47>
VGA_TXACLK- 30 11 BLON_OUT <55> VGA_TXBOUT0- 4 1 NV_TXBOUT0+ <47>
RN13 DIS
VGA_TXACLK+ 31 10
32 9 SRN0J-6-GP
33 8 R32 3 2 NV_TXBOUT1- <47>
VGA_TXBOUT0- BRIGHTNESS_CONN 2 VGA_TXBOUT1+
VGA_TXBOUT0+ 34 7 1 BRIGHTNESS <55> VGA_TXBOUT1- 4 1 NV_TXBOUT1+ <47>
0R2J-2-GP
RN15 DIS
35 6 USB_PN4 <22,58>
36 5 SRN0J-6-GP
VGA_TXBOUT1- USB_PP4 <22,58>
VGA_TXBOUT1+ 37 4
R33
2 DY 1
0R2J-2-GP
LBKLT_CTL <11>
38 3 VGA_TXBOUT2+ 3 2 NV_TXBOUT2- <47>
VGA_TXBOUT2- 39 2 VGA_TXBCLK- VGA_TXBOUT2- 4 1 NV_TXBOUT2+ <47>
2
40 1 R34 SRN0J-6-GP RN17 DIS
VGA_TXBOUT2+ VGA_TXBCLK+ 100KR2J-1-GP
41
CN1
DY
1
1
20.F0813.040 C39
UMA LVDS INTERFACE
SC22U6D3V5MX-2GP
2
VGA_TXACLK+ 3 2 GMH_TXACLK+ <11>

VGA_TXACLK- 4 1 GMH_TXACLK- <11>
SRN0J-6-GP RN10 UMA
LCDVDD_S0 3D3V_S0 3 2
VGA_TXAOUT0+ GMH_TXAOUT0+ <11>
VGA_TXAOUT0- 4 1 GMH_TXAOUT0- <11>
Layout 40 mil RES 0805 SRN0J-6-GP RN4 UMA
5V_USB_CAM 3 2
U10 5V_S0 VGA_TXAOUT1+ GMH_TXAOUT1+ <11>
VGA_TXAOUT1- 4 1 GMH_TXAOUT1- <11>
DY SRN0J-6-GP RN6 UMA
1 9 F1
IN#1 GND
2 OUT IN#8 8 1 2 VGA_TXAOUT2+ 3 2 GMH_TXAOUT2+ <11>
<11,50> LCDVDD_EN 3 EN IN#7 7 VGA_TXAOUT2- 4 1 GMH_TXAOUT2- <11>
4 6 FUSE-D5A13D2V-GP
GND IN#6
5 SRN0J-6-GP RN8 UMA
IN#5
2
R36 C41 C42 3 2

G5281RC1U-GP VGA_TXBCLK+ GMH_TXBCLK- <11>
SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP
VGA_TXBCLK- 4 1 GMH_TXBCLK+ <11>

100KR2J-1-GP U9
RN12 UMA
2
SRN0J-6-GP
5 IN OUT 1 VGA_TXBOUT0+ 3 2 GMH_TXBOUT0- <11>
1
GND 2 VGA_TXBOUT0- 4 1 GMH_TXBOUT0+ <11>

<55> USB_CAM_EN 4 3
EN NC#3 SRN0J-6-GP RN14 UMA
VGA_TXBOUT1+ 3 2 GMH_TXBOUT1- <11>

1
1
C40 G5240B1T1U-GP 4 1
SCD1U16V2ZY-2GP C34 VGA_TXBOUT1- GMH_TXBOUT1+ <11>
SC22U6D3V5MX-2GP SRN0J-6-GP RN16 UMA
DY
2
2
3D3V_S5 DY VGA_TXBOUT2+ 3 2 GMH_TXBOUT2- <11>
Lid switch VGA_TXBOUT2- 4 1 GMH_TXBOUT2+ <11>
SRN0J-6-GP RN18 UMA
1
R4
10KR2J-3-GP
DY SW 1
R3
2
<55> LID_CLOSE# 1 2 LID_SW # 2 4
100R2F-L1-GP-U
1
1 3
C10 <Core Design>
SCD22U10V2KX-1GP
2
SW -SLIDE7-GP
Wistron Corpora
21F, 88, Sec.1, Hsin Tai W u Rd., Hs
Title
LID_SW # <58>
LCD/Inverter Connector
A3
Anote2.0 INTEL
5 4 3 2 1
PCI_AD[0..31] U69C3 OF 6
<27> PCI_AD[0..31]
3D3V_S0
PCI_AD0
PCI_AD1
D20
E19
AD0
AD1
PCI REQ0#
GNT0#
A4
D7
PCI_REQ#0 <27>
PCI_GNT#0 <27>
PCI_AD2 D19 E18 PCI_REQ1#
PCI_AD3 AD2 REQ1#/GPIO50
RN89 A20 C18
AD3 GNT1#/GPIO51
1 8 PCI_REQ1# PCI_AD4 D17 AD4 REQ2#/GPIO52 B19 PCI_REQ2#
D 2 7 PCI_PIRQF# PCI_AD5 A21 AD5 GNT2#/GPIO53 F18
3 6 PCI_REQ2# PCI_AD6 A19 AD6 GNT3#/GPIO55 C10 PCI_GNT3#
4 5 PCI_FRAME# PCI_AD7 C19 AD7 REQ3#/GPIO54 A11 PCI_REQ3# PCI_GNT3#
PCI_AD8 A18 AD8
1
SRN8K2J-4-GP PCI_AD9 B16 C17
AD9 C/BE0# PCI_C/BE#0 <27>
PCI_AD10 A12 E15 R553
RN90 PCI_AD11 E16 F16
1 8 PCI_STOP# PCI_AD12 A14 E17 1KR2J-1-GP
2 7 PCI_DEVSEL# PCI_AD13 G16 AD13
2
3 6 PCI_PIRQG# PCI_AD14 A15 C8 PCI_IRDY# DY
AD14 IRDY# PCI_IRDY# <27>
4 5 PCI_REQ3# PCI_AD15 B6 D9 PCI_PAR
AD15 PAR PCI_PAR <27>
PCI_AD16 C11 G6 PCI_PCIRST#
PCI_AD17 AD16 PCIRST# PCI_DEVSEL#
SRN8K2J-4-GP A9 D16 PCI_DEVSEL# <27>
PCI_AD18 AD17 DEVSEL# PCI_PERR#
D11 AD18 PERR# A7 PCI_PERR# <27>
RN92 PCI_AD19 B12 A17 PCI_FRAME#
AD19 FRAME# PCI_FRAME# <27>
1 8 PCI_IRDY# PCI_AD20 C12 B7 PCI_PLOCK#
PCI_TRDY# PCI_AD21 AD20 PLOCK# PCI_SERR#
2 7 D10 AD21 SERR# F10 PCI_SERR# <27>
3 6 PCI_PERR# PCI_AD22 C7 C16 PCI_STOP#
AD22 STOP# PCI_STOP# <27>
4 5 PCI_PLOCK# PCI_AD23 F13 C9 PCI_TRDY#
AD23 TRDY# PCI_TRDY# <27>
SRN8K2J-4-GP
PCI_AD24
PCI_AD25
E11 AD24 PLTRST#
A16 swap override Strap
E13 AD25 PLTRST# AG24
RN93 PCI_AD26 E12 B10 CLK_PCI_ICH CLK_PCI_ICH <3>
AD26 PCICLK
1 8 PCI_PIRQB# PCI_AD27 D8 AD27 PME# G7 ICH_PME# <27> Low= A16 swap override E
2 7 PCI_PIRQC# PCI_AD28 A6 AD28 PCI_GNT3#
3 6 PCI_REQ#0 PCI_AD29 E8 AD29
R524 8K2R2J-3-GP High= Default *
4 5 PCI_PIRQH# PCI_AD30 D6 AD30 1 2 3D3V_S5
PCI_AD31 A3 AD31
SRN8K2J-4-GP
C
RN91
PCI_SERR# PCI_PIRQA#
Interrupt I/F PCI_PIRQE#
1 8 <27> PCI_PIRQA# F9 PIRQA# PIRQE#/GPIO2 F8
2 7 PCI_PIRQE# PCI_PIRQB# B5 PIRQB# PIRQF#/GPIO3 G11 PCI_PIRQF#
3 6 PCI_PIRQA# <27> PCI_PIRQC# PCI_PIRQC# C5 F12 PCI_PIRQG#
PCI_PIRQD# PCI_PIRQD# PIRQC# PIRQG#/GPIO4 PCI_PIRQH#
4 5 A10 PIRQD# PIRQH#/GPIO5 B3
SRN8K2J-4-GP 3D3V_S0 3D3V_S0_RST

ICH8-M-1-GP-U
R581
2 1
0R2J-2-GP
U60A
14
PCI_PCIRST# 1
3 PCIRST1# <27,30,55>
2
1
R478
SSLVC08APW R-GP 100KR2J-1-GP
2
2 R479
1
0R2J-2-GP
Boot BIOS Strap
DY
B
PCI_GNT0# SPI_CS#1 Boot BIOS Location
3D3V_S0_RST
0 1 SPI
U60B
14
1 0 PCI PLTRST# 4
6 PLT_RST1# PLT_RST1# <10,29,31,35,46,
LPC * 5
1
1 1 R483
100KR2J-1-GP
SSLVC08APW R-GP
2
PCI_GNT#0 2 1 R481
3D3V_S5 0R2J-2-GP
Place closely pin B10 DY
1
CLK_PCI_ICH R550
2
1KR2J-1-GP
2
R549
DY R348
10KR2J-3-GP PLTRST# <25>
2
10R2J-2-GP DY
DY
1
SPI_CS1#
<22> SPI_CS1#
1 1
A C797 <Core Design>

SC8P250V2CC-GP
DY
2
Wistron Corpo
Title
ICH8(1/4)-PCI/INT
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
+RTCVCC
1 2 LAN100_SLP
R311 330KR2F-L-GP
1 2 SM_INTRUDER#
R312 1MR2J-1-GP RN88
+RTCVCC KBGA20 1 4
1 2 ICH_INTVRMEN U69A1 OF 6 KBRST# 2 3
LPC_LAD[0..3] <35,55>
D R308 330KR2F-L-GP
ICH_RTCX1 AG25 E5 LPC_LAD0 SRN10KJ-5
ICH_RTCX2 RTCX1 FWH0/LAD0 LPC_LAD1
AF24 RTCX2 FWH1/LAD1 F5
G8 LPC_LAD2
ICH_RTCRST# FWH2/LAD2 LPC_LAD3
1 2 AF23 RTCRST# FWH3/LAD3 F6
R512 20KR2J-L2-GP
RTC
2
SM_INTRUDER# AD22 C4 LPC_FRAME# LPC_FRAME# <35,55>
INTRUDER# FWH4/LFRAME#
LPC
ICH_RTCX1 G4 R309
C489 GAP-OPEN ICH_INTVRMEN AF25 G9 LPC_DRQ0# H_FERR# 2 1
INTVRMEN LDRQ0# TP76
1 2 ICH_RTCX2 LAN100_SLP AD21 E6
LAN100_SLP LDRQ1#/GPIO23 TP80
2
R522 10MR2J-L-GP SC1U10V3KX-3GP 56R2J-4
1
B24 GLAN_CLK A20GATE AF13 KBGA20 <55>
AG26 H_A20M# H_A20M# <4>
A20M# H_DPRSTP#
X6 D22 LAN_RSTSYNC
AF26 TP59
DPRSTP# H_DPRSTP# <4,10,36>
C21 AE26 H_DPSLP#
LAN/GLAN
LAN_RXD0 DPSLP# H_DPSLP# <4>
1 4 B21 LAN_RXD1
C22 AD24 H_FERR# H_FERR# <4>
LAN_RXD2 FERR#
1
H_DPSLP#
C759 C739 D21 AG29 H_PW RGOOD TP67
LAN_TXD0 CPUPWRGD/GPIO49 H_PW RGOOD <4>
SC6P50V2CN-1GP 2 3 SC6P50V2CN-1GP E20 LAN_TXD1
2
DY DY C20 LAN_TXD2 IGNNE# AF27 H_IGNNE# H_IGNNE# <4>

within 2" from R184
TP56 AH21 AE24 H_INIT# H_INIT# <4>
X-32D768KHZ-41GP R349 GLAN_DOCK#/GPIO13 INIT#
INTR AC20 H_INTR <4>
1 2 GLAN_COMP D25 AH14 KBRST# 1D05V_S0
1D5V_SB_S0 GLAN_COMPI RCIN# KBRST# <55>
24D9R2F-L-GP C25
CPU
GLAN_COMPO
1
AD23 H_NMI H_NMI <4>
R500 1 NMI
<32> HDA_BITCLK_CODEC 2 39R2J-L-GP ACZ_BCLK AJ16 HDA_BIT_CLK SMI# AG28 H_SMI# <4> R509
C ACZ_SYNC AJ15 56R2J-4-GP
R501 1 HDA_SYNC
<32> HDA_SYNC_CODEC 2 39R2J-L-GP STPCLK# AA24 H_STPCLK# H_STPCLK# <4>
<32> HDA_RST#_CODEC R487 1 2 39R2J-L-GP ACZ_RST_R# AE14 HDA_RST#
2
AE27 THRMTRIP_ICH# 1 2 H_THERMTRIP# <4,10>
THRMTRIP# R507 24R2J-GP
AJ17 HDA_SDIN0
<32> HDA_SDIN1 AH17 AA23
IHDA
HDA_SDIN1 TP8
AH15 HDA_SDIN2 IDE_PDD[0..15] <25> placed within 2" from ICH8M
AD13 V1 IDE_PDD0
HDA_SDIN3 DD0 IDE_PDD1
DD1 U2
<32> HDA_SDOUT_CODEC R488 1 2 39R2J-L-GP ACZ_SDOUT AE13 V3 IDE_PDD2
HDA_SDOUT DD2 IDE_PDD3
G5 T1
DD3 IDE_PDD4
1 2 AE10 HDA_DOCK_EN#/GPIO33 DD4 V4
AG14 T5 IDE_PDD5
GAP-OPEN TP61 HDA_DOCK_RST#/GPIO34 DD5 IDE_PDD6
DD6 AB2
<54> SATA_LED# AF10 T6 IDE_PDD7
SATALED# DD7 IDE_PDD8
DD8 T3
<25> SATA_RXN0_C AF6 R2 IDE_PDD9
SATA0RXN DD9 IDE_PDD10 3D3V_S0
<25> SATA_RXP0_C AF5 SATA0RXP DD10 T4
<25,57> SATA_TXN0 C738 1 2SC3900P50V2KX-2GP SATA_TXN0_C AH5 V6 IDE_PDD11
C737 1 SATA0TXN DD11
<25,57> SATA_TXP0 2SC3900P50V2KX-2GP SATA_TXP0_C AH6 SATA0TXP DD12 V5 IDE_PDD12
U1 IDE_PDD13 IDE_PDIORDY 1 2
DD13 IDE_PDD14 R511 4K7R2J-2-GP
AG3 V2
IDE
SATA1RXN DD14 IDE_PDD15
AG4 SATA1RXP DD15 U6
AJ4 INT_IRQ14 1 2
SATA1TXN
SATA
AJ3 AA4 IDE_PDA0 <25> R508 8K2R2J-3-GP
SATA1TXP DA0
DA1 AA1 IDE_PDA1 <25>
AF2 SATA2RXN DA2 AB3 IDE_PDA2 <25>
AF1 SATA2RXP
AE4 SATA2TXN DCS1# Y6 IDE_PDCS1# <25>
B
AE3 SATA2TXP DCS3# Y5 IDE_PDCS3# <25>
<3> CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 IDE_PDIOR# <25>

<3> CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 IDE_PDIOW # <25>
R506 Y2 IDE_PDDACK# <25>
DDACK#
1 2 AG1 SATARBIAS# IDEIRQ Y3 INT_IRQ14 <25>
AG2 SATARBIAS IORDY Y1 IDE_PDIORDY <25>
24D9R2F-L-GP W5 IDE_PDDREQ <25>
DDREQ
Within 500 mils
ICH8-M-1-GP-U
+RTCVCC 3D3V_AUX_S5
CN7
4
U34 BAT_RTC 1
2
W=20mils 2
1 2 3 R211 3
R236 100R2J-2-GP 5
W=20mils 1 1 2
1
MLX-CON3-7-GP
C433 CH715FPT-GP 1KR2J-1-GP
SC1U10V3ZY-6GP W=20mils W=20mils
2
A XOR CHAIN ENTRANCE STRAP : RSVD <Core Design>
3D3V_S0
Wistron Corpo
R489 21F, 88, Sec.1, Hsin Tai W u Rd.,
1KR2J-1-GP
1 2 HDA_SDOUT_CODEC Title
DY ICH8(2/4) LAN,HD,IDE,LPC
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_S5 Place closely pin G5 Place closely pi

RN72
1 8 GPIO22 CLK_48M_ICH CLK_14M_ICH
4
3
2 7 PM_CLKRUN#
3 6 CLKSATAREQ# RN87
1
4 5 THERM_SCI# SRN2K2J-1-GP
R339 R495
SRN10KJ-6-GP U69D 4 OF 6 3D3V_S0 10R2J-2-GP 10R2J-2-GP
RN71 DY DY
1
2
SMB_CLK AJ26 AJ12 SATA0_R0 8 1
SMBCLK SATA0GP/GPIO21
1 2
1 2
SMB_DATA AD19 SATA0_R1
GPIO
AJ10 7 2
SATA
SMBDATA SATA1GP/GPIO19
SMB
SMB_LINK_ALERT# AG21 AF11 SATA0_R2 6 3 C530 C733
SMLINK0 LINKALERT# SATA2GP/GPIO36 SATA0_R3 SC4D7P50V2CN-1GP SC4D7P50V2CN-1
AC17 AG11 5 4
SMLINK1 SMLINK0 GPIO37
AE19
SMLINK1 DY DY
2
AG9 CLK_14M_ICH SRN10KJ-6-GP<3>
CLK_14M_ICH
3D3V_S0 ICH_RI# CLK14 CLK_48M_ICH
AF17 G5 CLK_48M_ICH <3>
CLOCKS
D RI# CLK48
TP81 F4 D3 ICH_SUSCLK
SUS_STAT#/LPCPD# SUSCLK
4
3
TP82 sys_reset AD15
RN74 SYS_RESET#
SLP_S3# AG23 PM_SLP_S3# <40,45>
SRN2K2J-1-GP <10> PM_BMBUSY# PM_BMBUSY# AG12 AF21 PM_SLP_S5# <31,40,55>
3D3V_S5 BMBUSY#/GPIO0 SLP_S4#
SLP_S5# AD18
<4> OCP# OCP# AG22 SMBALERT#/GPIO11 GPIO26
S4_STATE#/GPIO26 AH27
1
2
<3> H_STP_PCI# H_STP_PCI# AE20
H_STP_CPU# STP_PCI#
<3> H_STP_CPU# AG18 AE23 PM_PWROK <10,24>
STP_CPU# PWROK
SYSGPIO
<27,55> PM_CLKRUN# AH11 AJ14 DPRSLPVR DPRSLPVR <10,36>
CLKRUN# DPRSLPVR/GPIO16
<29,30,31,57,58> PCIE_WAKE# AE17 AE21 PM_BATLOW#_R

WAKE# BATLOW#
POWER MGT
<27,55> INT_SERIRQ AF12
THERM_SCI# SERIRQ
AC13 C2 SB_PWR_BTN# <55>
THRM# PWRBTN# R496 1
RN75 DY 2 10KR2J-3-GP
1 8 GPIO26 <10,36> VGATE_PWRGD 1 2 VRMPWRGD AJ20 AH20
PM_BATLOW#_R R493 0R2J-2-GP VRMPWRGD LAN_RST#
2 7
3 6 DY TP102 SST_CTL AJ22 AG27 EC_RMRST# 1 2 SB_RSMRST# <55>
SMB_LINK_ALERT# TP7 RSMRST# R497 100R2J-2-GP
4 5
GPIO1 AJ8 E1 CK_PWRGD_R 1 2 CK_PWRGD <3>
TP101 TACH1/GPIO1 CK_PWRGD
SRN10KJ-6-GP AJ9 R537 0R2J-2-GP
ECSCI# TACH2/GPIO6 PM_PWROK
RN73 <55> ECSCI# AH9 E3
OCP# ECSMI# TACH3/GPIO7 CLPWROK
1 8 <55> ECSMI# AE16
GPIO
SMLINK1 GPIO8
2 7 <55> EC_SWI# AC19 AJ25
PCIE_WAKE# GPIO17 GPIO12 SLP_M#
3 6 TP60 AG8 TACH0/GPIO17
4 5 USB_OC#9 NEWCARD_RST# AH12 F23 3D3V_S0
<31> NEWCARD_RST# GPIO18 CL_CLK0 CL_CLK <10>
TP64 GPIO20 AE11 AE18
SRN10KJ-6-GP GPIO22 GPIO20 CL_CLK1
AG10
SCLOCK/GPIO22
TP58 AH25 F22 CL_DATA <10>
QRT_STATE0/GPIO27 CL_DATA0
Controller Link
TP69 AD16 QRT_STATE1/GPIO28 CL_DATA1 AF19
<3> CLKSATAREQ# CLKSATAREQ# AG13 R351
DPRSLPVR GPIO38 SATACLKREQ#/GPIO35 CL_VREF0_ICH
1 2 TP62 AF9 SLOAD/GPIO38 CL_VREF0 D24 1 2
C R502 100KR2J-1-GP GPIO39 CL_VREF1_ICH
TP100 AJ11 AH23
ICH_RSVD IDE_RESET# SDATAOUT0/GPIO39 CL_VREF1 3K24R2F-GP
1 2 AD10
SCD1U16V2KX-3GP
TP68 SDATAOUT1/GPIO48
R499 DY 1KR2J-1-GP AJ23
CL_RST# CL_RST# <10>
1
<32> SB_SPKR SB_SPKR AD9
SPKR ver-sc modify to S5
1
AJ27 LAN_DISABLE <30> C545 R352
MCH_ICH_SYNC#AJ13 CLGPIO0/GPIO24 GPIO10 453R2F-1-GP
<10> MCH_ICH_SYNC# AJ24 TP57
MCH_SYNC# CLGPIO1/GPIO10
MISC
AF22 GPIO14 3D3V_S5
CLGPIO2/GPIO14 TP63
2
32K suspend clock output ICH_RSVD AJ21
TP3 CLGPIO3/GPIO9
AG19 GPIO9
TP55
2
Low--> default ICH8-M-1-GP-U R491
3D3V_S0 1 2
High--> No boot
3K24R2F-GP
SCD1U16V2KX-3GP
3D3V_S0_RST
1
C731
1
1
R490
R482 453R2F-1-GP
10KR2J-3-GP
2
U60C 10KR2J-3-GP
14
2
3D3V_S0 1 2 SB_SPKR
2
9 R303 DY
8 32KHZ 1 2 G792_CLK <24>
ICH_SUSCLK 10 R484 10R2J-2-GP
SSLVC08APWR-GP U69B 2 OF 6
7
<31> PCIE_RXN1 P27 V27 DMI_RXN0 DMI_RXN0 <10>

PERN1 DMI0RXN DMI_RXP0
<31> PCIE_RXP1 P26 V26 DMI_RXP0 <10>
PERP1 DMI0RXP
New Card <31,57> PCIE_TXN1 2
SCD1U16V2KX-3GP
2
1C771
1C773
PCIE_C_TXN1
PCIE_C_TXP1
N29
N28
PETN1 DMI0TXN U29
U28
DMI_TXN0
DMI_TXP0
DMI_TXN0 <10>
<31,57> PCIE_TXP1 PETP1 DMI0TXP DMI_TXP0 <10>
SCD1U16V2KX-3GP
M27 Y27 DMI_RXN1
Direct Media Interface

<30> PCIE_RXN2 PERN2 DMI1RXN DMI_RXN1 <10>
PCI-Express
<30> PCIE_RXP2 M26 Y26 DMI_RXP1 DMI_RXP1 <10>
3D3V_S0 PERP2 DMI1RXP
B 5V_S0 LAN <30> PCIE_TXN2 2
SCD1U16V2KX-3GP
2
1C774
1C776
PCIE_C_TXN2
PCIE_C_TXP2
L29
L28
PETN2 DMI1TXN
W29
W28
DMI_TXN1
DMI_TXP1
DMI_TXN1 <10>
<30> PCIE_TXP2 PETP2 DMI1TXP DMI_TXP1 <10>
SCD1U16V2KX-3GP
<29,58> PCIE_RXN3 K27 AB26 DMI_RXN2 DMI_RXN2 <10>
<29,58> PCIE_RXP3 K26 AB25 DMI_RXP2 <10>
PERP3 DMI2RXP
4
3
RN68 R492
Mini Card 1 <29,58> PCIE_TXN3 2
SCD1U16V2KX-3GP
2
1C777
1C780
PCIE_C_TXN3
PCIE_C_TXP3
J29
J28
PETN3 DMI2TXN AA29
AA28
DMI_TXN2
DMI_TXP2
DMI_TXN2 <10>
<29,58> PCIE_TXP3 PETP3 DMI2TXP DMI_TXP2 <10>
SRN2K2J-1-GP SCD1U16V2KX-3GP
10KR2F-2-GP H27 AD27 DMI_RXN3 DMI_RXN3 <10>
H26 AD26 DMI_RXP3 <10>
PERP4 DMI3RXP
2
G29 AC29 DMI_TXN3 DMI_TXN3 <10>

PETN4 DMI3TXN
1
2
G28 AC28 DMI_TXP3 DMI_TXP3 <10>

PETP4 DMI3TXP
F27 T26 CLK_PCIE_ICH# CLK_PCIE_ICH# <3>
U63 PERN5 DMI_CLKN
F26 T25 CLK_PCIE_ICH CLK_PCIE_ICH <3>
PERP5 DMI_CLKP
E29
SMB_DATA PETN5
<3,15,16> ICH_SMBDATA 1 6 E28
PETP5 DMI_ZCOMP
Y23 Within 500 mils
SMB_DATA <29,30,31,57,58> Y24 DMI_IRCOMP 1 2
DMI_IRCOMP 1D5V_SB_S0
2 5 D27 R514 24D9R2F-L-GP
PERN6/GLAN_RXN 3D3V_S0
D26 G3 USB_PN0 <26>
PERP6/GLAN_RXP USBP0N
29,30,31,57,58> SMB_CLK
SMB_CLK 3 4
ICH_SMBCLK <3,15,16>
C29 PETN6/GLAN_TXN USBP0P G2 USB_PP0 <26> USB0
2
C28 H5 USB_PN1 <26>
PETP6/GLAN_TXP USBP1N
C23
USBP1P
H4
H2
USB_PP1 <26> USB1 R296
330R2J-3-GP
SPI_CLK USBP2N USB_PN2 <26>
2N7002DW-7F-GP B23
SPI_CS0# USBP2P
H1 USB_PP2 <26> USB2 R295 1 CK_P
<20> SPI_CS1# E22
SPI_CS1# USBP3N
J3 USB_PN3 <26> DY 2
1
D23 SPI USBP3P
J2
K5
USB_PP3 <26> USB3 D
0R2J-2-GP
R297 1 2 VRMP
SPI_MOSI USBP4N USB_PN4 <19,58>
F21 SPI_MISO USBP4P K4 USB_PP4 <19,58> CAMERA 0R2J-2-GP
3
K2 USB_PN5 <31,57>
USBP5N
USB_OC#4 1
RN86
4
<26> USB_SYSTEM_OC0# AJ19
AG16
OC0# USBP5P K1
L3
USB_PP5 <31,57> New Card Q13
2N7002PT-U
3D3V_S5 <26> USB_SYSTEM_OC1# OC1#/GPIO40 USBP6N USB_PN6_BT <28,58>
USB_OC#5 2 3 <26> USB_SYSTEM_OC2# AG15 OC2#/GPIO41 USBP6P L2 USB_PP6_BT <28,58>BT <36> CLK_EN# 1
A
SRN10KJ-5-GP
<26> USB_SYSTEM_OC3#
USB_OC#4
AE15
AF15
OC3#/GPIO42
OC4#/GPIO43
USB USBP7N
USBP7P
M5
M4
USB_PN7 <54,57>
USB_PP7 <54,57> Finger Printer
G
2
USB_OC#5 AG17 M2
OC5#/GPIO29 USBP8N USB_PN8 <29,58>
RN70 RN69
USB_OC#6
USB_OC#7
AD12
AJ18
OC6#/GPIO30 USBP8P
M1
N3 USB20_N9
USB_PP8 <29,58> WIRELESS
<Core Design>
S
OC7#/GPIO31 USBP9N TP73
SMLINK0 1 8 8 1 USB_OC#8 AD14 N2 USB20_P9
OC8# USBP9P TP72
ECSMI# 2 7 7 2 USB_OC#6 USB_OC#9 AH18
OC9#
ICH_RI#
USB_OC#7
3
4
6
5
6
5
3
4
USB_OC#8
sys_reset USBRBIAS#
F2
F3
USBRBIAS 1
R535
2
22D6R2F-L1-GP Wistron Corporat
USBRBIAS 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsich
SRN10KJ-6-GP SRN10KJ-6-GP Taipei Hsien 221, Taiwan, R.O.C.
ICH8-M-1-GP-U Within 500 mils Title
ICH8(3/4) PM,USB,GPIO
Custom
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
+RTCVCC
20 mils
C488 C751
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U69F6 OF 6
2
A23 VSS VSS K7
A5 VSS VSS L1
1D05V_S0 AA2 L13
U69E 5 OF 6 VSS VSS
AA7 VSS VSS L15
AD25 VCCRTC A25 VSS VSS L26
VCC1_05 A13 AB1 VSS VSS L27
ICH_V5REF_RUN T7 B13 C506 C518 AB24 L4
D V5REF VCC1_05 VSS VSS
A16 V5REF VCC1_05 C13 AC11 VSS VSS L5
1
VCC1_05 C14 AC14 VSS VSS M12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
ICH_V5REF_SUS G4 D14 AC25 M13
V5REF_SUS VCC1_05 VSS VSS
1D5V_SB_S0 VCC1_05 E14 AC26 VSS VSS M14
2
AA25 VCC1_5_B VCC1_05 F14 AC27 VSS VSS M15
AA26 VCC1_5_B VCC1_05 G14 AD17 VSS VSS M16
AA27 L11 AD20 M17
ST100U4VBM-11-GP
CORE
VCC1_5_B VCC1_05 VSS VSS
1
C782 C528 C513 AB27 L12 AD28 M23
TC31 VCC1_5_B VCC1_05 VSS VSS
AB28 L14 AD29 M28
SC2D2U6D3V3MX-1-GP
AB29 L16 AD3 M29
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
2 VCC1_5_B VCC1_05 VSS VSS
2
D28 VCC1_5_B VCC1_05 L17 AD4 VSS VSS M3
D29 VCC1_5_B VCC1_05 L18 AD6 VSS VSS N1
E25 VCC1_5_B VCC1_05 M11 1D5V_SB_S0 AE1 VSS VSS N11
5V_S0 3D3V_S0 E26 M18 AE12 N12
E27 VCC1_5_B VCC1_05 P11 AE2 VSS VSS N13
1
DY F24 VCC1_5_B VCC1_05 P18 C755 C507 AE22 VSS VSS N14
A
1
F25 T11 SC10U6D3V5MX-3GP AD1 N15

R523 D22 VCC1_5_B VCC1_05 SCD01U16V2KX-3GP VSS VSS
G24 VCC1_5_B VCC1_05 T18 AE25 VSS VSS N16
2
CH751H-40PT-1GP H23 U11 AE5 N17
100R2J-2-GP 20 mils H24 VCC1_5_B VCC1_05 U18 AE6 VSS VSS N18
J23 V11 AE9 N26
VCCA3GP
K
2
ICH_V5REF_RUN J24 V12 AF14 N27

K24 VCC1_5_B VCC1_05 V14 1D25V_S0 AF16 VSS VSS N4
1
C764 K25 V16 AF18 N5

SCD1U16V2ZY-2GP VCC1_5_B VCC1_05 VSS VSS
L23 VCC1_5_B VCC1_05 V17 AF3 VSS VSS N6
L24 VCC1_5_B VCC1_05 V18 AF4 VSS VSS P12
2
1
L25 VCC1_5_B AG5 VSS VSS P13
M24 R29 C745 AG6 P14
VCC1_5_B VCCDMIPLL SC22U6D3V5MX-2GP VSS VSS
M25 VCC1_5_B AH10 VSS VSS P15
2
N23 VCC1_5_B VCC_DMI AE28 AH13 VSS VSS P16
N24 AE29 1D05V_S0 AH16 P17
VCC1_5_B VCC_DMI VSS VSS
N25 VCC1_5_B AH19 VSS VSS P23
5V_S5 3D3V_S5 P24 AC23 SCD1U16V2ZY-2GP AH2 P28
VCC1_5_B V_CPU_IO VSS VSS
P25 VCC1_5_B V_CPU_IO AC24 AF28 VSS VSS P29
C
R24 VCC1_5_B AH22 VSS VSS R11
A
1
1
R25 AF29 SCD1U16V2ZY-2GP 3D3V_S0 AH24 R12
R525 D23 VCC1_5_B VCC3_3 C521 C505 C542 VSS VSS
R26 VCC1_5_B AH26 VSS VSS R13
CH751H-40PT-1GP R27 AD2 SCD1U16V2ZY-2GP 3D3V_S0 (DMI) AH3 R14
SC4D7U6D3V3KX-GP
2
1
100R2J-2-GP 20 mils T23 VCC1_5_B
C484 SCD1U16V2ZY-2GP AH4 VSS VSS R15
T24 AC8 3D3V_S0 (SATA) AH8 R16
VCCP CORE
K
2
1
ICH_V5REF_SUS T27 AD8 C486 AJ5 R17
2
T28 VCC1_5_B VCC3_3 AE8 B11 VSS VSS R18
1
C769 T29 AF8 3D3V_S0 B14 R28

2
SCD1U16V2ZY-2GP U24 B17 R4
VCC1_5_B VSS VSS
U25 VCC1_5_B VCC3_3 AA3 B2 VSS VSS T12
2
V23 VCC1_5_B VCC3_3 U7 B20 VSS VSS T13
1
V24 V7 C502 B22 T14
VCC1_5_B VCC3_3 SCD1U16V2ZY-2GP VSS VSS
V25 VCC1_5_B VCC3_3 W1 B8 VSS VSS T15
W25 VCC1_5_B VCC3_3 W6 C24 VSS VSS T16
IDE
2
Y25 W7 3D3V_S0 C26 T17
VCC3_3 Y7 C27 VSS VSS T2
1D5V_SB_S0 SC1U10V3ZY-6GP AJ6 SCD1U16V2ZY-2GP C6 U12
VCCSATAPLL VSS VSS
VCC3_3 A8 D12 VSS VSS U13
1D5V_SB_S0 AE7 VCC1_5_A VCC3_3 B15 D15 VSS VSS U14
1
1
C736 C735 AF7 B18 C549 D18 U15
VCC1_5_A VCC3_3 C547 C534 SCD1U16V2ZY-2GP VSS VSS
AG7 VCC1_5_A VCC3_3 B4 D2 VSS VSS U16
1
C487 AH7 B9 D4 U17

ARX
VCC1_5_A
PCI VCC3_3 VSS VSS
2
2
AJ7 VCC1_5_A VCC3_3 C15 E21 VSS VSS U23
SC10U6D3V5MX-3GP D13 E24 U26
VCC3_3 VSS VSS
2
SC1U10V3ZY-6GP AC1 D5 SCD1U16V2ZY-2GP E4 U27

VCC1_5_A VCC3_3 VSS VSS
AC2 VCC1_5_A VCC3_3 E10 E9 VSS VSS U3
ATX
AC3 VCC1_5_A VCC3_3 E7 F15 VSS VSS U5

AC4 VCC1_5_A VCC3_3 F11 E23 VSS VSS V13
AC5 VCC1_5_A F28 VSS VSS V15
AC12 SCD1U16V2ZY-2GP 3D3V_S0 F29 V28
VCCHDA VSS VSS
1D5V_SB_S0 AC10 VCC1_5_A F7 VSS VSS V29
AC9 AD11 SCD1U16V2ZY-2GP 3D3V_S5 G1 W2
VCC1_5_A VCCSUSHDA VSS VSS
1
B
E2 VSS VSS W26
1
C491 AA5 J6 C496 G10 W27

VCC1_5_A VCCSUS1_05 TP74 VSS VSS
1
AA6 VCC1_5_A VCCSUS1_05 AF20 TP66 G13 VSS VSS Y28
2
SC1U10V3ZY-6GP C495 G19 Y29
VSS VSS
2
G12 AC16 VCCSUS1_5_ICH_1 G23 Y4

2
G17 VCC1_5_A G25 VSS VSS AB4
H7 J7 VCCSUS1_5_ICH_2 3D3V_S5 G26 AB23
G27 VSS VSS AB5
AC7 C3 SCD1U16V2ZY-2GP H25 AB6
VCC1_5_A VCCSUS3_3 VSS VSS
AD7 VCC1_5_A H28 VSS VSS AD5
VCCSUS3_3 AC18 H29 VSS VSS U4
1
1D5V_SB_S0 D1 AG20 C480 C494 H3 W24
VCCUSBPLL VCCSUS3_3 SCD1U16V2ZY-2GP VSS VSS
AC21 H6
VCCPSUS
1D5V_SB_S0 VCCSUS3_3 VSS

F1 VCC1_5_A VCCSUS3_3 AC22 J1 VSS VSS_NCTF A1 ICHGND1 1 DY 2
2
2
1
L6 AH28 J25 A2 R542 0R2J-2-GP

USB CORE
C779 C519 VCC1_5_A VCCSUS3_3 VSS VSS_NCTF

L7 VCC1_5_A J26 VSS VSS_NCTF A28
3D3V_S5
M6 VCC1_5_A VCCSUS3_3 P6 J27 VSS VSS_NCTF A29 ICHGND2 1 DY 2
2
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP M7 P7 J4 AJ28 R548 0R2J-2-GP

VCC1_5_A VCCSUS3_3 VSS VSS_NCTF
VCCSUS3_3 N7 J5 VSS VSS_NCTF AH1
1D5V_SB_S0 W23 VCC1_5_A VCCSUS3_3 C1 K23 VSS VSS_NCTF AH29
1
VCC_LAN1_05_INT_ICH_1 VCCSUS3_3 P1 K28 VSS VSS_NCTF AJ1 ICHGND3 1 DY 2

TP79 F17 R1 C758 K29 AJ2 R504 0R2J-2-GP
3D3V_S0 TP77 VCC_LAN1_05_INT_ICH_2 VCCLAN1_05 VCCSUS3_3 SC4D7U6D3V3KX-GP VSS VSS_NCTF
G18 VCCLAN1_05 VCCSUS3_3 P2 K3 VSS VSS_NCTF AJ29
2
ICHGND4 DY
VCCPUSB
VCCSUS3_3 P3 K6 VSS VSS_NCTF B1 1 2

F19 R3 B29 R541 0R2J-2-GP
VCCLAN3_3 VCCSUS3_3 VSS_NCTF
L40 G20 VCCLAN3_3 VCCSUS3_3 P4
1
1D5V_SB_S0 VCCSUS3_3 P5
C535 1 2 1D5V_S0_GLANPLL A24 R5 ICH8-M-1-GP-U
VCCGLANPLL VCCSUS3_3
VCCSUS3_3 R6
2
SCD1U16V2ZY-2GP BLM18PG121SN-1GP C793 C795 A26 VCCGLAN1_5

1
A27 G22 VCCCL1_05_ICH

VCCGLAN1_5 VCCCL1_05 TP78
GLAN POWER
B26
SC2D2U10V3KX-GP
VCCGLAN1_5
SC4D7U10V5ZY-3GP
B27 VCCGLAN1_5 VCCCL1_5 A22

2
B28 VCCGLAN1_5
A VCCCL3_3 F20 3D3V_S0
3D3V_S0 B25 VCCGLAN3_3 VCCCL3_3 G21
1
C794 <Core Design>

ICH8-M-1-GP-U
SC1U10V3ZY-6GP
Wistron Co
2
DY
21F, 88, Sec.1, Hsin Tai
Taipei Hsien 221, Taiwa
Title
ICH8(4/4) POWER&GND
Custom
Anote2.0 INTEL
Date: Friday, January 12, 2007 Sheet 23
5 4 3 2 1
FAN1_VCC FAN1_FG1 <57>
5V_S0
1
R155
10KR2J-3-GP CN16
FOX-CON3-6-GP
2
5
FAN1_FG1 3
2
1
*Layout* 20 mil 4
1
C232 20.D0210.103
SC1000P50V2JN-GP
2
5V_S0
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
5V_S0 U22
*Layout* 30 mil C579 C576
1
1 2 5V_G792_S0 6 1
R159 200R2F-L-GP VCC FAN1
20 DVCC FG1 4
2
1 CLK 14 G792_CLK <22>
1
16 G792_SDA
SDA
1
R154 C149 C157 7 18 G792_SCL

C233 10KR2F-2-GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP DXP1 SCL
9 DXP2 NC#19 19
2
SC1U10V3ZY-6GP 11 H_THERMDA <4>
DXP3
2
1
2
DX PORT1
5 C229
DGND SC2200P50V2KX-2GP
15 ALERT# DGND 17
2
HW _THRM_SHDN# 1 2 THERM# 13
R113 0R2J-2-GP V_DEGREE THERM#
Setting T8 as 3 THERM_SET SGND1 8 H_THERMDC <4>
2 RESET# SGND2 10
100 Degree
1
SGND3 12
R153
100KR2F-L1-GP
V_DEGREE G792SFUF-GP
3D3V_S0_RST
=(((Degree-72)*0.02)+0.34)*VCC
2
G792_DXP2
3
1 Q20
1
PMBS3904-1-GP
14
DX PORT2
C214
2
12 DXP1:108 Degree SC2200P50V2KX-2GP
PM_SLP_S3_1# <45,55>
2
<10,22> PM_PW ROK 11
13 G792_RST# DXP2:H/W Setting G792_DXN2
DXP3:88 Degree
2
2
U60D G3
7
R498 SSLVC08APW R-GP R152 Place near chip as close

10KR2J-3-GP as possible
100KR2J-1-GP
GAP-CLOSE
1
1
220ms delay time after Power-on
NV_THERMDA <50>
1
DX PORT3
C150
0R2J-2-GP
2200P in DIS
2
NV_THERMDC <50>
3D3V_S0 RN19 Please close to the GPU

4 1 G792_SCL
3 2 G792_SDA 3D3V_AUX_S5
SRN10KJ-5-GP
1
R52
10KR2J-3-GP R51
100KR2J-1-GP
3D3V_S0
2
D7
2
3D3V_S0
U18
<45> HW _THRM_SHDN# 1
4 3 THER_SDA <55> 3 PW R_S5_EN <45>

<55> S5_ENABLE 2
5 2
CHP222PT-U
1
<55> THER_SCL 6 1
C60
SCD1U10V2KX-4GP
2
2N7002DW -7F-GP DY <Core Design>
Wistron Corp
Title
Thermal/Fan Controllor G7
Custom
Anote2.0 INTEL
CD-ROM CONNECTOR Lab1 20.80346.050
IDE_PDD[0..15] <21>
Lab2 20.80863.050
FOX-CONN50-4R-6GP
52
<34> CD_AUDR 49 50 CD_AUDL <34>

47 48 CD_AGND <34>
IDE_PDD8 45 46 PLTRST# <20>
IDE_PDD9 43 44 IDE_PDD7
<21> IDE_PDDREQ 29 30 IDE_PDD0
<21> IDE_PDIOR# 27 28
25 26 IDE_PDIOW # <21>
<21> IDE_PDDACK# 23 24 IDE_PDIORDY <21>
21 22 INT_IRQ14 <21>
19 20 IDE_PDA1 IDE_PDA1 <21>
IDE_PDA2 17 18 IDE_PDA0 IDE_PDA0 <21>
<21> IDE_PDA2
<21> IDE_PDCS3# 15 16 IDE_PDCS1# <21>
13 14 CDROM_LED# <54>
11 12
5V_S0 9 10 5V_S0
7 8
1
5 6
C614 C606 3 4
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP
2
1 2
primary channel:low
1
51
R410
0R2J-2-GP
CN18
DY
2
20.80863.050
SATA HD Connector CN26

45
NP1
1
2 3D3V_S0 5V_S0
3
4
5
6
7
8 S1
9 S2 SATA_TXP0 <21,57>
10 S3 SATA_TXN0 <21,57>
11 S4
12 S5
13 S6 SATA_RXN0 2 1 SATA_RXN0_C <21>
14 S7 C492 SC3900P50V2KX-2GP
15
16
<21,57> SATA_TXP0 17 SATA_RXP0 1 2 SATA_RXP0_C <21>
<21,57> SATA_TXN0 18 C490 SC3900P50V2KX-2GP
19
<57> SATA_RXN0 20
<57> SATA_RXP0 21
22 1A
<57> HDD_DTC# 23 2A
24 3A
25 4A
26 5A HDD_DTC#
27 6A
28 7A
29 8A
30 9A
31 10A
32 11A
1
33 12A
34 13A R302
35 14A 0R2J-2-GP
36 15A
37
2
38 <Core Design>
SC10U10V5ZY-1GP
39
1
40
1
41 C478 C474
C468 C466 Wistron Corp
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
42
2
43 SCD1U16V2ZY-2GP 21F, 88, Sec.1, Hsin Tai W u R

2
44 Taipei Hsien 221, Taiwan, R.O

NP2
46 Title
CON44+15P+S7-1GP
HD/CDROM/USB
20.F0883.001
A3
Anote2.0 INTEL
5 4 3 2 1
USB PORT 1
R191
2
5V_USB0_S5
0R2J-2-GP
USB_0- CN22
<22> USB_PN0
7
5V_S5 3D3V_S5 5
2
D
1
DY <57> USB_0-
L-63UH-GP 2
3 <57> USB_0+
5V_USB0_S5 5V_USB1_S5 TR4 4
6
2
8
1
R221 R250
USB_0+ TC26
SCD1U16V2ZY-2GP
<22> USB_PP0 R195 SKT-USB-105-GP-U

C428 10KR2J-3-GP 10KR2J-3-GP ST47U6VBM-L-GP
2
1
1 2
1
U32 0R2J-2-GP 22.10218.J11
2
1 GND OC1# 8 USB_SYSTEM_OC0# <22>

2 IN OUT1 7
3 6 5V_USB1_S5
EN1/EN1# OUT2 R225
4 5 USB_SYSTEM_OC1# <22>
GND
EN2/EN2# OC2#
2
1 2
R233 0R2J-2-GP
USB_1- CN23
0R2J-2-GP G546B2RD1UF-GP <22> USB_PN1
9
7
5
1
2
1
C DY
L-63UH-GP 2 <57> USB_1-
3D3V_S5 3
TR1 4 <57> USB_1+
6
8
3
5V_S5
1
5V_USB2_S5 5V_USB3_S5 <22> USB_PP1 USB_1+ SKT-USB-105-GP-U
R206
TC17
2
1 2 ST47U6VBM-L-GP
2
R376 R377 0R2J-2-GP 22.10218.J11
SCD1U16V2ZY-2GP
C582 10KR2J-3-GP 10KR2J-3-GP

1
U46
2
1 8 USB_SYSTEM_OC2# <22> 5V_USB3_S5

GND OC1# 5V_USB2_S5
2 IN OUT1 7 R28
3 EN1/EN1# OUT2 6
4 5 USB_SYSTEM_OC3# <22> 1 2
GND
EN2/EN2# OC2#
2
0R2J-2-GP
R378 <22> USB_PN2 USB_2- <57> USB_2-
0R2J-2-GP G546B2RD1UF-GP
9
CN15 <57> USB_2+
2
B
1
DY 2 USB-#2 GND 4
L-63UH-GP 3 USB+#3 GND 12 <57> USB_3-
GND 11
TR2 6 10
USB-#6 GND <57> USB_3+
7 USB+#7 GND 9
GND 8
3
<22> USB_PP2 USB_2+ 1
R29 POWER
5 POWER
1 2
USB_EN# <55> 0R2J-2-GP
SKT-USB-167-GP
1 R30 2
0R2J-2-GP
1
<22> USB_PN3 USB_3-
TC19
1
Double LAYER ST47U6VBM-L-GP
2
1
2
TC20
DY ST47U6VBM-L-GP
2
L-63UH-GP
TR3 <Core Design>
Wistron Corpor
A
4
<22> USB_PP3 USB_3+ 21F, 88, Sec.1, Hsin Tai Wu Rd., H

1 R31 2
0R2J-2-GP Title
USB I/O
B
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_S0
U71B
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1
1
C804 C806 C802 C803 C784 10 67
D C791
SC10U10V5ZY-1GP
20
27
VCC_PCI1
VCC_PCI2
VCC_3V
VCC_PCI3
2
32 VCC_PCI4
1
41 VCC_PCI5
3D3V_S0 128 C761 C512
VCC_PCI6 SCD01U16V2KX-3GP SC10U10V5ZY-1GP
2
61 VCC_RIN
16 VCC_ROUT1
VCC_ROUT 34 VCC_ROUT2
1
64 VCC_ROUT3
C765 C770 114 VCC_ROUT4
1
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP C525 C790 C805 C781 120 VCC_ROUT5
2
DY
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
VCC_MD 86
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
2
2
GND1 4
GND2 13
PCI_AD31 125 22
PCI_AD30 126 AD31 GND3
AD30 GND4 28
PCI_AD29 127 54
PCI_AD28 AD29 GND5
1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118
AD25 GND9
ver-sc change size PCI_AD24 6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 11 AD23
AD22
C PCI_AD21 12
PCI_AD20 14 AD21 AGND1 99
102
PCI_AD19 15 AD20 AGND2
AD19 AGND3 103
PCI_AD18 17 107 3D3V_S0
PCI_AD17 18 AD18 AGND4
AD17 AGND5 111
PCI_AD16 19
AD16
1
PCI_AD15 36
PCI_AD14 37 AD15 R518
PCI_AD13 38 AD14 4K7R2J-2-GP
PCI_AD12 39 AD13
PCI_AD11 40 AD12
AD11
2
PCI / OTHER
PCI_AD10 42 69
PCI_AD9 AD10 HWSPND#
43 AD9
PCI_AD8 44
<20> PCI_AD[0..31] AD8
PCI_AD7 46
PCI_AD6 AD7 3D3V_S0
47 AD6 MSEN 58
PCI_AD5 48
PCI_AD4 AD5
49 AD4 XDEN 55
PCI_AD3 50 RN78
PCI_AD2 AD3
51 AD2 1 8
PCI_AD1 52 57 1 2 3D3V_S0 2 7 DY
AD1 UDIO5
1
PCI_AD0 53 R530 100KR2J-1-GP 3 6
AD0 C527
<20> PCI_PAR 33 PAR 4 5
PCI_C/BE#3 7 65 SCD1U16V2ZY-2GP
<20> PCI_C/BE#3 C/BE3# UDIO3
2
<20> PCI_C/BE#2 PCI_C/BE#2 21 59 SRN10KJ-6-GP
PCI_C/BE#1 C/BE2# UDIO4
<20> PCI_C/BE#1 35 C/BE1#
3D3V_S0 PCI_C/BE#0 45 56
<20> PCI_C/BE#0 C/BE0# UDIO2
PCI_AD25 1 2 R5C834_IDSEL 8
R554 100R2J-2-GP IDSEL
UDIO1 60 PCI_SPKR <32>
1
B R516
<20> PCI_REQ#0
<20> PCI_GNT#0
124
123
REQ#
GNT# UDIO0/SRIRQ# 72 INT_SERIRQ <22,55>
10KR2J-3-GP 23
<20> PCI_FRAME# FRAME#
<20> PCI_IRDY# 24 IRDY#
<20> PCI_TRDY# 25 TRDY#
1 2
<20> PCI_DEVSEL# 26 DEVSEL#

<20> PCI_STOP# 29 STOP# INTA# 115 PCI_PIRQA# <20>
C760 <20> PCI_PERR# 30
SCD1U16V2ZY-2GP PERR#
<20> PCI_SERR# 31 SERR# INTB# 116 PCI_PIRQC# <20>
2
GBRST# 71 GBRST#
<20,30,55> PCIRST1# 119 PCIRST# 1394 : INTA#
<3> PCLK_PCM 121 PCICLK 4in1 : INTB#
SHIELD <20> ICH_PME# 2 1 70 PME# TEST 66
GND R517 DY 0R2J-2-GP
<22,55> PM_CLKRUN# 117 CLKRUN#
2
R543 R519
10KR2J-3-GP 100KR2J-1-GP
DY R5C832-1-GP
1
1
1
C785
SC10P50V2JN-4GP
A <Core Design>
2
DY
Wistron Corp
Title
R5C832/PCI
A3
Anote2.0 INTEL
5 4 3 2 1
A B C D E
U71A
1394 Function
3D3V_S0
98 TPA0+ <57>
AVCC_PHY1
106 TPA0- <57>
AVCC_PHY2 Reserve R547,R548,R550,R551 for co-layout
110
AVCC_PHY3
112 TPB0+ <57>
AVCC_PHY4
1
GUARD GND C763 C537 C766 TPB0- <57>
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD01U16V2KX-3GP
C757 CLOSE TO CHIP
2
1 2 1394_XI 113 TPBIAS0
TPBIAS0
R291 0R2J-2-GP
4 4
SC15P50V2JN-2-GP 2 1
1
94
X5 XI
X-24D576MHZ-44GP
2
104 TPB0N DLW21HN900SQ2LGP

1 2 TPA0+
C756 TPBN0
1 2 1394_XO 95 105 TPB0P DY
XO TPBP0 TPA0- SKT-1394-4P-16GP
4 3
SC22P50V2JN-4GP L38 6
R292 0R2J-2-GP 4
2 1 3
IEEE1394/SD
108 TPA0N TPA0P TPB0+ 2
TPAN0 TPA0N 1
1 2 RICHO_FILO 96 109 TPA0P TPB0P R289 0R2J-2-GP 5
C762 SCD01U16V2KX-3GP FIL0 TPAP0 TPB0N 2 1
CN24
1 2RICHO_REXT 101 1 2
R526 10KR2F-2-GP REXT 22.10218.N31
DY DLW21HN900SQ2LGP
1
R534 R536 R527 R532
TPB0-
56R2J-4-GP
56R2J-4-GP
56R2J-4-GP
56R2J-4-GP
4 3
1 2 RICHO_VREF 100 L37
C768 SCD01U16V2KX-3GP VREF R290 0R2J-2-GP
2 1
2
GUARD GND 1394_TPB1_R
1
1
1
R531 C772
XD_DATA7 C775 C778
5K11R2F-L1-GP
SC270P50V2JN-2GP
87
MDIO17
SCD33U10V2KX-1GP
SCD01U16V2KX-3GP
2
2
92 XD_DATA6
MDIO16
2
89 XD_DATA5
MDIO15
91 XD_DATA4
MDIO14
3 90 SD/XD/MS_DATA3 3
MDIO13
93 SD/XD/MS_DATA2 RN76
MDIO12 XD_DATA4 XD_DATA4_1
8 1
81 SD/XD/MS_DATA1 XD_DATA5 7 2 XD_DATA5_1
MDIO11 XD_DATA6 XD_DATA6_1
6 3
82 SD/XD/MS_DATA0 XD_DATA7 5 4 XD_DATA7_1 3D3V_S0
MDIO10
SRN33J-4-GP
75 XD_WP#
MDIO05
88 SD/XD/MS_CMD RN77
MDIO08 SD/XD/MS_DATA0 8 1SD/XD/MS_DATA0_1
83 XD_ALE SD/XD/MS_DATA1 7 2SD/XD/MS_DATA1_1 3D3V_CARD
MDIO19 SD/XD/MS_DATA2 6 3SD/XD/MS_DATA2_1
Board to Board CNN

85 XD_CLE SD/XD/MS_DATA3 5 4SD/XD/MS_DATA3_1
MDIO18
78 XD_CE# SRN33J-4-GP INT_MIC_TO_CNN <58>
MDIO02
SD/XD/MS_CMD 2 1 SD/XD/MS_CMD_1
77 SD_WP#(XDR/B#) 33R2J-2-GP R515
MDIO03
CardReader I/F
80 SD_CD# MICBIAS_L <32,58>
MDIO00 CN28
46 MH2
2
79 MS_INS# 44 43
MDIO01 R364
R521
<58> XD_DATA4_1 XD_DATA4_1 40 39 AMOM_DIPP <32,58> 10KR2J-3-GP
84 SD/XD/MS_CLK 1 2 SD/XD/MS_CLK_1 <58> XD_DATA5_1 XD_DATA5_1 38 37 AMOM_DIPN <32,58>
MDIO09 XD_DATA6_1
<58> XD_DATA6_1 36 35
1
33R2J-2-GP <58> XD_DATA7_1 XD_DATA7_1 34 33 R350
76 MC_PWR_CTRL_0 32 31 INT_MIC_TO_CNN 1 2 INT_MIC+_L <32>
MDIO04 SD/XD/MS_DATA0_1 0R3-0-U-GP
<58> SD/XD/MS_DATA0_1 30 29
74 MS_LED# <54,58> <58> SD/XD/MS_DATA1_1 SD/XD/MS_DATA1_1 28 27
MDIO06 SD/XD/MS_DATA2_1
<58> SD/XD/MS_DATA2_1 26 25
97 <58> SD/XD/MS_DATA3_1 SD/XD/MS_DATA3_1 24 23
RSV SD/XD/MS_CMD_1 3D3V_BT
73 <58> SD/XD/MS_CMD_1 22 21
MDIO07
1
<58> SD_CD# SD_CD# 20 19

2 BLUETOOTH_EN <55,58> 2
R520 <58> SD/XD/MS_CLK_1 SD/XD/MS_CLK_1 18 17 AUD_AGND
100KR2J-1-GP USB_PP6_BT <22,58>
R5C832-1-GP <58> SD_WP#(XDR/B#) SD_WP#(XDR/B#) 16 15 USB_PN6_BT <22,58>
14 13 WIFI_BUSY <29,58>
<58> XD_CD# XD_CD# 12 11
BT_BUSY <29,58>
2
<58> XD_CE# XD_CE# 10 9

XD_CLE BLUETOOTH_LED <53,58>
<58> XD_CLE 8 7
<58> XD_ALE XD_ALE 6 5
<58> XD_WP# XD_WP# 4 3
<58> MS_INS# MS_INS# 2 1

45 MH1
42 41
AMP-CONN40-2-UGP
1
CH715FPT-GP 20.F0084.040 C504 C503
SC2D2U10V3ZY-1GP
SD_CD#
SCD1U16V2ZY-2GP
2
2
U68 3D3V_S0 3 XD_CD#
3D3V_CARD
20mil 1
2
3
OUT
GND
IN
5
4 MC_PWR_CTRL_0
MS_INS# 1
NC#3 EN D12
1
G5240B1T1U-GP
C754 C750
SCD1U10V2KX-4GP
SC1U10V3ZY-6GP
2
For SD/MS Card Power

1 1
<Core Design>
Wistron Corporation
Title
R5C832/IEEE1394/SD
C
Anote2.0 INTEL SC
A B C D E
A B C D E
Mini PCI-E Connector

4
Port-1 Only port-1 support USB
3D3V_S0
3D3V_S5 1D5V_SB_S0
CN25
6 1.5V REFCLK+ 13 CLK_PCIE_MINI_1 <3,58>

REFCLK- 11 CLK_PCIE_MINI_1# <3,58>
2 SCD1U16V2KX-3GP
3.3V PCIE_C_RXN3
PERN0 23 2 1C476 PCIE_RXN3 <22,58>
28 25 PCIE_C_RXP3 2 1C479 PCIE_RXP3 <22,58>
+1.5V PERP0 SCD1U16V2KX-3GP
48 +1.5V
3 PETN0 31 PCIE_TXN3 <22,58>
52 +3.3V PETP0 33 PCIE_TXP3 <22,58>
24 +3.3VAUX USB_D- 36 USB_PN8 <22,58>
USB_D+ 38 USB_PP8 <22,58>
5V_AUX_S5 3 30 SMB_CLK
<28,58> BT_BUSY RESERVED#3 SMB_CLK SMB_CLK <22,30,31,57,58>
5 32 SMB_DATA
<28,58> WIFI_BUSY RESERVED#5 SMB_DATA SMB_DATA <22,30,31,57,58>
8 RESERVED#8 R480
10 RESERVED#10
12 1 1 2 PCIE_WAKE# PCIE_WAKE# <22,30,31,57,58>
RESERVED#12 WAKE#
14 RESERVED#14 CLKREQ# 7
1
16 22 PLT_RST1# 0R2J-2-GP PLT_RST1# <10,20,31,35,46,58>

RESERVED#16 PERST#
DY R573
0R3-0-U-GP
<55> PCIE_DEBUG_Rx 17 RESERVED#17
<55> PCIE_DEBUG_Tx 19 RESERVED#19
<55> WIFI_RF_EN 20 RESERVED#20 GND 4
37 RESERVED#37 GND 9
2
5V_DEBUG 51 34
RESERVED#51 GND
2
GND 35
GND 40
42 LED_WWAN# GND 50
<53,58> WLAN_LED 44 LED_WLAN# GND 53
46 LED_WPAN# GND 54
SKT-MINI52P-6-GP
62.10043.261 Note: 9/5 ME updata
3D3V_S0 1D5V_SB_S0 3D3V_S5

1
C741
<Core Design>
C724 C723 C727 C752 SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SCD1U16V2ZY-2GP
2
Wistron Corpor
1

Title
MINI CARD CONN .

B
Anote2.0 INTEL
A B C D E
5 4 3 2 1
2D5V_LAN_S5 3D3V_LAN_S5
1D2V_LAN_S5 2D5V_LAN_S5 3D3V_LAN_S5 2D5V_LAN_S5
L14
2 1
BLM15AG601SN1D-1GP
1
D 2 1
1
1
C226 SCD1U10V2KX-4GP L6 C133 C121 C174 C140
SC4D7U25V5KX-GP
C252 C168 C181 C123 C122 C136 C120 2 1
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
2
2
1D2V_LAN_S5
SC4D7U25V5KX-GP
BLM15AG601SN1D-1GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
2
2
2 1
C151 SCD1U10V2KX-4GP L12
2 1
15
19
56
61
17
68
6
U20 BLM15AG601SN1D-1GP
2 1
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDP
VDDP
5 36 C199 SCD1U10V2KX-4GP
VDDC BIASVDD
13 VDDC
20 VDDC XTALVDD 23 2 1
34 C228 SCD1U10V2KX-4GP
VDDC
55 VDDC
60 VDDC DC#38 38
1D2V_LAN_S5 45 MDI1- 1 2 C247 1 2 SCD1U16V2K
L16 DC#45 R150 49D9R2F-GP
1 2 39 52 MDI1+ 1 2
BLM15AG601SN1D-1GP AVDDL DC#52 R151 49D9R2F-GP
44 DC#44
2 1 46 MDI0- 1 2 C246 1 2 SCD1U16V2K
SC4D7U10V5ZY-3GP DC#46
2 1 C230 51 DC#51 DC#49 49 MDI3- MDI3- <31> R149 49D9R2F-GP
L17 SCD1U10V2KX-4GP C227 50 MDI3+ MDI3+ <31> MDI0+ 1 2
DC#50 R148 49D9R2F-GP
1 2
BLM15AG601SN1D-1GP 35 48 MDI2- MDI2- <31>
DC#35 DC#48 MDI2+
2 1 DC#47 47 MDI2+ <31>
L11
SC4D7U10V5ZY-3GP 2 1 C250 30
SCD1U10V2KX-4GP C202 PCIE_PLLVDD MDI1- 5906 5787
1 2 TDN 42 MDI1- <31>
BLM15AG601SN1D-1GP 43 MDI1+ MDI1+ <31>
C TDP
2 1 27 PCIE_VDD
SC4D7U10V5ZY-3GP 2 1 C196 33 41 MDI0- MDI0- <31> R665 ASM DY
L15 SCD1U10V2KX-4GP C182 PCIE_VDD RDN MDI0+
RDP 40 MDI0+ <31>
1 2 R666 ASM DY
BLM15AG601SN1D-1GP 24
SC4D7U10V5ZY-3GP C205 VSS R667 ASM DY
2 1 LINK_LED# 2 LAN_LINKLED# <31>
SCD1U10V2KX-4GP 2 1 C179 1
SCD1U10V2KX-4GP C170 PCIE_C_RXN2 SPD100_LED# LAN_SPD100LED# <31>
R668
<22> PCIE_RXN2 2 1 26 PCIE_TXD_P TRAFFIC_LED# 66 LAN_TRAFFICLED# <31>
ASM DY
<22> PCIE_RXP2 SCD1U10V2KX-4GP 2 1 C159 PCIE_C_RXP2 25 PCIE_TXD_N
<22> PCIE_TXN2 31 PCIE_RXD_P SERIAL_DI 67 C889 ASM DY
<22> PCIE_TXP2 32 62 1 TP12 TPAD30LAN_SPD1000LED# <31>
PCIE_RXD_N SERIAL_DO R118 1
<22,29,31,57,58> PCIE_W AKE# 12 WAKE DY 2 4K7R2J-2-GP C891 ASM DY
<20,27,55> PCIRST1# 10 PERST#
29 8 1 TP6 TPAD30 3D3V_LAN_S5
<3> CLK_PCIE_LAN PCIE_REFCLK_P GPIO_2
<3> CLK_PCIE_LAN# 28 4 1 TP5 TPAD30
3D3V_LAN_S5 PCIE_REFCLK_N GPIO_0
3D3V_S0 7 EEW P R96 2 1 4K7R2J-2-GP
R131 1 GPIO_1
2 1KR2J-1-GP 54 VAUX_PRSNT
R137 1 2 1KR2J-1-GP 53
R98 1 VMAIN_PRSNT
<22> LAN_DISABLE DY 2 0R2J-2-GP 3 LOW_PWR SCLK 65 VPD_CLK
R97 2 1 4K7R2J-2-GP 64 VPD_DATA R107 2 1 4K7R2J-2-GP

SO
1
R560 1 DY 2 0R2J-2-GP 58 9 1 TP7 TPAD30 R102
<22,29,31,57,58> SMB_CLK DC#58 UART_MODE
R561 1 DY 2 0R2J-2-GP 57 4K7R2J-2-GP
<22,29,31,57,58> SMB_DATA DC#57 2D5V_LANREG
REGCTL25 18
R114 1 2 200R2F-L-GP 22 XTALO
2
21 XTALI NC#63 63 1 DY 2
B R115 4K7R2J-2-GP
X1
37 14 1D2V_LANREG
RDAC REGCTL12
1 2
1
3D3V_LAN_S5
XTAL-25MHZ-67GP 11 16 U23
<3> LAN_CLKREQ# CLKREQ# VSS
1
59 ENERGY_DET 1 A0 VCC 8
C165 C141 R147 69 2 7 EEW P
SC15P50V2JN-2-GP SC15P50V2JN-2-GP 1KR2F-3-GP GND A1 WP VPD_CLK
3 A2 SCL 6
2
4 5 VPD_DATA
BCM5906MKMLG-GP GND SDA
AT24C02BN-10SU-GP
3D3V_LAN_S5
L8 DY 3D3V_LAN_S5
1 2
MLB-201209-8-GP
1
1
3D3V_S5 3D3V_LAN_S5 C78 C84
SCD01U16V2KX-3GP SC2D2U10V3ZY-1GP C79 C85
2
2
3
U73 SCD01U16V2KX-3GP SC2D2U10V3ZY-1GP
2
3
1D2V_LANREG
1 CHP69PT-GP
5 1 Q7 2D5V_LANREG 1 Q6
IN OUT CHP69PT-GP
GND 2
2
1
4 3 C116 C115
EN# NC#3
2
1D2V_LAN_S5
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
2D5V_LAN_S5
A <Core Design>
2
G5240B2T1U-GP-U
1
C118 C117
1
Wistron Corpo
SCD1U10V2KX-4GP
SC22U6D3V5MX-2GP
1
DY C75 C82
2
SCD01U16V2KX-3GP SC10U6D3V5KX-1GP C94 21F, 88, Sec.1, Hsin Tai W u Rd.,

2
SC4D7U6D3V3KX-GP Taipei Hsien 221, Taiwan, R.O.C.
2
Title
LAN BCM5906M
A3
Anote2.0 INTEL
5 4 3 2 1
A B C D E
2D5V_LAN_S5 10/100M Lan Transformer D26 RN94

2 1 4 3D3V_LAN_S5
2 3
1
U56 <30> LAN_SPD1000LED# 3
R165 SRN220J-1-GP
0R3-0-U-GP
1.route on bottom as differential pairs. <30> MDI0+ 7 TD+ TX+ 10 RJ45-1 1
8 9 RJ45-2
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. <30> MDI0- TD- TX- CH715FPT-GP
2
3.No vias, No 90 degree bends. XRF_RDC RD+ 1 MDI1+ <30> DY CN19
6 2 MDI1- <30> 14
4.pairs must be equal lengths. XFR_RXC 14
CT RD-
<30> LAN_SPD100LED# DY 9
XFR_CMT CT RJ45-3 3D3V_LAN_S5_CN
4 5.6mil trace width,12mil separation. XRF_TDC
11 CT RX+ 16
RJ45-6
3D3V_LAN_S5 1
R443
2
470R2J-2-GP
10
3 CT RX- 15 <30> LAN_LINKLED# 11
6.36mil between pairs and any other trace. RJ45-1 1
7.Must not cross ground moat,except ver-sc R443DY PIN09 : GREE
XFORM-238-GP RJ45-2 2 PIN11 : ORAN
RJ-45 moat. RJ45-3 3
RJ45-4 4
RJ45-5 5
RJ45-6 6
RJ45-7 7
U59 RJ45-8 8
3D3V_LAN_S5 1 2 3D3V_LAN_S5_RES 12
7 10 RJ45-4 <30> LAN_TRAFFICLED# R448 470R2J-2-GP 13
<30> MDI2+ TD+ TX+
8 9 RJ45-5 15
<30> MDI2- TD- TX-
1 MDI3+ <30> RJ45-134-GP
RD+
6 CT RD- 2 MDI3- <30>
14 CT RJ45-7
22.10245.P11
11 CT RX+ 16
3 15 RJ45-8
CT RX-
4
3
2
1
XFORM-238-GP
1
1
RN81 DY
C254 C259 C355 C367 SRN75J-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
DY 2
DY C698
5
6
7
8
LAN_TERMINAL 1 2
3
SC1500P2KV8KX-3GP
NEWCARD
Connector
<57> PCIE_C_RXP1
Place them Near to Connector CN9 <57> PCIE_C_RXN1
1 2
Place them Near to Chip
3D3V_NEW _S0 1D5V_NEW _S0 3D3V_NEW _LAN_S5 FCI-CON26-6-GP-U
3D3V_S5 3 4 NP2
26
CARDBUS-SKT80-GPU <22,57> PCIE_TXP1 25
<22,57> PCIE_TXN1 24
1
23
21.H0119.001
1
C520 C524 C550 C548 C538 <22> PCIE_RXP1 C508 2 1 SCD1U16V2KX-3GP PCIE_C_RXP1 22
C501 For Newcard socket C510 2 1 SCD1U16V2KX-3GP PCIE_C_RXN1
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
<22> PCIE_RXN1 21
2
SCD1U16V2ZY-2GP 20
2
DY <3,57> CLK_PCIE_NEW 19
<3,57> CLK_PCIE_NEW # 18
<57> CPPE# CPPE# 17
<3,57> NEW CARD_CLKREQ# 16
3D3V_NEW _S0 15
2
14
<57> PERST# PERST# 13
3D3V_NEW _LAN_S5 12
3D3V_NEW _S0 1D5V_NEW _S0 <22,29,30,57,58> PCIE_W AKE# 11
1D5V_NEW _S0 10
9
<22,29,30,57,58> SMB_DATA 8
<22,29,30,57,58> SMB_CLK 7
CONN_TP2 6
11
13
<57> CONN_TP2
3
5
U38 <57> CONN_TP3 CONN_TP3 5

<45> PM_SLP_S3_2# <57> CPUSB# CPUSB# 4
3.3VOUT
3.3VOUT
1.5VOUT
1.5VOUT
<22,57> USB_PP5 3
GND 7 <22,57> USB_PN5 2
1 STBY#
<10,20,29,35,46,58> PLT_RST1# 1 2 6 SYSRST# THERMAL_PAD 21 1
R310 33R2J-2-GP PERST# 8 NP1
CPUSB# PERST#
9 CPUSB# RCLKEN 18 1 2 NEW CARD_RST# <22>
CPPE# 10 17 R315 DUMMY-R2
CPPE# AUXIN 3D3V_S5
TPAD30 TP70 1NEW CARD_OC# 19 15 CN10
OC# AUXOUT 3D3V_NEW _LAN_S5
<22,40,55> PM_SLP_S5# 20 SHDN#
NC#16 16
62.10081.031
3.3VIN
3.3VIN
1.5VIN
1.5VIN
2
C493
SC22P50V2JN-4GP R5538D001-TR-FGP
1
2
4
12
14
1 3D3V_S0 1D5V_SB_S0 <Core Design>
Wistron Corpo
1
C485 C483 C509 C511

SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP Title
LAN connector/NEW CARD/

2

A3
Anote2.0 INTEL
A B C D E
A B C D E
3D3V_S5 3V_AUD_Digtal_S5
R323 3V_AUD_Digtal_S5
2 1
0R3-0-U-GP
2
4 C514 C532 C516 R347
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP
237KR2F-GP
2
Ver-sc modify
U39
1
1 2 AMOM_DIPP AMOM_DIPP <28,58>
R343 0R2J-2-GP
41 44 AMOM_DIBP_R
RC_OSC DIBP AMOM_DIBP_N AMOM_DIPN
DIBN 43 1 2 AMOM_DIPN <28,58>
R344 0R2J-2-GP
9 SYNC S/PDIF 48
<21> HDA_SYNC_CODEC AUD_PC_BEEP
5 BIT_CLK PCBEEP 11
<21> HDA_BITCLK_CODEC
<21> HDA_SDOUT_CODEC
4 SDATA_OUT LINE_OUT_L 35 AUD_LOL <33> Speaker
1 2 HDA_SDIN1_RES 7 36 AUD_LOR <33>
<21> HDA_SDIN1 R326 33R2J-2-GP SDATA_IN LINE_OUT_R MIC_L
<21> HDA_RST#_CODEC 10 RESET# MIC_L 21 1 2 INT_MIC+_L <28>
MIC_R 22 C539 SC1U10V3ZY-6GP INT_MIC
<33> EAPD 47 17 CDAUD_L CDAUD_L <34>
EAPD CD_L CDAUD_GND
CD_GRD 18 CDAUD_GND <34>
DY 1 19 CDAUD_R CDAUD_R <34>
RESERVED#1 CD_R
3D3V_S5 1 2 2 RESERVED#2
R338 47KR2J-2-GP 16 RESERVED#16 PORT-A_L 38 PORT_A_HP_L <34> Headphone
PORT-A_R 39 PORT_A_HP_R <34>
3V_Analog_S0 20 23 PORT_B_L C546 1 2 SC1U10V3ZY-6GP MIC_L_JACK <34>
AVDD PORT-B_L
31 AVDD PORT-B_R 24
3
3V_Analog_S0
37 AVDD_HP PORT-A_BIAS_L 33 EXT_MIC
PORT-A_BIAS_R 34 2 1 MICBIAS_EXT <34,57>
3V_AUD_Digtal_S5 3 14 R355 2K2R2J-2-GP
VDD_IO PORT-B_BIAS_L
PORT-B_BIAS_R 15
8 R362
DVDD MICBIAS_RES_L
MICBIAS_L 29 2 1 MICBIAS_L <28,58>
45 30 2K2R2J-2-GP
DVDD_M MICBIAS_R
1
C523 42 13 AUDIO_SENSE 1 2
SCD1U16V2ZY-2GP VSS_IO SENSE R328 5K1R2F-2-GP
46 VSS_IO
2
6 28 AUDIO_REFA
DVSS VC_REFA AUDIO_VREF_HI
VREF_HI 26
27 AUDIO_VREF_LO 1 2 JACK_DETECT# <3
VREF_LO R319 5K1R2F-2-GP
12 AVSS
1
25 AVSS
32 C559
AVSS
SCD1U16V2ZY-2GP
40 AVSS_HP 1 2 MIC_IN# <34,57>
2
1
R320 10KR2F-2-GP
C561
SCD1U16V2ZY-2GP
CX20549-12Z-GP-U
2
1 2
R324 20KR2F-L-GP INT_MIC_DECT
Ver-sc modify
2 AUD_AGND Default = lo
AUD_AGND 1 2
R327 39K2R2F-L-GP
3D3V_S0
AUD_AGND 2 1
R363DY 0R3-0-U-GP
1
3V_Analog_S0
8/17 Reserve for EMI 2 1
R342 R317DY 0R3-0-U-GP
0R3-0-U-GP 1 2 1 2 AUD_PC_BEEP
<22> SB_SPKR R329 1KR2J-1-GP 2 1
C517 SCD1U16V2ZY-2GP R365DY 0R3-0-U-GP
2
R325
<55> EC_BEEP 1 2 2 1
2
R322 1KR2J-1-GP
1
C536 C543 C560

R316
1KR2J-1-GP
CUT MOAT 0R3-0-U-GP
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
<27> PCI_SPKR 1 2
2
R321 1KR2J-1-GP AUD_AGND

<Core Design>
1
Wistron Corpor
1

AUD_AGND
Title
AUDIO CODEC CX20549-12Z
B
Anote2.0 INTEL
A B C D E
A B C D E
5V_S0
5V_S0_ANALOG 5V_S0_ANALOG
5V_S0_ANALOG
R572
1 2
4
0R3-0-U-GP
1
2
2
R358 R357
DY R334
100KR2J-1-GP
2
U40
R589
1
0R2J-2-GP
16 VDD SHUTDOWN# 19 1 2
BYPASS KBC_MUTE# <34,55>
DY DY BYPASS 10 1
C556
2
SC1U10V3ZY-6GP
15 PVDD
6 9 LIN+ 1 2 D
PVDD LIN+ L_LINE_IN C555 SC1U10V3ZY-6GP
LIN- 5
1
3
C553 C824
C522 2 18 SPKR_R+ Q14
GAIN0 ROUT+ SPKR_R- 2N7002PT-U
3 14
SCD1U50V3ZY-GP
SC1U10V3ZY-6GP
SC4D7U10V5ZY-3GP
GAIN1 ROUT-
2
2
1
SPKR_L+ EAPD <32>
SPKR_L-
4 LOUT+ DY G
8 LOUT- DY
2
GND 1
1 2 RIN+ 7 11 S
C554 SC1U10V3ZY-6GP R_LINE_IN RIN+ GND
3 17 RIN- GND 13
GND 20
12 NC#12 GND 21
2
AUD_AGND R359 2 R356 APA2031RI-TRLGP

AUD_AGND AUD_AGND
1
AUD_AGND
<32> AUD_LOR 1
C515
2 R_LINE_IN_1 1
SCD47U16V3ZY-3GP
R335
2 R_LINE_IN
Speaker
6
1KR2J-1-GP
<57> SPKR_L- SPKR_L- 4

<57> SPKR_L+ SPKR_L+ 3
R360 <57> SPKR_R- SPKR_R- 2
<32> AUD_LOL 1 2 L_LINE_IN_1 1 2 L_LINE_IN ACES-CON4-1-GP
C563 SCD47U16V3ZY-3GP <57> SPKR_R+ SPKR_R+ 1
1KR2J-1-GP CN8
5
SRC100P50V-2-GP 20.D0197.104
SPKR_R+ 4 5
SPKR_R- 3 6
SPKR_L+ 2 7
SPKR_L- 1 8 <Core Design>
RC7
Wistron Corpor
1

Title
AUDIO AMP/SPEAKER
B
Anote2.0 INTEL
A B C D E
5 4 3 2 1
<32,57> MIC_IN#
<25> CD_AUDL
1 2 C526
SC1U10V3ZY-6GP
CDAUD_L <32> <32,57> MICBIAS_EXT
EXT MIC
1
DY2 C531 CN27
<25> CD_AUDR CDAUD_R <32>
SC1U10V3ZY-6GP 1
D
1
DY2 C529 1 R505 2 0R2J-2-GP 2
<25> CD_AGND CDAUD_GND <32> <32> MIC_L_JACK
SC1U10V3ZY-6GP
1
6
R337 R340 R336 DY
47KR2J-2-GP 47KR2J-2-GP 47KR2J-2-GP 3
2
5
DY DY DY 7
1
AUD_AGND C747 C792 8
NP1
DY NP2
2
SC100P50V3JN-2GP
SC100P50V3JN-2GP
AUDIO-JK83-GP
22.10251.381
R333
2 1 HP_AMP_SHDN#
<33,55> KBC_MUTE# 0R2J-2-GP
DY
1
C813
SCD1U50V3ZY-GP
2
HP_OUT/ LINE_OUT
3D3V_S0
<32,57> JACK_DETECT#
CN29
1
R544
HP_OUT_L HP_OUT_L 1 2 HP_OUT_L_RES 2
HP_OUT_R 75R2J-1-GP 6
R546
HP_OUT_R 1 2 HP_OUT_R_RES 3
1
C562
75R2J-1-GP 4
10
19
14
18
11
U41
9
B SC2D2U10V3ZY-1GP
2
5
SVDD
PVDD
OUTR
SHDNR#
SHDNL#
OUTL
1
AUD_AGND C541 R545 R547 C787 C788 8
1
C823 NP1
AMP_C1N AMP_C1P
22KR2J-GP
22KR2J-GP
SC680P-GP
SC680P-GP
1 2 1 C1P NC#4 4 NP2
C552 SC1U10V3KX-3GP 3 6
C1N NC#6
2
SC1U10V2KX-1GP
SC100P50V3JN-2GP
8 AUDIO-JK82-GP-U
NC#8
2
<32> PORT_A_HP_L 1 2 1 R354 2 LINE_OUT_L_R 12
10KR2J-3-GP NC#12
13 INL NC#16 16
<32> PORT_A_HP_R 1 2 1 R345 2 LINE_OUT_R_R 15 20
C533 10KR2J-3-GP INR NC#20
1
SC1U10V2KX-1GP
SGND
PGND
R346 R353 C540 C544

PVSS
SVSS
GND
1KR2J-1-GP
1KR2J-1-GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
1
0.11 * 1.5 =0.165 <57> HP_OUT_L_RES

2
21
17
2
MAX4411ETP-1-GP 74.04411.A13 <57> HP_OUT_R_RES

2
DY DY <Core Design>
AUD_AGND
A
AUD_AGND
FAE recommend MAX4411_PVSS
Wistron Corpor
1
AUD_AGND
C557 Taipei Hsien 221, Taiwan, R.O.C.
SC1U10V2KX-1GP
2
Title
AUD_AGND
AUDIO HP_JK/ MIC_JK
B
Anote2.0 INTEL
5 4 3 2 1
A B C D E
4
TOP VIEW GOLDEN FINGER FOR DEBUG BOARD
<21,55> LPC_LAD[0..3]
5V_S0
U42
A15 (B1) TOP BOTTOM
A1 A1 B15 B15 3D3V_S0
A14 (B2) <10,20,29,31,46,58> PLT_RST1# PLT_RST1# A2 A2 B14 B14
EXT_FWH#
<21,55> LPC_FRAME# A3 A3 B13 B13
A4 B12 LPC_LAD0
PCLK_FWH A4 B12 LPC_LAD1
A5 B11
....
....
<3> PCLK_FWH A5 B11 LPC_LAD2

A6 A6 B10 B10
A7 B9 LPC_LAD3
A7 B9
A2 (B14) LPC_LAD3
A8 A8 B8 B8
A9 A9 B7 B7
A1 (B15) LPC_LAD2
LPC_LAD1
A10 A10 B6 B6
PCLK_FWH
A11 A11 B5 B5
LPC_LAD0 A12 B4 5V_S0
EXT_FWH# A12 B4 LPC_FRAME#
EXT_FWH# A13 A13 B3 B3
A14 B2 PLT_RST1#
3D3V_S0 A14 B2
A15 A15 B1 B1
(BOTTOM VIEW) GF-15P-GP-U
3
Boot Device must have ID[3:0] = 0000

Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46
WIRELESS SWITCH
3D3V_S0
2
1
R361
100KR2J-1-GP
CN11
2
NP1 1
2 WIRLESS_DISABLE# <55,57>
3
1
NP2
C558
SW-SLIDE57-GP SCD1U16V2ZY-2GP
2
DY
<Core Design>
Wistron Corpor
1

Title
FWH and Debug

B
Anote2.0 INTEL
A B C D E
5 4 3 2 1
5V_S0 DCBATOUT 3D3V_S0
1
10R3J-3-GP
R237 R251
2
10R3J-3-GP
SCD01U25V2KX-3GP
1
R275
10R3J-3-GP
R284
2
1K91R2F-1-GP
1
C435 6262_3V3
6262_VIN
2
VGATE_PW RGD <10,22>
2
2
C443
D SCD01U25V2KX-3GP
1
6262_AGND
R287
6262_VCC
POW ER_Monitor 1 2 6262_PMON 6262_AGND
1
4K99R3F-GP C430
22
20
48
1
1
SC1U10V3KX-3GP
SCD1U25V3KX-GP
2
C462
3V3
VDD
VIN
PGOOD
6262_UGATE1 <37>
2
21 GND UGATE1 35 1 2
6262_AGND R218 0R3-0-U-GP
1
6262_AGND 49 36 6262_BOOT1
GND_T BOOT1 C413
SCD22U25V3ZY-1GP
2
1 2 6262_PSI# 2 34 6262_PHASE1 <37>
<4> PSI# 0R2J-2-GP PSI# PHASE1
R285 6262_PMON 3 PMON 6262_LGATE1 <37>
Place close to phase 1 chocke 6262_AGND 1
R282
2
147KR2F-GP
6262_RBIAS 4
5
RBIAS LGATE1 32
6262_VSUM 1 R217 2
3K65R3F-GP
<4> CPU_PROCHOT# VR_TT#
2 1 1 R466 2 6262_NTC 6 NTC PGND1 33
R472 NTC-470K-1-GP 6262_AGND 1 2 6262_SOFT 7
4K02R3F-GP C452 SCD015U25V3KX-GP SOFT 6262_ISEN1
ISEN1 24 1 2 6262_ISENP
1
6262_AGND C450 1 2 SCD01U16V2KX-3GP 6262_VID0 37 5V_S0 R212 10KR3F-L-GP
6262_VID1 VID0 C415
38 VID1
470K /0402 size 6262_VID2 39 VID2 PVCC 31 SCD22U10V3KX-2GP
2
6262_VID3 40 1 2 1 2
VID3 6262_ISENN
If NTC=330Kohm, R10=8.66K 6262_VID4
6262_VID5
41
42
VID4
27
C418 SC4D7U6D3V3KX-GP R231 1R3F-GP
C 6262_VID6 VID5 UGATE2 6262_UGATE2 <37> 6262_ISEN2

43 VID6 1 2
44 26 6262_BOOT2 1 2 R226 DY 10KR3F-L-GP
<38,39,42,45> CPUCORE_ON VR_ON BOOT2
1
R219 0R3-0-U-GP
1 2 6262_DPRSLP 45 C414
<10,22> DPRSLPVR DPRSLPVR SCD22U25V3ZY-1GP
R264 499R2F-2-GP 46 R259 3K65R3F-GP
DPRSTP#
2
1 2 6262_DPRSTP# 47 28 6262_PHASE2 <37> 6262_VSUM 1 2
<4,10,21> H_DPRSTP# CLK_EN# PHASE2 6262_LGATE2 <37>
R265 0R2J-2-GP 30
CPU_VID3 6262_VID3 6262_CLKEN# LGATE2
4 5 <22> CLK_EN# 1 2 PGND2 29
CPU_VID2 3 6 6262_VID2 R270 0R2J-2-GP 13 23 6262_ISEN2 1 2
VDIFF ISEN2 6262_ISENP
CPU_VID1 2 7 6262_VID1 R277 R253 10KR3F-L-GP
CPU_VID0 1 8 6262_VID0 1 2 6262_VDIFF ISL6262ACRZ-T-GP-U
1
1KR2F-3-GP 6262_FB212
<5> CPU_VID[0..6] SRN0J-5-GP FB2
C451 25 6262_AGND C426
RN56
SRN0J-6-GP 6262_FB U35 NC#25 R283
2 1 1 2 11 FB
2
R281 6262_OCSET
SCD22U10V3KX-2GP
RN60 8 1 2 1 2 6262_ISENN2
CPU_VID4 6262_VID4 255R2F-L-GP SC1KP50V2KX-1GP OCSET8 R235 1R3F-GP
1 4
CPU_VID5 2 3 6262_VID5 R274 10 19 6262_VSUM 13K7R2F-GP
COMP VSUM 6262_ISEN1
1 2 1 2
1
CPU_VID6 1 2 6262_VID6 1KR2F-3-GP R249 DY 10KR3F-L-GP
1
R254 0R2J-2-GP 9 18 6262_VO R266
VW VO
1
1 R288 2 1 2 C436 C437 R262 2K61R3F-GP
DROOP
97K6R2F-GP SC470P50V2KX-3GP 11KR2F-L-GP
VSEN
RTN
DFB
SCD22U10V2KX-1GP
SCD047U10V2KX-2GP
C449 C461
1 2
1 2 6262_COMP
2
15
14
16
17
SC220P50V2KX-3GP 1 2 R464
R293 6K81R2F-1-GP NTC-10K-9-GP
C457
6262_VSEN
6262_DROOP
6262_RTN
6262_DFB
1 2 6262_VW
2
B
SC1KP50V2KX-1GP
1 2
Place close to phase 1 chocke
<5> VSS_SENSE 0R3-0-U-GP
R279
1
1
C441 R271 C439
SCD01U25V2KX-3GP 1KR3F-GP SCD22U10V2KX-1GP
2
2
<5> VCC_SENSE 1 2
2
R298 0R3-0-U-GP R273
1 2 6262_AGND
1
C456
C454 3K24R3F-1-GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP G12
2
1 2 6262_VO 1 2
C447 SC180P50V2JN-1GP GAP-CLOSE-PW R

When test without cpu, 6262_AGND
R33 & R34 change to 0 ohms
6262_AGND 6262_AGND
A <Core Design>
Wistron Corpo
Title
VCC_CORE-1
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
DCBATOUT
1
C394 C395 C396 C402
SCD1U25V3KX-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
2
2
5
6
7
8
D
D
D
D
D
Id=13A
BSC079N03S-GP
U25
Iomax=47A
G
S
S
S
Qg=10~14nC Panasonic ETQP4LR36WFC
4
3
2
1
Rdson=9.4~12mohm 10*11.5*4mm VCC_CORE_S0
0.34uH / 24A
<36> 6262_UGATE1 L35 DCR=1.1mohm
<36> 6262_PHASE1 1 2
<36> 6262_LGATE1 IND-D36UH-10-GP
1
TC11 TC9 TC15 TC6 C376
SCD1U50V3ZY-GP
SE330U2VDM-6-GP
SE330U2VDM-6-GP
SE330U2VDM-6-GP
SE330U2VDM-6-GP
2
2
5
6
7
8
5
6
7
8
2
D DY
D
D
D
D
D
D
D
U27 U28 G11 G10
FDS6676AS-GP FDS6676AS-GP GAP-CLOSE-PW R GAP-CLOSE-PW R
1
Id=14.5A
Qg=25~35nC
G
S
S
S
G
S
S
S
6262_ISENN1 <36>
Rdson=5.9~7.25mohm
4
3
2
1
4
3
2
1
6262_ISENP1 <36>
C PANASONIC
330uF / 2V / V size
ESR=6mohm / Iripple=3.7A
DCBATOUT
1
C398 C397 C399 C400 C404
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
2
2
5
6
7
8
DY
D
D
D
D
Id=13A BSC079N03S-GP
Qg=10~14nC U26
G
S
S
S
Rdson=9.4~12mohm Panasonic ETQP4LR36WFC

4
3
2
1
10*11.5*4mm
0.34uH / 24A
<36> 6262_UGATE2 L34 DCR=1.1mohm
B
<36> 6262_PHASE2 1 2
<36> 6262_LGATE2 IND-D36UH-10-GP
1
TC14 TC7
SE330U2VDM-6-GP
2
2
5
6
7
8
5
6
7
8
2 DY
SE330U2VDM-6-GP
D
D
D
D
D
D
D
D
U29 U30 G8 G9
FDS6676AS-GP FDS6676AS-GP GAP-CLOSE-PW R GAP-CLOSE-PW R
1
Id=14.5A
G
S
S
S
G
S
S
S
Qg=25~35nC
4
3
2
1
4
3
2
1
Rdson=5.9~7.25mohm
If VCC_SENSE and VSS_SENSE pins have pulled

<36> 6262_ISENP2 resistors to VCC_CORE_S0
<36> 6262_ISENN2
==> Remove R44/R45/R46/R47.
A <Core Design>
Wistron Corpo
Title
VCC_CORE_2
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
DCBATOUT
C16
1
C12 C11
5
6
7
8
D
D
D
D
SCD1U50V3ZY-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
U3
2
AO4468-GP
51120_V5FILT
Id=9.2A
Qg=9~12nC,
5V Iomax=6A
G
S
S
S
D Rdson=17.4~22mohm
4
3
2
1
R14 OCP>10A
5V_AUX_S5 1 2
5D1R3F-GP 51120_DRVH1 5V_S5
L1
1
C22 51120_LL1 1 2
SC1U10V3KX-3GP
2
IND-3D3UH-57GP
5
6
7
8
D
D
D
D
U2
1
SCD1U50V3ZY-GP 0R3-0-U-GP AO4712-GP
DCBATOUT
1
C26 C21 R18
51120_LL2 1 2 51120_VBST2_1 1 R24 2 51120_VBST2 SC33P50V2JN-3GP 30KR2F-GP C38 TC2
2
ST220U6D3VDML1GP
SCD1U10V2KX-4GP
DY DY
2
Id=9.6A DY
G
S
S
S
2
1
SCD1U50V3ZY-GP C15 0R3-0-U-GP
Qg=18~nC,
4
3
2
1
51120_LL1 1 2 51120_VBST1_1 1 R9 2 51120_VBST1 C580 51120_VFB1
SCD1U50V3ZY-GP Rdson=13.5~16.5mohm
1
5V_AUX_S5 51120_V5FILT
Kemet 220uF, V sizE
51120_DRVL1 R17
7K5R2F-1-GP Iripple=2A, ESR=25mohm
DY
SC10U10V5KX-2GP
3D3V_AUX_S5 51120_COMP2 1 R25 2
2
1
0R3-0-U-GP
C17 51120_COMP1 1 R11 2
SC10U10V5KX-2GP
1
0R3-0-U-GP
2
C25
3D3V_S0
19
21
28
13
20
22
2
7
2
C U4
VREG3
VREG5
VBST1
VBST2
COMP2
COMP1
VIN
V5FILT
1
R1
10KR2J-3-GP
29 15 51120_LL2 DY DCBATOUT
<45> 5V_S5_EN EN1 LL2
12 26 51120_LL1
<45> 3D3V_S5_EN EN2 LL1
2
TP1 1TPAD28 10 0R2J-2-GP
TP2 EN3
1TPAD28 9 EN5
TPS51120RHBR-GPU1 R8
R21 30 51120_PGOOD1 1 2 C20
PGOOD1 CPUCORE_ON <36,39,42,45>
1
1 2 51120_VFB2 6 11 51120_PGOOD2 1 2 C13 C18
VFB2 PGOOD2
SCD1U50V3ZY-GP
5
6
7
8
51120_V5FILT 10R3-0-U-GP2 51120_VFB1 3 VFB1
R2 0R2J-2-GP
D
D
D
D
SC10U25V6KX-1GP
SC10U25V6KX-1GP
0R3-0-U-GP 25 51120_DRVL1 U6
DRVL1
2
R16 5V_S5 1 16 51120_DRVL2 AO4468-GP
3D3V_S5 VO1 DRVL2
8 VO2
DRVH1 27 51120_DRVH1 Id=9.2A
51120_VREF2 4 14 51120_DRVH2
VREF2 DRVH2 Qg=9~12nC,
G
S
S
S
SKIPSEL
Rdson=17.4~22mohm
TONSEL
3D3V Iomax=6A
PGND1
PGND2
4
3
2
1
1
GND
GND
CS1
CS2
C23
SC1000P50V2JN-GP OCP>10A
2
74.51120.073 51120_DRVH2
24
17
5
33
23
18
51120_SKIPSEL 32
31
3D3V_S5
L2
51120_LL2 1 2
51120_TONSEL 1 R7 2 51120_VREF2 IND-2D2UH-46-GP
5
6
7
8
0R2J-2-GP
B
D
D
D
D
U5
AO4712-GP
1
Id=9.6A
2
51120_V5FILT OCP Qg=18~nC,

C24
SC33P50V2JN-3GP
R19 C581 TC1
ST220U6D3VDML1GP
SCD1U10V2KX-4GP
R6 30K9R3F-GP
R375
2
0R2J-2-GP Rdson=13.5~16.5mohm DY DY DY
G
S
S
S
1 2 51120_CS1
4
3
2
1
2
16KR2F-GP
1
R26 51120_VFB2
1 2 51120_CS2 51120_DRVL2 Kemet 220uF, V sizE
1
16KR2F-GP
R20 Iripple=2A, ESR=25mohm
51120_COMP1 13K3R2F-L1-GP
DY
1
2
Pin GND VREF2 FLOAT V5FILT R10
22KR2J-GP
1
Current Mode
DY
C19
Vout=1V*(R1+R2)/R2
1 2
COMP N/A N/A (apply R-C D-CAP. Mode SC390P50V3JN-GP

2
network)
DY C14
TONSEL SC1KP25V3MX-GP
2
(CH1/CH2) 380 / 580 280 / 430 220 / 330 180 / 270

[kHz]
DY
For TPS51120,
VFB1 5V fixed output Vout=5V
A
Adjustable output (connect to the resistor divider) 51120_COMP2 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm. <Core Design>
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm.
1
3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm.

Wistron Corpo
VFB2 Adjustable output (connect to the resistor divider) 3.3 V fixed output R23
22KR2J-GP Vout=3.3V
1
AUTO-SKIP 21F, 88, Sec.1, Hsin Tai W u Rd.,

SKIPSEL AUTO-SKIP (FAULTS OFF) PWM PWM C27
DY 1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm. Taipei Hsien 221, Taiwan, R.O.C.
1 2
SC390P50V3JN-GP 2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm.
2
Title
DY 3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm.
TPS51120 5V / 3D3V
EN1, EN2 Switcher Off Not used Switcher on Switcher on C28
SC1KP25V3MX-GP
2

DY A3
Anote2.0 INTEL
EN3, EN5 LDO Off Not used LDO on LDO on (EN3 only)

5 4 3 2 1
A B C D E
DCBATOUT
2
DCBATOUT
R127 Id=13A
0R2J-2-GP
Qg=10~14nC
5V_S0 Rdson=9.4~12mohm
C622
1
1 2
4
1
SCD1U25V3KX-GP C595 C54
C63
2
3D3V_S0
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
5
6
7
8
U14
D
D
D
D
AO4468-GP
R126
10KR2J-3-GP
R91 C144
Iomax=12A
DY
OCP>16A
1
6268_2_BOOT+ 1
G
S
S
S
1 2 2
2D2R2J-GP
4
3
2
1
U19 SCD1U25V3KX-GP
Cyntec
6268_2_PHASE 1 16 6268_2_UG
PHASE UG D9 Irating=20A, Isat=38A
<36,38,42,45> CPUCORE_ON
DY
2 PGOOD BOOT 15 6268_2_BOOT 1 2 DCR=2.7mohm 1D05V_S0
5V_S0 1R136 2
2D2R2J-GP 6268_2_VIN 3 14 C106 CH751H-40PT L29
C180 VIN PVCC
1 2 1 2
2 1 6268_2_VCC 4 13 6268_2_LG
VCC LG SC2D2U16V3KX-GP COIL-D82UH-2-GP
SC2D2U16V3KX-GP
DY
<45> 1D05V_S0_EN 5 EN PGND 12 R88
5
6
7
8
U13 TC22 C95 TC24
1
D
D
D
D
1 R133 2 6268_2_COMP 6 COMP ISEN 11 6268_2_ISEN 1 2 DY
2
86K6R2F-GP C177 C99
2
SC4D7P50V2CN-1GP 6268_2_FB7 6K2R2F-GP
FDS6676AS-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
FB VO 10
2
OCP setting
SCD1U10V2KX-4GP
3 1 2
SC10U25V6KX-1GP
1
8 9 6268_2_FSET
GND FSET
1
C178 SC470P50V2KX-3GP
G
S
S
S
4
3
2
1
1
2
ISL6268CAZ-T-GP
R89 C109
75KR2F-GP SC1000P50V2JN-GP
1
2
Id=14.5A
Qg=25~35nC
Rdson=5.9~7.25mohm
R121
1 2
3K01R2F-3-GP
1
R129
3K92R2F-GP
2
Rds(on):5.9~7.25mohms
Inductor ripple
current:(19V-1V)*(1/19)*3.33uS/1.5uH=2.10A
2 If OCP=16A
Risen=[16A+(2.1/2)]*(7.5mOhm*1.3)/26uA=6.18K
1 <Core Design>
Wistron Corpo
Title
1D05V_S0_ISL6268
A3
Anote2.0 INTEL
A B C D E
5 4 3 2 1
TI TPS51116 for 1D8V and 0D9V

5V_S5
2
D 3D3R3J-L-GP
R510
1D8V_S3
1
TIS5116_V5IN
1
1
C748
C740 SC4D7U10V5ZY-3GP
2
SC10U6D3V5MX-3GP 0D9V/2A , OCP >3A
2
DY TPS51116PW PR-GP
DDR_VREF_S3 U66
0D9V_S3
1D8V_S3 1 20 TPS51116_VBST1 1 2TPS51116_VBST
VLDOIN VBST TPS51116_UGT R503 0R3-0-U-GP
0D9V_S3 2 VTT DRVH 19
3 18 TPS51116_PHS
DDR_VREF_S3 VTTGND LL TPS51116_LGT
4 VTTSNS DRVL 17 1 2 C743
5 16 R307 SC10U6D3V5MX-3GP
GND PGND
1
6 15 TPS51116_CS 2 1 3D3V_S5
C482 DDR_VREF_S3 MODE CS 100KR2J-1-GP
7 VTTREF V5IN 14
SCD033U16V2KX-GP TIS5116_V5IN 8 13 1 2 C746
COMP PGOOD 1D8V_S3_PG
2
9 12 SC10U6D3V5MX-3GP
VDDQSNS S5
10 11 PM_SLP_S5# <22,31,55>
GND
VDDQSET S3
1 2 PM_SLP_S3# <22,45>
R574 1 2 C749
21
0R2J-2-GP SCD1U16V2ZY-2GP
C
R306
1D8V_S3
TPS51116_CS 1 2
15KR2F-GP
1 2
C481 SC1KP50V2KX-1GP
DCBATOUT
1
C471 C470 C729
SCD1U50V3ZY-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
State S3 S5 VDDR VTTREF VTT Id=9.2A
2
5
6
7
8
Qg=9~12nC,
D
D
D
D
S0 Hi Hi On On On U62
Rdson=17.4~22mohm AO4468-GP
S3 Lo Hi On On Off(Hi-Z)
S4/S5 Lo Lo Off Off Off
1D8V/6A , OCP >10A
G
S
S
S
Panasonic 220uF ESR=25mohm
4
3
2
1
B TPS51116_UGT Iripple=1.8A 1D8V_S3
TPS51116_VBST 1 2 TPS51116_PHS 1 2
L39
C744 IND-2D2UH-46-GP
SCD1U25V3KX-GP CYNTEC 0603 DY
18mohm/8A
5
6
7
8
1
D
D
D
D
Id=9.6A U65 TC28 C722
SE220U2D5VDM-5GP
AO4712-GP
Qg=18~nC,
SCD1U16V2ZY-2GP
Rdson=13.5~16.5mohm
G
S
S
S
AOS/17mOhm
4
3
2
1
@4.5V/Qg=16nQ
TPS51116_LGT
A <Core Design>
Wistron Corpo
Title
TPS51116 1D8V/0D9V
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
reserve for cost down
D DCBATOUT
2
R65
0R2J-2-GP
1
DCBATOUT
C74
1 2
5V_S0
SCD1U25V3KX-GP
1
5V_S0
1
C86 C89
C92
SCD1U25V3KX-GP
2
2
3D3V_S0
SC10U25V6KX-1GP
SC10U25V6KX-1GP
2
5
6
7
8
D
D
D
D
U17
2
AO4406-1-GP
C
R56
2D2R2J-GP
R63
10KR2J-3-GP
C80
Iomax=15A
1R61 6268_BOOT+ OCP>21A
G
S
S
S
2 1 2
1
2D2R2J-GP
4
3
2
1
U12 SCD1U25V3KX-GP
Cyntec
6268_PHASE 1 16 6268_UG
PHASE UG D6 Irating=20A, Isat=38A
DY
6268_PGOOD 2 PGOOD BOOT 15 6268_BOOT 1 2 DCR=2.7mohm VCCGFXCORE
L31
6268_VIN 3 14 C68 CH751H-40PT
C65 VIN PVCC
1 2 1 2
2 1 6268_VCC 4 13 6268_LG IND-D88UH-GP
VCC LG SC2D2U16V3KX-GP
SC2D2U16V3KX-GP 5 12
<45> VCCGFXCORE_EN EN PGND
5
6
7
8
1
D
D
D
D
1 R53 2 6268_COMP 6
COMP ISEN 11 6268_ISEN R50 1 2 3K9R2F-GP U16 C629 TC3 TC4 C231
2
150KR2F-L-GP C59 AO4456-GP
SCD1U10V2KX-4GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SC10U25V6KX-1GP
SC4D7P50V2CN-1GP 6268_FB 7 10 DY DY
FB VO
2
1 2 OCP setting
1
8 9 6268_FSET
C56 SC470P50V2KX-3GP GND FSET
G
S
S
S
4
3
2
1
1
2
ISL6268CAZ-T-GP
R48 C51
75KR2F-GP SC1000P50V2JN-GP
1
2
B
Id=50A
Qg=26 ~24nC,
Rdson=3.9 ~ 4.9mohm
Low : Vout=1.000V R46
High : Vout=1.2V 1 2
3K01R2F-3-GP
1
R49 R47
4K42R2F-GP 9K31R2F-GP
Rds(on):4.9mOhms
Inductor ripple
2
current:(19V-1V)*(1/19)*3.33uS/0.88uH=3.58A
D
If OCP=21A
Risen=[21A+(3.58/2)]*(4.9mOhm*1.3)/26uA=5.58K~5.62K
3
Q4
R40
2N7002PT-U
GFXCORE_SW 1 DY 2 1
G
1KR2J-1-GP
Vref=0.6V
2
1
C44 S
R42 Vo1=(1+Rtop/Rbottom)*0.6V=1.01V
SCD1U10V2KX-4GP
DY
10KR2J-3-GP
R13//R14=3K
2
DY
Vo2=[1+R9/(R13//R14)]*0.6V=1.2V
2
A <Core Design>
Wistron Corpo
Vo_Select Hi Lo 21F, 88, Sec.1, Hsin Tai W u Rd.,
Vout 1.2V 1.01V Title

DC/DC VCCGFXCORE(ISL6268)
A3
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
VGA 1.2V Power

5V_S0
1D8V_S3
1D5V_NB
1
C215
3D3V_S0
SC1U6D3V2KX-GP
2
1
DIS C190
1
C198
PS: SB del
SC1U6D3V2KX-GP
R146 SC10U10V5ZY-1GP
2
D 1KR2J-1-GP DIS DIS DIS
DIS U21
Iomax=1.6A
6
APL5913-KAC-1-GP
VCNTL
7 5 1D2V_S0
1D2V_S0_PG POK VIN
VIN 9
<45> 1D2V_S0_EN 8 EN VOUT 3

VOUT 4
1
R108 C142 C167 C166
R134 DIS 1D2V_S0
1KR2F-3-GP
SC330P50V3JN-GP
SC22U6D3V6KX-1GP
SC22U6D3V6KX-1GP
10KR2J-3-GP 2
GND
FB
2
DIS DIS DIS DIS
2 only for DISCRETE
2
1
1
R109
2KR2F-3-GP
DIS
Add 10K PL for
2
solve EN pin issue
Vo=0.8*(1+(R1/R2))
C 1D25V_S0
Iomax=2.0A 1D5V_SB 5V_S0 1D8V_S3
5V_S0 1D5V_SB_S0
1
1
1
C473 C734 C732
C453 C728 C742 SC1U10V3ZY-6GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2
SC1U10V3ZY-6GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP
DY
2
2
DY
U64
6
U61
6
Vo(cal.)=1.252V OCP=4A R301
VCNTL
<36,38,39,45> CPUCORE_ON 1 2 7 5 1D5V_SB_S0
VCNTL
1D25V_S0 0R2J-2-GP POK VIN

<36,38,39,45> CPUCORE_ON 1 2 7 POK VIN 5 VIN 9
R280 0R2J-2-GP 9
VIN
<45> 1D5V_SB_S0_EN 8 EN VOUT 3
<45> 1D25V_S0_EN 8 EN VOUT 3 VOUT 4
VOUT 4 Vo=0.8*(1+(R1/R2))
1
Vo=0.8*(1+(R1/R2)) C730
1
C725 R486 TC30 TC18
1KR2F-3-GP
2
GND
R286 TC29 FB
ST100U4VBM-11-GP
ST100U4VBM-11-GP
2
SCD01U16V2KX-3GP
GND
FB
2
1K13R2F-1-GP ST100U4VBM-11-GP
DY
SCD01U16V2KX-3GP
2
KEMET APL5912-KAC-GP
2
APL5913-KAC-1-GP
100uF, 4V, B2 Size SO-8-P
1
B
SO-8-P
Iripple=1.1A, ESR=70mohm
1
R485
1
R278 1K13R2F-1-GP
2KR3F-L-GP
KEMET
2
5V_S0
100uF, 4V, B2 Siz
2
Iripple=1.1A, ESR
3D3V_S0
1
C104
3D3V_S0
SC1U6D3V2KX-GP
DIS
2
C105 C114
1
DIS DIS
SC1U6D3V2KX-GP
SC4D7U10V5ZY-3GP
R81
2
1KR2J-1-GP
U15
6
APL5913-KAC-1-GP
2D5V_S0
2
VCNTL
2D5V_S0_PG 7 POK VIN 5

DIS VIN 9 2D5V_S0
2D5V_S0
8 3
<45> 2D5V_S0_EN EN VOUT
VOUT 4 only for DISCRETE
1
R82 C97 C107

R79 DIS DIS
SC330P50V3JN-GP
SC22U6D3V6KX-1GP
10KR2J-3-GP
10K2R2F-GP
2
GND
FB
2
A DIS DIS <Core Design>

2
2
1
DIS Wistron Corpo

1
R78
Vo=0.8*(1+(R1/R2)) 21F, 88, Sec.1, Hsin Tai W u Rd.,
4K7R2F-GP Taipei Hsien 221, Taiwan, R.O.C.
Add 10K PL for R428 =8K ,Vout= 1.8V Title
solve EN pin issue
2
R428 =4.7K ,Vout= 2.5V 1D2V_VGA/2D5V/1D25V/1D5V LDO

DIS
Anote2.0 INTEL
5 4 3 2 1
D2 DY
2 1
SSM34PT DCBATOUT
AD+ U45 R5
8 D S 1 U47
7 D S 2 AD+_TO_SYS 1 2 1 S D 8
6 D S 3 2 S D 7
5 D G 4 3 S D 6
D02R2512F-2-GP
1
4 G D 5
C564 AO4433-GP C592
1
SCD1U50V3ZY-GP
DY AO4433-GP
SCD1U50V3ZY-GP
2
2
2
1
C5 C48
G1 G2
For EMI SCD1
2
SC1U50V5ZY-1-GP GAP-CLOSE
GAP-CLOSE
2
1
1
C569
SCD015U50V3KX-GP
ISL6255_CSIN_1
1
R401
220R3J-1-GP
ISL6255_BGATE
2
1
R399 C611
2R3J-2-GP 1 2 DCBATOUT
SCD1U50V3ZY-GP
BSS84LT1G-GP
SC10U35V0ZY-GP
SC10U35V0ZY-GP
SCD1U50V3ZY-GP
1 2
5
6
7
8
1
R84 U53
C618
C625
C626
ISL6255_SGATE
5V_AUX_S5
D
D
D
D
C609 10KR2F-2-GP
6262_CSOP
ISL6255_CSIN
ISL6255_CSIP
D
ISL6255_VDD
1
SC1U50V5ZY-1-GP C612
AO4468-GP
2
SCD1U50V3ZY-GP
DY
2
ISL6255_UGATE
2
G Q17
G
S
S
S
2
3
U51 G6
4
3
2
1
S
1
G7 GAP-CLOSE
21
20
19
18
17
16
15
1
R408D8 GAP-CLOSE BT
R387
1
R86 2D2R3J-2-GP
CSIN
CSOP
CSIP
SGATE
BGATE
PHASE
UGATE
100KR2J-1-GP SCD1U50V3ZY-GP BAT54-4-GP CHG_PW R-2 1 2 CHG_PW R-3 1 2
C610 L30
R87
1
1 2 22 CSON BOOT 14 IND-10UH-119-GP D02R2512F-2-GP
2
1
1 2ISL6255_VDD
R93 0R0402-PAD 2R3J-2-GP R85
AC_IN# 1 2 ISL6255_ACPRN# 23 13 C616 2D2R3J-2-GP
<55> AC_IN# ACPRN VDDP
ISL6255HRZ-1-GP ISL6255_VDDP 1 2 DY
1
24 12 ISL6255_LGATE SC1U10V3ZY-6GP C591 C597
DCPRN LGATE
Near ISL6255 Pin 13
5
6
7
8
1
U52
SC10U25V0KX-3GP
SC10U25V0KX-3GP
2
2
D
D
D
D
25 11 ISL6255_VREF C129
DCIN PGND SC1000P50V2JN-GP
AO4468-GP
2
2
AD+ DY
1
ISL6255_VDD 26 10 R421
294KR3F-1-GP R431
VDD GND R419
14K7R2F-L-GP
R417 DY
G
S
S
S
20KR3F-GP
1 2ISL6255_ACSET 27 ACSET VADJ 9
4
3
2
1
SC1U10V3ZY-6GP
2
1
ACSET Threshold 1.27V typ. 200KR2F-L-GP

R418 28 8
ACSET > 1.29V Max. --> AC 15K4R2F-GP DCSET ACLIM
VADJ Cell voltage
DETECT
1
29 GND
2
1
C617 VREF 4.41V/cell
R432 R415 C130
VCOMP
ICOMP
CELLS
CHLIM
2
Near ISL6255 23K7R3F-1-GP 20KR3F-GP SC2700P50V3KX-1GP

VREF
2
ICM
DY DY Float 4.20V/cell
EN
Pin 26
2
1
ISL6255_VDD
SC680P50V2KX-2GP GND 3.99V/cell
C619
R423 1 2 D
100KR2J-1-GP Q10
2N7002PT-U
3
1 2 ISL6255_EN ISL6255_CHLIM ISOURCE_MAX = (((ACLIM/VREF)*0.05+0.05)/R
1
SC6800P25V2KX-1GP
C620
Adaptor is 65W/19V : I_LIMIT = 2.9A ( 85%

2
ISL6255_ICM ISL6255_VREF
R429 1 ACLIM_90W <55>
2
100KR2J-1-GP
D G
1
ISL6255_VCOMP
2
ISL6255_VDD
3
R428
65W Adaptor : ACLIM_90W =
1
1
Q18 10KR2J-3-GP R427 S
1
100R2F-L1-GP-U R425
19K6R3F-GP
90W Adaptor : ACLIM_90W =
2N7002PT-U
<55> CHG_ON#
2
G
2
3D3V_S5
1
ICHG:3S3P = 5A (CHG_3S2P= Low )

SCD01U16V2KX-3GP
INPUT CURRENT MONITOR <55>

2
R106 R104
SC100P50V2JN-3GP
R100 R90
1
150KR2J-GP S 100KR2J-1-GP ICHG:3S2P = 3.36A(CHG_3S2P= High)

C621
C623
DY DY C624
SCD1U16V2ZY-2GP
1 2 1 2
IPRE_CHG = 280mA
<Core Design>
2
2
1
34KR3F-GP 1KR3F-1-N6-GP D
2
R122 D D
3
CELLS Operate Mode 100KR2J-1-GP DY R426
Wistron Corp
3
100KR3F-GP Q8
Q11 R105 Q9 21F, 88, Sec.1, Hsin Tai W u R
2
VDD 4S 100KR2J-1-GP 1 Taipei Hsien 221, Taiwan, R.O

2N7002PT-U
PRE_CHG <55>
1
1 DY 1
2N7002PT-U
2N7002PT-U
<55> CHG_3S_4S# <55> CHG_3S2P G

G G Title
2
GND 3S
CHARGER ISL6225
2
S
S S Size Document Number
Float 2S
Anote2.0 INTEL
A B C D E
AD_DATA 2
R12
1
0R3-0-U-GP
ACDC_ID <55> 65W Adaptor : ACLIM_90W = LOW
K
1
C816
90W Adaptor : ACLIM_90W = HIGH
EMI SC1000P50V2JN-GP D4
2
CN13 UCLAMP3301D-GP AD+
DY
Adaptor in to generate DCBATOUT
A
GND 1
4
POWER 2 1 R575 2 0R6J-3-GP
3 U1
DATA AD_IN AD_JK
POWER 4 1 R576 2 0R6J-3-GP 1 S D 8
1
5 2 S D 7 C8
GND S D SCD1U50V3ZY-GP
GND 6 3 6
K
7 AD+_2 4 G D 5
GND
2
1
D13
SC1U50V5ZY-1-GP
C815 P4SSMJ24PT-GP AO4433-GP
1
SKT-JACK-201-GP 2 SCD1U50V3ZY-GP R374
C9
100KR2J-1-GP
A
1
22.10037.D51
EMI
2
R2
E
B R1
C
Lab1 22.10037.B41
1
OUT PDTA124EU-1-GP
Lab2 22.10037.D51 Q16 R371
3
56KR3F-GP
3
R1
2
R2
Q1
CHDTC124EU-1GP
3D3V_AUX_S5
BATTERY CONNECTO
1
2
GND
IN
<55> AD_OFF
2
1
D16
R15 BAV99PT-GP-U D15
1KR2J-1-GP DY BAV99PT-GP-U CN17
DY 8
1
2
3
2
1 2 BATA_SCL_1 3
<55> BAT_SCL
1 2 R379 27R3F-GP BATA_SDA_1 4
<55> BAT_SDA
<55,57> BAT_IN# R380 27R3F-GP 5
2 6
BT+ 1 R577 20R6J-3-GP BAT_VCC_IN 7
<57> AD_IN
C50 C590 C589 9
<57> AD_DATA
1 R578 20R6J-3-GP
SC270P50V2JN-2GP
SC270P50V2JN-2GP
SC270P50V2JN-2GP
1
1
C821 SYN-CO
20.80
SCD1U50V3ZY-GP
2
2
<57> BATA_SCL_1
<57> BATA_SDA_1
<55,57> BAT_IN#
<57> BAT_VCC_IN
<Core Design>
1
Wistron Corpora
Title
AD/BATT CONN
Anote2.0 INTEL
A B C D E
R139
1 2 1D05V_S0_EN <39>
R27
1
0R2J-2-GP
<24> PWR_S5_EN 1 2 5V_S5_EN <38> C176
SCD01U25V2KX-3GP
2
0R2J-2-GP R276
DY
PM_SLP_S3_1# 1 2 1D25V_S0_EN <42>
1
0R2J-2-GP
R22
C445
1 2 SCD1U16V2ZY-2GP
3D3V_S5_EN <38>
2
R300
DY
0R2J-2-GP
1 2 1D5V_SB_S0_EN <42>
1
0R2J-2-GP
3D3V_S5 C469
SCD1U16V2ZY-2GP
U67
2
R45 DY
<22,40> PM_SLP_S3# 1 8
1A VCC
2 7 PM_SLP_S3_1# <24,55> 1 2 VCCGFXCORE_EN <41>
PM_SLP_S3_2# 1B 1Y
3
2Y 2B
6 DIS
1
4 5 PM_SLP_S3#
GND 2A 2KR2-GP C52
SSLVC2G08DC-GP SCD01U25V2KX-3GP
2
R135 DIS
PM_SLP_S3_2# 1 2 1D2V_S0_EN <42>
DIS
1
3D3V_S0 2KR2-GP C191
SCD01U25V2KX-3GP
2
DIS
1
R513
4K7R2J-2-GP
D21
<24> HW_THRM_SHDN# 1
2
3 1 2 CPUCORE_ON <36,38,39,42> R75
PM_SLP_S3_2# 2 R258 0R2J-2-GP 1 2 2D5V_S0_EN <42>
1
0R2J-2-GP
CHP222PT-U
1
C91
C753 SCD1U16V2ZY-2GP
2
SCD1U10V2KX-4GP
DY
2
Run Power 5V_S5 5V_S0

1D8V_S3 1D8V_S0
U7 Q19
8 D S 1
7 D S 2 1 6
6 D S 3
5 D G 4
DCBATOUT Q5
2 5
TP0610K-T1-GP AO4468-GP
R44
1 2 Z_12V 2 3 RUN_PWR_CTLR R440 1 2 10KR2J-3-GP 3 4
S
DIS
D
1
C43
15KR2J-1-GP D5 FDC655BN-GP
1
3D3V_S0
1
R37 RLZ12B-1-GP 3D3V_S5 DIS
SCD1U25V3KX-GP
2
330KR2J-L1-GP C641
G
1 2 DY DY SCD01U25V2KX-3GP
2
2
R43 330KR2J-L1-GP DIS
U8
1
8 D S 1
R41 7 D S 2
1KR2J-1-GP 6 D S 3
5 D G 4
2
AO4468-GP
Q3
<31> PM_SLP_S3_2# 1
D
IN R1
PM_SLP_S3#_Z12V
R2
3
3
OUT
2 Q2
2N7002PT-U
GND
CHDTC124EU-1GP 1
G
2
<Core Design>
Wistron Corporation
Title
PWRPLANE&RESET LOGIC
C
Anote2.0 INTEL SC
5 4 3 2 1
U54A PLACE NEAR BALLS PLACE NEAR GPU

1/12
PEX_IOVDD AB10 1D2V_S0
PEX_IOVDD AB11
AB14
PEX_IOVDD
1
AB15 C189 C188 C187 C186 C169
PEX_IOVDD SC4D7U6D3V3KX-GP
W17
PEX_IOVDD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
PEX_IOVDD
W18 DIS
2
5V_S0 AB20
PEX_IOVDD
AB21
PEX_IOVDD
DIS
14
10
R58 DIS
0R2J-2-GP
R57
5K1R2F-2-GP
DIS DIS DIS DIS
<10,20,29,31,35,58> PLT_RST1# 1 2 9 8 1 2
U11C
1
D TSAHCT125PW-GP D
7
R59 DIS PLACE NEAR BALLS
10KR2J-3-GP
DIS PEX_IOVDDQ
AA4 1D2V_S0
PEX_IOVDDQ AB5
2
PEX_IOVDDQ AB6
1
PEX_IOVDDQ AB7
AB8 C175 C173
PEX_IOVDDQ SC4D7U6D3V3KX-GP SC10U10V5ZY-1GP
PEX_IOVDDQ AB9
2
PEX_IOVDDQ AC9 DIS DIS
AC11
PEX_RST# PEX_IOVDDQ
AC6 AB12
PEX_RST# PEX_IOVDDQ
AC12
PEX_IOVDDQ
AF13
PEX_TSTCLK_OUT
AF14 AB13
PEX_TSTCLK_OUT# PEX_IOVDDQ
PEX_IOVDDQ AB16
<3> CLK_PCIE_GFX AE3 PEX_REFCLK PEX_IOVDDQ AC16
<3> CLK_PCIE_GFX# AE4 PEX_REFCLK# PEX_IOVDDQ AB17
PEX_IOVDDQ AC17
PEG_RXP0 C225 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXP0 AD5 AB18
PEG_RXN0 C224 1 PEG_C_RXN0 PEX_TX0 PEX_IOVDDQ
PEG_TXN[15..0]
DIS2 SCD1U10V2KX-4GP AD6
PEX_TX0# PEX_IOVDDQ
AB19
<11> PEG_TXN[15..0] AC19
PEG_TXP0 PEX_IOVDDQ
AF1 AC20
PEG_TXP[15..0] PEG_TXN0 PEX_RX0 PEX_IOVDDQ
<11> PEG_TXP[15..0] AG2
PEX_RX0#
PEG_RXN[15..0] PEG_RXP1 C223 1 PEG_C_RXP1
<11> PEG_RXN[15..0]
PEG_RXN1 C222 1
DIS2 SCD1U10V2KX-4GP
PEG_C_RXN1
AE6
PEX_TX1
PEG_RXP[15..0]
DIS2 SCD1U10V2KX-4GP AE7
PEX_TX1# VDD
J9 VCCGFXCORE
<11> PEG_RXP[15..0] M9
PEG_TXP1 VDD
AG3 PEX_RX1
1
PEG_TXN1 AG4 R9 C152 C131 C137 C138
PEX_RX1# VDD C153
VDD T9
SCD1U10V2KX-4GP
SCD47U10V2KX-GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD47U10V2KX-GP
PEG_RXP2 C219 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXP2 AD7 J10
PEX_TX2 VDD
2
PEG_RXN2 C218 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXN2 AC7 J11 DIS DIS DIS DIS DIS
PEX_TX2# VDD
M11
PEG_TXP2 VDD
AF4 N11
PEG_TXN2 PEX_RX2 VDD
AF5 R11
PEX_RX2# VDD
T11
PEG_RXP3 C248 1 PEG_C_RXP3 VDD
C
PEG_RXN3 C251 1
PEG_C_RXN3
AE9
PEX_TX3 VDD
L12 C
PEX_TX3# VDD
M12
T12
VDD
1
PEG_TXP3 AG6 U12 C139 C147 C171 C154
AG7 PEX_RX3# VDD L13
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VDD M13
2
PEG_RXP4 C210 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXP4 AD10 T13 DIS DIS DIS DIS
PEG_RXN4 C209 1 PEG_C_RXN4 PEX_TX4 VDD
DIS2 SCD1U10V2KX-4GP AC10 PEX_TX4# VDD U13
PEG_TXP4 AF7 W13
PEX_RX4 VDD
PEG_TXN4 AF8
PEX_RX4# VDD
M14 PLACE NEAR BALLS
VDD T14
PEG_RXP5 C237 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXP5 AE12 L15
PEX_TX5# VDD
M15
T15
PEG_TXP5 VDD
AG9 U15
AG10 W15
PEX_RX5# VDD
L16
PEG_RXP6 C207 1 PEG_C_RXP6 VDD
PEG_RXN6 C206 1
PEG_C_RXN6
AD13
PEX_TX6 VDD
M16
DIS2 SCD1U10V2KX-4GP AC13
PEX_TX6# VDD
T16
U16
PEG_TXP6 VDD
AF10 W16
AF11 M17
PEX_RX6# VDD
VDD N17
PEG_RXP7 C234 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXP7 AC15 R17
DIS2 SCD1U10V2KX-4GP AD15 PEX_TX7# VDD T17
PEG_TXP7 AG12 W9
PEG_TXN7 PEX_RX7 VDD_LP
AG13 W10
PEX_RX7# VDD_LP
W11
PEG_RXP8 C220 1 PEG_C_RXP8 VDD_LP
PEG_RXN8 C221 1
PEG_C_RXN8
AE15
PEX_TX8 VDD_LP
W12
PEX_TX8# 3D3V_S0
PEG_TXP8 AG15
PEG_TXN8 PEX_RX8
AG16 J12
PEX_RX8# VDD33
F13
PEG_RXP9 C242 1 PEG_C_RXP9 VDD33
DIS2 SCD1U10V2KX-4GP AC18 PEX_TX9 VDD33 J13
1
B PEG_RXN9 C243 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXN9 AD18 F14 C135 C71 C111 B
PEX_TX9# VDD33 SCD1U10V2KX-4GP SC1U6D3V2KX-GP SCD022U16V2KX-3GP
J15
PEG_TXP9 VDD33
AF16
PEX_RX9 VDD33
J16 DIS DIS DIS
2
PEG_TXN9 AF17
PEX_RX9#
PEG_RXP10C204 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXP10 AE18
PEX_TX10 PLACE NEAR GPU
PEG_RXN10C203 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXN10 AE19
PEX_TX10#
PEG_TXP10 AG18 1D2V_S0
PEX_RX10 L7
PEG_TXN10 AG19
PEX_RX10# NV_PLLAVDD
N9 1 2
PEG_RXP11C240 1 PEG_C_RXP11 NV_PLLAVDD
PEG_RXN11C241 1
DIS2 SCD1U10V2KX-4GP PEG_C_RXN11
AC21 PEX_TX11
DIS2 SCD1U10V2KX-4GP AD21 PEX_TX11#
BLM18AG151SN-1GP
1
PEG_TXP11 C143 C132
DIS
AF19
PEG_TXN11 PEX_RX11 SCD1U10V2KX-4GP SCD01U25V2KX-3GP
AF20
PEX_RX11#
2
PEG_RXP12C217 1 PEG_C_RXP12
DIS DIS 1D2V_S0
PEG_RXN12C216 1
DIS2 SCD1U10V2KX-4GP PEG_C_RXN12
AE21
PEX_TX12
PEX_TX12# L10
PEG_TXP12 AG21 PEX_PLLVDD 2 1
PEG_TXN12 PEX_RX12
AG22
PEX_RX12# COIL-10NH-GP
DIS
1
1
PEG_RXP13C238 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXP13 AD22 Y6
PEG_RXN13C239 1 PEG_C_RXN13 PEX_TX13 PEX_PLLAVDD
DIS2 SCD1U10V2KX-4GP AD23 PEX_TX13# PEX_PLLDVDD AA5 C185
SC1U6D3V2KX-GP
C183
SCD01U25V2KX-3GP
C184 C197
SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP
2
2
PEG_TXP13 AF22 DIS DIS DIS DIS
PEG_TXN13 PEX_RX13
AF23
PEX_RX13#
PEG_RXP14C212 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXP14 AF25
PEG_RXN14C213 1 PEG_C_RXN14 PEX_TX14
PEX_TX14#
PEX_PLLGND
AA6 PLACE NEAR BALLS PLACE NEAR GPU
PEG_TXP14 AG24
PEG_TXN14 PEX_RX14
AG25
PEX_RX14#
PEG_RXP15C245 1 DIS2 SCD1U10V2KX-4GP PEG_C_RXP15 AE24
PEG_RXN15C244 1 PEG_C_RXN15 PEX_TX15
A
DIS2 SCD1U10V2KX-4GP AD24 PEX_TX15# NC#D12 D12
A
NC#E12 E12
PEG_TXP15 AG26 F12
PEG_TXN15 PEX_RX15 NC#F12
AF27 PEX_RX15# NC#C13 C13
<Core Design>
G72M-V-GP
DIS 71.0G72M.B0U
Wistron Corporation
Title
G72M PCIE
Anote2.0 INTEL SC
5 4 3 2 1
5 4 3 2 1
3D3V_S0
2
L13
BLM18BB221SN1D-GP
DIS U54C DIS
3/12
DIS R69 33R2J-2-GP
I2CA_SCL D10 I2CA_SCL 1 2 NV_DDC_CLK <17>
1
DACA_VDD AE2 E10 I2CA_SDA 1 2
DACA_VDD I2CA_SDA NV_DDC_DATA <17>
D DIS R68 33R2J-2-GP
DACA_VREF AB4 DACA_VREF
1
C208 C200 AD4 NV_HSYNC <17>
SC4700P50V2KX-1GP SCD01U25V2KX-3GP DACA_RSET DACA_HSYNC
AD3 DACA_RSET DACA_VSYNC AC4 NV_VSYNC <17>
DIS DIS
1
R144 AE1 NV_RED <17>
130R2F-1-GP DACA_RED
DACA_GREEN AD1 NV_GREEN <17>
2
DACA_BLUE AD2 NV_BLUE <17>
3D3V_S0
1
U9 R437 R436 R435
DACA_IDUMP 150R2F-1-GP 150R2F-1-GP 150R2F-1-GP
2
L4 G72M-V-GP
DIS DIS DIS 50 ohm trace to filter
2
BLM18BB221SN1D-GP 37.5 ohm trace to 150R resistor
DIS U54D DIS
4/12 CLOSE TO G72
I2CB_SCL F9
1
DACB_VDD F8 DACB_VDD
I2CB_SDA F10
DACB_VREF E7 DACB_VREF
1
1
C90 C96
SC1U10V2KX-1GP DACB_RSET
SCD01U25V2KX-3GP
D6 DACB_RSET DACB_HSYNC E6
DIS DACB_VSYNC F5
2
1
DIS R404
124R2F-U-GP F4
DACB_RED NV_CRMA <18>
DIS
DACB_GREEN E4 NV_LUMA <18>
2
D5 NV_COMP
DACB_BLUE
2
C
L9 R80 R77 R406
DACB_IDUMP 150R2F-1-GP 150R2F-1-GP 75R2F-2-GP
G72M-V-GP
DIS DIS DIS
1
2D5V_S0
CLOSE TO G72
U54J DIS
10/12
L5 1 2DISP_PLLVDD BLM18BB221SN1D-GP H4 PLLVDD

DIS
1
C93 C112
SC4D7U6D3V3KX-GP SC4700P50V2KX-1GP H5 PLLGND
DIS DIS
2
<3> VGA_27M_SS C1 XTALSSIN XTALOUTBUFF C3

R384
1
R409 <3> VGA_27M 1 2 B1 C2 XTALOUT

150R2F-1-GP XTALIN XTALOUT
DIS 255R2F-L-GP
DIS G72M-V-GP
2
R385 X4 DY
150R2F-1-GP 10MIL_G2G_20MIL
DIS 1 4
U54L DIS
2
C604 12/12
SC18P50V2JN-1-GP 10MIL_G2G_20MIL M5 IFPCD_VPROBE IFPC_
DY 2 3 IFPC
2
1
C605
B XTAL-27MHZ-16-GP SC22P50V2JN-4GP
IFPC_
DY IFPC
2
G72_PLLVDD M4 IFPCD_PLLVDD
J3 IFPCD_RSET
IFPC_
1
U54E DIS
TP10 IFPC
5/12 R103
1 N6 N5 10KR2J-3-GP
IFPAB_VPROBE IFPA_TXD0# NV_TXAOUT0- <19>
IFPA_TXD0 N4 NV_TXAOUT0+ <19>
TPAD28
2
2D5V_S0 R4 M6
IFPA_TXD1# NV_TXAOUT1- <19> IFPCD_PLLGND
IFPA_TXD1 R5 NV_TXAOUT1+ <19>
L9 1 2 BLM18BB221SN1D-GP IFPABPLLVDD V5 IFPAB_PLLVDD
DIS U6 IFPAB_RSET IFPA_TXD2# T6 NV_TXAOUT2- <19>
IFPA_TXD2 T5 NV_TXAOUT2+ <19> IFPC
1
C162 C156
SC1U10V2KX-1GP SC470P50V2KX-3GP R117 IFPC
DIS DIS 1KR2F-3-GP P6

IFPA_TXD3#
2
DIS IFPA_TXD3 R6
G72_IFPC_IOVDD L4 IFPC_IOVDD
2
V6 IFPAB_PLLGND
1
IFPB_TXD4# W2 NV_TXBOUT0- <19>
W3 NV_TXBOUT0+ <19> R101 G72M-V-GP
IFPB_TXD4 10KR2J-3-GP
IFPB_TXD5# AA3 NV_TXBOUT1- <19>
2
1D8V_S0 AA2
IFPB_TXD5 NV_TXBOUT1+ <19>
L32 1 2 BLM18BB221SN1D-GP IFPAIOVDD W4 AA1 NV_TXBOUT2- <19>

IFPA_IOVDD IFPB_TXD6#
DIS IFPB_TXD6 AB1 NV_TXBOUT2+ <19>
1
C627 Y4
SC4700P50V2KX-1GP IFPB_IOVDD
A
IFPB_TXD7# AB2
2
DIS IFPB_TXD7 AB3
<Core Design>
IFPA_TXC# U4 NV_TXACLK- <19>
IFPA_TXC T4 NV_TXACLK+ <19>
Wistron Co
21F, 88, Sec.1, Hsin Tai W
IFPB_TXC# W6 NV_TXBCLK- <19>
W5 Taipei Hsien 221, Taiwan, R
IFPB_TXC NV_TXBCLK+ <19>
Title
G72M-V-GP G72M CRT & TV OUT
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
D D
U48 FBAD[63..0]
FBAD[63..0] FBAD[63..0] <49,51>
U49 FBA_BA0 L2 B9 FBAD31
FBAD[63..0] <49,51> <49,51> FBA_BA0 BA0 DQ15
FBA_BA0 L2 B9 FBAD15 FBA_BA1 L3 B1 FBAD30
<49,51> FBA_BA0 BA0 DQ15 FBA_A[12..0] <49,51> FBA_BA1 BA1 DQ14
FBA_BA1 L3 B1 FBAD14 D9 FBAD29
FBA_A[12..0] <49,51> FBA_BA1 BA1 DQ14
D9 FBAD13
<49,51> FBA_A[12..0]
FBA_A12 R2
DQ13
D1 FBAD28
<49,51> FBA_A[12..0] DQ13 A12 DQ12
FBA_A12 R2 D1 FBAD12 FBA_A11 P7 D3 FBAD27
FBA_A11 A12 DQ12 FBAD11 FBA_A10 A11 DQ11 FBAD26
P7 A11 DQ11 D3 M2 A10/AP DQ10 D7
FBA_A10 M2 D7 FBAD10 FBA_A9 P3 C2 FBAD25
FBA_A9 A10/AP DQ10 FBAD9 FBA_A8 A9 DQ9 FBAD24
P3 A9 DQ9 C2 P8 A8 DQ8 C8
FBA_A8 P8 C8 FBAD8 FBA_A7 P2 F9 FBAD23
P2 A7 DQ7 F9 N7 A6 DQ6 F1
FBA_A6 N7 F1 FBAD6 FBA_A5 N3 H9 FBAD21
N3 A5 DQ5 H9 N8 A4 DQ4 H1
FBA_A4 N8 H1 FBAD4 FBA_A3 N2 H3 FBAD19
N2 A3 DQ3 H3 M7 A2 DQ2 H7
R54 120R2F-GP FBA_A2 M7 H7 FBAD2 FBA_A1 M3 G2 FBAD17
FBACLK0 FBACLK0# FBA_A1 A2 DQ2 FBAD1 FBA_A0 A1 DQ1 FBAD16
1 2 M3 A1 DQ1 G2 M8 A0 DQ0 G8
FBA_A0 FBAD0 1D8V_S0
DIS M8 A0 DQ0 G8
1D8V_S0
FBACLK0# K8 A9
<51> FBACLK0# CK VDDQ1
* "Place the K8 A9 FBACLK0 J8 C1
<51> FBACLK0# CK VDDQ1 <51> FBACLK0 CK VDDQ2
<51> FBACLK0 J8 C1 C3
differential CK VDDQ2
C3 FBA_CKE K2
VDDQ3
C7
VDDQ3 <49,51> FBA_CKE CKE VDDQ4
termination FBA_CKE K2 C7 C9
<49,51> FBA_CKE CKE VDDQ4 VDDQ5
R381 C9 E9
resistor at the 2 1 10KR2J-3-GP VDDQ5
E9
VDDQ6
G1
VDDQ6 VDDQ7
end of the DIS VDDQ7 G1 <49,51> FBA_CS0#
FBA_CS0# L8 CS VDDQ8 G3
C FBA_CS0# L8 G3 G7 C
transmission <49,51> FBA_CS0# CS VDDQ8
G7 FBA_WE# K3
VDDQ9
G9
VDDQ9 <49,51> FBA_WE# WE VDDQ10
line" <49,51> FBA_WE#
FBA_WE# K3 WE VDDQ10 G9
FBA_RAS# K7 A1
<49,51> FBA_RAS# RAS VDD1
FBA_RAS# K7 A1 E1
<49,51> FBA_RAS# RAS VDD1 VDD2
E1 FBA_CAS# L7 J9
VDD2 <49,51> FBA_CAS# CAS VDD3
FBA_CAS# L7 J9 M9
<49,51> FBA_CAS# CAS VDD3 VDD4
VDD4 M9 <51> FBADQM2 F3 LDM VDD5 R1
<51> FBADQM0 F3 LDM VDD5 R1 <51> FBADQM3 B3 UDM
<51> FBADQM1 B3 UDM VDDL J1
VDDL J1 VSSDL J7
J7 ODT K9
VSSDL <49,51> ODT ODT
ODT K9
<49,51> ODT ODT
<51> FBADQSP2 F7 LDQS

1D8V_S0 F7 E8 A7
<51> FBADQSP0 LDQS <51> FBADQSN2 LDQS VSSQ1
<51> FBADQSN0 E8 LDQS VSSQ1 A7 VSSQ2 B2
VSSQ2 B2 VSSQ3 B8
VSSQ3 B8 VSSQ4 D2
1
VSSQ4 D2 <51> FBADQSP3 B7 UDQS VSSQ5 D8

R382 B7 D8 A8 E7
<51> FBADQSP1 UDQS VSSQ5 <51> FBADQSN3 UDQS VSSQ6
1KR2F-3-GP A8 E7 F2
<51> FBADQSN1 UDQS VSSQ6 VSSQ7
DIS VSSQ7 F2
FBAREF0 VSSQ8 F8
VSSQ8 F8 J2 VREF VSSQ9 H2
2
FBAREF0 J2 H2 H8
VREF VSSQ9 VSSQ10
VSSQ10 H8 A2 NC#A2
1
1
A2 NC#A2 E2 NC#E2 VSS1 A3
1
R383 E2 A3 C58 L1 E3
1KR2F-3-GP C594 NC#E2 VSS1 SCD047U16V2ZY-1GP NC#L1 VSS2
L1 NC#L1 VSS2 E3 R3 NC#R3 VSS3 J3
2
SCD047U16V2ZY-1GP
DIS R3 NC#R3 VSS3 J3 DIS R7 NC#R7 VSS4 N1
2
DIS R7 NC#R7 VSS4 N1 R8 NC#R8 VSS5 P9

2
R8 NC#R8 VSS5 P9
HY5PS561621A-25GP
HY5PS561621A-25GP
B B
72.55616.C0U
72.55616.C0U
DIS
DIS
72.51216.D0U IC VRAM HY5PS121621BFP-25 FBGA(32M*16, 400Mhz)

Decoupling for left MEMORY 72.55616.C0U IC VRAM HY5PS561621AFP-25 FBGAby Hynix (16M*16, 400Mhz)
72.18512.A0U IC VRAM HY5PS121621BFP-25 FBGA by Infineon (32M*16, 400Mhz)
Place around the MEM Decoupling for right MEMORY 72.18256.B0U IC VRAM HYB18T256161AFL25 BGA, by Infineon(16M*16, 400Mhz)
1D8V_S0 1D8V_S0 Place around the MEM
1
1
C588 C47 C600 C586 C57 C61 C66 C70 C72 C76 C596 C77 C55 C67 C69 C46 C49 C62 C593 C45
SC4D7U6D3V3KX-GP
SCD1U16V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SC100P50V2JN-3GP
SC1KP50V2KX-1GP
SC4700P50V2KX-1GP
SC4D7U6D3V3KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SC100P50V2JN-3GP
SC4700P50V2KX-1GP
SC470P50V2KX-3GP
2
2
DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
A A
<Core Design>
Wistron Corporation
Title
G72M VRAM (1ST 1/2)
Anote2.0 INTEL SC
5 4 3 2 1
5 4 3 2 1
FBA_A[12..0] FBA_A[12..0]
<48,51> FBA_A[12..0] <48,51> FBA_A[12..0]
FBA_A12 FBA_A12
FBA_A11 FBA_A11
FBA_A10 FBA_A10
FBA_A9 FBA_A9
FBA_A8 FBA_A8
FBA_A7 FBA_A7
FBA_A6 FBA_A6
FBA_A1 FBA_A1
FBA_A0 FBA_A0
D D
U55 FBAD[63..0]
FBAD[63..0] FBAD[63..0] <48,51>
U50 FBA_BA0 L2 B9 FBAD63
FBAD[63..0] <48,51> <48,51> FBA_BA0 BA0 DQ15
FBA_BA0 L2 B9 FBAD55 FBA_BA1 L3 B1 FBAD62
<48,51> FBA_BA0 BA0 DQ15 <48,51> FBA_BA1 BA1 DQ14
FBA_BA1 L3 B1 FBAD54 D9 FBAD61
<48,51> FBA_BA1 BA1 DQ14 DQ13
D9 FBAD53 FBA_A12 R2 D1 FBAD60
FBA_A12 DQ13 FBAD52 FBA_A11 A12 DQ12 FBAD59
R2 A12 DQ12 D1 P7 A11 DQ11 D3
FBA_A11 P7 D3 FBAD51 FBA_A10 M2 D7 FBAD58
FBA_A10 A11 DQ11 FBAD50 FBA_A9 A10/AP DQ10 FBAD57
M2 A10/AP DQ10 D7 P3 A9 DQ9 C2
FBA_A9 P3 C2 FBAD49 FBA_A8 P8 C8 FBAD56
P8 A8 DQ8 C8 P2 A7 DQ7 F9
FBA_A7 P2 F9 FBAD39 FBB_A[5..2] FBA_A6 N7 F1 FBAD46
FBB_A[5..2] A7 DQ7 <51> FBB_A[5..2] A6 DQ6
FBA_A6 N7 F1 FBAD38 FBB_A5 N3 H9 FBAD45
<51> FBB_A[5..2] A6 DQ6 A5 DQ5
FBB_A5 N3 H9 FBAD37 FBB_A4 N8 H1 FBAD44
for G72M use 120 ohms FBB_A4 A5 DQ5 FBAD36 FBB_A3 A4 DQ4 FBAD43
N8 A4 DQ4 H1 N2 A3 DQ3 H3
for G73M use 480 ohms FBB_A3 N2 H3 FBAD35 FBB_A2 M7 H7 FBAD42
FBB_A2 A3 DQ3 FBAD34 FBA_A1 A2 DQ2 FBAD41
M7 A2 DQ2 H7 M3 A1 DQ1 G2
FBA_A1 M3 G2 FBAD33 FBA_A0 M8 G8 FBAD40
R110 120R2F-GP FBA_A0 A1 DQ1 FBAD32 A0 DQ0 1D8V_S0
M8 A0 DQ0 G8
FBACLK1 1 2 FBACLK1# 1D8V_S0
DIS FBACLK1# K8 A9
<51> FBACLK1# CK VDDQ1
FBACLK1# K8 A9 FBACLK1 J8 C1
<51> FBACLK1# CK VDDQ1 <51> FBACLK1 CK VDDQ2
FBACLK1 J8 C1 C3
<51> FBACLK1 CK VDDQ2 VDDQ3
* "Place the C3 FBA_CKE K2 C7
VDDQ3 <48,51> FBA_CKE CKE VDDQ4
FBA_CKE K2 C7 C9
differential <48,51> FBA_CKE CKE VDDQ4 VDDQ5
VDDQ5 C9 VDDQ6 E9
termination VDDQ6 E9 VDDQ7 G1
G1 FBA_CS0# L8 G3
resistor at the VDDQ7 <48,51> FBA_CS0# CS VDDQ8
FBA_CS0# L8 G3 G7
<48,51> FBA_CS0# CS VDDQ8 VDDQ9
end of the G7 FBA_WE# K3 G9
VDDQ9 <48,51> FBA_WE# WE VDDQ10
FBA_WE# K3 G9
transmission <48,51> FBA_WE# WE VDDQ10 FBA_RAS# K7 A1
<48,51> FBA_RAS# RAS VDD1
line" <48,51> FBA_RAS#
FBA_RAS# K7 RAS VDD1 A1 VDD2 E1
C E1 FBA_CAS# L7 J9 C
VDD2 <48,51> FBA_CAS# CAS VDD3
FBA_CAS# L7 J9 M9
<48,51> FBA_CAS# CAS VDD3 VDD4
VDD4 M9 <51> FBADQM5 F3 LDM VDD5 R1
<51> FBADQM4 F3 LDM VDD5 R1 <51> FBADQM7 B3 UDM
<51> FBADQM6 B3 UDM VDDL J1
VDDL J1 VSSDL J7
J7 ODT K9
VSSDL <48,51> ODT ODT
ODT K9
<48,51> ODT ODT
<51> FBADQSP5 F7 LDQS

1D8V_S0 F7 E8 A7
<51> FBADQSP4 LDQS <51> FBADQSN5 LDQS VSSQ1
<51> FBADQSN4 E8 LDQS VSSQ1 A7 VSSQ2 B2
VSSQ2 B2 VSSQ3 B8
VSSQ3 B8 VSSQ4 D2
1
VSSQ4 D2 <51> FBADQSP7 B7 UDQS VSSQ5 D8

R439 B7 D8 A8 E7
<51> FBADQSP6 UDQS VSSQ5 <51> FBADQSN7 UDQS VSSQ6
1KR2F-3-GP A8 E7 F2
<51> FBADQSN6 UDQS VSSQ6 VSSQ7
DIS VSSQ7 F2
FBAREF1 VSSQ8 F8
VSSQ8 F8 J2 VREF VSSQ9 H2
2
FBAREF1 J2 H2 H8
VREF VSSQ9 VSSQ10
1
VSSQ10 H8 A2 NC#A2
1
A2 C631 E2 A3
NC#A2 NC#E2 VSS1
1
R438 E2 A3 SCD047U16V2ZY-1GP L1 E3
NC#E2 VSS1 NC#L1 VSS2
2
1KR2F-3-GP C110 L1 E3 DIS R3 J3
SCD047U16V2ZY-1GP NC#L1 VSS2 NC#R3 VSS3
DIS R3 NC#R3 VSS3 J3 R7 NC#R7 VSS4 N1
2
DIS R7 NC#R7 VSS4 N1 R8 NC#R8 VSS5 P9

2
R8 NC#R8 VSS5 P9
HY5PS561621A-25GP
HY5PS561621A-25GP
72.55616.C0U
72.55616.C0U
DIS
B
DIS B
Decoupling for left MEMORY

1D8V_S0 Place around the MEM
1
1
C607 C101 C603 C128 C608 C126 C103 C127 C102 C125 C100
SCD1U16V2KX-3GP SCD1U16V2KX-3GP SC4D7U6D3V3KX-GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD1U16V2KX-3GP SC100P50V2JN-3GP SC470P50V2KX-3GP SC4700P50V2KX-1GP
DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
2
2
Decoupling for right MEMORY
1D8V_S0 Place around the MEM
1
C640 C632 C163 C194 C195 C164 C192 C160 C193 C161
SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP
DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
2
A A
<Core Design>
Wistron Corporation
Title
G72M VRAM (1ST 2/2)
Anote2.0 INTEL SC
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_S0
U54I U54H
9/12 8/12
G2 MIOB_D0 A2 MIOA_D0 <52>
MIOBD0 MIOB_D0 <52> NC#A2
K5 G3 MIOB_D1 F6 B3
MIOB_VDDQ MIOBD1 MIOB_D1 <52> NC#F6 NC#B3 MIOA_D1 <52>
D K6 MIOB_VDDQ MIOBD2 J2 G6 NC#G6 NC#A3 A3 D
L6 J1 MIOB_D3 J6 D4
MIOB_VDDQ MIOBD3 MIOB_D3 <52> NC#J6 NC#D4
K4 MIOB_D4 A4
MIOBD4 MIOB_D4 <52> NC#A4
1
K1 MIOB_D5 C119 B4
MIOBD5 MIOB_D5 <52> NC#B4
U54K M2 SC1U6D3V2KX-GP B6
MIOBD6 NC#B6 MIOA_D6 <52>
11/12
MIOBD7 M1 DIS NC#P4 P4
2
N1 MIOB_D8 C6
MIOBD8 MIOB_D8 <52> NC#C6 MIOA_D8 <52>
B2 N2 MIOB_D9 G5
GND MIOBD9 MIOB_D9 <52> NC#G5 MIOA_D9 <52>
E2 GND MIOBD10 N3 NC#V4 V4
H2 R3 MIOB_D11
GND MIOBD11 MIOB_D11 <52>
L2 GND
P2 GND
U2 GND
Y2 GND
AC2 GND
AF2 GND
AF3 GND J5 MIOBCAL_PD_VDDQ
B5 GND
E5 GND M3 MIOBCAL_PU_GND
L5 GND
P5 GND
U5 GND
Y5 GND J4 MIOB_VREF MIOB_VSYNC F1 NC#C4 C4
AC5 GND MIOB_HSYNC G4
1
H6 GND MIOB_DE G1
AF6 F2 R398
GND MIOB_CTL3 10KR2J-3-GP
B8 GND DY
E8 GND MIOB_CLKOUT K2
2
AD8 GND MIOB_CLKOUT# K3
K9 GND MIOB_CLKIN R2
P9 GND
1
V9 GND
AD9 G72M-V-GP R111
GND 10KR2J-3-GP G72M-V-GP
AF9 GND DIS
C B11 GND DY DIS C
E11 GND
2
F11 GND
L11 GND
P11 GND
U11 GND
AD11 GND
N12 GND
P12 GND
R12 U54G
GND
AD12 GND
AF12 7/12 D1
GND ROMCS#
N13 GND ROM_SI F3
P13 GND ROM_SO D3
R13 GND ROM_SCLK D2
B14 GND
E14 GND
J14 GND
L14 GND I2CH_SCL C7
N14 GND I2CH_SDA B7
P14 GND
R14 GND
U14 3D3V_S0
GND
W14 GND
AC14 GND BUFRST# A6
AD14 GND
N15 GND STEREO F7
4
3
P15 GND
R15 RN2 A7
GND SWAPRDY
AF15 GND SRN2K2J-1-GP
N16 U54F DY
GND 6/12 TESTMODE
P16 GND TESTMODE D7
CLAMP D11
CHECK I2C FOR LCD
1
2
R16 GND
1
B AD16 GND I2CC_SCL R390 1
DIS GND AC8 B
B17 GND <24> NV_THERMDC C9 THERMDN I2CC_SCL E9 2 33R2J-2-GP LDDC_CLK <11,19>
R71
E17 D8 I2CC_SDA R389 1 2 33R2J-2-GP G72M-V-GP 10KR2J-3-GP
GND I2CC_SDA LDDC_DATA <11,19>
L17 GND DIS DIS DIS
P17 GND <24> NV_THERMDA B9 THERMDP
2
U17
AD17
GND
GND
GPIO0
GPIO1
A9
D9 Check
AF18 GND AE27 JTAG_TCK GPIO2 A10
K19 GND AD26 JTAG_TMS GPIO3 B10 LCDVDD_EN <11,19>
P19 GND AD27 JTAG_TDI GPIO4 C10 BLON_IN <11,55>
V19 GND AE26 JTAG_TDO GPIO5 C12
1
AD19 GND AD25 JTAG_TRST# GPIO6 B12
B20 A12 R397 R70
GND GPIO7
1
E20 A13 R67 2 1 2K2R2J-2-GP 3D3V_S0 10KR2J-3-GP 100KR2J-1-GP

GND R140 R141 GPIO8 VGA_THERM_SHDN#
AD20 GND 10KR2J-3-GP 10KR2J-3-GP GPIO9 B13 DIS DIS
AF21 B15
GND GPIO10 DIS
2
B23 DY DIS A15 TP84 TPAD28
GND GPIO11
E23 GND GPIO12 B16
2
H23 GND G72M-V-GP

L23 GND DIS
P23 GND
U23 GND
Y23 GND
AC23 GND
AF24 GND
B26 GND
E26 GND
H26 GND
L26 GND
P26 GND
U26 GND
Y26 GND
AC26 GND
AF26 GND
A A
G72M-V-GP
DIS <Core Design>
Wistron Corporation
Title
G72M ROM & Spread Specturm
Anote2.0 INTEL SC
5 4 3 2 1
5 4 3 2 1
U54B
FBAD[63..0] 2/12 PLACE BELOW GPU 1D8V_S0
<48,49> FBAD[63..0]
FBAD0 A26 E15
FBAD1 FBAD0 FBVTT
C24 FBAD1 FBVTT F15
FBAD2 B24 F16
FBAD3 FBAD2 FBVTT
A24 FBAD3 FBVTT J17
1
FBAD4 C22 J18
FBAD5 FBAD4 FBVTT C113 C158 C145 C108 TC23 TC21
A25 FBAD5 FBVTT L19
FBAD6 B25 N19 SCD1U10V2KX-4GP SC4700P50V2KX-1GP SCD1U10V2KX-4GP SC1U10V2KX-1GP ST100U4VBM-11-GP ST100U4VBM-11-
FBAD6 FBVTT
2
FBAD7 D23 R19 DIS DIS DIS DIS DIS DIS
FBAD8 FBAD7 FBVTT
G22 FBAD8 FBVTT U19
FBAD9 J23 W19
FBAD10 FBAD9 FBVTT
E24 FBAD10
D FBAD11 F23
FBAD12 FBAD11
J24 FBAD12
FBAD13 F24 FBAD13
1
FBAD14 G23
FBAD15 FBAD14 C134 C146 C155 C172 C124
H24 FBAD15
FBAD16 D16 SCD022U16V2KX-3GP SC1U10V2KX-1GP SCD022U16V2KX-3GP SC4700P50V2KX-1GP SC1U10V2KX-1GP
FBAD16
2
FBAD17 E16 DIS DIS DIS DIS DIS
FBAD18 FBAD17
D17 FBAD18
FBAD19 F18
FBAD20 FBAD19
E19 FBAD20
FBAD21 E18
FBAD22 FBAD21
D20 FBAD22 FBVDDQ F17
FBAD23 D19 F19
FBAD24 FBAD23 FBVDDQ
A18 FBAD24 FBVDDQ J19
FBAD25 B18 M19
A19 FBAD26 FBVDDQ T19
FBAD27 B19 J22
D18 FBAD28 FBVDDQ L22
FBAD29 C19 P22
C16 FBAD30 FBVDDQ U22
FBAD31 C18 Y22
N26 FBAD32
FBAD33 N25
FBAD34 FBAD33
R25 FBAD34
FBAD35 R26
FBAD36 FBAD35
R27 FBAD36
FBAD37 T25
FBAD38 FBAD37
T27 FBAD38
FBAD39 T26
FBAD40 FBAD39
AB23 FBAD40
FBAD41 Y24
FBAD42 FBAD41
AB24 FBAD42
FBAD43 AB22
FBAD44 FBAD43
AC24 FBAD44
FBAD45 AC22
FBAD46 FBAD45
C AA23 FBAD46
FBAD47 AA22
FBAD48 FBAD47
T24 FBAD48
FBAD49 T23
FBAD50 FBAD49
R24 FBAD50
FBAD51 R23 G27 FBA_A3
FBAD52 FBAD51 FBA_CMD0 FBA_A0
R22 FBAD52 FBA_CMD1 D25
FBAD53 T22 F26 FBA_A2
FBAD54 FBAD53 FBA_CMD2 FBA_A1
N23 FBAD54 FBA_CMD3 F25
FBAD55 P24 G25 FBB_A3
FBAD56 FBAD55 FBA_CMD4 FBB_A4
AA24 FBAD56 FBA_CMD5 J25
FBAD57 AA27 J27 FBB_A5
FBAD58 FBAD57 FBA_CMD6 TPAD30 TP9
AA26 FBAD58 FBA_CMD7 M26 1
FBAD59 AB25 C27 FBA_CS0# FBA_A[12..0]
FBAD59 FBA_CMD8 FBA_CS0# <48,49> FBA_A[12..0] <48,49>
FBAD60 AB26 C25 FBA_WE# FBA_A0
FBAD61 FBAD60 FBA_CMD9 FBA_BA0 FBA_WE# <48,49> FBA_A1
AB27 FBAD61 FBA_CMD10 D24 FBA_BA0 <48,49>
FBAD62 AA25 N27 FBA_CKE FBA_A2
FBAD63 FBAD62 FBA_CMD11 ODT FBA_CKE <48,49> FBA_A3
W25 FBAD63 FBA_CMD12 G24
J26 FBB_A2 ODT <48,49> FBA_A4
FBA_CMD13 FBA_A12 FBA_A5
FBA_CMD14 M27
1
FBADQM0 D21 C26 FBA_RAS# FBA_A6
<48> FBADQM0 FBADQM0 FBA_CMD15 FBA_RAS# <48,49>
FBADQM1 F22 M25 FBA_A11 R92 FBA_A7
<48> FBADQM1 FBADQM1 FBA_CMD16
FBADQM2 F20 D26 FBA_A10 10KR2J-3-GP FBA_A8
FBADQM3 A21 D27 FBA_BA1 DIS FBA_A9
<48> FBADQM3 FBADQM3 FBA_CMD18 FBA_BA1 <48,49>
FBADQM4 V27 K26 FBA_A8 FBA_A10
2
FBADQM5 W22 K25 FBA_A9 FBA_A11
FBADQM6 V22 K24 FBA_A6 FBA_A12
FBADQM7 V24 F27 FBA_A5
K27 FBA_A7
FBA_CMD23 FBA_A4
FBA_CMD24 G26 FBB_A[5..2] <49>
FBADQSP0 B22 B27 FBA_CAS# FBB_A2
<48> FBADQSP0 FBADQS_WP0 FBA_CMD25 FBA_CAS# <48,49>
FBADQSP1 D22 N24 FBB_A3
<48> FBADQSP1 FBADQS_WP1 FBA_CMD26
FBADQSP2 E21 FBB_A4
<48> FBADQSP2 FBADQS_WP2
FBADQSP3 C21 FBB_A5
<48> FBADQSP3 FBADQS_WP3
FBADQSP4 V25 L24 FBACLK0
<49> FBADQSP4 FBADQS_WP4 FBA_CLK0 FBACLK0 <48>
B FBADQSP5 W24 K23 FBACLK0#
<49> FBADQSP5 FBADQS_WP5 FBA_CLK0# FBACLK0# <48>
FBADQSP6 U24 M22 FBACLK1
<49> FBADQSP6 FBADQS_WP6 FBA_CLK1 FBACLK1 <49>
FBADQSP7 W26 N22 FBACLK1#
<49> FBADQSP7 FBADQS_WP7 FBA_CLK1# FBACLK1# <49>
FBADQSN0 A22 D15 R66 1 2 40D2R3F-GP 1D8V_S0

<48> FBADQSN0 FBADQS_RN0 FBCAL_PD_VDDQ
FBADQSN1 E22 DIS
<48> FBADQSN1 FBADQS_RN1
FBADQSN2 F21 E13
<48> FBADQSN2 FBADQS_RN2 FBCAL_PU_GND
FBADQSN3 B21
FBADQSN4 V26 H22
<49> FBADQSN4 FBADQS_RN4 FBCAL_TERM_GND
FBADQSN5 W23
1
FBADQSN6 V23
FBADQSN7 W27 R99 R95
<49> FBADQSN7 FBADQS_RN7 60D4R3D-1-GP 30R3F-GP
TPAD30 TP8
DY DIS
FBA_DEBUG K22 1
2
FBA_REFCLK M23
FBA_REFCLK# M24
SB
1D8V_S0 D14 1D2V_S0

FBA_PLLVDD
D13 FBA_PLLAVDD L3 1 2 BLM18BB221SN1D-GP
FBA_PLLAVDD
DIS
1
1
FBA_PLLGND C15
R72 C98 C87
1KR2F-3-GP SCD01U25V2KX-3GP SC4D7U6D3V3KX-GP
2
2
DIS DIS DIS
2
FBVREF1 A16 FB_VREF

PLACE NEAR GPU
1
A
1
R73
C88 1KR2F-3-GP
SCD1U10V2KX-4GP
DIS <Core Design>
2
DIS G72M-V-GP
2
DIS
Wistron Corpor
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsic
Title
G72M MEMORY IF 1
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
D D
STRAPS, Mechanical Parts

Check
3D3V_S0
Bit Signal Values
R76 2KR2-GP DIS
1 2 MIOA_D1
MIOA_D1: SUB_VENDOR 0 NO_BIOS
Hynix256MB : R825_0 R824_1 R822_1 R820_1 1 READ FROM BIOS
Hynix128MB : R825_0 R823_0 R822_1 R820_1 R414 10KR2J-3-GP DY R413 10KR2J-3-GP DIS For MEM strapping, Please use below table:
1 2 MIOB_D0 1 2
Hynix64MB : R826_1 R823_0 R822_1 R820_1 RAM_CFG[9.8.1.0] Config FB Bus Width Definitions
R411 10KR2J-3-GP DY R412 10KR2J-3-GP DIS RAM_CFG[3..0]
C 1 2 MIOB_D1 1 2 C
0000
Infineon256MB : R825_0 R824_1 R822_1 R819_0 R422 10KR2J-3-GP DIS R424 10KR2J-3-GP DY 0001 16Mx16 DDR2 64-bit Samsung
1 2 MIOB_D8 1 2
Infineon128MB : R825_0 R823_0 R822_1 R819_0 0010 16Mx16 DDR2 64-bit Infineon
R433 10KR2J-3-GP DIS R430 10KR2J-3-GP DY 0011 16Mx16 DDR2 64-bit Hynix
Infineon64MB : R826_1 R823_0 R822_1 R819_0 1 2 MIOB_D9 1 2
0100
0101 32Mx16 DDR2 64-bit Samsung
0110 32Mx16 DDR2 64-bit Infineon
0111 32Mx16 DDR2 64-bit Hynix
R94 2KR2-GP DIS

<50> MIOA_D0 MIOA_D0 MIOB_D4 1 2
<50> MIOA_D1 MIOA_D1
<50> MIOA_D6 MIOA_D6 R420 2KR2-GP DIS MIOB_D4: PCI_DEVID_0
<50> MIOA_D8 MIOA_D8 MIOB_D5 1 2
<50> MIOA_D9 MIOA_D9 MIOB_D5: PCI_DEVID_1 1000 (default 0x00FC)
R416 2KR2-GP DIS
MIOB_D3 1 2 MIOB_D3: PCI_DEVID_2
<50> MIOB_D0 MIOB_D0

MIOB_D1 MIOB_D11
R434 2KR2-GP DY MIOB_D11: PCI_DEVID_3 0111 G72MV G72MZ=6,G73=8
<50> MIOB_D1 1 2
B <50> MIOB_D8 MIOB_D8 B
<50> MIOB_D11 MIOB_D11 R74 2KR2-GP DY 0 ENABLED
MIOA_D0 1 2 MIOA_D0: PEX_PLL_EN_TERM100 1 DISABLED
R395 2KR2-GP DIS
MIOA_D6 1 2 MIOA_D6: 3GIO_PADCFG_LUT_ADDR[0]
R396 2KR2-GP DY MIOA_D8: 3GIO_PADCFG_LUT_ADDR[1]
MIOA_D8 1 2
MIOA_D9: 3GIO_PADCFG_LUT_ADDR[2] 001 DEFAULT
R83 2KR2-GP DY
MIOA_D9 1 2
A A
<Core Design>
Wistron Corporation
Title
G72M STRAPPING
Anote2.0 INTEL SC
5 4 3 2 1
5 4 3 2 1
3D3V_S0 VCC3_ACCEL
R539 1 2 47R3J-L1-GP
DY
1
C789 GSENSE_Y <55>
1
C783 SCD1U10V2KX-4GP
2
C786 DY U70
C
E
SCD1U10V2KX-4GP
SC10U6D3V5MX-3GP
GND_ACCEL
14
15
2
2
Q21 DY DY U72 1
1OUT VCC
8 VCC3_ACCEL
PDTA114EE-3-GP-U 2 7
VSS
VSS
1IN- 2OUT
DY 2 10 GSENSE_Y_322 R551 1 2 56KR2J-L1-GP 3 6
R2
ST YOUT 1IN+ 2IN- GSENSE_X <55>
3 DY 4 5
R1
COM GND 2IN+
1
12 GSENSE_X_322
D XOUT D
2
R540
B
4K7R2J-2-GP 5 C798 LM393PWR-GP
COM SCD1U10V2KX-4GP
DY 6
COM DY
1
<55> GSENSE_ON# 7
COM DY
2
1
NC#1
1
1
11
R528 R529 NC#11
4
100KR2J-1-GP 1KR2F-3-GP NC#4 R552
13 1 2 56KR2J-L1-GP
NC#13
DY DY 8
NC#8 DY
9 16
GND
NC#9 NC#16
2
2
C801
<55> GSENSE_TST SCD1U10V2KX-4GP
17
1
ADXL322JCP-GP DY
D24 DY
1 2
1
1
1SS400PT C799 C800

SCD1U10V2KX-4GP SCD1U10V2KX-4GP
DY
2
R533
100KR2J-1-GP
DY DY
DY
2
Stuff Option
RP-1 ADXL322 STMicro No Accel.
GND_ACCEL
R172 ASM ASM NO_ASM
R538
2
R173 ASM ASM NO_ASM
DY RP-1 ADXL322 STMicro No Accel. U9 NO_ASM LIS2L02AL NO_ASM
0R2J-2-GP
1
Q105 ASM ASM NO_ASM
R969 56K 56K NO_ASM
D97 ASM ASM NO_ASM
C C938 ASM ASM NO_ASM C
R956 NO_ASM ASM NO_ASM
A-note 2.0 LED's Location and Sequence R970 56K 56K NO_ASM
R62 ASM ASM NO_ASM
C956 ASM ASM NO_ASM
R885 10 Ohm 10 Ohm NO_ASM
Right side
Left side U66 ADXL322 NO_ASM NO_ASM C829 ASM ASM NO_ASM
WLAN Bluetooth Battery Suspend C170 ASM NO_ASM NO_ASM C969 ASM ASM NO_ASM
C178 ASM NO_ASM NO_ASM R959 ASM ASM NO_ASM
C190 ASM NO_ASM NO_ASM C830 NO_ASM 0.033UF NO_ASM
R31 ASM NO_ASM NO_ASM C847 NO_ASM 0.033UF NO_ASM
Q22 CHDTC124EU-1GP
1 IN CHG_LED1 <55>
R1
3D3V_S5 3
R2
OUT
LED4
1 2 2
R555 100R2F-L1-GP-U
GND
1 3
1 IN CHG_LED2 <55>
2 4
R1
R2
1 2 3
R559 150R2J-L1-GP-U
OUT
LED-GR-6-GP
2 GND
Q24 CHDTC124EU-1GP
1
EC1
SC1000P50V2JN-GP
SC1000P50V2JN-GP
EC2
2
SPI ROM for System & KBC B
1 BLUETOOTH_LED <28,58>
3D3V_S0 R1 IN 3D3V_AUX_S5 3D3V_AUX_S5
CHDTC124EU-1GP
R2
3
Q23
OUT
LED2
1
1 2 1 2 2
R557 150R2J-L1-GP-U C419
GND
2
LED-G-138-GP SCD1U10V2KX-4GP
2
1 2 1 2 R248 R234
R558 100R2F-L1-GP-U 10KR2J-3-GP 10KR2J-3-GP
LED-G-138-GP D25 DY 3D3V_AUX_S5
2 WLAN_LED <29,58> U33
1
LED1 3
R229
1 <55> SPI_CS# 1 8
EC5 EC4 CS# VCC
<55> SPI_MISO 2 7 1 2
SO HOLD#
SC1000P50V2JN-GP
SC1000P50V2JN-GP
1
CHP222PT-U 3 6
WP# SCK
2
<55> SPI_MOSI 4 5 10KR2J-3-GP
Q28 GND SI C427
<55> SPI_CLK
2
1 SCD1U10V2KX-4GP
WLAN_LED_DET <55>
1
R1 IN
R2 MX25L8005M2C-15GGP
3
ver-sc add
OUT
2 GND
3D3V_S5 CHDTC124EU-1GP 1. MXIC MX25L8005M2C

2. WINBOND W25X80
A
1 2 1 2 STBY_LED# <55>
3. SST 8Mbit72.25080.G01 A
R556 100R2F-L1-GP-U
LED-G-138-GP
<Core Design>
LED3
1
83.00190.L70 EC3
SC1000P50V2JN-GP Wistron Corporation
2

Title
G-sensor / SPI / LEDs
C
Anote2.0 INTEL SC
5 4 3 2 1
Internal KeyBoard Connector
4
ROW8 5
6
5V_S0
7
10 KB CONN.
11
12 1 24
13
ROW1
1 2 3 8 9 14 15 16 17 18 19 20 21 22 23 24
1 2
R402 4K7R2J-2-GP
KCOL1 KCOL16
BAW 56W -7-F-GP 3D3V_S0
<55,57> KROW [0..7]
2 CDROM_LED# <25> CN3
2 1 <55,57> KCOL[0..15]
MEDIA_LED# 3 R386 10KR2J-3-GP 25
KROW 1 1
1 SATA_LED# <21>
KCOL15 RC6 1 8 SRC100P50V-2-GP KROW 7 2
D17 KCOL10 KROW 6
2 7 3
KCOL14 3 6 KCOL9 4
KCOL11 4 5 KROW 4 5
KROW 5 6
KCOL12 RC4 1 8 SRC100P50V-2-GP KCOL0 7
KCOL13 2 7 KROW 2 8
Lanuch Board CNN 3D3V_S0 3D3V_S5
KCOL3
KCOL6
3
4
6
5
KROW 3
KCOL5
9
10
<55> EC_PW RBTN# 1 2 PW RBTN# KCOL1 11
R407 470R2J-2-GP KCOL9 RC1 1 8 SRC100P50V-2-GP KROW 0 12
KROW 6 2 7 KCOL2 13
KROW 7 KCOL4
KROW 1
3
4
6
5
SB KCOL7
14
15
1
KCOL8 16
C615 KCOL8 RC2 1 8 SRC100P50V-2-GP KCOL6 17
SCD1U16V2ZY-2GP KCOL7 2 7 KCOL3 18
ACES-CON20-6-GP
2
KCOL2 3 6 KCOL12 19
22 KCOL4 4 5 KCOL13 20
KCOL14 21
Q25 <54> CONFIG ID_002 20 KCOL11 22
<55> PW R_LED 1 19 KCOL10 23
ACCESS_SYS# KCOL15
IN
18 24
R1
<58> ACCESS_SYS#
PW R_LED# PW RBTN# KROW 2 RC3 8 SRC100P50V-2-GP
R2
3 <58> PW RBTN# 17 1 26
VOL_DOW N# KCOL0
OUT
<58> VOL_DOW N# 16 2 7
2 <58> MUTE# MUTE# 15 KROW 5 3 6 ACES-CON24-1-GP
VOL_UP# KROW 4
GND
<58> VOL_UP# 14 4 5
CHDTC124EU-1GP 13 20.K0197.024
<58> PW R_LED# PW R_LED# 12 KROW 0 RC5 1 8 SRC100P50V-2-GP
<28,58> MS_LED# 11 KCOL1 2 7
Q26 <58> MEDIA_LED# MEDIA_LED# 10 KROW 3 3 6
<55> CAPS_LED 1 9 KCOL5 4 5
CAPS_LED#
IN
8
R1
<58> CAPS_LED#
CAPS_LED# NUM_LED#
R2
3 OUT <58> NUM_LED# 7
6
GND 2
CHDTC124EU-1GP
5
4 TouchPad Connector
3
Q27 2
<55> NUM_LED 1
IN R1
1 5V_S0 5V_S0
NUM_LED#
R2
3
LAB2 20.K0204.020
OUT
21
2 CN4
CN2
1
GND
7
CHDTC124EU-1GP 20.K0204.020 R162 R161
10KR2J-3-GP
10KR2J-3-GP
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
3D3V_AUX_S5 3
3D3V_S5 <55,57> TP_DATA
1
C83 C81 4
5
<55,57> TP_CLK 6
2
2
8
1
C256 C257
3D3V_S0
1
SC33P50V2JN-3GP
SC33P50V2JN-3GP
R400 R392 R403 R391 ACES-CON6-5G
2
20.K02
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
F2
Finger Printer CNN 1 2

2
1
FUSE-D5A13D2V-GP C258 C672
SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP
2
2
1 2 MUTE# U24
<55> MUTE_BTN# <57> 3V_FINGER_S0
R394 470R2J-2-GP
<55> VOL_UP_BTN# 1 2 VOL_UP# 1 5
R393 470R2J-2-GP OUT IN
SC10U6D3V5KX-1GP
2 GND
CN5
5
3 NC#3 EN 4 FP_EN <55>
1
<55> VOL_DOW N_BTN# 1 2 VOL_DOW N#
R405 470R2J-2-GP 1 3V_FINGER_S0 C296
1
2 USB_PN7 <22,57> DY G5240B1T1U-GP
2
<55> ACCESS_LENOVO 1 2 ACCESS_SYS# 3 C292
USB_PP7 <22,57> SC1U10V3KX-3GP
R388 470R2J-2-GP 4
DY
2
1
C602 C601
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C613 C598 C472

MLX-CON4-17-GP-U
2
SCD1U16V2ZY-2GP
<Core Design>
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
Wistron Corpora
21F, 88, Sec.1, Hsin Tai W u Rd., Hs
20.K0191.004 Taipei Hsien 221, Taiwan, R.O.C.
ver-3 for EMI
Title
Keyboard /Touch Pad

A3
Anote2.0 INTEL
5 4 3 2 1
3D3V_AUX_S5 3D3V_S0
RN83 RN82 3D3V_S5 3D3V_AU
BAT_SDA 4 1 THER_SDA 4 1 RN84 RN57 RN58
BAT_SCL 3 2 THER_SCL 3 2 S5_ENABLE 8 1 SB_PWR_BTN# 8 1 EC_PWRBTN# 8 1
KBC_MUTE# 7 2 ACLIM_90W 7 2 CHG_ON# 7 2
3D3V_S0 3D3V_AUX_S5 BLUETOOTH_EN 6 3 6 3 LID_CLOSE# 6 3
SRN10KJ-5-GP SRN10KJ-5-GP PCLK_KBC 5 4 PRE_CHG 5 4 ACDC_ID 5 4
R207 1 2 0R2J-2-GP
SRN10KJ-6-GP SRN10KJ-6-GP SRN10KJ-6-GP
D
<20,27,30> PCIRST1# 1 2PLT_RST1#_1

R205 0R2J-2-GP 3D3V_AU
3D3V_S0
1
1
ver-sc modify R473
C403 C407 C406 C720 C409
102
115
SC1U10V3ZY-6GP
SC10U10V5ZY-1GP
SC470P50V2KX-3GP BAT_IN#
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN85 1 2
80
19
46
76
88
2
2
4
DY 1 OF 2 U31A ECSCI# 4 1
INT_SERIRQ 3 2 470KR2J-2-GP
VBAT
VDD
AVCC
VCC
VCC
VCC
VCC
VCC
SRN10KJ-5-GP
<19> USB_CAM_EN 124 LPCPD#/GPIO10/HGPIO00 VREF 104
7
LRESET#
<3> PCLK_KBC
2
3
LCLK A/D AD0/GPI90
97
98
INPUT CURRENT MONITOR <43>
<21,35> LPC_FRAME# LFRAME# AD1/GPI91 TP103 TPAD28
<21,35> LPC_LAD0 1 2 126 99 BAT_IN# <44,57>
LAD0 AD2/GPI92
1
<21,35> LPC_LAD1 1 R585 233R2J-2-GP 127 100 ACDC_ID <44>

R210 LAD1 AD3/GPI93
<21,35> LPC_LAD2 1 R586 233R2J-2-GP 128 108 GSENSE_X <53> AD_OFF R476 1 2 1KR2J-1-GP
LAD2 AD4/GPIO05
0R2J-2-GP
<21,35> LPC_LAD3 1 R587
R588
233R2J-2-GP
33R2J-2-GP
1 LAD3 LPC AD5/GPIO04 96 GSENSE_Y <53> DY
DY <22,27> INT_SERIRQ 125
SERIRQ
<22,27> PM_CLKRUN# 8 CLKRUN#/GPIO11/HGPIO02 <54,57> KCOL[0..15]
2
KBRCIN# 122
C411 KBRST# <54,57> KROW[0..7]
KA20GATE 121 101 PCB_VER0 R462
GA20 DA0/GPI94
1 2PCLK_KBC_RC R562
ECSCI#_1 29 ECSCI# DA1/GPI95 105 PCB_VER1 2 1
DY
1 2
EC_SMI#_1 9
123
SMI# D/A DA2/GPI96
106
107
PCB_VER2
10KR2J-3-GP
<22> EC_SWI# PWUREQ# DA3/GPI97 CRT_IN# <17>
SC4D7P50V2CN-1GP DY
0R2J-2-GP U31B 2 OF 2
<24> THER_SDA 68 64 PM_SLP_S3_1# <24,45>

SDA2 GPIO01
<24> THER_SCL
67
69
SCL2 SMB GPIO03
95
93
EC_PWRBTN# <54> 32KX1 77
32KX1/32KCLKIN KBSOUT0/JENK#
53
52
KCOL0
KCOL1
TP88 TPAD28
<44> BAT_SDA SDA1 GPIO06/HGPIO06 AC_IN# <43> KBSOUT1/TCK TP92 TPAD28
70 94 LID_CLOSE# <19> 51 KCOL2 TP93 TPAD28
<44> BAT_SCL SCL1 GPIO07/HGPIO07 KBSOUT2/TMS KCOL3
GPIO23 119 SB_PWR_BTN# <22> KBSOUT3/TDI 50 TP91 TPAD28
C 32KX2 KCOL4
6 TP98 TPAD28 79 49
LDRQ#/GPIO24/HGPIO01 CONFIG ID_002 32KX2 KBSOUT4 KCOL5
109 NUM_LED <54> 30 48 TP89 TPAD28
GPIO30 CLKOUT/GPIO55 KBSOUT5/TDO
<22,31,40> PM_SLP_S5# 81
SWD/GPIO66 SP GPIO31
120
65
CAPS_LED <54>
INSTANT_ON 63
KBSOUT6/RDY#
47
43
KCOL6
KCOL7
TP90 TPAD28
GPIO32 PWR_LED <54> TPAD28 TP94 TB1/GPIO14/HGPIO04 KBSOUT7
GPIO33
66
16 SB_RSMRST#_1
STBY_LED# <53> <43> CHG_3S_4S# 117
31
TA2/GPIO20 KBC KBSOUT8
42
41
KCOL8
KCOL9
GPIO40 <32> EC_BEEP TA1/GPIO56 KBSOUT9 KCOL10
<43> CHG_3S2P 84 17 AD_OFF <44> 32 40
SPI_DI/GPIO77 GPIO42/TCK TPAD28 TP50 A_PWM0 KBSOUT10
<28,58> BLUETOOTH_EN 83
SPI_DO/GPIO76/SHBM SPI GPIO43/TMS
20 WIRLESS_DISABLE# <35,57> <43> PRE_CHG 118
A_PWM1/GPIO21 KBSOUT11
39 KCOL11
<29> WIFI_RF_EN 82
91
SPI_SCK/GPIO75 GPIO GPIO44/TDI
21
22
CHG_LED1 <53> <19> BRIGHTNESS 62
B_PWM0/GPIO13 KBSOUT12/GPIO64
38
37
KCOL12
KCOL13
<54> VOL_DOWN_BTN# GPIO81 GPIO45 VOL_UP_BTN# <54> KBSOUT13/GPIO63
23 WIFI_LED WLAN_LED_DET <53> 36 KCOL14
GPIO46/TRST# KBSOUT14/GPIO62 KCOL15
24 TP104 TPAD28 35
GPIO47/JEN0# KBSOUT15/GPIO61/XOR_OUT
0R2J-2-GP 1
DY R570 E51_TxD GPIO50/TDO
25 KBC_MUTE# <33,34> <43> ACLIM_90W 13
PSDAT3/GPIO12 KBSOUT16/GPIO60
34 TP49 TPAD28
<29> PCIE_DEBUG_Tx 2 111 26 CHG_LED2 <53> <54> MUTE_BTN# 12 33 TP48 TPAD28
0R2J-2-GP 1DY R571 2 E51_RxD SOUT_CR/GPIO83/BADDR1 GPIO51 PSCLK3/GPIO25 KBSOUT17/GPIO57/HGPIO03
<29> PCIE_DEBUG_Rx 113 27 BLON_OUT <19> <43> CHG_ON# 11
SIN_CR/CIRRX/GPIO87 GPIO52/RDY# PSDAT2/GPIO27
TPAD28 TP99 112 28 BLON_IN <11,50> <26> USB_EN# 10
GPIO84/HGPIO01/BADDR0 GPIO53 CONFIG ID_003 PSCLK2/GPIO26 KROW0
73 <54,57> TP_DATA 71 54
IRRX2_IRSL0/GPIO70 PSDAT1 KBSIN0
<54> ACCESS_LENOVO
CONFIG ID_001
114
14
CIRTX/GPIO16/HGPIO04 IRTX/GPIO71
74
75
GSENSE_ON# <53> <54,57> TP_CLK
72
PSCLK1 PS/2 KBSIN1
55
56
KROW1
KROW2 3D3V_AUX_S5
TPAD28 TP97 GPIO34/CIRRX2 IRRX1/GPIO72 GSENSE_TST <53> KBSIN2
15 110 FP_EN <54> 57 KROW3
<24> S5_ENABLE GPIO36 GPIO82/HGPIO00/TRIS# KBSIN3
SER/IR KBSIN4
58 KROW4
1
<53> SPI_MISO 86 59 KROW5
F_SDI KBSIN5 KROW6 R204
<53> SPI_MOSI 87 60
F_SDO KBSIN6
44
VCORF
1
<53> SPI_CS#
1 2
90
92
F_CS0# FIU KBSIN7
61 KROW7 10KR2J-3-GP
<53> SPI_CLK F_SCK
1
R245 R583
2
AGND
C382 10KR2J-3-GP 85
GND
GND
GND
GND
GND
GND
VCC_POR#
1
SC1U10V2KX-1GP C822 22R2J-2-GP
2
DY
SC4D7P50V2CN-1GP
103
5
18
45
78
89
116
2
3D3V_AUX_S5 WPC8765LDG-1-GP WPC8765LDG-1-GP
B
R563 1 2 10KR2J-3-GP CONFIG ID_003
R582
R564 1 2 10KR2J-3-GP CONFIG ID_002 CONFIG ID_002 <54> E51_TxD 1 2
R565 1 10KR2J-3-GP
DY 2 10KR2J-3-GP CONFIG ID_001
3D3V_AUX_S5
1
R566 R567 R568

3D3V_S5
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
1
DY DY R243 R242 R239
1
DY 100KR2J-1-GP 100KR2J-1-GP 100KR2J-1-GP Ver-sc Add
2
DY R477
10KR2J-3-GP
2
PCB_VER0
PCB_VER1 D19
2
PCB_VER2 BAT54-4-GP
D11 DY
1
1 SB_RSMRST# <22
6 1 KBRCIN# R244 R241 R240 32KX1
<21> KBRST#
1
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP SB_RSMRST#_1 3
R202
DY R474
5 2 KA20GATE 1 2 32KX2 2 100KR2J-1-GP
2
<21> KBGA20
DY
20MR3-GP
2
1
4 3 ECSCI#_1 1 2
<22> ECSCI# R203
33KR2J-3-GP R475 0R2J-2-GP
CH731UPT-GP
X2
2
3
A
D20 CONFIG_ID PIN 0 1 1 2
1
1
2 <Core Design>
001 GPIO34 A-Note2 F-Note2 C392 4 C391
RESO-32D768KHZ-GP
3 EC_SMI#_1 SC6P50V2CN-1GP SC6P50V2CN-1GP
Wistron Co
2
2
<22> ECSMI# 1 002 GPIO55 China WW 21F, 88, Sec.1, Hsin Tai
Taipei Hsien 221, Taiwan
BAT54-4-GP
003 GPIO70 AMD Intel Title
KBC WPC8765L
Custom
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
moat cap
H2 H5 H8 H9 H10 H16 H17 H22 H23

HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE 1D05V_S0 3D3V_S0
SW10 SW8 SW9 SW6

1 2
SPRING-33 SPRING-33 SPRING-33 SPRING-33 C826 SC100P50V2JN-3GP
1
D
1 2
C829 SC100P50V2JN-3GP
H7 H1 H3 H6 H19 H18 H20 H14 H12

HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1D05V_S0 5V_S0
SW5
SPRING-23-GP
1
1
1 2
1
1 2
H15 H4 H13 H21 H11

C HOLE HOLE HOLE HOLE HOLE
SW2 SW4 SW3 SW7 SPR1 SPR2 SPR3
SPRING-31-GP SPRING-31-GP SPRING-31-GP SPRING-31-GP SPRING-31-GP SPRING-31-GP SPRING-31-GP

1
1
SPR7345H154SPR7345H154SPR7345H154
SPR7345H154
DCBATOUT 5V_S5
For EMI solution DCBATOUT
15pcs EMI LAB2 add
C587 C30 C577 C64 C280 C309 C578 C33 C584 C583 C148 C401 C628 C721 C673 C820
C807 C808 C809 C810 C811 C812
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SCD1U16V2ZY-2GP
1
1
B
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
2
2
5V_S0
ver-sc add
3D3V_S0 3D3V_S5
8pcs
5pcs
C73 C249 C429 C458 C477 C767 C796 C551 C726 C467 C705 C475 C585 C814 C817 C818 C819
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
<Core Design>
1
1
Wistron Corpor
A
2
2
Title
ver-sc add HOLE/ SPRING
B
Anote2.0 INTEL
5 4 3 2 1
5 4 3 2 1
Near CN3 KB Near CN10 NEW_CARD Near CN22 USB Near CN26 SATA---DEL
1 TPAD34 TP145 5V_USB0_S5 5V_S0
<22,31> PCIE_TXP1 3D3V_S0
<54,55> KROW[0..7] KCOL0 1 TPAD34 TP113 <22,31> PCIE_TXN1 1 TPAD34 TP146
KCOL1 1 TPAD34 TP114 <31> PCIE_C_RXP1 1 TPAD34 TP147 1 TPAD34 TP181
<54,55> KCOL[0..15] KCOL2 1 TPAD34 TP115 <31> PCIE_C_RXN1 1 TPAD34 TP148 1 TPAD34 TP200
KCOL3 1 TPAD34 TP116 <3,31> CLK_PCIE_NEW 1 TPAD34 TP149 <26> USB_0- 1 TPAD34 TP182
KCOL4 1 TPAD34 TP117 <3,31> CLK_PCIE_NEW# 1 TPAD34 TP150 1 TPAD34 TP201
KCOL5 1 TPAD34 TP118 <31> CPPE# 1 TPAD34 TP151 <26> USB_0+ 1 TPAD34 TP183
KROW0 1 TPAD34 TP105 KCOL6 1 TPAD34 TP119 <3,31> NEWCARD_CLKREQ# 1 TPAD34 TP152 <21,25> SATA_TXP0 1 TPAD34 TP202
KROW1 1 TPAD34 TP106 KCOL7 1 TPAD34 TP120 1 TPAD34 TP153 1 TPAD34 TP184 <21,25> SATA_TXN0 1 TPAD34 TP203
D 3D3V_NEW_S0 D
KROW2 1 TPAD34 TP107 KCOL8 1 TPAD34 TP121 <31> PERST# 1 TPAD34 TP154
KROW3 1 TPAD34 TP108 KCOL9 1 TPAD34 TP122 1 TPAD34 TP155 <25> SATA_RXN0 1 TPAD34 TP204
3D3V_NEW_LAN_S5
KROW4 1 TPAD34 TP109 KCOL10 1 TPAD34 TP123 <22,29,30,31,58> PCIE_WAKE# 1 TPAD34 TP156 <25> SATA_RXP0 1 TPAD34 TP205
KROW5 1 TPAD34 TP110 KCOL11 1 TPAD34 TP124 1 TPAD34 TP157
1D5V_NEW_S0
KROW6 1 TPAD34 TP111 KCOL12 1 TPAD34 TP125 1 TPAD34 TP158 <25> HDD_DTC# 1 TPAD34 TP206
<22,29,30,31,58> SMB_DATA
KROW7 1 TPAD34 TP112 KCOL13 1 TPAD34 TP126 1 TPAD34 TP159
<22,29,30,31,58> SMB_CLK
KCOL14
KCOL15
1
1
TPAD34
TPAD34
TP127
TP128
<31> CONN_TP2
<31> CONN_TP3
1
1
TPAD34
TPAD34
TP160
TP161 Near CN23 USB 1 TPAD34 TP207
<31> CPUSB# 1 TPAD34 TP162

1 TPAD34 TP163 5V_USB1_S5
<22,31> USB_PP5
1 TPAD34 TP164
<22,31> USB_PN5
1 TPAD34 TP185
Near CN4 TP <26> USB_1- 1 TPAD34 TP186
5V_S0
<26> USB_1+ 1 TPAD34 TP187
Near CN24 1394 --DEL
1
1
TPAD34
TPAD34
TP129
TP130 Near CN11 WIRELESS SW 1 TPAD34 TP188
<54,55> TP_DATA 1 TPAD34 TP131 <28> TPA0+ 1 TPAD34 TP240

<54,55> TP_CLK 1 TPAD34 TP132 <35,55> WIRLESS_DISABLE# 1 TPAD34 TP165 <28> TPA0- 1 TPAD34 TP241
1 TPAD34 TP133 1 TPAD34 TP166 <28> TPB0+ 1 TPAD34 TP242

1 TPAD34 TP134 <28> TPB0- 1 TPAD34 TP243
Near CN15 USB

Near CN13 AD JACK 5V_USB2_S5
5V_USB3_S5
Near CN27 HP ---DEL
Near CN5 FP <44> AD_IN 1 TPAD34 TP168 1 TPAD34 TP189
1 TPAD34 TP272 1 TPAD34 TP190 <32,34> JACK_DETECT# 1 TPAD34 TP256
C <54> 3V_FINGER_S0 1 TPAD34 TP135 1 TPAD34 TP273 <26> USB_2- 1 TPAD34 TP191 <34> HP_OUT_L_RES 1 TPAD34 TP257 C
1 TPAD34 TP136 <26> USB_2+ 1 TPAD34 TP192 <34> HP_OUT_R_RES 1 TPAD34 TP258
<22,54> USB_PN7
1 TPAD34 TP137 1 TPAD34 TP169
<22,54> USB_PP7 <44> AD_DATA
1 TPAD34 TP138 1 TPAD34 TP170 <26> USB_3- 1 TPAD34 TP193 1 TPAD34 TP251
1 TPAD34 TP271 <26> USB_3+ 1 TPAD34 TP194 1 TPAD34 TP252
1 TPAD34 TP167 1 TPAD34 TP195 1 TPAD34 TP253

1 TPAD34 TP254
Near CN7
BAT_RTC
Near CN17 BATTERY
1 TPAD34 TP276

1 TPAD34 TP140
1 TPAD34 TP176 Near CN16 FAN Near CN27 EXT MIC---DEL
1 TPAD34 TP172 FAN1_VCC
<44> BATA_SCL_1
1 TPAD34 TP173 <32,34> MICBIAS_EXT 1 TPAD34 TP244
<44> BATA_SDA_1
<44,55> BAT_IN# 1 TPAD34 TP174
Near CN8 <44> BAT_VCC_IN 1 TPAD34 TP175 1 TPAD34 TP197 <32,34> MIC_IN# 1 TPAD34 TP245
1 TPAD34 TP274 <24> FAN1_FG1 1 TPAD34 TP198 1 TPAD34 TP246

<33> SPKR_L- 1 TPAD34 TP141
<33> SPKR_L+ 1 TPAD34 TP142 1 TPAD34 TP275 1 TPAD34 TP199 1 TPAD34 TP247
<33> SPKR_R- 1 TPAD34 TP143
<33> SPKR_R+ 1 TPAD34 TP144 1 TPAD34 TP248
1 TPAD34 TP249
1 TPAD34 TP250
Near CN14 TV
B B
1 TPAD34 TP177
<18> TV_LUMA 1 TPAD34 TP178

<18> TV_CRMA 1 TPAD34 TP179
1 TPAD34 TP180
A A
<Core Design>
Wistron Corporation
Title
TEST_PAD
C
Anote2.0 INTEL SC
5 4 3 2 1
5 4 3 2 1
D Near LCD CNN--CAM Modem Daughter-BD

3D3V_S0
5V_USB_CAM
<28,32> AMOM_DIPP 1 TPAD34 TP301
1 TPAD34 TP278 <28,32> AMOM_DIPN 1 TPAD34 TP302
1 TPAD34 TP315
<19,22> USB_PN4 1 TPAD34 TP279
<19,22> USB_PP4 1 TPAD34 TP280
3D3V_CARD
1 TPAD34 TP277
1 TPAD34 TP316
Launch-BD <28>
<28>
XD_DATA4_1
XD_DATA5_1
1
1
TPAD34
TPAD34
TP317
TP318
<28> XD_DATA6_1 1 TPAD34 TP319
3D3V_S0 1 TPAD34 TP320
<28> XD_DATA7_1
1 TPAD34 TP313 <28> SD/XD/MS_DATA0_1 1 TPAD34 TP321
<28> SD/XD/MS_DATA1_1 1 TPAD34 TP322
Near SW1 3D3V_S5 <28>

<28>
SD/XD/MS_DATA2_1
SD/XD/MS_DATA3_1
1
1
TPAD34
TPAD34
TP323
TP324
<28> SD/XD/MS_CMD_1 1 TPAD34 TP325
C 1 TPAD34 TP314 <28> SD_CD# 1 TPAD34 TP326
1 TPAD34 TP282 <28> SD/XD/MS_CLK_1 1 TPAD34 TP327
<19> LID_SW# TPAD34 TP303 TPAD34 TP328
<54> ACCESS_SYS# 1 <28> SD_WP#(XDR/B#) 1
1 TPAD34 TP281 <54> PWRBTN# 1 TPAD34 TP304
<54> VOL_DOWN# 1 TPAD34 TP305 <28> XD_CD# 1 TPAD34 TP329
<54> MUTE# 1 TPAD34 TP306 <28> XD_CE# 1 TPAD34 TP330
<54> VOL_UP# 1 TPAD34 TP307 <28> XD_CLE 1 TPAD34 TP331
<28> XD_ALE 1 TPAD34 TP332
<54> PWR_LED# 1 TPAD34 TP308 <28> XD_WP# 1 TPAD34 TP333
<28,54> MS_LED# 1 TPAD34 TP309
<54> MEDIA_LED# 1 TPAD34 TP310 <28> MS_INS# 1 TPAD34 TP334
<54> CAPS_LED# 1 TPAD34 TP311 <28,32> MICBIAS_L 1 TPAD34 TP335
Near CN25--Mini -PCIE <54> NUM_LED# 1 TPAD34 TP312 <28> INT_MIC_TO_CNN

<28,55> BLUETOOTH_EN
1
1
TPAD34
TPAD34
TP336
TP337
1 TPAD34 TP338
<22,28> USB_PP6_BT
1 TPAD34 TP339
<22,28> USB_PN6_BT
1D5V_SB_S0 1 TPAD34 TP340
<28,29> WIFI_BUSY
1 TPAD34 TP341
TPAD34 TP283 <28,29> BT_BUSY TPAD34 TP342
1 1
<28,53> BLUETOOTH_LED
3D3V_S0
B 1 TPAD34 TP284
3D3V_S5
1 TPAD34 TP285
1 TPAD34 TP286
<28,29> BT_BUSY
1 TPAD34 TP287
<28,29> WIFI_BUSY
<29,53> WLAN_LED 1 TPAD34 TP288
<22,29,30,31,57> PCIE_WAKE# 1 TPAD34 TP289
<10,20,29,31,35,46> PLT_RST1# 1 TPAD34 TP290
<3,29> CLK_PCIE_MINI_1 1 TPAD34 TP291
<3,29> CLK_PCIE_MINI_1# 1 TPAD34 TP292
<22,29> PCIE_RXN3 1 TPAD34 TP293

<22,29> PCIE_RXP3 1 TPAD34 TP294 <Core Design>
<22,29> PCIE_TXN3 1 TPAD34 TP295

A
<22,29> PCIE_TXP3 1 TPAD34 TP296
Wistron Corpor
1 TPAD34 TP297 21F, 88, Sec.1, Hsin Tai Wu Rd., H
<22,29> USB_PN8 Taipei Hsien 221, Taiwan, R.O.C.
1 TPAD34 TP298
<22,29> USB_PP8
TPAD34 TP299 Title
<22,29,30,31,57> SMB_CLK
<22,29,30,31,57> SMB_DATA
1
1 TPAD34 TP300 TEST_PAD
B
Anote2.0 INTEL
5 4 3 2 1

Anote2 SC 0112 1330 Final PDF

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1 2 3 4 5

Intel CPU Project code : 91.4T001.001 DCBATOUT

Host BUS DCBATOUT 1D05V_

667/800MHz SYSTEM DC/DC

CX20549-12Z PCIE+USB 2.0 KBC

INTEL ICH8-M STRAP PIN <21,23> +RTCVCC +RTCVCC

<4,5,6,7,8,11,12,13,21,23,39> 1D05V_S0 1D05V_S0

<3,10,12,23,42> 1D25V_S0 1D25V_S0

<5,6,37> VCC_CORE_S0 VCC_COR

TP3 XOR Chain Entrance.

INTEL CRESTLINE STRAP PIN GNT[3:0]

USB[9:0][P,N] PULL-DOWN 15K Title

CL_RST# TBD Table of Content

7 41 RN62 2 3 SRN0J-6-GP CLK_PCIE_NE

28 RN53 2 3 SRN0J-6-GP CLK_PCIE_SA

R208 1 DY 2 255R2F-L-GP VGA_27M_SS

R213 1 2 1KR2J-1-GP MCH_CLKSEL0 <10>

R269 1 2 1KR2J-1-GP MCH_CLKSEL2 <10>

H_A#3 J4 H1 H_ADS# 1D05V_S0

<21> H_IGNNE# C4 <8> H_DSTBP#1 M26 AF24 H_DSTBP#3 <8>

TPAD28 TP35 CPU_RSVD04 V3 D24 H_DPWR#

with in Resistor Placed

CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0

A7 VCC VCC AB20

VCC CPU_VID0 CPU_VID[0..6] <36> C634

AA17 AE5 CPU_VID2

Close to CPU pin

R190 R193 R200

<4> ITP_TMS TP209 TPAD28

<4> ITP_TCK TP211 TPAD28

<4> ITP_TDO R196 1 2 22D6R2F-L1-GP TP212 TPAD28

<4,8> H_RESET# R189 1 2 22D6R2F-L1-GP TP216 TPAD28

<4> ITP_PRDY# TP218 TPAD28

<4,22> ITP_DBR# TP223 TPAD28

H_D#56 AJ6 AD13 H_DINV#2

H_VREF H_RCOMP H_SWNG H_D#61 AJ3 AD2 H_DSTBN#2

H_D#62 AH2 AH11 H_DSTBN#3

R461 C712 R468 R463 L7 H_DSTBP#0

H_DSTBP#1 H_DSTBP#1 <4>

SCD1U16V2ZY-2GP H_SWNG B3 AC2 H_DSTBP#2

H_RCOMP C2 AJ10 H_DSTBP#3

Layout Note : H_SCOMP W1 H_SCOMP H_REQ#0 M14 H_REQ#0

DDR_A_D0 AR43 BB19 DDR_A_BS0 DDR_B_D0 AP49 AY17 DDR_B_BS0

AR40 BD47 BJ41 BC50

DDR SYSTEM MEMORY B

FOR Calero: 80.6 ohm

CFG09 R188 TP39 CFG12 J23

CFG5 (DMI select) 0 = DMI x 2

<19> LBKLT_CTL J40 L_BKLT_CTRL PEG_COMPI N43 PEGCOMP is 20/25 mils.

G27 U47 GTXN2 C6661 2DIS SCD1U10V2KX-4GP PEG_TXN2

F27 TVA_RTN PEG_TX#5 T42

L27 W46 GTXN7 C6501 2DIS SCD1U10V2KX-4GP PEG_TXN7

M45 GTXP0 C6571 2DIS SCD1U10V2KX-4GP PEG_TXP0

CRT_BLUE PEG_TX1 GTXP2 C6651 SCD1U10V2KX-4GP PEG_TXP2

F29 U43 GTXP5 C6471 2DIS SCD1U10V2KX-4GP PEG_TXP5

E29 CRT_RED# PEG_TX6 W42

C389 C384 C715 A30 U3

C271 C320 C321 AR16 A43

A7 TC5 C266 C265

SCD1U10V2KX-4GP U48 VCCD_PEG_PLL

C278 C386 C717 C716 C713

1 CRESTLINE-GP-U <Core Design>

Size Document Number