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User's manual
1 General information.................................................................................................. 7
1.1 Manual history.................................................................................................................................................7
1.2 Introduction......................................................................................................................................................8
1.3 Intended use................................................................................................................................................... 8
1.4 Transport and storage.................................................................................................................................... 8
1.5 Mounting orientation........................................................................................................................................8
1.6 Operation.........................................................................................................................................................9
1.6.1 Protection against touching electrical parts.............................................................................................. 9
1.7 Environmentally friendly disposal....................................................................................................................9
1.7.1 Separation of materials............................................................................................................................. 9
1.8 Definition of this term......................................................................................................................................9
1.9 Abbreviations...................................................................................................................................................9
2 Safety guidelines.....................................................................................................10
2.1 Organization of safety notices...................................................................................................................... 10
2.2 Protection against electrostatic discharge.................................................................................................... 10
2.2.1 Packaging................................................................................................................................................ 10
2.2.2 Guidelines for proper ESD handling....................................................................................................... 11
3 System characteristics........................................................................................... 12
3.1 The X67 system............................................................................................................................................13
3.2 General product features.............................................................................................................................. 14
3.3 Reduced costs.............................................................................................................................................. 15
3.4 Flexibility........................................................................................................................................................15
3.5 EMC concept.................................................................................................................................................17
3.6 Communication..............................................................................................................................................17
3.7 System power supply....................................................................................................................................18
3.8 Configurable X2X Link address.................................................................................................................... 18
5 Module overviews................................................................................................... 44
5.1 Module overview: Alphabetically...................................................................................................................44
5.2 Module overview: Grouped........................................................................................................................... 46
5.3 B&R ID codes............................................................................................................................................... 50
5.3.1 B&R ID codes sorted by model number................................................................................................. 50
5.3.2 B&R ID codes sorted by ID code........................................................................................................... 52
6 Accessories............................................................................................................. 54
6.1 General overview.......................................................................................................................................... 54
6.1.1 X2X Link and I/O power supply.............................................................................................................. 54
6.1.2 Module connections.................................................................................................................................55
6.1.3 Fieldbus systems..................................................................................................................................... 56
6.2 Pre-assembled cables...................................................................................................................................57
6.2.1 X2X Link cables...................................................................................................................................... 57
6.2.2 I/O power supply cables..........................................................................................................................62
6.2.3 M8 sensor cables.................................................................................................................................... 66
6.2.4 M12 sensor cables.................................................................................................................................. 69
6.2.5 Multifunction cables................................................................................................................................. 72
6.2.6 CAN bus / DeviceNet cables.................................................................................................................. 74
6.2.7 PROFIBUS DP cables.............................................................................................................................77
6.2.8 X67 POWERLINK/Ethernet cable........................................................................................................... 81
6.3 Field-assembled connectors......................................................................................................................... 84
6.3.1 I/O power supply..................................................................................................................................... 84
6.3.2 Sensors/Actuators....................................................................................................................................84
6.3.3 Special-purpose connectors.................................................................................................................... 85
6.3.4 CAN bus / DeviceNet.............................................................................................................................. 85
6.3.5 PROFIBUS DP / X2X Link...................................................................................................................... 86
6.3.6 POWERLINK/Ethernet............................................................................................................................. 86
6.4 Other accessories......................................................................................................................................... 87
6.4.1 Terminating resistor................................................................................................................................. 87
6.4.2 Connectors...............................................................................................................................................87
6.4.3 Threaded caps.........................................................................................................................................88
6.4.4 Plain text tags..........................................................................................................................................88
6.4.5 Mounting plates for top-hat rails............................................................................................................. 88
6.4.6 Installation tool.........................................................................................................................................88
1 General information
1) Column "Comment" contains only the most important changes in this user's manual. Several updates, corrections and format variations are not included.
1.2 Introduction
Programmable logic controllers, operating/monitoring devices (e.g. industrial PCs, Power Panels, Mobile Panels,
etc.) as well as uninterruptible power supplies have all been designed, developed and manufactured by B&R for
conventional use or for use with increased safety requirements (safety technology) in industry. They were not
designed, developed and manufactured for any use involving serious risks or hazards that could lead to death,
injury, serious physical damage or loss of any kind without the implementation of exceptionally stringent safety
precautions. In particular, such risks and hazards include the use of these devices to monitor nuclear reactions in
nuclear power plants, their use in flight control or flight safety systems as well as in the control of mass transportation
systems, medical life support systems or weapons systems.
When using programmable logic controllers or operating/monitoring devices as control systems together with a Soft
PLC (e.g. B&R Automation Runtime or comparable product) or Slot PLC (e.g. B&R LS251 comparable product),
safety precautions relevant to industrial control systems (e.g. the provision of safety devices such as emergency
stop circuits, etc.) must be observed in accordance with applicable national and international regulations. The same
applies for all other devices connected to the system, e.g. drives.
All tasks such as the installation, commissioning and servicing of devices are only permitted to be carried out by
qualified personnel. Qualified personnel are those familiar with the transport, mounting, installation, commission-
ing and operation of devices who also have the appropriate qualifications (e.g. IEC 60364-1). National accident
prevention regulations must be observed.
The safety notices, connection descriptions (type plate and documentation) and limit values listed in the technical
data are to be read carefully before installation and commissioning and must be observed.
1.6 Operation
1.6.1 Protection against touching electrical parts
To operate programmable logic controllers, operating and monitoring devices, and uninterruptible power supplies,
certain components must carry dangerous voltage levels. Touching one of these parts can result in a life-threatening
electric shock. This could lead to death, severe injury or damage to property.
Before turning on the programmable logic controller, operating/monitoring devices or uninterruptible power supply,
the housing must be properly grounded (PE rail). Ground connections must be established even when testing or
operating operating/monitoring devices or the uninterruptible power supply for a short time!
Before switching on the device, all parts that carry voltage must be securely covered. During operation, all covers
must remain closed.
It is necessary to separate different materials so the device can undergo an environmentally friendly recycling
process.
Component Disposal
X67 modules, Electronics recycling
Cables
Cardboard box / Paper packaging Cardboard box / Paper recycling
1.9 Abbreviations
The following abbreviations appear throughout the user's manual, for example in data tables or descriptions of
pinouts.
Abbreviation Stands for Description
NC Normally closed Normally closed relay contact.
Not connected Used in pinout descriptions if a terminal or pin is not connected to a module.
ND Not defined In data tables, this stands for a value that has not been defined. This may be be-
cause a cable manufacturer does not provide certain technical data, for example.
NO Normally open Normally open relay contact.
TBD To be defined Used in technical data tables when certain information is not yet available. The
value will be provided later.
2 Safety guidelines
2.2.1 Packaging
Information:
Metallic surfaces are not suitable storage surfaces.
• Components should not be subjected to electrostatic discharge (e.g. through the use of charged plastics).
• Ensure a minimum distance of 10 cm from monitors and TV sets.
• Measuring instruments and equipment must be grounded.
• Probes on potential-free measuring instruments must be discharged on sufficiently grounded surfaces be-
fore taking measurements.
Individual components
• ESD protective measures for individual components are thoroughly integrated at B&R (conductive floors,
footwear, arm bands, etc.).
• These increased ESD protective measures for individual components are not necessary for customers
handling B&R products.
3 System characteristics
Decentralized machine concepts increasingly call for distributed I/O concepts. Ideally, these components are in-
stalled directly on-site on nearly any area of the machine. To accomplish this, however, the I/O modules must be
rated IP67.
The remote X67 system meets these demands perfectly. This system also makes it possible to reduce costs
in many areas, including cabling, the control cabinet, commissioning and service. With a completely distributed
structure, the X67 system provides the highest level of flexibility.
To get the most out of a remote I/O system, performance is key. The X67 meets this prerequisite with update times
under one millisecond for 1000 digital and 50 analog inputs and outputs.
A maximum of 253 modules can be operated on a single line, with a distance up to 100 m between 2 modules.
Traditional I/O systems are located centrally in the control cabinet, with extensive wiring required for sensors and
actuators. In addition, modular machine designs often require intermediate connections with multi-pin connectors.
Remote I/O modules can only reach their full potential, however, if additional distribution boxes can be eliminated
completely. This is why the optimal solution has to include I/O modules with robust IP67 protection that can be
placed directly in harsh industrial environments.
The ability to connect additional modules makes bus controllers extremely flexible and efficient.
Like a modular system, the fieldbus device can be expanded. From the point of view of the
fieldbus, it still remains a single device. The integrated X2X Link connection makes it possible to
effortlessly connect various X67 modules over long distances.
The X67 system is extremely effective in addition to inexpensive. If the fieldbus needs to be
changed, only the bus controller changes. The rest stays the same – on the machine and through-
out the documentation.
Digital modules
There are many different types of X67 digital modules available:
• 8-/16-channel input modules
• 8-channel output modules. Each channel can handle 2 amps. The maximum total load
is 8 amps.
• 8-/16-channel mixed modules with individually configurable channels
• Valve control modules
• Motor modules
This flexibility reduces the number of modules while simplifying logistics and stock management.
The number of inputs and outputs can always be tailored exactly to requirements.
Analog modules
The X67 system offers input and output modules, as well as mixed modules with 4 channels each
for measuring current or voltage signals.
One feature common to all analog modules is the complete shielding. The cable shield has seam-
less 360° contact with the shielding on the module.
Function modules
The X67 system offers special function modules:
• Multifunctional counter module for absolute and incremental encoder and more
• Communication module: Combining RS-232 or RS-485/RS-422 and digital I/O is a com-
pact solution for many types of applications. This makes it possible to connect barcode
readers and the corresponding trigger sensor with just one module.
All connections are made using standard M8 or M12 connectors. The X2X Link connectors are keyed to prevent
mix-ups with the M12 analog connectors.
X2X Link is based on shielded copper cables. Each module has one integrated male and female connector, one
X2X Link input and one X2X Link output. An additional T-connector is not needed. Each module is operated syn-
chronously. That means reading inputs or writing outputs takes place synchronous to the X2X Link cycle. In addition
to cyclic communication, X2X Link also offers acyclic communication, e.g. to load parameters onto the module.
By default, it is not necessary to configure the node number switches on X67 modules. The modules are automat-
ically identified by the system when booting using their X2X Link position.
3.4 Flexibility
One system for all machine designs Unlimited expansion possibilities
Whether a compact machine or a large plant, this I/O system The X67 system is extremely flexible, handling removable
can be adapted to the machine's architecture to meet every machine modules, optional expansions and even future up-
demand for every level of performance. The X67 system of- grades to the machine architecture with ease.
fers ultimate freedom.
PLC PLC
Control cabinet Control cabinet
Open Adaptable
X67 is an I/O solution for all standard fieldbus Digital channels that can be configured as in-
systems and for direct connections to B&R con- puts or outputs allow the solution to be tailored
trollers. The fieldbus may change, but the I/O sys- to the requirements and reduce the total number
tem always remains the same. and variety of modules needed.
Compact Unmistakable
Optimal ergonomics and an extremely compact Visual status indicators on the modules and ad-
design allow the X67 system to fit anywhere on vanced status messages via the bus enable
the machine. clear-cut diagnostics. Warning and error thresh-
olds for I/O power supply, single-channel diag-
nostics and open circuit detection are just a few
examples.
Flexible Robust
100 m between modules without restrictions pro- These completely sealed modules are the epito-
vides more than enough room for reserves, mak- me of robustness, with features for maximizing
ing it easy to set up a configuration even when electromagnetic immunity hidden inside.
modules are far apart.
Fast Plug-and-run
Cycle times well below a millisecond also guar- Pre-assembled standard cables and automat-
antee the necessary reserves for your applica- ic module identification reduce installation and
tion. Synchronous I/O processing goes without commissioning work to an absolute minimum.
saying.
Safe Protected
Communication and I/O are completely isolated These systems are equipped with integrated re-
electrically. Disturbances or voltage dips on the I/ verse polarity protection, short circuit protection,
O side do not affect the bus. Performing diagnos- protection when switching inductances and the
tics is always possible. highest level of protection for the electronics as
well.
Powerful Well-supplied
I/O power via 2 pairs of leads provides up to 8 Many sensors and actuators require a 24 VDC
amps for outputs or supplies additional modules. power supply. With X67 modules, this is integrat-
ed in all digital connections and also provides pro-
tection against short circuits.
Shielded Expandable
Seamless 360° shield grounding from the ca- X67 systems can be expanded by 250 modules
ble over the connector directly on the thread- with up to 100 m between them.
ing of the M12 connector, through to the metal
backplane of the module and over the mounting
screws straight to the machine provides a com-
plete ground connection for all bus and analog
signals.
Centered Multi-talented
The central position of the two mounting screws Synchronous I/O processing, adjustable software
prevents misalignment of the housing in standard filters, integrated counter functions, flexible stan-
aluminum frames with wedge nut installations. dard functions, and more – these are intelligent
products perfect for the most versatile applica-
tions.
3.6 Communication
The goal of development was to free individual modules from the backplane to achieve a real remote system. The
X67 system uses a cable to replace the conventional backplane and connect the modules together. The name of
this "decentralized backplane" is "X2X Link" .
The X67 system offers many connection possibilities: X2X Link for direct connection of CPUs or IPCs with aPCI
modules or PCI cards. Indirect connections or connections to non-B&R CPUs utilize the various fieldbus systems
POWERLINK, CAN, CANopen, DeviceNet, and PROFIBUS DP.
X67 system
X2X Link - Remote backplane
Bus
controller X67 system
X2X Link
POWERLINK
Bus
controller X67 system
X2X Link
X20 system
Drives
Power Panel
X20 system
X67 system
#10 #11 #12 #30 #31 #20 #21 #22 #50 #51 #52
X2X Link
4.1 Dimensions
X67 modules
53 42
85
53 42
155
4.3 Installation
X67 modules can be installed in several different ways:
• "Installing on an aluminum frame" on page 21
• "Top-hat rail installation" on page 21
• "Installation on a mounting plate or directly on the machine " on page 22
Important!
Since electromagnetic disturbances are deflected via the base plate on the back, it is important to
ensure that the mounting location has good conductivity!
The mounting location must also be connected with ground potential with good conductivity.
Information:
The following must be taken into consideration to ensure IP67 protection:
• The union nuts on female/male connectors must be tightly secured with the specified tighten-
ing torque. The tightening torque value can be found in the module data sheet or the section
"Connectors" on page 24.
• Female/Male connectors that are not being used must be closed with threaded caps!
Information:
Shock and vibration resistance values (see "International and national certifications" on page 89)
apply only if cables are installed securely.
M4 screw
Important!
For coated or anodized surfaces, the isolating coated or anodized layer in the area of the base plate
for X67 modules must be removed.
An X67 module can be installed on a top-hat rail using top-hat rail mounting plate X67ACTS35.
X67 modules can also be mounted on a mounting plate or directly on the machine.
4.7 4.7
74.6 ±0.2
85
144.5 ±0.3
4.7
155
53
4.7
53
Important!
The shielding at both ends of the cable must be professionally grounded on field-assembled cables!
4.5 Connectors
The connectors for the X67 system are designed as circular connectors. In addition to field-assembled male con-
nectors, B&R also offers pre-assembled cables for X2X Link, fieldbus and I/O functions.
The following connectors are used with the X67 system:
Threads Tightening torque
M8 0.4 Nm
M12 0.6 Nm
M16 1.0 Nm
Information:
When using third-party connectors, we strongly recommend ensuring that the contacts are gold (Au)
coated.
B&R connectors are designed for use with X67 components (see "General overview" on page 54).
Danger!
In order to guarantee a specific power supply, a SELV power supply that conforms to EN 60204-1 must
be used to supply the bus, SafeIO and SafeLOGIC controller.
If the power supply is grounded (PELV system), then only a GND connection is permitted for grounding.
Grounding types that have ground connected to +24 VDC are not permitted.
The X67's decentralized structure allows modules to be placed in different power supply groups as needed. This
allows various modules to be connected to different voltage protection circuits or different emergency stop groups
to be implemented.
The entire X2X Link network is operated totally independently of the I/O power supply. In addition to the commu-
nication lines, the connection cable contains 2 wires used to supply the X2X Link electronics for each module.
Electrically, this is totally isolated from the I/O section. For this reason, power failures on the I/O side (e.g. due
to short circuit, open circuit or emergency stop) only stop operation of the I/O section. The bus section continues
to function with the corresponding status messages being sent to the CPU. This feature is essential in allowing
errors to be analyzed quickly and corrected.
The X2X Link power supply is guaranteed by system supply modules.
A potential group involves multiple X67 modules that are supplied via a shared supply feed.
X2X Link
U1/24 VDC
U2/24 VDC
Figure 8: Power supply design with the help of 2 different potential groups
X67 I/O modules are power consumers on the X2X Link. System supply modules feed in the power. System supply
modules should be planned according to the calculated power requirements. Since they supply voltage in both
directions, they can be arranged either at the beginning or between the consumers. Redundant configurations are
also possible by adding more system supply modules.
X2X Link
U1/24 VDC
U2/24 VDC
Figure 9: X2X Link power supply through flexible application of system supply modules
The bus controllers can supply several modules on the X2X Link without an additional system supply module.
U1/24 VDC
U2/24 VDC
Status "ModuleOK" consists of different module parameters and is available for monitoring the X67 modules. When
the I/O supply voltage is lost, data point "ModuleOK" provides the value 0 (false).
Information:
B&R keeps user's manuals as current as possible. From a safety standpoint however, the current
certified version of the document must be used.
The current certified document is available for download from the B&R website at www.br-automa-
tion.com.
Operating principle "Safe cutoff of a potential group" allows the user to implement safety functions that satisfy the
requirements of EN ISO 13849-1:2015 within a B&R system when using an external safety relay.
The safety function is limited to cutting off or interrupting the power to connected actuators.
Functionality
An external safety relay is connected to the I/O power supply for the potential group. When the functional safe state
is requested or state "Failsafe" occurs, then this safety relay cuts off the I/O power supply of the potential group.
The power is then also cut off for all actuators connected to this potential group.
The operating principle is confined to machine manufacturing applications and therefore implicitly to the following
standards:
• EN ISO 13849-1:2015 / EN ISO 13849-2:2012
Requirements of other standards are not taken into consideration.
It is the user's responsibility to clarify guidelines for the use of components necessary for the safety function with
the respective authorities and to ensure these guidelines are met.
B&R will not assume warranty or liability for damages that occur due to:
• Improper use
• Non-observance of standards and guidelines
• Unauthorized modifications to devices, connections and settings
• Operation of unauthorized or unsuitable devices or device groups
• Failure to follow the safety notices covered in this manual
• Malfunctions caused by the external safety relay
The safety function must be implemented by personnel with appropriate training in safety technology and knowl-
edge of applicable regulatory and technical requirements.
Use of safety-related products is restricted to the following persons:
• Qualified personnel who are familiar with relevant safety concepts for automation technology as well as
applicable standards and regulations
• Qualified personnel who plan, develop, install and commission safety equipment in machines and systems
Qualified personnel in the context of this manual's safety guidelines are those who, because of their training,
experience and instruction combined with their knowledge of relevant standards, regulations, accident prevention
guidelines and operating conditions, are qualified to carry out essential tasks and recognize and avoid potentially
dangerous situations.
In this regard, sufficient language skills are also required in order to be able to properly understand this manual.
Modules must be protected against impermissible dirt and contaminants. The maximum permissible level of dirt and
contaminants is pollution degree II as specified in standard EN 60664-1. This can be achieved through installation
in a control cabinet that provides IP54 protection.
When using this operating principle, uncoated X20 modules are not permitted to be operated in condensing relative
humidity or at ambient temperatures below 0°C.
4.7.6.2 Timing
The cutoff time for the potential group must be applied based on consideration of the worst-case scenarios for the
respective group. For the corresponding group, see certificate "Safe cutoff of potential groups". If modules from
different groups are combined in a potential group, then the worst-case cutoff time of the group with the longest
duration applies.
• Group 1: Max. 500 ms
• Group 2: Max. 1 s
• Group 3: Max. 3 s
This time is needed to guarantee that energy stored within the module is discharged and the actuators are cut off
in worst-case scenarios. The cutoff times needed for the upstream external safety relay and actuator must also
be added.
Worst-case conditions for "Output = Off"
• Digital output: <5 V
• Analog output: <100 mV
The actual cutoff time can be calculated with the following formula.
If the result is greater than the worst-case time for the respective potential group, then the worst-case scenario
from section "Worst-case scenario" on page 28 applies.
Information:
• The calculated load-dependent cutoff time must be verified by a test measurement!
• At the time a safety function is requested, there is no guarantee that the outputs used to cal-
culate the load-dependent cutoff time are enabled. For example, if an output is disabled at the
time of a request, then the respective internal capacities in the module will not be discharged in
the calculated time (tspec). The worst-case time of the respective potential group must be taken
into account. If the output is enabled by the functional application (shown in the sketch as the
interval tapplication) during the worst-case time of the respective potential group, then the output
subsequently remains enabled for the calculated time.
Uin
Worst-case cutoff
Load-dependent cutoff
Uoff
Time
t application t spec
Worst-case time
The potential group is only permitted to be made up of modules listed in the following certificate. Modules not listed
in this certificate endanger the "absence of feedback" of the external cutoff and therefore the safety function.
Certificate
PDF Website > Downloads > Certificates > Safety technology > X20, X67 > Safe cutoff of potential groups
To ensure clarity and that the external cutoff is triggered when a fault occurs, installing multiple power supply
sources in a potential group is not permitted.
SELV/PELV power supplies must be used for both the bus supply (X2X) and the I/O power supply; otherwise,
safety-related malfunctions can occur due to overvoltages.
For modules with isolated I/O potential for sensors and actuators, the upstream safety relay must shut off the supply
for both the sensors and actuators; otherwise, energy regeneration cannot be excluded.
Power supply
of +24 VDC potential group
23 24 (inputs and outputs)
Reference potential of
+24 VDC Safety GND potential group, 0 VDC Outputs Load
13 relay 14 (inputs and outputs)
Emergency stop
Power supply
of +24 VDC potential group
(inputs and outputs)
X2
Emergency stop Reference potential of
GND potential group, 0 VDC Outputs
(inputs and outputs)
Load
X20DO2322
X20SI4100 X20SP1130
Load
Emergency stop
+
+24 VDC
X20SI4100 X20SP1130
+24 VDC
+
+24 VDC
Figure 15: Circuit example with power supply module X20SP1130 and X67
Provided that the external components being used (emergency stop switch, load) satisfy the respective require-
ments, these examples can achieve PL e.
The operating principle "Safe cutoff of a potential group" only applies to the B&R modules being used. All other
parts of the safety chain such as the application, upstream sensors or downstream actuators are NOT included
in this principle.
For this reason, it is important to take the following points into consideration:
• Ensure proper wiring of the safety relay with the I/O supply. A short circuit between the output of the safety
relay and an external 24 V voltage source can cause an unintended supply of 24 V to the internal supply
voltage of the potential group. As a result, the safety function can no longer be guaranteed, which means
that ALL of the channels in the potential group can no longer be cut off by the upstream safety relay.
• Make sure that ALL of the potential group's input and output channels and the connected sensors and
actuators are wired properly. A short circuit between an input or output of the potential group and an external
24 V voltage source can cause the unintended feedback of 24 V to the internal supply voltage of the
potential group. As a result, the safety function can no longer be guaranteed, which means that ALL of the
output channels in the potential group can no longer be cut off by the upstream safety relay.
• In accordance with EN ISO 13849-2:2012, appendix D.2, table D.4, a short circuit between any 2 conductors
can be excluded, provided that:
° They are permanently installed and protected against external damage (e.g. using a cable duct or
armored conduit)
° OR they are in separate plastic-sheathed cables
° OR they are installed within an electrical enclosure. This requires that the lines as well as the area
for electrical equipment meet the respective requirements [see EN 60204-1]
° OR they are individually shielded with a ground connection
Danger!
Please observe the following safety notices. Failure to observe any of the following notices can lead
to the failure of the safety function and may result in serious injury.
• The safety relay determines which category (according to EN ISO 13849-1:2015) is achieved.
• When using the operating principle, it is the user's responsibility to adhere to the relevant
standards and safety directives. The notices provided in sections "Description of function"
on page 26 through "Qualified personnel" on page 27 regarding functionality, applicable stan-
dards, proper use and qualified personnel are also to be observed.
• The safety function is limited to cutting off or interrupting the power to connected devices.
Safety functions that require actively powering on an actuator in a safe state cannot be imple-
mented with this function.
• For all potentials supplying the modules, SELV/PELV power supplies must be used.
• The potential groups for which the operating principle is applied are only permitted to contain
modules listed from certificate "Safe cutoff of potential groups".
• When applying the operating principle to uncoated X20 modules, the modules are not permitted
to be operated in condensing relative humidity or at ambient temperatures below 0°C.
• It is not permitted to mix modules from different systems (X20, X67, 7XV) within a potential
group.
• It is not permitted to install multiple power supply modules in a potential group (particularly
with regard to power supply modules that also supply the bus supply).
• Ensure that the upstream safety relay is wired properly.
• Ensure that ALL sensors and actuators connected to the potential group are wired properly.
• Be aware of the maximum safety-related response time when cutting off the potential group
based on the groups being used (see section "Worst-case scenario" on page 28). The cutoff
times needed for the upstream external safety relay and actuator must also be added. Cutoff
times shorter than the worst-case times can be achieved using the formula defined in section
"Load-dependent cutoff time" on page 28.
• The calculated load-dependent cutoff time must be verified by a test measurement!
• For modules with isolated I/O potential for sensors and actuators, the upstream safety relay
must shut off the supply for both the sensors and actuators.
• The ground connections should be used as functional ground and not as protective ground and
must not be connected to the 24 V supply voltage (GND is permitted). In addition, no protective
components are permitted to be used between the ground and the 24 V supply voltage.
Information:
System supply module X67PS1300 cannot be used to bridge distances since it does not regenerate
the signal.
Station numbers are automatically assigned according to the order of X67 modules (cable sequence).
Information:
All subsequent station numbers are shifted when an X67 station is connected/removed. The system
supply module is not included in this calculation, however, and does not receive its own station num-
ber!
100 m 100 m
U1/24 VDC
U2/24 VDC
The supply voltage for the X2X Link is reduced by line resistance (line length).
Information:
Be aware of voltage drops in the line!
Depending on the power consumption and type of modules being used, 15 or more X67 modules can be supplied
by system supply module X67PS1300. However, this does not mean that 100 m distance between each station
is possible (i.e. a total length of n x 100 m).
Information:
Regardless of the number of stations, the supply voltage is affected at total lengths over 100 m. There-
fore, additional system supply modules must be added when necessary.
100 m 100 m
U1/24 VDC
U2/24 VDC
Incorrect
X2X Link
X67 X67 X67 X67 X67 X67 X67 X67 X67 X67 X67
System supply System supply
24 VDC
Correct
X2X Link
X67 X67 X67 X67 X67 X67 X67 X67 X67 X67 X67
System supply System supply
24 VDC
Information:
All system supply modules must be distributed evenly throughout the system!
Information:
All subsequent I/O slots are shifted when an X67 station is connected/removed.
Max. 100 m
PLC Network
IPC + SoftPLC Fieldbus
U1/24 VDC
U2/24 VDC
Information:
All subsequent station numbers are shifted when an X67 station is connected/removed.
X2X Link
X2X Link
U1/24 VDC Power supply I/O power supply I/O power supply
Figure 20: X2X Link cabling - Supply via bus transmitter X20BT9400
If more than 8 or 6 X67 stations are connected to bus transmitter X20BT9400, then only the X67PS1300 system
supply modules being used can be included when calculating the power requirements.
X2X Link
Figure 21: X2X Link cabling - Supply via X20 bus transmitter and X67 system supply
X2X Link
U1/24 VDC
U3/24 VDC
Max. 8 A
Figure 22: I/O power supply cabling - Isolated X2X Link and I/O power supply
Be aware of any differences in permissible current consumption between the bus controller and other modules:
Fieldbus
X67 X67 X67 X67 X67 X67 X67 X67 X67 X67
Bus controller System supply module
1) For exact or possibly deviating technical data, please refer to the documentation for the corresponding X67 module.
The following connection overviews illustrate combinations of different systems that are based on X2X Link. The
model numbers indicate which standard cables available from B&R can be used to connect with one another.
Combining X20, X67 and compact I/O system
X2X Link X2X Link X2X Link X2X Link X2X Link X2X Link
Attachment cables Connection cables Open-ended cables Attachment cables Open-ended cables Attachment cables
X67CA0X21.xxxx X67CA0X01.xxxx X67CA0X41.xxxx X67CA0X21.xxxx X67CA0X41.xxxx X67CA0X21.xxxx
X67CA0X31.xxxx X67CA0X11.xxxx X67CA0X51.xxxx X67CA0X31.xxxx X67CA0X51.xxxx X67CA0X31.xxxx
X67PS1300 X67 I/O X67 I/O X20 system X67PS1300 X67 I/O X67 I/O
X2X Link X2X Link X2X Link X2X Link X2X Link
Attachment cables Connection cables Open-ended cables Attachment cables Open-ended cables
X67CA0X21.xxxx X67CA0X01.xxxx X67CA0X41.xxxx X67CA0X21.xxxx X67CA0X41.xxxx
X67CA0X31.xxxx X67CA0X11.xxxx X67CA0X51.xxxx X67CA0X31.xxxx X67CA0X51.xxxx
IP67 XV IP20 XV
X67PS1300 X67 I/O X20 system X67PS1300 X67 I/O
BR
X2X
X2X\
X2X⊥
+24 VDC
GND
BT
X2X\
X2X
X2X⊥
+24 VDC
GND
BT
X2X\
X2X
X2X⊥
X2X+
10 A slow-blow
X67 X2X Link + + I/O
Power supply _ _ Power supply
+24 VDC
GND
1)
X2X+ (optional)
1
1)
X2X+ (optional)
2
Shield
6
+ Shield
+24 VDC power supply
Supply ⊥
-
1) Used to forward the X2X Link power supply when using IP67 modules.
Signal Cable type Model number
X2X Link In Open-ended cables1) X67CA0X41.xxxx
X67CA0X51.xxxx
X2X Link Out Attachment cables1) X67CA0X21.xxxx
X67CA0X31.xxxx
X2X Link in/out Cable for custom assembly X67CA0X99.xxxx
1
In: X2X⊥ Black
2
In: X2X\ Blue
3
Shield
4
Out: X2X White
5
Out: X2X⊥ Black
6
Out: X2X\ Blue
7
Shield
8
+24 VDC for X2X Link
9 10 11
+ Supply ⊥
+24 VDC for I/O
X2X Link and -
-
I/O power supply
Shield
4
Shield
8
X2X+ Red
9 10 11
STATUS 2 STATUS 1
Information:
X2X Link is supplied via the red wire. X2X Link is supplied internally on the IF789 and LS189. An external
power supply is therefore not needed.
In order to prevent short circuits on the housing, braided shield or cable shield, the red wire end must
be insulated, e.g. using a heat shrink tubing.
To improve EMC immunity, the cable shield must be grounded on both sides. The supply line to the IF789 and
LS189 should be grounded over a wide area close to the shield. The grounding on the X67 side is done via the
connector on pre-assembled cables.
IF789 or LS189: Cables:
TB704 X67CA0Xx1.xxxx
White X2X 1
1
Black X2X⊥ 2
2
Blue X2X\ 3
3
Shield SHLD 4
4
Information:
If the cable shield is not grounded, transmission errors may occur when strong electromagnetic inter-
ference occurs.
4.10.1 Example 1
Calculation of the X2X Link power requirements and the module power required internally on the basis of the given
hardware configuration. The X2X Link power requirements are balanced. X67PS1300 is not necessary. The internal
module power consumption and the sensor/actuator power supply must come from the external power supply.
4.10.2 Example 2
Calculation of the X2X Link power requirements and the module power required internally on the basis of the given
hardware configuration. The X2X Link power requirements calculation produces a surplus of +11,25 W. Therefore,
one X67PS1300 is sufficient. The internal module power consumption and the sensor/actuator power supply must
come from the external power supply.
5 Module overviews
Analog outputs
Model number Short description Page
X67AM1223 X67 analog mixed module, 2 inputs, 2 outputs, ±10 V, 12-bit converter resolution, configurable input filter, open circuit detection 178
for inputs
X67AM1323 X67 analog mixed module, 2 inputs, 2 outputs 0 to 20 mA, 12-bit converter resolution, configurable input filter 191
X67AO1223 X67 analog output module, 4 inputs, ±10 V, 12-bit converter resolution 205
X67AO1323 X67 analog output module, 4 outputs, 0 to 20 mA, 12-bit converter resolution 213
Bus controllers
Model number Short description Page
X67BC4321-1 X67 bus controller, 1 CANopen interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs or outputs, 24 222
VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, I/O power supply possible via CAN bus connector
X67BC4321-10 X67 bus controller, 1 CANopen interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs or outputs, 24 233
VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, CAN bus electrically isolated,
X67BC4321.L08-10 X67 bus controller, 1 CANopen interface, X2X Link power supply 15 W, 16 digital channels configurable as inputs or outputs, 244
24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, CAN bus electrically isolated, M8 connectors, high-density
module
X67BC4321.L12-10 X67 bus controller, 1 CANopen interface, X2X Link power supply 15 W, 16 digital channels configurable as inputs or outputs, 255
24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, CAN bus electrically isolated, M12 connectors, high-density
module
X67BC5321 X67 bus controller, 1 DeviceNet interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs or outputs, 24 266
VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BC6321 X67 bus controller, 1 PROFIBUS DP interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs or outputs, 276
24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BC6321.L08 X67 bus controller, 1 PROFIBUS DP interface, X2X Link power supply 15 W, 16 digital channels configurable as inputs or out- 285
puts, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M8 connectors, high-density module
X67BC6321.L12 X67 bus controller, 1 PROFIBUS DP interface, X2X Link power supply 15 W, 16 digital channels configurable as inputs or out- 294
puts, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-density module
X67BC7321-1 X67 bus controller, 1 CAN I/O interface, extended CAN I/O function, X2X Link power supply 3 W, 8 digital channels config- 304
urable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BC81RT.L12 X67 bus controller, 2 POWERLINK interfaces, X2X Link power supply 15 W, reACTION Technology module, 2 digital inputs, 24 827
VDC, <1 µs, 3 digital channels, 5 VDC, <1 µs, configurable as inputs or outputs, 2 digital channels, 24 VDC, 0.4 A, <1 µs, con-
figurable as inputs or outputs, 2 analog inputs ±10 V, 5 µs 200 kHz sampling frequency, 13-bit converter resolution (including
sign), configurable input filter, 1 analog output ±10 V, 2.5 µs, 13-bit converter resolution (including sign), M12 connectors, high-
density module
X67BC8321-1 X67 bus controller, 1 POWERLINK interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs or outputs, 314
24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BC8321.L12 X67 bus controller, 1 POWERLINK interface, X2X Link power supply 15 W, 16 digital channels configurable as inputs or out- 325
puts, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-density module
X67BC8331 X67 bus controller, 1 POWERLINK interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs or outputs, 336
24 VDC, 2 A, configurable input filter
X67BC8513.L12 X67 bus controller, 1 POWERLINK interface, X2X Link power supply 15 W, 12 digital channels configurable as inputs or out- 350
puts, 24 VDC, 0.5 A, configurable input filter, 1 event counters 50 kHz, 1 analog input 0 to 20 mA, 12-bit, M12 connectors, high-
density module
X67BC8780.L12 X67 POWERLINK bus controller, 1x CAN interface, with active wiring help for 8x M12 connections (star wiring), M12 connec- 372
tions, LED status indicators, high-density module
X67BCD321.L12 X67 bus controller, 1 EtherNet/IP interface, X2X Link power supply 15 W, 16 digital channels configurable as inputs or outputs, 392
24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-density module
X67BCE321.L12 X67 bus controller, 1 PROFINET interface, X2X Link power supply 15 W, 16 digital channels configurable as inputs or outputs, 403
24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-density module
X67BCD321.L12-1 X67 bus controller, 1 EtherNet/IP interface, X2X Link supply 15 W, 16 digital channels configurable as inputs or outputs, 24 392
VDC, 0.5 A, pinning variant, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-density module
X67BCG321.L12 X67 bus controller, 1 EtherCAT interface, X2X Link power supply 15 W, 16 digital channels configurable as inputs or outputs, 415
24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-density module
X67BCJ321 X67 bus controller, 1 Modbus TCP/UPD interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs or out- 425
puts, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BCJ321.L12 X67 bus controller, 1 Modbus TCP/UDP interface, X2X Link power supply 15 W, 16 digital channels configurable as inputs or 436
outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-density module
Communication modules
Model number Short description Page
X67IF1121-1 X67 interface module, 1 RS232 interface, 1 RS422/RS485 interface, 2 digital channels configurable as inputs or outputs, 24 683
VDC, 0.5 A, configurable input filter, 2 inputs 24 VDC, sink, configurable input filter
Counter functions
Model number Short description Page
X67DC1198 X67 digital counter module, 2x 3 inputs 5 V for SSI 1 Mbit/s or ABR 250 kHz, 8 digital channels 24 VDC, 0.1 A, configurable as 448
inputs or outputs or 4 AB counters 100 kHz or 4x comparator outputs or 2x PWM outputs, local time measurement functions
X67DC2322 X67 resolver module, 2x 14-bit resolver input BRX/BRT, 2 digital inputs, 24 VDC, sink, 2 digital outputs, 0.5 A, source 494
Digital inputs
Model number Short description Page
X67DI1371 X67 digital input module, 8 inputs, 24 VDC, sink, input filter 1 ms 507
X67DI1371.L08 X67 digital input module, 16 inputs, 24 VDC, sink, input filter 1 ms, M8 connectors, high-density module 514
X67DI1371.L12 X67 digital input module, 16 inputs, 24 VDC, sink, input filter 1 ms, M12 connectors, high-density module 521
X67DI1372 X67 digital input module, 8 inputs, 24 VDC, source, 1 ms input filter 528
X67DM1321 X67 digital mixed module, 8 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 536
ters 50 kHz
X67DM1321.L08 X67 digital mixed module, 16 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 570
ters 50 kHz, M8 connectors, high-density module
X67DM1321.L12 X67 digital mixed module, 16 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 551
ters 50 kHz, M12 connectors, high-density module
X67DM1321.L12-1 X67 digital mixed module, 16 channels configurable as input or output, 24 VDC, 0.5 A, pinning variant, configurable input filter, 551
2 event counters 50 kHz, M12 connectors, high-density module
X67DM9321 X67 digital mixed module, 8 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 588
ters 50 kHz X2X Link address switch
X67DM9321.L12 X67 digital mixed module, 16 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 603
ters 50 kHz, M12 connectors, X2X Link address switch, high-density module
X67DM9331.L12 X67 digital mixed module, 8 channels configurable as inputs or outputs, 24 VDC, 2 A, configurable input filter, single-channel 622
sensor/actuator supply monitoring, M12 connectors, X2X Link address switch, high-density module
X67UM1352 X67 universal mixed module, 1 input for full-bridge strain gauge evaluation, 24-bit, 4 digital inputs, 24 VDC, sink, 1 digital out- 910
put, 0.5 A, source, 1 digital output, 1 A, source
Digital outputs
Model number Short description Page
X67DM1321 X67 digital mixed module, 8 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 536
ters 50 kHz
X67DM1321.L08 X67 digital mixed module, 16 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 570
ters 50 kHz, M8 connectors, high-density module
X67DM1321.L12 X67 digital mixed module, 16 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 551
ters 50 kHz, M12 connectors, high-density module
X67DM1321.L12-1 X67 digital mixed module, 16 channels configurable as input or output, 24 VDC, 0.5 A, pinning variant, configurable input filter, 551
2 event counters 50 kHz, M12 connectors, high-density module
X67DM9321 X67 digital mixed module, 8 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 588
ters 50 kHz X2X Link address switch
X67DM9321.L12 X67 digital mixed module, 16 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event coun- 603
ters 50 kHz, M12 connectors, X2X Link address switch, high-density module
X67DM9331.L12 X67 digital mixed module, 8 channels configurable as inputs or outputs, 24 VDC, 2 A, configurable input filter, single-channel 622
sensor/actuator supply monitoring, M12 connectors, X2X Link address switch, high-density module
X67DO1332 X67 digital output module, 8 outputs, 24 VDC, 2 A, readable output status 635
X67DO9332.L12 X67 digital output module, 8 outputs, 24 VDC, 2 A, single-channel actuator power supply monitoring, M12 connectors, X2X Link 643
address switch, high-density module
X67DV1311.L08 X67 digital valve control module, 16 digital outputs, 24 VDC, 0.1 A, 1 M16 connection, 16 digital inputs, 24 VDC, sink, config- 655
urable input filter, M8 connectors, high-density module
X67DV1311.L12 X67 digital valve control module, 16 digital outputs, 24 VDC, 0.1 A, 1 M16 connection, 16 digital inputs, 24 VDC, sink, config- 668
urable input filter, M12 connectors, high-density module
X67MM2436 X67 PWM motor module, I/O power supply 24-38.5 VDC ±25%, 2 PWM motor bridges, 3 A continuous current, 5 A peak cur- 711
rent, 2x 3 digital inputs 24 VDC, sink, configurable as incremental encoder
X67SM2436 X67 stepper motor module, I/O power supply 24-38.5 VDC ±25%, max. 8 A, 2 motor connections, 3 A continuous current, 5 A 731
peak current, 2x 3 digital inputs 24 VDC, sink, configurable as incremental encoder, NetTime function
X67SM4320 X67 stepper motor module, I/O power supply 24 VDC ±25%, 4 motor connections, 1 A continuous current, 1.5 A peak current, 786
NetTime function
X67UM1352 X67 universal mixed module, 1 input for full-bridge strain gauge evaluation, 24-bit, 4 digital inputs, 24 VDC, sink, 1 digital out- 910
put, 0.5 A, source, 1 digital output, 1 A, source
Hub modules
Model number Short description Page
X67HB8880.L12 X67 8-port industrial hub (layer 2), 10/100 Mbit/s with autonegotiation, automatic MDIX, 8x M12, 8-32 VDC 704
Motor modules
Model number Short description Page
X67MM2436 X67 PWM motor module, I/O power supply 24-38.5 VDC ±25%, 2 PWM motor bridges, 3 A continuous current, 5 A peak cur- 711
rent, 2x 3 digital inputs 24 VDC, sink, configurable as incremental encoder
X67SM2436 X67 stepper motor module, I/O power supply 24-38.5 VDC ±25%, max. 8 A, 2 motor connections, 3 A continuous current, 5 A 731
peak current, 2x 3 digital inputs 24 VDC, sink, configurable as incremental encoder, NetTime function
X67SM4320 X67 stepper motor module, I/O power supply 24 VDC ±25%, 4 motor connections, 1 A continuous current, 1.5 A peak current, 786
NetTime function
Multifunction
Model number Short description Page
X67DC1198 X67 digital counter module, 2x 3 inputs 5 V for SSI 1 Mbit/s or ABR 250 kHz, 8 digital channels 24 VDC, 0.1 A, configurable as 448
inputs or outputs or 4 AB counters 100 kHz or 4x comparator outputs or 2x PWM outputs, local time measurement functions
X67DC2322 X67 resolver module, 2x 14-bit resolver input BRX/BRT, 2 digital inputs, 24 VDC, sink, 2 digital outputs, 0.5 A, source 494
Other functions
Model number Short description Page
X67DS438A X67 digital signal module, 4x IO-Link master V1.1, 4 digital channels configurable as inputs or outputs, 3-wire connections, Net- 865
Time function
X67UM1352 X67 universal mixed module, 1 input for full-bridge strain gauge evaluation, 24-bit, 4 digital inputs, 24 VDC, sink, 1 digital out- 910
put, 0.5 A, source, 1 digital output, 1 A, source
System supply
Model number Short description Page
X67PS1300 X67 system supply module 24 VDC, X2X Link power supply 15 W, reverse polarity protection, short circuit protection, overload 923
protection, parallel connection possible, redundancy operation possible
Temperature measurement
Model number Short description Page
X67AT1311 X67 temperature input module, 4 inputs for resistance measurement, 2-wire or 4-wire measurement, PT100, resolution 0.01 K 927
X67AT1322 X67 temperature input module, 4 inputs for resistance measurement, 2-wire or 4-wire measurement, PT100, PT1000, KTY10, 937
KTY84, resolution 0.1 K
X67AT1402 X67 temperature input module, 4 thermocouple inputs, Type J, K, S, resolution 0.1 K 947
6 Accessories
Information:
The color of the wires used in field-assembled cables may deviate from the standard. Make sure to
check the proper pinout.
Additional information about the various cables can be found in the respective documentation (see
"Pre-assembled cables" on page 57) or the pinouts in the respective data sheets.
The following overview shows all available accessories for each connector or fieldbus.
X2X Link
X2X Link
Attachment cables X2X Link
Connection cables
X67CA0X21.xxxx Open-ended cables
X67CA0X01.xxxx
X67CA0X31.xxxx X67CA0X41.xxxx
X67CA0X11.xxxx
X67CA0X51.xxxx
X2X Link
M12, 5-pin; Analog and digital inputs and outputs, motor, communication
PROFIBUS
POWERLINK
6.2.1.2 X67CA0X01.xxxx
Dimensions
Length xxxx
⌀15
⌀15
M12
50.4 45.7
Pinout
Male connector Pin Name Wire colors Female connector
1 X2X+ Red
2 1 2 X2X White 1 5 2
3 X2X⊥ Black
3 4 4 X2X\ Blue 4 3
5 NC -
B-keyed B-keyed
M12 1) SHLD -
6.2.1.3 X67CA0X11.xxxx
Dimensions
Length xxxx
37.5 37.5
28.7
33.5
⌀15
M12
⌀15
Pinout
Male connector Pin Name Wire colors Female connector
1 X2X+ Red
2 1 2 X2X White 1 5 2
3 X2X⊥ Black
3 4 4 X2X\ Blue 4 3
5 NC -
B-keyed B-keyed
M12 1) SHLD -
6.2.1.4 X67CA0X21.xxxx
Dimensions
Length xxxx
⌀15
45.7 50
Pinout
Female connector Pin Name Wire colors Open
1 X2X+ Red
1 5 2 2 X2X White
3 X2X⊥ Black For custom
4 3 4 X2X\ Blue wiring
5 NC -
B-keyed
M12 1) SHLD -
Information:
See note in section "Connecting X2X Link interfaces with internal power supply" on page 42.
6.2.1.5 X67CA0X31.xxxx
Dimensions
Length xxxx
37.5
28.7
50
⌀15
Pinout
Female connector Pin Name Wire colors Open
1 X2X+ Red
1 5 2 2 X2X White
3 X2X⊥ Black For custom
4 3 4 X2X\ Blue wiring
5 NC -
B-keyed
M12 1) SHLD -
1) Shield on M12 knurled-head screw in 360° design
Information:
See note in section "Connecting X2X Link interfaces with internal power supply" on page 42.
6.2.1.6 X67CA0X41.xxxx
Dimensions
Length xxxx
⌀15
M12
50
50.4
Pinout
Male connector Pin Name Wire colors Open
2 1 1 X2X+ Red
2 X2X White
For custom
3 4 3 X2X⊥ Black
wiring
4 X2X\ Blue
B-keyed M12 1) SHLD -
Information:
See note in section "Connecting X2X Link interfaces with internal power supply" on page 42.
6.2.1.7 X67CA0X51.xxxx
Dimensions
Length xxxx
37.5
33.5
50
M12
⌀15
Pinout
Male connector Pin Name Wire colors Open
2 1 1 X2X+ Red
2 X2X White
For custom
3 4 3 X2X⊥ Black
wiring
4 X2X\ Blue
B-keyed M12 1) SHLD -
Information:
See note in section "Connecting X2X Link interfaces with internal power supply" on page 42.
6.2.1.8 X67CA0X99.xxxx
Dimensions
Pinout
Name Wire colors
X2X+ Red
X2X White
For custom For custom
X2X⊥ Black
wiring wiring
X2X\ Blue
SHLD -
6.2.2.2 X67CA0P00.xxxx
Dimensions
Length xxxx
⌀9.6
⌀9.6
M8
41.4 35.1
Pinout
M8 male connector, 4-pin Pin Name Wire colors M8 female connector, 4-pin
2 4 1 24 VDC Brown 4 2
2 24 VDC White
1 3 3 GND Blue 3 1
4 GND Black
6.2.2.3 X67CA0P10.xxxx
Dimensions
Length xxxx
23.5 23.5
16.9
23.2
⌀9.6
M8
⌀9.6
Pinout
M8 male connector, 4-pin Pin Name Wire colors M8 female connector, 4-pin
2 4 1 24 VDC Brown 4 2
2 24 VDC White
1 3 3 GND Blue 3 1
4 GND Black
6.2.2.4 X67CA0P20.xxxx
Dimensions
Length xxxx
9.6
⌀
35.1 50
Pinout
M8 female connector, 4-pin Pin Name Wire colors Open
4 2 1 24 VDC Brown
2 24 VDC White For custom
3 1 3 GND Blue wiring
4 GND Black
Information:
Both wires must be used since the current load is split.
6.2.2.5 X67CA0P30.xxxx
Dimensions
Length xxxx
23.5
16.9
50
⌀9.6
Pinout
M8 female connector, 4-pin Pin Name Wire colors Open
4 2 1 24 VDC Brown
2 24 VDC White For custom
3 1 3 GND Blue wiring
4 GND Black
Information:
Both wires must be used since the current load is split.
6.2.2.6 X67CA0P40.xxxx
Dimensions
Length xxxx
⌀9.6
M8
41.4 50
Pinout
M8 male connector, 4-pin Pin Name Wire colors Open
2 4 1 24 VDC Brown
2 24 VDC White For custom
1 3 3 GND Blue wiring
4 GND Black
Information:
Both wires must be used since the current load is split.
6.2.2.7 X67CA0P50.xxxx
Dimensions
Length xxxx
23.5
23.2
50
M8
⌀9.6
Pinout
M8 male connector, 4-pin Pin Name Wire colors Open
2 4 1 24 VDC Brown
2 24 VDC White For custom
1 3 3 GND Blue wiring
4 GND Black
Information:
Both wires must be used since the current load is split.
6.2.3.2 X67CA0D40.xxxx
Dimensions
Length xxxx
⌀9.6
M8
41.4 50
Pinout
Male connector Pin Name Wire colors Open
4 1 Sensor/actuator power supply 24 VDC Brown
3 GND Blue For custom
1 3 4 Input/Output x Black wiring
6.2.3.3 X67CA0D50.xxxx
Dimensions
Length xxxx
23.5
23.2
50
M8
⌀9.6
Pinout
Male connector Pin Name Wire colors Open
4 1 Sensor/actuator power supply 24 VDC Brown
3 GND Blue For custom
1 3 4 Input/Output x Black wiring
6.2.4.2 X67CA0A41.xxxx
Dimensions
Length xxxx
⌀15
M12
50.4 50
Pinout
Male connector Pin Name Wire colors Open
1 Brown
2 1 2 White
5 Pinout, see
3 Blue
module description For custom wiring
3 4 4 Black
5 1) Gray
A-keyed
M12 2) SHLD -
1) Do not use the gray connecting line in connection with X67 modules for which pin 5 is used as a shield connection. The cable shield for this cable is connected
using a union nut.
2) Shield on M12 knurled-head screw in 360° design
6.2.4.3 X67CA0A51.xxxx
Dimensions
Length xxxx
37.5
33.5
50
M12
⌀15
Pinout
Male connector Pin Name Wire colors Open
1 Brown
2 1 2 White
5 Pinout, see
3 Blue
module description For custom wiring
3 4 4 Black
5 1) Gray
A-keyed
M12 2) SHLD -
1) Do not use the gray connecting line in connection with X67 modules for which pin 5 is used as a shield connection. The cable shield for this cable is connected
using a union nut.
2) Shield on M12 knurled-head screw in 360° design
6.2.5.2 X67CA0I41.xxxx
Dimensions
Length xxxx
⌀15
M12
52.3
50
Pinout
Male connector Pin Name Wire colors Open
1 Brown
2 Blue
5 3 White
6 4 4 Green
11
7 3 5 Pink
12 2 6 Yellow
Pinout, see module description For custom wiring
10 7 Black
8
8 Gray
9 1
9 Red
A-keyed 10 Purple
11 Gray/Pink
12 Red/Blue
6.2.5.3 X67CA0I51.xxxx
Dimensions
Length xxxx
37.5
35.3
50
M12
⌀15
Pinout
Male connector Pin Name Wire colors Open
1 Brown
2 Blue
5 3 White
6 4 4 Green
11
7 3 5 Pink
12 2 6 Yellow
Pinout, see module description For custom wiring
10 7 Black
8
8 Gray
9 1
9 Red
A-keyed 10 Purple
11 Gray/Pink
12 Red/Blue
6.2.6.2 X67CA0C02.xxxx
Dimensions
Length xxxx
⌀15
⌀15
M12
46.9 41.9
Pinout
Male connector Pin Name Wire colors Female connector
2 1 1 SHLD Tracer wire / Shield 1 2
5 2 V+ Red 5
3 4 3 CAN GND Black 4 3
4 CAN_H White
A-keyed 5 CAN_L Light blue A-keyed
6.2.6.3 X67CA0C22.xxxx
Dimensions
Length xxxx
⌀15
41.9 50
Pinout
Female connector Pin Name Wire colors Open
1 2 1 SHLD Tracer wire / Shield
5 2 V+ Red
For custom
4 3 3 CAN GND Black
wiring
4 CAN_H White
A-keyed 5 CAN_L Light blue
6.2.6.4 X67CA0C32.xxxx
Dimensions
Length xxxx
31.5
26.4
50
⌀15
Pinout
Female connector Pin Name Wire colors Open
1 2 1 SHLD Tracer wire / Shield
5 2 V+ Red
For custom
4 3 3 CAN GND Black
wiring
4 CAN_H White
A-keyed 5 CAN_L Light blue
6.2.7.2 X67CA0B12.xxxx
Dimensions
L xxxx
37.5 37.5
28.7
33.5
⌀15
M12
⌀15
Pinout
Male connector Pin Name Wire colors Female connector
2 1 1 NC - 1 2
2 A Green
3 4 3 NC - 4 3
4 B Red
B-keyed M121) SHLD - B-keyed
6.2.7.3 X67CA0B22.xxxx
Dimensions
Length xxxx
⌀15
45.7 50
Pinout
Female connector Pin Name Wire colors Open
1 2 1 NC -
2 A Green
For custom
4 3 3 NC -
wiring
4 B Red
B-keyed M121) SHLD -
6.2.7.4 X67CA0B32.xxxx
Dimensions
Length xxxx
37.5
28.7
50
⌀15
Pinout
Female connector Pin Name Wire colors Open
1 2 1 NC -
2 A Green
For custom
4 3 3 NC -
wiring
4 B Red
B-keyed M12 SHLD -
6.2.7.5 X67CA0B52.xxxx
Dimensions
Length xxxx
37.5
33.5
50
M12
⌀15
Pinout
Male connector Pin Name Wire colors Open
2 1 1 NC -
2 A Green
For custom
3 4 3 GND -
wiring
4 B Red
B-keyed M121) SHLD -
⌀15
M12
49.2
30
58
Pinout
Male RJ45 connector Pin Name Diagram M12 connector
1-1 TXD Shield
3 2
2-3 RXD Yellow
1 1
3-2 TXD\
2 Orange 2
6-4 RXD\
White 4 1
3 3
1 6 Blue D-keyed
6 4
6.2.8.3 X67CA0E61.xxxx
Dimensions
Length xxxx
⌀15
⌀15
M12
M12
49.2 49.2
Pinout
Male connector Pin Name Diagram Male connector
1-2 TXD Shield
3 2 3 2
2-1 RXD Yellow
1 1
3-4 TXD\
2 White 2
4-3 RXD\
4 1 Orange 4 1
3 3
D-keyed 4 Blue 4 D-keyed
6.3.2 Sensors/Actuators
Model number Short description Figure
Sensors / actuators
X67AC0D00 X67 male M8 connector, 3-pin, piercing connection
6.3.6 POWERLINK/Ethernet
Model number Short description Figure
POWERLINK/Ethernet
X67AC2E01 X67 male M12 connector, 4-pin, D-keyed, shielded, insulation
piercing connection
6.4.2 Connectors
Model number Short description Figure
Connectors
X67AC8C00 X67 CAN Y-connector
The connectors and couplings of pre-assembled X67 cables have additional width across flats on the knurled-head
screw that can be used for an installation tool. A torque wrench (M8 or M12) is available as an accessory to make
installation easy. It can be used to ensure the absolute safety of the connection to the X67 module.
Model number Short description Figure
Mounting tools
X67ACTQMX X67 torque wrench set, for X67 M8 and M12 connectors, for hex-
head connectors
Products and services from B&R comply with applicable standards. This includes international standards from
organizations such as ISO, IEC and CENELEC, as well as national standards from organizations such as UL, CSA,
DNV GL, etc. We are committed to ensuring the reliability of our products in an industrial environment.
Information:
Certifications that apply to a particular module are available at the following places:
• The data sheet's technical data under "Certifications".
• At www.br-automation.com in the technical data under "Products" in section "Certifications"
• On the side of the module housing
Federal agency on
Former Russian
GOST-R technical regulat-
Federation
ing and metrology
Federal agency on
Eurasian
Eurasian Conformity (EAC) technical regulat-
Trade Union
ing and metrology
Radio Research
Korean Conformity (KC) Korea
Agency (RRA)
Australia
Regulatory Compliance Mark (RCM) ACMA
Oceania
The corresponding declaration of conformity is available for download from the B&R website. For information about
the versions of applicable standards, see the declaration of conformity.
Declaration of conformity
PDF
Homepage > Downloads > Certificates > Declarations of conformity > Declaration of conformity PLC
EN 62061 Safety of machinery - Functional safety of safety-related electrical, electronic and programmable electronic control systems
IEC 61511-1 Functional safety - Safety instrumented systems for the process industry sector
- Part 1: Framework, definitions, system, hardware and software requirements
PL e, Cat. 4:
EN ISO 13849-1 Safety of machinery - Safety-related parts of control systems
- Part 1: General principles for design
EN 61131-2 Programmable logic controllers
- Part 2: Guidance for inspection and routine testing
Declarations of conformity, certificates and any other safety-related documentation can be downloaded from the
B&R website. For information about the versions of applicable standards, see the declaration of conformity.
Declaration of conformity
PDF
Homepage > Downloads > Certificates > Declarations of conformity > Declaration of conformity FS PLC
Certificate
PDF
Homepage > Downloads > Certificates > Safety technology > X20, X67
User's manual
PDF
Homepage > Downloads > Safety technology > Integrated Safety Technology User's Manual
Europe (EU) Each module is also accompanied by an information sheet providing detailed instal-
lation and safety guidelines.
The declaration of conformity and certificate can be downloaded from the B&R website. For information about the
versions of applicable standards, see the declaration of conformity.
Declaration of conformity
PDF
Website > Downloads > Certificates > Declaration of conformity > Declaration of conformity - ATEX X67
Certificate
PDF
Website > Downloads > Certificates > ATEX > X67 > TÜV 05 ATEX 7201 X
Conducted disturbances
Test carried out in accordance with Requirements in accordance with Requirements in accordance with
EN 61000-4-6 EN 61131-2 / Zone B EN 61000-6-2
AC mains inputs/outputs 10 V
150 kHz to 80 MHz
80% AM (1 kHz)
Criteria A
DC mains inputs/outputs 10 V
150 kHz to 80 MHz
80% AM (1 kHz)
Criteria A
Other I/Os and interfaces 10 V1)
150 kHz to 80 MHz
80% AM (1 kHz)
Criteria A
Voltage dips
Test carried out in accordance with Requirements in accordance with Requirements in accordance with
EN 61000-4-11 EN 61131-2 / Zone B EN 61000-6-2
AC power inputs 0% residual voltage
250/300 periods (50/60 Hz)1)
20 attempts
Criteria C
40% residual voltage
10/12 periods (50/60 Hz)1)
20 attempts
Criteria C
70% residual voltage
25/30 periods (50/60 Hz)1)
20 attempts
Criteria C
Short-term interruptions
Test carried out in accordance with Requirements in accordance with Requirements in accordance with
EN 61000-4-11 / EN 61000-4-29 EN 61131-2 / Zone B EN 61000-6-2
AC power inputs 0% residual voltage 0% residual voltage
0.5 periods (50/60 Hz)1) 1 period (50/60 Hz)1)
20 interruptions 3 interruptions
Criteria A Criteria B
DC power inputs 0% residual voltage -
≥10 ms (PS2)
20 interruptions
Criteria A
Voltage fluctuations
Test carried out in accordance with Requirements in accordance with Requirements in accordance with
EN 61000-4-11 / EN 61000-4-29 EN 61131-2 / Zone B EN 61000-6-2
AC power inputs -15% / +10% -
Test duration per 30 minutes
Criteria A
DC power inputs -15% / +20% -
Test duration per 30 minutes
Criteria A
Radiated emissions
Test carried out in accordance with Limits in accordance with Limits in accordance with
EN 55011 / EN 55022 / EN 55016-2-3 EN 61131-2 / Zone B EN 61000-6-4
Electric field / Measured from 10 m 30 MHz to 230 MHz
30 MHz to 1 GHz 40 dB (µV/m) quasi-peak value
230 MHz to 1 GHz
47 dB (µV/m) quasi-peak value
Electric field / Measured from 3 m - 1 GHz to 3 GHz1)
1 GHz to 6 GHz1) 76 dB (µV/m) peak value
56 dB (µV/m) average value
- 3 GHz to 6 GHz1)
80 dB (µV/m) peak value
60 dB (µV/m) average value
1) Uninterrupted duty with movable frequency in all 3 axes (x, y, z); 1 octave per minute
2) 1 g = 10 m/s²
3) 2 sweeps = 1 frequency cycle (fmin → fmax → fmin)
Shock / Operation
Test carried out in accordance with Requirements in accordance with Requirements in accordance with
EN 60068-2-27 EN 61131-2 EN 60721-3-5 / Class 5M3
Shock / Acceleration 15 g Acceleration 30 g
Operation1) Duration 11 ms Duration 11 ms
18 shocks 18 shocks
1) Uninterrupted duty with movable frequency in all 3 axes (x, y, z); 1 octave per minute
2) 1 g = 10 m/s²
3) 2 sweeps = 1 frequency cycle (fmin → fmax → fmin)
Overvoltage category
Requirement per EN 61131-2 Definition per EN 60664-1
Overvoltage category II Equipment of "Overvoltage category II" is energy-consuming equipment to be supplied by the fixed installation.
Pollution degree
Requirement per EN 61131-2 Definition per EN 60664-1
Pollution degree 2 Only non-conductive pollution occurs. Occasionally, however, temporary conductivity caused by condensation
is to be expected.
7.3 UL / CSA
UL Underwriters Laboratories (UL)
Products with this marking have been tested by Underwriters Laboratories and are
listed as "Industrial Control Equipment" in category NRAQ (programmable controllers)
with file number E115267.
This marking is valid for the USA and Canada and simplifies the certification of your
machines and systems in these regions.
Ind. Cont. Eq.
E115267
Canada / USA
Standards applied:
UL 508 Standard for industrial control equipment
UL 61010-1 Safety requirements for electrical equipment for measurement, control, and laboratory use - Part 1: General requirements
UL 61010-2-201 Standard for Safety Requirements for Electrical Equipment for Measurement, Control, and Laboratory Use - Part 2-201:
Particular Requirements for Control Equipment
CSA C22.2 No. 142-M1987 Process control equipment
CSA C22.2 No. 61010-1 Safety requirements for electrical equipment for measurement, control and laboratory use - Part 1: General requirements
CSA C22.2 No. 61010-2-201 Safety requirements for electrical equipment for measurement, control, and laboratory use - Part 2-201: Particular require-
ments for control equipment
Certificate
PDF
Homepage > Downloads > Certificates > UL > X67 > E115267 UL Certificate of Compliance X67
Standards applied:
CSA C22.2 No. 0-M1991 General Requirements - Canadian Electrical Code Part II
CSA C22.2 No. 142-M1987 Process control equipment
CSA C22.2 No. 213-M1987 Non-incendive electrical equipment for use in Class I, Division 2 hazardous locations
UL Std No. 916:2007 Energy Management Equipment
ANSI/ISA 12.12.01:2007 Nonincendive Electrical Equipment for Use in Class I and II, Division 2 and Class III, Division 1 and 2 Hazardous (Classified)
Locations
Certificate
PDF
Homepage > Downloads > Certificates > HazLoc > CSA > X20, X67 > 244665 CSA HazLoc Certificate of Compliance X20, X67
Products with this marking have been tested by an accredited testing laboratory and
approved for import to the Russian Federation (based on EU compliance).
Products with this marking have been tested by an accredited testing laboratory and
approved for import (based on EU compliance) to the newly founded Eurasian Eco-
nomic Union (Russia, Belarus, Kazakhstan, etc.).
Products with this marking have been tested by an accredited testing laboratory and
approved for import to the Korean market (based on EU compliance).
8 Data sheets
8.1.1 Summary
Model number Short description Page
X67AI1223 X67 analog input module, 4 inputs, ±10 V, 12-bit converter resolution, configurable input filter, open circuit 103
detection
X67AI1233 X67 analog input module, 4 inputs, ±10 V, 16-bit converter resolution, configurable input filter, open circuit 115
detection
X67AI1323 X67 analog input module, 4 inputs, 0 to 20 mA or 4 to 20 mA, 12-bit converter resolution, configurable input filter 128
X67AI1333 X67 analog input module, 4 inputs, 0 to 20 mA or 4 to 20 mA, 16-bit converter resolution, configurable input filter 142
X67AI2744 X67 analog input module, 2 full-bridge strain gauge inputs, 24-bit converter resolution 157
X67AI4850 X67 analog input module, 4 inputs, potentiometer displacement gauge 14-bit 170
8.1.2 X67AI1223
The module is equipped with 4 inputs with 12-bit digital converter resolution. The input signal range is ±10 V.
■ 4 analog inputs ±10 V
■ Open/Short circuit detection
■ Configurable digital input filters
■ Very short cycle times
■ Optimal shield grounding on all channels
X2X Link
Connection A: Input
Connection B: Output
Analog inputs 1 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.1.2.8 Pinout
Shield
1 +24 VDC
X1 to X4 2 AI +
M12 ① 3 GND
4 AI -
5 Shield
8.1.2.8.1 Connections X1 to X4
4
1
5
Connections 3/4
AI +
1 2
+ +24 VDC
AI -
5 Connection x
GND 4 3
LED (green)
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Name:
ConfigOutput01
This register is used to define the filter level and input ramp limitation of the input filter.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Defines the filter level 000 Filter switched off
001 Filter level 2
010 Filter level 4
011 Filter level 8
100 Filter level 16
101 Filter level 32
110 Filter level 64
111 Filter level 128
3 Reserved 0
4-6 Defines the input ramp limit 000 The input value is used without limitation
001 Limit value = 0x3FFF (16383)
010 Limit value = 0x1FFF (8191)
011 Limit value = 0x0FFF (4095)
100 Limit value = 0x07FF (2047)
101 Limit value = 0x03FF (1023)
110 Limit value = 0x01FF (511)
111 Limit value = 0x00FF (255)
7 Reserved 0
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
AnalogInput01 to AnalogInput04
The analog input value is mapped in this register.
Data type Value Input signal:
INT -32768 to 32767 Voltage signal -10 to 10 V
Name:
StatusInput01
This register is used to monitor the module inputs. A change in the monitoring status generates an error message.
The following states are monitored depending on the settings:
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Channel 1 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
... ...
6-7 Channel 4 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
This module is equipped with a configurable input filter. The minimum cycle time must be >500 μs. Filtering is
disabled for shorter cycle times.
If the input filter is active, then the scan rate for the channels is measured in ms. The time offset between the
channels is 200 μs. The conversion takes place asynchronously to the network cycle.
Input ramp limitation can only take place when a filter is used; the input ramp is limited before filtering takes place.
The amount the input value changes is checked to make sure that specified limits are not exceeded. If the values
are exceeded, the adjusted input value is equal to the old value ± the limit value.
Configurable limit values:
Value Limit value
0 The input value is used without limitation.
1 0x3FFF = 16383
2 0x1FFF = 8191
3 0x0FFF = 4095
4 0x07FF = 2047
5 0x03FF = 1023
6 0x01FF = 511
7 0x00FF = 255
Input ramp limitation is well suited for suppressing disturbances (spikes). The following examples show the function
of the input ramp limitation based on an input jump and a disturbance.
Example 1
The input value jumps from 8000 to 17000. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
17000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
Example 2
A disturbance interferes with the input value. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
A filter can be defined to prevent large input jumps. This filter is used to bring the input value closer to the actual
analog value over a period of several bus cycles.
Filtering takes place after input ramp limitation.
Formula for calculating the input value:
Value Old Input value
Value New = Value Old - +
Filter level Filter level
Adjustable filter levels:
Value Filter level
0 Filter switched off
1 Filter level 2
2 Filter level 4
3 Filter level 8
4 Filter level 16
5 Filter level 32
6 Filter level 64
7 Filter level 128
The following examples show how filtering works in the event of an input jump or disturbance.
Example 1
The input value jumps from 8000 to 16000. The diagram shows the calculated value with the following settings:
Input ramp limitation = 0
Filter level = 2 or 4
Input value
Calculated value: Filter level 2
Calculated value: Filter level 4
16000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Inputs without filtering 250 µs
Inputs with filtering >500 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Inputs without filtering:
All channels per bus cycle 400 µs
2 channels per bus cycle 300 µs
1 channel per bus cycle 300 µs
Inputs with filtering 1 ms
8.1.3 X67AI1233
The module is equipped with 4 inputs with 16-bit digital converter resolution. The input signal range is ±10 V.
■ 4 analog inputs ±10 V
■ 16-bit digital converter resolution
■ Open/Short circuit detection
■ Configurable digital input filters
■ Very short cycle times
■ Optimal shield grounding on all channels
X2X Link
Connection A: Input
Connection B: Output
Analog inputs 1 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.1.3.8 Pinout
Shield
1 +24 VDC
X1 to X4 2 AI +
M12 ① 3 GND
4 AI -
5 Shield
8.1.3.8.1 Connections X1 to X4
4
1
5
Connections 3/4
AI +
1 2
+ +24 VDC
AI -
5 Connection x
GND 4 3
LED (green)
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Name:
ConfigOutput01
This register is used to define the filter level and input ramp limitation of the input filter.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Defines the filter level 000 Filter switched off
001 Filter level 2
010 Filter level 4
011 Filter level 8
100 Filter level 16
101 Filter level 32
110 Filter level 64
111 Filter level 128
3 Reserved 0
4-6 Defines the input ramp limit 000 The input value is used without limitation
001 Limit value = 0x3FFF (16383)
010 Limit value = 0x1FFF (8191)
011 Limit value = 0x0FFF (4095)
100 Limit value = 0x07FF (2047)
101 Limit value = 0x03FF (1023)
110 Limit value = 0x01FF (511)
111 Limit value = 0x00FF (255)
7 Reserved 0
The input signal is monitored at the upper and lower limit values.
Limit value (default) Voltage signal ±10 V
Upper maximum limit value +10 V +32767 (0x7FFF)
Lower minimum limit value -10 V -32767 (0x8001)
Other limit values can be defined if necessary. Limit values are valid for all channels and activated automatically
by writing to the limit value registers. From this point on, the analog values will be monitored and limited according
to the new limits. The results of monitoring are displayed in the status register.
Name:
ConfigOutput03
This register can be used to configure the lower limit for analog values. If the analog value goes below the limit
value, it is frozen at this value and the corresponding error status bit is set.
Data type Values
INT -32768 to 32767
Information:
The default value of -32768 corresponds to the minimum default value of -10 VDC.
Keep in mind that this setting applies to all channels!
Name:
ConfigOutput04
This register can be used to configure the upper limit for analog values. If the analog value goes above the limit
value, it is frozen at this value and the corresponding error status bit is set.
Data type Values
INT -32768 to 32767
Information:
The default value of 32767 corresponds to the maximum default value at +10 VDC.
Keep in mind that this setting applies to all channels!
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
AnalogInput01 to AnalogInput04
The analog input value is mapped in this register.
Data type Value Input signal:
INT -32768 to 32767 Voltage signal -10 to 10 V
Name:
UnderflowAnalogInput01 to UnderflowAnalogInput04
OverflowAnalogInput01 to OverflowAnalogInput04
This register is used to monitor the module inputs. A change in the monitoring status generates an error message.
The following states are monitored depending on the settings:
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 UnderflowAnalogInput011) 0 No error
1 Below lower limit value
1 OverflowAnalogInput011) 0 No error
1 Above upper limit value
... ...
6 UnderflowAnalogInput041) 0 No error
1 Below lower limit value
7 OverflowAnalogInput041) 0 No error
1 Above upper limit value
1) An open circuit is indicated by the "UnderflowAnalogInput0x" and "OverflowAnalogInput0x" bits being set simultaneously.
Input filter
This module is equipped with a configurable input filter. The minimum cycle time must be >500 μs. Filtering is
disabled for shorter cycle times.
If the input filter is active, then the scan rate for the channels is measured in ms. The time offset between the
channels is 200 μs. The conversion takes place asynchronously to the network cycle.
Input ramp limitation can only take place when a filter is used; the input ramp is limited before filtering takes place.
The amount the input value changes is checked to make sure that specified limits are not exceeded. If the values
are exceeded, the adjusted input value is equal to the old value ± the limit value.
Configurable limit values:
Value Limit value
0 The input value is used without limitation.
1 0x3FFF = 16383
2 0x1FFF = 8191
3 0x0FFF = 4095
4 0x07FF = 2047
5 0x03FF = 1023
6 0x01FF = 511
7 0x00FF = 255
Input ramp limitation is well suited for suppressing disturbances (spikes). The following examples show the function
of the input ramp limitation based on an input jump and a disturbance.
Example 1
The input value jumps from 8000 to 17000. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
17000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
Example 2
A disturbance interferes with the input value. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Filter level
A filter can be defined to prevent large input jumps. This filter is used to bring the input value closer to the actual
analog value over a period of several bus cycles.
Filtering takes place after input ramp limitation.
Formula for calculating the input value:
Value Old Input value
Value New = Value Old - +
Filter level Filter level
Adjustable filter levels:
Value Filter level
0 Filter switched off
1 Filter level 2
2 Filter level 4
3 Filter level 8
4 Filter level 16
5 Filter level 32
6 Filter level 64
7 Filter level 128
The following examples show how filtering works in the event of an input jump or disturbance.
Example 1
The input value jumps from 8000 to 16000. The diagram shows the calculated value with the following settings:
Input ramp limitation = 0
Filter level = 2 or 4
Input value
Calculated value: Filter level 2
Calculated value: Filter level 4
16000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Inputs without filtering 250 µs
Inputs with filtering >500 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Inputs without filtering 400 µs for all inputs
Inputs with filtering 1 ms
Information:
All 4 channels are converted. If the last conversion is not yet complete at the beginning of a cycle, then
the new conversion will be shifted to the start of the next cycle.
8.1.4 X67AI1323
The module is equipped with 4 inputs with 12-bit digital converter resolution. The input signal range is 0 to 20 mA
or 4 to 20 mA.
■ 4 analog inputs 0 to 20 mA or 4 to 20 mA
■ Limit detection
■ Configurable digital input filters
■ Very short cycle times
■ Optimal shield grounding on all channels
X2X Link
Connection A: Input
Connection B: Output
Analog inputs 1 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.1.4.8 Pinout
Shield
1 +24 VDC
X1 to X4 2 AI +
M12 ① 3 GND
4 AI -
5 Shield
8.1.4.8.1 Connections X1 to X4
4
1
5
Connections 3/4
AI +
1 2
+ +24 VDC
AI -
5 Connection x
GND 4 3
Overload 1...4
protection
+
1 2
Input value
A/D converter 5
4 3
I/O status -
LED (green)
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Name:
ConfigOutput01
This register is used to define the filter level and input ramp limitation of the input filter.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Defines the filter level 000 Filter switched off
001 Filter level 2
010 Filter level 4
011 Filter level 8
100 Filter level 16
101 Filter level 32
110 Filter level 64
111 Filter level 128
3 Reserved 0
4-6 Defines the input ramp limit 000 The input value is used without limitation
001 Limit value = 0x3FFF (16383)
010 Limit value = 0x1FFF (8191)
011 Limit value = 0x0FFF (4095)
100 Limit value = 0x07FF (2047)
101 Limit value = 0x03FF (1023)
110 Limit value = 0x01FF (511)
111 Limit value = 0x00FF (255)
7 Reserved 0
Name:
ConfigOutput02
This register determines the measurement range for the analog input.
The 4 to 20 mA measurement range is determined by converting the value from the 0 to 20 mA range. 4 mA equals
digital value 0x0000, and 20 mA equals the value 0x7FFF. Due to the conversion, certain digital values never occur
(higher value range).
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 0 0 to 20 mA
1 4 to 20 mA
... ...
3 Channel 4 0 0 to 20 mA
1 4 to 20 mA
4-7 Reserved 0
The input signal is monitored at the upper and lower limit values. These must be defined according to the operating
mode:
Limit value (default) Current signal 0 to 20 mA Current signal 4 to 20 mA
Upper maximum limit value 20 mA +32767 (0x7FFF) 20 mA +32767 (0x7FFF)
Lower minimum limit value 0 mA 0 (0x0000)1) 4 mA 0 (0x0000)2)
Other limit values can be defined if necessary. Limit values are valid for all channels and activated automatically
by writing to the limit value registers. From this point on, the analog values will be monitored and limited according
to the new limits. The results of monitoring are displayed in the status register.
Examples of limit value settings
Application case Limit value settings
Current signal: 4 to 20 mA A negative limit value must be configured in order to measure values <4 mA with a current signal of 4 to
20 mA: 0 mA corresponds to the value -8192 (0xE000).
When limit values are changed, it is important to note that the configured limit values apply to all channels
in mixed operation.
Name:
ConfigOutput03
This register can be used to configure the lower limit for analog values. If the analog value goes below the limit
value, it is frozen at this value and the corresponding error status bit is set.
Data type Value
INT -32768 to 32767
Information:
• When configured as 0 to 20 mA, this value should be set to 0.
• When configured as 4 to 20 mA, this value can be set to -8192 (corresponds to 0 mA) in order
to display values <4 mA.
Information:
Keep in mind that this setting applies to all channels!
Information:
The default value of 32767 corresponds to the maximum default value at 20 mA.
Information:
Keep in mind that this setting applies to all channels!
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
AnalogInput01 to AnalogInput04
The analog input value is mapped in this register depending on the configured operating mode.
Data type Value Input signal:
INT -8192 to 32767 Current signal 4 to 20 mA
0 to 32767 Current signal 0 to 20 mA
Name:
UnderflowAnalogInput01 to UnderflowAnalogInput04
OverflowAnalogInput01 to OverflowAnalogInput04
StatusAnalogInput01 to StatusAnalogInput04
This register is used to monitor the module inputs. A change in the monitoring status generates an error message.
The following states are monitored depending on the settings:
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 UnderflowAnalogInput01 0 No error
1 Below lower limit value
1 OverflowAnalogInput01 0 No error
StatusAnalogInput01 1 Above upper limit value
... ...
6 UnderflowAnalogInput04 0 No error
1 Below lower limit value
7 OverflowAnalogInput04 0 No error
StatusAnalogInput04 1 Above upper limit value
Input filter
This module is equipped with a configurable input filter. The minimum cycle time must be >500 μs. Filtering is
disabled for shorter cycle times.
If the input filter is active, then the scan rate for the channels is measured in ms. The time offset between the
channels is 200 μs. The conversion takes place asynchronously to the network cycle.
Input ramp limitation can only take place when a filter is used; the input ramp is limited before filtering takes place.
The amount the input value changes is checked to make sure that specified limits are not exceeded. If the values
are exceeded, the adjusted input value is equal to the old value ± the limit value.
Configurable limit values:
Value Limit value
0 The input value is used without limitation.
1 0x3FFF = 16383
2 0x1FFF = 8191
3 0x0FFF = 4095
4 0x07FF = 2047
5 0x03FF = 1023
6 0x01FF = 511
7 0x00FF = 255
Input ramp limitation is well suited for suppressing disturbances (spikes). The following examples show the function
of the input ramp limitation based on an input jump and a disturbance.
Example 1
The input value jumps from 8000 to 17000. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
17000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
Example 2
A disturbance interferes with the input value. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Filter level
A filter can be defined to prevent large input jumps. This filter is used to bring the input value closer to the actual
analog value over a period of several bus cycles.
Filtering takes place after input ramp limitation.
Formula for calculating the input value:
Value Old Input value
Value New = Value Old - +
Filter level Filter level
Adjustable filter levels:
Value Filter level
0 Filter switched off
1 Filter level 2
2 Filter level 4
3 Filter level 8
4 Filter level 16
5 Filter level 32
6 Filter level 64
7 Filter level 128
The following examples show how filtering works in the event of an input jump or disturbance.
Example 1
The input value jumps from 8000 to 16000. The diagram shows the calculated value with the following settings:
Input ramp limitation = 0
Filter level = 2 or 4
Input value
Calculated value: Filter level 2
Calculated value: Filter level 4
16000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Inputs without filtering 250 µs
Inputs with filtering >500 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Inputs without filtering:
All channels per bus cycle 400 µs
2 channels per bus cycle 300 µs
1 channel per bus cycle 300 µs
Inputs with filtering 1 ms
8.1.5 X67AI1333
The module is equipped with 4 inputs with 16-bit digital converter resolution. The input signal range is 0 to 20 mA
or 4 to 20 mA depending on the selection.
■ 4 analog inputs 0 to 20 mA or 4 to 20 mA
■ 16-bit digital converter resolution
■ Limit detection
■ Configurable digital input filters
■ Very short cycle times
■ Optimal shield grounding on all channels
X2X Link
Connection A: Input
Connection B: Output
Analog inputs 1 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.1.5.8 Pinout
Shield
1 +24 VDC
X1 to X4 2 AI +
M12 ① 3 GND
4 AI -
5 Shield
8.1.5.8.1 Connections X1 to X4
4
1
5
Connections 3/4
AI +
1 2
+ +24 VDC
AI -
5 Connection x
GND 4 3
Overload 1...4
protection
+
1 2
Input value
A/D converter 5
4 3
I/O status -
LED (green)
Monitoring of the
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Name:
ConfigOutput01
This register is used to define the filter level and input ramp limitation of the input filter.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Defines the filter level 000 Filter switched off
001 Filter level 2
010 Filter level 4
011 Filter level 8
100 Filter level 16
101 Filter level 32
110 Filter level 64
111 Filter level 128
3 Reserved 0
4-6 Defines the input ramp limit 000 The input value is used without limitation
001 Limit value = 0x3FFF (16383)
010 Limit value = 0x1FFF (8191)
011 Limit value = 0x0FFF (4095)
100 Limit value = 0x07FF (2047)
101 Limit value = 0x03FF (1023)
110 Limit value = 0x01FF (511)
111 Limit value = 0x00FF (255)
7 Reserved 0
Name:
ConfigOutput02
This register determines the measurement range for the analog input.
The 4 to 20 mA measurement range is determined by converting the value from the 0 to 20 mA range. 4 mA equals
digital value 0x0000, and 20 mA equals the value 0x7FFF. Due to the conversion, certain digital values never occur
(higher value range).
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 0 0 to 20 mA
1 4 to 20 mA
... ...
3 Channel 4 0 0 to 20 mA
1 4 to 20 mA
4-7 Reserved 0
The input signal is monitored at the upper and lower limit values. These must be defined according to the operating
mode:
Limit value (default) Current signal 0 to 20 mA Current signal 4 to 20 mA
Upper maximum limit value 20 mA +32767 (0x7FFF) 20 mA +32767 (0x7FFF)
Lower minimum limit value 0 mA 0 (0x0000)1) 4 mA 0 (0x0000)2)
Other limit values can be defined if necessary. Limit values are valid for all channels and activated automatically
by writing to the limit value registers. From this point on, the analog values will be monitored and limited according
to the new limits. The results of monitoring are displayed in the status register.
Examples of limit value settings
Application case Limit value settings
Current signal: 4 to 20 mA A negative limit value must be configured in order to measure values <4 mA with a current signal of 4 to
20 mA: 0 mA corresponds to the value -8192 (0xE000).
When limit values are changed, it is important to note that the configured limit values apply to all channels
in mixed operation.
Name:
ConfigOutput03
This register can be used to configure the lower limit for analog values. If the analog value goes below the limit
value, it is frozen at this value and the corresponding error status bit is set.
Data type Value
INT -32768 to 32767
Information:
• When configured as 0 to 20 mA, this value should be set to 0.
• When configured as 4 to 20 mA, this value can be set to -8192 (corresponds to 0 mA) in order
to display values <4 mA.
Information:
Keep in mind that this setting applies to all channels!
Information:
The default value of 32767 corresponds to the maximum default value at 20 mA.
Information:
Keep in mind that this setting applies to all channels!
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
AnalogInput01 to AnalogInput04
The analog input value is mapped in this register depending on the configured operating mode.
Data type Value Input signal:
INT -8192 to 32767 Current signal 4 to 20 mA
0 to 32767 Current signal 0 to 20 mA
This module is equipped with a configurable input filter. The minimum cycle time must be >500 μs. Filtering is
disabled for shorter cycle times.
If the input filter is active, then the scan rate for the channels is measured in ms. The time offset between the
channels is 200 μs. The conversion takes place asynchronously to the network cycle.
Input ramp limitation can only take place when a filter is used; the input ramp is limited before filtering takes place.
The amount the input value changes is checked to make sure that specified limits are not exceeded. If the values
are exceeded, the adjusted input value is equal to the old value ± the limit value.
Configurable limit values:
Value Limit value
0 The input value is used without limitation.
1 0x3FFF = 16383
2 0x1FFF = 8191
3 0x0FFF = 4095
4 0x07FF = 2047
5 0x03FF = 1023
6 0x01FF = 511
7 0x00FF = 255
Input ramp limitation is well suited for suppressing disturbances (spikes). The following examples show the function
of the input ramp limitation based on an input jump and a disturbance.
Example 1
The input value jumps from 8000 to 17000. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
17000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
Example 2
A disturbance interferes with the input value. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Filter level
A filter can be defined to prevent large input jumps. This filter is used to bring the input value closer to the actual
analog value over a period of several bus cycles.
Filtering takes place after input ramp limitation.
Formula for calculating the input value:
Value Old Input value
Value New = Value Old - +
Filter level Filter level
Adjustable filter levels:
Value Filter level
0 Filter switched off
1 Filter level 2
2 Filter level 4
3 Filter level 8
4 Filter level 16
5 Filter level 32
6 Filter level 64
7 Filter level 128
The following examples show how filtering works in the event of an input jump or disturbance.
Example 1
The input value jumps from 8000 to 16000. The diagram shows the calculated value with the following settings:
Input ramp limitation = 0
Filter level = 2 or 4
Input value
Calculated value: Filter level 2
Calculated value: Filter level 4
16000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Name:
UnderflowAnalogInput01 to UnderflowAnalogInput04
OverflowAnalogInput01 to OverflowAnalogInput04
This register is used to monitor the module inputs. A change in the monitoring status generates an error message.
The following states are monitored depending on the settings:
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 UnderflowAnalogInput01 0 No error
1 Below lower limit value
1 OverflowAnalogInput01 0 No error
1 Above upper limit value
... ...
6 UnderflowAnalogInput04 0 No error
1 Below lower limit value
7 OverflowAnalogInput04 0 No error
1 Above upper limit value
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Inputs without filtering 250 µs
Inputs with filtering >500 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Inputs without filtering 400 µs for all inputs
Inputs with filtering 1 ms
This module is equipped with 2 inputs for evaluating full-bridge strain gauges and works with both 4-wire and 6-wire
strain gauge load cells. The concept applied by the module requires compensation in the measurement system.
This compensation eliminates the absolute uncertainty in the measurement circuit, such as component tolerances,
effective bridge voltage or zero point offset. The measurement precision refers to the absolute (compensated)
value, which will only change as a result of changes in the operating temperature.
■ 2 full-bridge strain gauge inputs
■ Data output rate configurable from 2.5 Hz to 7.5 kHz
X2X Link
Connector A: Input
Connector B: Output
Connections 1, 3: Input 1
Connections 2, 4: Input 2
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.1.6.8 Pinout
Shield
1 SG VCC
X1 to X4 2 Input +
M12 ① 3 SG GND
4 Input -
5 Shield
8.1.6.8.1 Connections X1 to X4
The module is equipped with 2 channels for connecting strain gauge load cells.
• X1 and X3: Channel 1 (connected internally)
• X2 and X4: Channel 2 (connected internally)
Information:
Connections 1 and 3 as well as 2 and 4 are connected to each other internally. This allows 2 strain gauge
load cells to be switched in parallel and connected to the respective channel via these connections.
M12, 5-pin Pinout
Connection 1/2 Pin Name Description
1 SG VCC Strain gauge supply +
1
2 2 Input + Differential input +
3 SG GND Strain gauge supply GND
5
4 Input - Differential input -
5 Shield1) Shield
4 1) Shielding also provided by threaded insert in the module.
3
X1 to X4 → A-keyed (female), input
3
2
4
1
5
Connection 3/4
+U
1 2
4 3
+U +U sense
1 2
4 3
Sense
+U +U
1 2 1 2
5 5
4 3 4 3
When connecting 3 or more full-bridge strain gauges in parallel, 2 lines must be consolidated in one connector.
SG VCC
Reference Reference
Input +
1 3 Local
2 2 Processor port
5
4 5
4
3 1
SG GND
Filter
60 dB/Dec.
Input -
A/D converter
The A/D converter for the module provides a 24-bit measured value. The actual attainable noise-free resolution is
always less than 24-bit, however. This "effective resolution" depends on the data rate and measurement range.
Example:
Because of the conversion method, a data rate of 2.5 Hz and a specified measurement area of 2 mV/V result in
an effective resolution of 18.7 bits:
24-bit
23 21 20 16 15 12 11 8 7 4 3 0
18.7-bit
The low-order bits (grayed out) contain only noise instead of valid values and must therefore not be evaluated.
In a weighing application, the corresponding weight located on the connected load cell should be determined from
the value derived from the module.
The characteristics of the strain gauge load cell are as follows:
• Rated load: 1000 kg
• Strain gauge factor: 4 mV/V
The value for the positive full-scale deflection at a specified rated load of 1000 kg is derived from the bridge factor
of the strain gauge load cell (multiplication with the bridge supply voltage from the module):
4 mV/V × 5.5 V = 22 mV
With a simple Rule of Three calculation, the corresponding value can be calculated (as seen in the table) from
weight to the converter value and vice versa. This simplified theoretical approach is only valid for an ideal mea-
surement system. Calibration of the entire measurement system is recommended because not only the module,
but particularly the strain gauge bridges exhibit tolerances (offset, gain). When taring, the gradient offset is recal-
culated and the gain of the linear equation is determined when normalized. In addition to the calculation displayed
in the table, these calculations must also be carried out in the application.
24-bit value of the module Quantization Corresponding weight
0x007F FFFF 8,388,607 22.0 mV 1000 kg
0x0000 0001 1 2.62 nV 0.119 g
0x0000 20C3 8387 22.0 μV 1 kg
0x0001 0000 65536 171.9 μV 7.81 kg
The values for each LSB can be found in the technical data of the module under "Quantization" (1 LSB in reference
to 16-bit and 1 LSB in reference to 24-bit).
0 4x 8x 12 x 16 x 20 x 24 x
1xf
DATA Frequency
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Name:
ConfigOutput01 to ConfigOutput02
The data rate and measurement range of the A/D converter can be configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Data rate fDATA (samples per second): 0000 2.5
0001 5
0010 10
0011 15
0100 25
0101 30
0110 50
0111 60
1000 100
1001 500
1010 1000
1011 2000
1100 3750
1101 7500
1110 Synchronous mode1)
1111 Reserved
4-6 Standard measurement range (bit 6 = 0) 000 16 mV/V
001 8 mV/V
010 4 mV/V
011 2 mV/V
Extended measurement range (bit 6 = 1)2) 100 256 mV/V
101 128 mV/V
110 64 mV/V
111 32 mV/V
7 Reserved 0 (must be 0)
1) A/D converter is operated synchronously with X2X Link if possible; beginning with firmware 3
2) Firmware V5 or later. In the standard measurement range (2 to 16 mV/V), open circuit detection works reliably at all adjustable data rates. In the extended
measurement range (32 to 256 mV/V), open circuit detection does not work reliably (because of the variable input impedance of the amplifier in relation
to the set data rate).
Synchronous mode
Beginning with firmware version 3, the A/D converter on the module can be operated and read synchronously
to the X2X Link network. Synchronous mode is enabled by selecting the respective operating mode in register
"ConfigOutput" on page 167. A time between 200 and 2000 µs must also be set in register "ConfigCycletime"
on page 168. If this time is a whole number factor or multiple of the configured cycle time of X2X Link, then the
A/D converter is read synchronously to X2X Link.
Information:
The A/D converter cycle time must be ≥1/4 of the X2X cycle time when using synchronous mode!
Bit 2 in "Module status" is set (i.e. A/D converter not running synchronously)...
• ... If the configured A/D converter cycle time cannot be synchronized with X2X Link.
• ... If the module is still in the settling phase.
Jitter, dead time and settling time:
Jitter
A/D converter cycle times <1500 μs Max. ±1 μs
A/D converter cycle times >1500 μs Max. ±4 μs
X2X link dead time X2X cycle time
50 μs +
128
Settling time
Firmware version ≤4 Max. 150 x A/D converter cycle time
Firmware version ≥5 150 x X2X cycle time
The settling time corresponds to the time needed until the A/D converter can be operated after enabling synchro-
nous mode or following conversion of the A/D converter cycle time.
Name:
ConfigCycletime01 to ConfigCycletime02
This register is only used in "Synchronous mode". If synchronous mode is enabled in the A/D converter configura-
tion, then the module attempts to operate the A/D converter as synchronously as possible to X2X Link (based on
the A/D converter cycle time set in this register). It is of course necessary for the X2X Link cycle time and the A/D
converter cycle time to have a certain ratio. The following conditions must be observed:
1 A/D converter cycle time ≥ 1/4 X2X cycle time
2 A/D converter cycle time corresponds to a whole number factor or multiple of the X2X cycle time
3 A/D converter cycle time must be in the range 200 to 2000 µs
Data type Values
UINT 200 to 2000
Name:
StatusInput01
The current state of the module is indicated in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel1: A/D converter values 0 Valid A/D converter value
1 Invalid A/D converter value
1 Channel1: Line status monitoring 0 OK
1 Open circuit
2 Channel1: Only valid in synchronous mode 0 A/D converter runs synchronous to X2X Link
1 A/D converter does not run synchronous to X2X Link
3 Reserved -
4 Channel 2: A/D converter values 0 Valid A/D converter value
1 Invalid A/D converter value (analog value = 0xFF800000). Pos-
sible causes:
• Error in strain gauge supply (bit 1)
• Error in I/O voltage supply (bit 0)
• ADC not (yet) configured
5 Channel 2: Line status monitoring 0 OK
1 Open circuit
6 Channel 2: Only valid in synchronous mode 0 A/D converter runs synchronous to X2X Link
1 A/D converter does not run synchronous to X2X Link
7 Reserved -
1) In the standard measurement range (2 to 16 mV/V), open circuit detection works reliably at all adjustable data rates. In the extended measurement range
(32 to 256 mV/V, firmware V5 or later), open circuit detection does not work reliably (because of the variable input impedance of the amplifier in relation
to the set data rate).
Name:
AnalogInput01 to AnalogInput02
This register contains the raw value determined by the A/D converter for the full-bridge strain gauge with 24-bit
resolution.
Data type Values Information
DINT 0xFF800001 to 0x007FFFFF Valid range of values
0x007FFFFF Overflow
0xFF800001 Underflow
0xFF800000 Invalid value
Effective resolution
In principle, the effective resolution of the A/D converter is dependent on the data rate and the measurement range
(see "Effective resolution of the A/D converter" on page 164).
The following table shows how the effective resolution (in bits), or the RMS value range of the strain gauge value
depend on the module configuration (data rate, measurement area).
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
250 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
133 to 400 µs depending on the data rate
8.1.7 X67AI4850
This module is a 4-channel analog input module. It is used to evaluate potentiometer displacement gauges.
■ 4 inputs for potentiometer displacement gauge
X2X Link
Connection A: Input
Connection B: Output
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.1.7.8 Pinout
Shield
1 +24 VDC
X1 to X4 2 AI +
M12 ① 3 GND
4 NC
5 Shield
8.1.7.8.1 Connections X1 to X4
4
1
5
Connections 3/4
Potentiometer supply +
Potentiometer
1 2
Slider for displacement gauge ①
5 Connection x
GND 4 3
②
A/D converter
Reference
Potentiometer supply +
1
2 Slider for displacement gauge
5
4
3 Local
Shield Processor port
Filter
Potentiometer
Supply GND
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Name:
AnalogInput01 to AnalogInput04
The analog input value of the potentiometer is mapped in this register.
Data type Value Input signal:
INT 0 to 32767 0 to 100% of the potentiometer
Name:
StatusInput01
This register is used to monitor the module inputs. A change in the monitoring status generates an error message.
The following states are monitored depending on the settings:
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Channel 1 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
... ...
6-7 Channel 4 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
Name:
ModulState
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
250 µs
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
250 µs
8.2.1 Summary
Model number Short description Page
X67AM1223 X67 analog mixed module, 2 inputs, 2 outputs, ±10 V, 12-bit converter resolution, configurable input filter, open 178
circuit detection for inputs
X67AM1323 X67 analog mixed module, 2 inputs, 2 outputs 0 to 20 mA, 12-bit converter resolution, configurable input filter 191
8.2.2 X67AM1223
The module is equipped with 2 inputs and 2 outputs with 12-bit digital converter resolution. The input/output signal
range is ±10 V.
■ 2 analog inputs, 2 analog outputs, ±10 V each
■ Open circuit detection on the inputs
■ Configurable digital input filters
■ Very short cycle times
■ Optimal shield grounding on all channels
X2X Link
Connection A: Input
Connection B: Output
Analog inputs: 1 to 2
Analog outputs: 3 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.2.2.8 Pinout
Shield
1 +24 VDC
X1 to X2 2 AI +
M12 ① 3 GND
4 AI -
5 Shield
Shield
1 AO +
X3 to X4 2 +24 VDC
M12 ① 3 AO - (GND)
4 GND
5 Shield
8.2.2.8.1 Connections X1 to X2
8.2.2.8.2 Connections X3 to X4
Analog inputs
Voltage source AI +
1 2
+ +24 VDC
AI -
5 Connection x
GND 4 3
Analog outputs
+24 VDC
1 2
AO +
Load
+
GND
5 Connection x
AO - 4 3
Analog input
1...2
+
1 2
Input value
A/D converter 5
4 3
I/O status -
LED (green)
LED (orange)
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
X2X
I/O
0 1 2 3 4 5
Values output in the next cycle
Value transfer
0 1 2 3 4 5
X2X
I/O
0 1 2 3 4 5
Values output in the same cycle
Name:
ConfigOutput01
This register is used to define the filter level and input ramp limitation of the input filter.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Defines the filter level 000 Filter switched off
001 Filter level 2
010 Filter level 4
011 Filter level 8
100 Filter level 16
101 Filter level 32
110 Filter level 64
111 Filter level 128
3 Reserved 0
4-6 Defines the input ramp limit 000 The input value is used without limitation
001 Limit value = 0x3FFF (16383)
010 Limit value = 0x1FFF (8191)
011 Limit value = 0x0FFF (4095)
100 Limit value = 0x07FF (2047)
101 Limit value = 0x03FF (1023)
110 Limit value = 0x01FF (511)
111 Limit value = 0x00FF (255)
7 Reserved 0
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
AnalogInput01 to AnalogInput02
The analog input value is mapped in this register.
Data type Value Input signal:
INT -32768 to 32767 Voltage signal -10 to 10 VDC
Corrected values are output in the next cycle if the minimum cycle is ≥400 μs.
Name:
AnalogOutput01 to AnalogOutput02
The analog output value is mapped in this register.
Data type Value Output signal:
INT -32768 to 32767 Voltage signal -10 to 10 V
Name:
StatusInput01
This register is used to monitor the module inputs. A change in the monitoring status generates an error message.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Channel 1 00 No error
01 Below lower limit value1)
01 Above upper limit value1)
11 Open line
2-3 Channel 2 00 No error
01 Below lower limit value1)
10 Above upper limit value1)
11 Open line
4-7 Reserved 0
This module is equipped with a configurable input filter. The minimum cycle time must be >500 μs. Filtering is
disabled for shorter cycle times.
If the input filter is active, then the scan rate for the channels is measured in ms. The time offset between the
channels is 200 μs. The conversion takes place asynchronously to the network cycle.
Input ramp limitation can only take place when a filter is used; the input ramp is limited before filtering takes place.
The amount the input value changes is checked to make sure that specified limits are not exceeded. If the values
are exceeded, the adjusted input value is equal to the old value ± the limit value.
Configurable limit values:
Value Limit value
0 The input value is used without limitation.
1 0x3FFF = 16383
2 0x1FFF = 8191
3 0x0FFF = 4095
4 0x07FF = 2047
5 0x03FF = 1023
6 0x01FF = 511
7 0x00FF = 255
Input ramp limitation is well suited for suppressing disturbances (spikes). The following examples show the function
of the input ramp limitation based on an input jump and a disturbance.
Example 1
The input value jumps from 8000 to 17000. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
17000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
Example 2
A disturbance interferes with the input value. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
A filter can be defined to prevent large input jumps. This filter is used to bring the input value closer to the actual
analog value over a period of several bus cycles.
Filtering takes place after input ramp limitation.
Formula for calculating the input value:
Value Old Input value
Value New = Value Old - +
Filter level Filter level
Adjustable filter levels:
Value Filter level
0 Filter switched off
1 Filter level 2
2 Filter level 4
3 Filter level 8
4 Filter level 16
5 Filter level 32
6 Filter level 64
7 Filter level 128
The following examples show how filtering works in the event of an input jump or disturbance.
Example 1
The input value jumps from 8000 to 16000. The diagram shows the calculated value with the following settings:
Input ramp limitation = 0
Filter level = 2 or 4
Input value
Calculated value: Filter level 2
Calculated value: Filter level 4
16000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without filtering 250 μs
With filtering >500 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Inputs without filtering
All channels per bus cycle 400 μs
Inputs with filtering 1 ms
Outputs 400 μs
8.2.3 X67AM1323
The module is equipped with 2 inputs and 2 outputs with 12-bit digital converter resolution. The input/output signal
range is 0 to 20 mA.
■ 2 analog inputs, 2 analog outputs, each 0 to 20 mA
■ Configurable digital input filters
■ Very short cycle times
■ Optimal shield grounding on all channels
X2X Link
Connection A: Input
Connection B: Output
Analog inputs: 1 to 2
Analog outputs: 3 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.2.3.8 Pinout
Shield
1 +24 VDC
X1 to X2 2 AI +
M12 ① 3 GND
4 AI -
5 Shield
Shield
1 AO +
X3 to X4 2 +24 VDC
M12 ① 3 AO - (GND)
4 GND
5 Shield
8.2.3.8.1 Connections X1 to X2
8.2.3.8.2 Connections X3 to X4
Analog inputs
Current source AI +
1 2
+ +24 VDC
AI -
5 Connection x
GND 4 3
Analog outputs
+24 VDC
1 2
AO +
Load
+
GND
5 Connection x
AO - 4 3
LED (green)
LED (orange)
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
X2X
I/O
0 1 2 3 4 5
Values output in the next cycle
Value transfer
0 1 2 3 4 5
X2X
I/O
0 1 2 3 4 5
Values output in the same cycle
Name:
ConfigOutput01
This register is used to define the filter level and input ramp limitation of the input filter.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Defines the filter level 000 Filter switched off
001 Filter level 2
010 Filter level 4
011 Filter level 8
100 Filter level 16
101 Filter level 32
110 Filter level 64
111 Filter level 128
3 Reserved 0
4-6 Defines the input ramp limit 000 The input value is used without limitation
001 Limit value = 0x3FFF (16383)
010 Limit value = 0x1FFF (8191)
011 Limit value = 0x0FFF (4095)
100 Limit value = 0x07FF (2047)
101 Limit value = 0x03FF (1023)
110 Limit value = 0x01FF (511)
111 Limit value = 0x00FF (255)
7 Reserved 0
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
AnalogInput01 to AnalogInput02
The analog input value is mapped in this register.
Data type Value Input signal:
INT 0 to 32767 Voltage signal 0 to 20 mA
Corrected values are output in the next cycle if the minimum cycle is ≥400 μs.
Name:
AnalogOutput01 to AnalogOutput02
The analog output value is mapped in this register.
Data type Value Output signal:
INT 0 to 32767 Voltage signal 0 to 20 mA
Name:
StatusAnalogInput01 to StatusAnalogInput02
This register is used to monitor the module inputs. A change in the monitoring status generates an error message.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 StatusAnalogInput01 00 No error
01 Reserved
10 Below upper limit value1)
11 Reserved
2-3 StatusAnalogInput02 00 No error
01 Reserved
10 Above upper limit value1)
11 Reserved
4-7 Reserved 0
This module is equipped with a configurable input filter. The minimum cycle time must be >500 μs. Filtering is
disabled for shorter cycle times.
If the input filter is active, then the scan rate for the channels is measured in ms. The time offset between the
channels is 200 μs. The conversion takes place asynchronously to the network cycle.
Input ramp limitation can only take place when a filter is used; the input ramp is limited before filtering takes place.
The amount the input value changes is checked to make sure that specified limits are not exceeded. If the values
are exceeded, the adjusted input value is equal to the old value ± the limit value.
Configurable limit values:
Value Limit value
0 The input value is used without limitation.
1 0x3FFF = 16383
2 0x1FFF = 8191
3 0x0FFF = 4095
4 0x07FF = 2047
5 0x03FF = 1023
6 0x01FF = 511
7 0x00FF = 255
Input ramp limitation is well suited for suppressing disturbances (spikes). The following examples show the function
of the input ramp limitation based on an input jump and a disturbance.
Example 1
The input value jumps from 8000 to 17000. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
17000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
Example 2
A disturbance interferes with the input value. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
A filter can be defined to prevent large input jumps. This filter is used to bring the input value closer to the actual
analog value over a period of several bus cycles.
Filtering takes place after input ramp limitation.
Formula for calculating the input value:
Value Old Input value
Value New = Value Old - +
Filter level Filter level
Adjustable filter levels:
Value Filter level
0 Filter switched off
1 Filter level 2
2 Filter level 4
3 Filter level 8
4 Filter level 16
5 Filter level 32
6 Filter level 64
7 Filter level 128
The following examples show how filtering works in the event of an input jump or disturbance.
Example 1
The input value jumps from 8000 to 16000. The diagram shows the calculated value with the following settings:
Input ramp limitation = 0
Filter level = 2 or 4
Input value
Calculated value: Filter level 2
Calculated value: Filter level 4
16000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without filtering 250 μs
With filtering >500 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Inputs without filtering
All channels per bus cycle 400 μs
Inputs with filtering 1 ms
Outputs 400 μs
8.3.1 Summary
Model number Short description Page
X67AO1223 X67 analog output module, 4 outputs, ±10 V, 12-bit converter resolution 205
X67AO1323 X67 analog output module, 4 outputs, 0 to 20 mA, 12-bit converter resolution 213
8.3.2 X67AO1223
The module is equipped with 4 inputs with 12-bit digital converter resolution. The output signal range is ±10 V.
■ 4 analog outputs ±10 V
■ Integrated enable relay for initial phase
■ Very short cycle times
■ Optimal shield grounding on all channels
X2X Link
Connection A: Input
Connection B: Output
Analog outputs 1 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.3.2.8 Pinout
Shield
1 AO +
X1 to X4 2 +24 VDC
M12 ① 3 AO - (GND)
4 GND
5 Shield
8.3.2.8.1 Connections X1 to X4
4
1
5
Connections 3/4
+24 VDC
1 2
AO +
Load
+ 5 Connection x
GND
AO - 4 3
LED (orange)
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
X2X
I/O
0 1 2 3 4 5
Values output in the next cycle
Value transfer
0 1 2 3 4 5
X2X
I/O
0 1 2 3 4 5
Values output in the same cycle
Corrected values are output in the next cycle if the minimum cycle is ≥400 μs.
Name:
AnalogOutput01 to AnalogOutput04
This register is used to indicate the analog output value.
Data type Value Output signal:
INT -32768 to 32767 Voltage signal -10 to 10 V
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
250 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
400 μs
8.3.3 X67AO1323
The module is equipped with 4 inputs with 12-bit digital converter resolution. The output signal range is 0 to 20 mA.
■ 4 analog outputs 0 to 20 mA
■ Integrated enable relay for initial phase
■ Very short cycle times
■ Optimal shield grounding on all channels
X2X Link
Connection A: Input
Connection B: Output
Analog outputs 1 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.3.3.8 Pinout
Shield
1 AO +
X1 to X4 2 +24 VDC
M12 ① 3 AO - (GND)
4 GND
5 Shield
8.3.3.8.1 Connections X1 to X4
4
1
5
Connections 3/4
+24 VDC
1 2
AO +
Load
+
GND
5 Connection x
AO - 4 3
LED (orange)
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
X2X
I/O
0 1 2 3 4 5
Values output in the next cycle
Value transfer
0 1 2 3 4 5
X2X
I/O
0 1 2 3 4 5
Values output in the same cycle
Corrected values are output in the next cycle if the minimum cycle is ≥400 μs.
Name:
AnalogOutput01 to AnalogOutput04
This register is used to indicate the analog output value mode.
Data type Value Output signal:
INT 0 to 32767 Current signal 0 to 20 mA
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
250 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
400 μs
8.4.1 Summary
Model number Short description Page
X67BC4321-1 X67 bus controller, 1 CANopen interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs 222
or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, I/O power supply possible via
CAN bus connector
X67BC4321-10 X67 bus controller, 1 CANopen interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs 233
or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, CAN bus electrically isolated,
X67BC4321.L08-10 X67 bus controller, 1 CANopen interface, X2X Link power supply 15 W, 16 digital channels configurable as 244
inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, CAN bus electrically isolated,
M8 connectors, high-density module
X67BC4321.L12-10 X67 bus controller, 1 CANopen interface, X2X Link power supply 15 W, 16 digital channels configurable as 255
inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, CAN bus electrically isolated,
M12 connectors, high-density module
X67BC5321 X67 bus controller, 1 DeviceNet interface, X2X Link power supply 3 W, 8 digital channels configurable as inputs 266
or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BC6321 X67 bus controller, 1 PROFIBUS DP interface, X2X Link power supply 3 W, 8 digital channels configurable as 276
inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BC6321.L08 X67 bus controller, 1 PROFIBUS DP interface, X2X Link power supply 15 W, 16 digital channels configurable 285
as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M8 connectors, high-
density module
X67BC6321.L12 X67 bus controller, 1 PROFIBUS DP interface, X2X Link power supply 15 W, 16 digital channels configurable 294
as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-
density module
X67BC7321-1 X67 bus controller, 1 CAN I/O interface, extended CAN I/O function, X2X Link power supply 3 W, 8 digital 304
channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BC8321-1 X67 bus controller, 1 POWERLINK interface, X2X Link power supply 3 W, 8 digital channels configurable as 314
inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BC8321.L12 X67 bus controller, 1 POWERLINK interface, X2X Link power supply 15 W, 16 digital channels configurable 325
as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-
density module
X67BC8331 X67 bus controller, 1 POWERLINK interface, X2X Link power supply 3 W, 8 digital channels configurable as 336
inputs or outputs, 24 VDC, 2 A, configurable input filter
X67BC8513.L12 X67 bus controller, 1 POWERLINK interface, X2X Link power supply 15 W, 12 digital channels configurable as 350
inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 1 event counters 50 kHz, 1 analog input 0 to 20 mA,
12-bit, M12 connectors, high-density module
X67BC8780.L12 X67 POWERLINK bus controller, 1x CAN interface, with active wiring help for 8x M12 connections (star wiring), 372
M12 connections, LED status indicators, high-density module
X67BCD321.L12 X67 bus controller, 1 EtherNet/IP interface, X2X Link power supply 15 W, 16 digital channels configurable as 392
inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-
density module
X67BCD321.L12-1 X67 bus controller, 1 EtherNet/IP interface, X2X Link supply 15 W, 16 digital channels configurable as inputs 392
or outputs, 24 VDC, 0.5 A, pinning variant, configurable input filter, 2 event counters 50 kHz, M12 connectors,
high-density module
X67BCE321.L12 X67 bus controller, 1 PROFINET interface, X2X Link power supply 15 W, 16 digital channels configurable as 403
inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-
density module
X67BCG321.L12 X67 bus controller, 1 EtherCAT interface, X2X Link power supply 15 W, 16 digital channels configurable as 415
inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-
density module
X67BCJ321 X67 bus controller, 1 Modbus TCP/UPD interface, X2X Link power supply 3 W, 8 digital channels configurable 425
as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz
X67BCJ321.L12 X67 bus controller, 1 Modbus TCP/UDP interface, X2X Link power supply 15 W, 16 digital channels configurable 436
as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters 50 kHz, M12 connectors, high-
density module
8.4.2 X67BC4321-1
CAN (Controller Area Network) systems are widespread in the field of automation technology. CAN topology is
based on a line structure and uses twisted wire pairs for data transfer. CANopen is a higher-layer protocol based
on CAN. As a standardized protocol, it provides a high degree of flexibility for implementing a wide range of con-
figurations.
These bus controllers make it possible to connect X2X Link I/O nodes to CANopen. Both bus controllers are
equipped with automatic transfer rate detection and auto-mapping of the I/O modules connected via X2X Link.
All CANopen operating modes such as synchronous, event, and polling modes are supported together with PDO
linking, life/node guarding, emergency objects, and much more.
On the bus controller, it is possible to supply the CAN interface via the male M12 CAN bus connector. This elimi-
nates the need to supply the power via the M8 power supply connector.
• Fieldbus: CANopen
• 8 digital channels, configurable as inputs or outputs
• Simple I/O configuration via the fieldbus
• Integrated connection to local expansion via X2X Link for 39 additional modules
• Cycle time for local expansion configurable from 400 μs to 1.3 ms (default: 1 ms)
Information:
This bus controller only supports the standard function model for multi-function modules. The stan-
dard function model is explained in the description for each multi-function module.
Long flash
400 800
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
3
Flashing
500
Flickering
green/red
50
All times in ms
Digital inputs/outputs 1 to 8
The bus controller is connected to the fieldbus using pre-assembled cables. The connection is made using M12
circular connectors.
Connection Pinout
Pin Name
3 A 1 Shield1)
2 24 VDC I/O power supply
3 CAN⊥
2
4 CAN_High
5 CAN_Low
4
1 1) Shield connection also made via threaded insert in the module
5
A → A-keyed (male), input
The node number and transfer rate are configured using the two number switches on the bus controller.
The transfer rate can be specified in 2 ways:
• Automatic detection by bus controller (see "Automatic transfer rate detection" on page 227)
• Programmed by the user (see "Setting the transfer rate" on page 227)
High Low
After booting, the bus controller goes into "Listen only" mode. This means the bus controller behaves passively
on the bus and only listens.
The bus controller attempts to receive valid objects. If receive errors occur, the controller switches to the next
transfer rate in the lookup table.
If no objects are received, all transfer rates are tested cyclically. This procedure is repeated until valid objects are
received.
Lookup table
The controller tests the transfer rate according to this table. Beginning with the starting transfer rate (1000 kbit/s),
the controller switches to the next lower transfer rate. At the end of the table, the bus controller restarts the search
from the beginning.
Transfer rate
1000 kbit/s
800 kbit/s
500 kbit/s
250 kbit/s
125 kbit/s
100 kbit/s
50 kbit/s
20 kbit/s
10 kbit/s
The bus controller will detect the transfer rate automatically by default. Switch positions 0x80 to 0x88 can be used
to set a fixed transfer rate, or 0x89 can be used to enable automatic transfer rate detection.
Switch position Transfer rate
0x80 1000 kbit/s
0x81 800 kbit/s
0x82 500 kbit/s
0x83 250 kbit/s
0x84 125 kbit/s
0x85 100 kbit/s
0x86 50 kbit/s
0x87 20 kbit/s
0x88 10 kbit/s
0x89 Automatic transfer rate detection
A digital mixed module is already integrated in the bus controller. Up to 39 additional I/O modules can be connected
to the bus controller.
CANopen
master
BC PS
+
DM
X67PS1300
BC
+
DM
Information:
3 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This supply module provides 15 W
for additional modules. It should be mounted in the middle of the modules that are to be supplied with
power.
The bus controller is connected to the fieldbus using a Y-connector. This allows the bus controller to be exchanged
without interrupting fieldbus communication.
The bus terminating resistor is housed in a connector and screwed onto the Y-connector when needed.
Fieldbus
Attachment cables Fieldbus Male connector
X67CA0C22.xxxx Connection cables X67AC0C0/X67AC2C01
X67CA0C32.xxxx X67CA0C02.xxxx or
Fieldbus
Fieldbus Terminating resistor
Y-connector X67AC9C03
X67CA8C00
X2X Link
X2X Link Open-ended cables
Connection cables X67CA0X41.xxxx
X67CA0X01.xxxx X67CA0X51.xxxx
X67CA0X11.xxxx
Additional modules are connected to the bus controller via X2X Link using pre-assembled cables. The connection
is made using M12 circular connectors.
Connection Pinout
Pin Name
B 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield provided by threaded insert in the module
1
B → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector C
(male). Connector D (female) is used to route the I/O power supply to other modules. The X2X Link power supply
and the CAN and I/O power supply are fed separately via pins 1 and 2.
Connection Pinout
2 C Pin Connector C (male) Connector D (female)
1 1 24 VDC X2X Link 24 VDC I/O
2 24 VDC CAN and I/O 24 VDC I/O
4
3 GND GND
4 GND GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 C → Connector (female) in module, routing of I/O power supply
1
The electrically isolated power supply integrated on the module for supplying the X2X Link can supply up to 4 X67
modules without having to install an additional X67PS1300 system supply module.
Because the I/O power supply for CAN bus and I/O is not isolated on this bus controller, it is not possible to shut
off the I/O power supply using an E-stop switch and still maintain CAN or X2X Link communication.
It is possible to supply the module with 24 VDC solely via pin 2 of the CAN interface (male).
Information:
There is no integrated overload protection. An external 1.6 A fuse must therefore be installed to prevent
damage to the module (e.g. caused by a short circuit on the supply routing).
The voltage supplied via pin 2 of CAN interface A (male) is also available on pins 1 and 2 of M8 connector D
(female).
Information:
Note the following if voltage is supplied via pin 2 of the CAN interface and routed via connector D
(female):
• A maximum of one additional I/O module can be connected.
• A maximum load of 400 mA can be applied to the digital I/O channels.
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.2.9.1 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.4.2.9.2 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
VDR 3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
Coil resistance [Ω]
100 mH
100
10 mH
50
0.1 1 10 100
Additional documentation about bus controller functions as well as the necessary import files for the master engi-
neering tool are available in the Downloads section of the B&R website (www.br-automation.com).
8.4.3 X67BC4321-10
CAN (Controller Area Network) systems are widespread in the field of automation technology. CAN topology is
based on a line structure and uses twisted wire pairs for data transfer. CANopen is a higher-layer protocol based
on CAN. As a standardized protocol, it provides a high degree of flexibility for implementing a wide range of con-
figurations.
The bus controller makes it possible to connect up to 253 X2X Link I/O modules to CANopen. A transition between
IP20 and IP67 protection outside of the control cabinet is possible by aligning X20, X67 or XV modules one after
the other as needed at distances up to 100m. All CANopen transmission types such as synchronous, event and
polling modes are supported together with PDO linking, life/node guarding, emergency objects, and much more.
• Fieldbus: CANopen
• 8 digital channels, configurable as inputs or outputs
• Auto-configuration of I/O modules
• Convenient I/O configuration with Automation Studio V4.3 and later
• Constant response times even with large amounts of data (max. 32 Rx and 32 Tx PDOs)
• Configurable I/O cycle (0.5 to 4 ms)
• Possible to configure the transfer rate or have it detected automatically
• Heartbeat consumer and producer, emergency producer
• 2x SDO server, NMT slave
• Simple bootup (autostart)
Information:
Only the standard function model (see the respective module description) is supported when the bus
controller is used together with multi-function modules it has automatically configured itself.
Automation Studio V4.3 or later can be used to create configuration files (e.g. DCF files) in 6 easy steps.
All other function models are also supported by transferring configuration data to the bus controller
(e.g. via the master environment with an SDO download).
Automation Studio can be downloaded at no cost from the B&R website www.br-automation.com. The
evaluation license is permitted to be used to create complete configurations for fieldbus bus con-
trollers at no cost.
Quad flash
200 200 200 200 200 200 200 1000
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
3
Flashing
500
Green/Red
Flickering
50
All times in ms
Digital inputs/outputs 1 to 8
The bus controller is connected to the fieldbus using pre-assembled cables. The connection is made using M12
circular connectors.
Connection Pinout
Pin Name
3 A 1 Shield1)
2 Not used
3 CAN⊥
2
4 CAN_High
5 CAN_Low
4
1 1) Shield also provided by threaded insert in module.
5
A → A-keyed (male), input
The node number and transfer rate are configured using the two number switches on the bus controller.
The transfer rate can be specified in 2 ways:
• Automatic detection by bus controller (see "Automatic transfer rate detection" on page 238)
• Programmed by the user (see "Setting the transfer rate" on page 238)
High Low
After booting, the bus controller goes into "Listen only" mode. This means the bus controller behaves passively
on the bus and only listens.
The bus controller attempts to receive valid objects. If receive errors occur, the controller switches to the next
transfer rate in the lookup table.
If no objects are received, all transfer rates are tested cyclically. This procedure is repeated until valid objects are
received.
Lookup table
The controller tests the transfer rate according to this table. Beginning with the starting transfer rate (1000 kbit/s),
the controller switches to the next lower transfer rate. At the end of the table, the bus controller restarts the search
from the beginning.
Transfer rate
1000 kbit/s
800 kbit/s
500 kbit/s
250 kbit/s
125 kbit/s
100 kbit/s
50 kbit/s
20 kbit/s
10 kbit/s
The bus controller will detect the transfer rate automatically by default. Switch positions 0x80 to 0x88 can be used
to set a fixed transfer rate, or 0x89 can be used to enable automatic transfer rate detection.
Switch position Transfer rate
0x80 1000 kbit/s
0x81 800 kbit/s
0x82 500 kbit/s
0x83 250 kbit/s
0x84 125 kbit/s
0x85 100 kbit/s
0x86 50 kbit/s
0x87 20 kbit/s
0x88 10 kbit/s
0x89 Automatic transfer rate detection
The node number position 0x92 can be used to save automatically generated configurations. This makes it possible
to work with a standardized configuration without having to adapt the application to changes associated with service
work or different development stages for example.
1. Turn off the power supply to the bus controller.
2. Set the node number to 0x90.
3. Turn on the power supply to the bus controller.
4. Wait until the "MS" LED flashes green.
5. The node number switch must be set to 0x00 and then back to 0x90 within this time window of 5 seconds
(turn switch "High").
6. Wait until the "MS" LED blinks with a red double-flash (parameters have been cleared).
7. Turn off the power supply to the bus controller.
8. Set the node number to 0x92.
9. Turn on the power supply to the bus controller.
10.Wait until the "MS" LED flashes green.
11. The node number switch must be set to 0x02 and then back to 0x92 within this time window of 5 seconds
(turn switch "High").
12.Wait until the "MS" LED blinks with a red quad-flash (parameters have been saved).
13.Turn off the power supply to the bus controller.
14.Set the desired node number (0x01 - 0x7F).
15.Turn on the power supply to the bus controller.
16.The bus controller boots with the set node number and automatic transfer rate detection.
Information:
A mapping tool for decoding the saved PDO mapping is available in the Download section of the B&R
website (www.br-automation.com).
A digital mixed module is already integrated in the bus controller. Up to 252 additional I/O modules can be connected
to the bus controller.
CANopen
master
BC PS
+
DM
X67PS1300
BC
+
DM
Information:
3 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
The bus controller is connected to the fieldbus using a Y-connector. This allows the bus controller to be exchanged
without interrupting fieldbus communication.
The bus terminating resistor is housed in a connector and screwed onto the Y-connector when needed.
Fieldbus
Attachment cables Fieldbus Male connector
X67CA0C22.xxxx Connection cables X67AC0C0/X67AC2C01
X67CA0C32.xxxx X67CA0C02.xxxx or
Fieldbus
Fieldbus Terminating resistor
Y-connector X67AC9C03
X67CA8C00
X2X Link
X2X Link Open-ended cables
Connection cables X67CA0X41.xxxx
X67CA0X01.xxxx X67CA0X51.xxxx
X67CA0X11.xxxx
Additional modules are connected to the bus controller via X2X Link using pre-assembled cables. The connection
is made using M12 circular connectors.
Connection Pinout
Pin Name
B 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield provided by threaded insert in the module
1
B → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Connector C (male) Connector D (female)
1 1 24 VDC fieldbus and X2X Link 24 VDC I/O
2 24 VDC I/O 24 VDC I/O
4
3 GND GND
4 GND GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 C → Connector (female) in module, routing of I/O power supply
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.3.9.1 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.4.3.9.2 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
Additional documentation about bus controller functions as well as the necessary import files for the master engi-
neering tool are available for download from the Downloads section of the B&R website (www.br-automation.com).
8.4.4 X67BC4321.L08-10
CAN (Controller Area Network) systems are widespread in the field of automation technology. CAN topology is
based on a line structure and uses twisted wire pairs for data transfer. CANopen is a higher-layer protocol based
on CAN. As a standardized protocol, it provides a high degree of flexibility for implementing a wide range of con-
figurations.
The bus controller makes it possible to connect up to 253 X2X Link I/O modules to CANopen. A transition between
IP20 and IP67 protection outside of the control cabinet is possible by aligning X20, X67 or XV modules one after
the other as needed at distances up to 100m. All CANopen transmission types such as synchronous, event and
polling modes are supported together with PDO linking, life/node guarding, emergency objects, and much more.
• Fieldbus: CANopen
• 16 digital channels, configurable as inputs or outputs
• Auto-configuration of I/O modules
• Easy I/O configuration using Automation Studio V4.3 or later
• Constant response times even with large amounts of data (max. 32 Rx and 32 Tx PDOs)
• Configurable I/O cycle (0.5 to 4 ms)
• Possible to configure the transfer rate or have it detected automatically
• Heartbeat consumer and producer, emergency producer
• 2x SDO server, NMT slave
• Simple bootup (autostart)
Information:
Only the standard function model (see the respective module description) is supported when the bus
controller is used together with multi-function modules it has automatically configured itself.
Automation Studio V4.3 or later can be used to create configuration files (e.g. DCF files) in 6 easy steps.
All other function models are also supported by transferring configuration data to the bus controller
(e.g. via the master environment with an SDO download).
Automation Studio can be downloaded at no cost from the B&R website www.br-automation.com. The
evaluation license is permitted to be used to create complete configurations for fieldbus bus con-
trollers at no cost.
Quad flash
200 200 200 200 200 200 200 1000
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
3
Flashing
500
Green/Red
Flickering
50
All times in ms
Fieldbus interface
Connector A: Input
Connector B1: Output
X2X Link
7
Connector B2: Output
1 11
2 12
8
3 13
4
9
14
Digital inputs/outputs 1 to 16
5 15
10
5 16
The bus controller is connected to the fieldbus using pre-assembled cables. The connection is made using M12
circular connectors.
Connection Pinout
3 A Pin Name
1 Shield1)
2 Not used
2
3 CAN⊥
4 4 CAN_High
1 5 CAN_Low
5 1) Shield connection also made via threaded insert in the module
5
B1 3 A → A-keyed (male), input
B1 → A-keyed (female), output
2
4
1
The node number and transfer rate are configured using the two number switches on the bus controller.
The transfer rate can be specified in 2 ways:
• Automatic detection by bus controller (see "Automatic transfer rate detection" on page 249)
• Programmed by the user (see "Setting the transfer rate" on page 249)
High Low
After booting, the bus controller goes into "Listen only" mode. This means the bus controller behaves passively
on the bus and only listens.
The bus controller attempts to receive valid objects. If receive errors occur, the controller switches to the next
transfer rate in the lookup table.
If no objects are received, all transfer rates are tested cyclically. This procedure is repeated until valid objects are
received.
Lookup table
The controller tests the transfer rate according to this table. Beginning with the starting transfer rate (1000 kbit/s),
the controller switches to the next lower transfer rate. At the end of the table, the bus controller restarts the search
from the beginning.
Transfer rate
1000 kbit/s
800 kbit/s
500 kbit/s
250 kbit/s
125 kbit/s
100 kbit/s
50 kbit/s
20 kbit/s
10 kbit/s
The bus controller will detect the transfer rate automatically by default. Switch positions 0x80 to 0x88 can be used
to set a fixed transfer rate, or 0x89 can be used to enable automatic transfer rate detection.
Switch position Transfer rate
0x80 1000 kbit/s
0x81 800 kbit/s
0x82 500 kbit/s
0x83 250 kbit/s
0x84 125 kbit/s
0x85 100 kbit/s
0x86 50 kbit/s
0x87 20 kbit/s
0x88 10 kbit/s
0x89 Automatic transfer rate detection
The node number position 0x92 can be used to save automatically generated configurations. This makes it possible
to work with a standardized configuration without having to adapt the application to changes associated with service
work or different development stages for example.
1. Turn off the power supply to the bus controller.
2. Set the node number to 0x90.
3. Turn on the power supply to the bus controller.
4. Wait until the "MS" LED flashes green.
5. The node number switch must be set to 0x00 and then back to 0x90 within this time window of 5 seconds
(turn switch "High").
6. Wait until the "MS" LED blinks with a red double-flash (parameters have been cleared).
7. Turn off the power supply to the bus controller.
8. Set the node number to 0x92.
9. Turn on the power supply to the bus controller.
10.Wait until the "MS" LED flashes green.
11. The node number switch must be set to 0x02 and then back to 0x92 within this time window of 5 seconds
(turn switch "High").
12.Wait until the "MS" LED blinks with a red quad-flash (parameters have been saved).
13.Turn off the power supply to the bus controller.
14.Set the desired node number (0x01 - 0x7F).
15.Turn on the power supply to the bus controller.
16.The bus controller boots with the set node number and automatic transfer rate detection.
Information:
A mapping tool for decoding the saved PDO mapping is available in the Download section of the B&R
website (www.br-automation.com).
A digital mixed module is already integrated in the bus controller. Up to 252 additionalI/O modules can be connected
to the bus controller.
CANopen
master
BC PS
+
DM
X67PS1300
BC
+
DM
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
The bus terminating resistor is housed in a male connector and screwed into the B1 connector when needed.
Connector
Fieldbus X67AC0C0/X67AC2C01
Attachment cables or
X67CA0C22.xxxx Fieldbus
X67CA0C32.xxxx Connection cables Fieldbus
X67CA0C22.xxxx Terminating resistor
X67AC9C03
I/O I/O
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Connector C (male) Connector D (female)
1 1 24 VDC fieldbus and X2X Link 24 VDC I/O
2 24 VDC I/O 24 VDC I/O
4
3 GND GND
4 GND GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 C → Connector (female) in module, routing of I/O power supply
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.4.9.1 Pinout
7
1 11
2 12
8 1 +24 VDC
X1 to X16
3 GND
3 13 M8 ①
4 DI/DO x
9
4 14
5 15
10
6 16
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
Additional documentation about bus controller functions as well as the necessary import files for the master engi-
neering tool are available for download from the Downloads section of the B&R website (www.br-automation.com).
8.4.5 X67BC4321.L12-10
CAN (Controller Area Network) systems are widespread in the field of automation technology. CAN topology is
based on a line structure and uses twisted wire pairs for data transfer. CANopen is a higher-layer protocol based
on CAN. As a standardized protocol, it provides a high degree of flexibility for implementing a wide range of con-
figurations.
The bus controller makes it possible to connect up to 253 X2X Link I/O modules to CANopen. A transition between
IP20 and IP67 protection outside of the control cabinet is possible by aligning X20, X67 or XV modules one after
the other as needed at distances up to 100m. All CANopen transmission types such as synchronous, event and
polling modes are supported together with PDO linking, life/node guarding, emergency objects, and much more.
• Fieldbus: CANopen
• 16 digital channels, configurable as inputs or outputs
• Auto-configuration of I/O modules
• Easy I/O configuration using Automation Studio V4.3 or later
• Constant response times even with large amounts of data (max. 32 Rx and 32 Tx PDOs)
• Configurable I/O cycle (0.5 to 4 ms)
• Possible to configure the transfer rate or have it detected automatically
• Heartbeat consumer and producer, emergency producer
• 2x SDO server, NMT slave
• Simple bootup (autostart)
Information:
Only the standard function model (see the respective module description) is supported when the bus
controller is used together with multi-function modules it has automatically configured itself.
Automation Studio V4.3 or later can be used to create configuration files (e.g. DCF files) in 6 easy steps.
All other function models are also supported by transferring configuration data to the bus controller
(e.g. via the master environment with an SDO download).
Automation Studio can be downloaded at no cost from the B&R website www.br-automation.com. The
evaluation license is permitted to be used to create complete configurations for fieldbus bus con-
trollers at no cost.
Quad flash
200 200 200 200 200 200 200 1000
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
3
Flashing
500
Green/Red
Flickering
50
All times in ms
Fieldbus interface
Connector A: Input
Connector B1: Output
X2X Link
Connector B2: Output
Digital inputs/outputs 1 to 16
The bus controller is connected to the fieldbus using pre-assembled cables. The connection is made using M12
circular connectors.
Connection Pinout
3 A Pin Name
1 Shield1)
2 Not used
2
3 CAN⊥
4 4 CAN_High
1 5 CAN_Low
5 1) Shield connection also made via threaded insert in the module
5
B1 3 A → A-keyed (male), input
B1 → A-keyed (female), output
2
4
1
The node number and transfer rate are configured using the two number switches on the bus controller.
The transfer rate can be specified in 2 ways:
• Automatic detection by bus controller (see "Automatic transfer rate detection" on page 260)
• Programmed by the user (see "Setting the transfer rate" on page 260)
High Low
After booting, the bus controller goes into "Listen only" mode. This means the bus controller behaves passively
on the bus and only listens.
The bus controller attempts to receive valid objects. If receive errors occur, the controller switches to the next
transfer rate in the lookup table.
If no objects are received, all transfer rates are tested cyclically. This procedure is repeated until valid objects are
received.
Lookup table
The controller tests the transfer rate according to this table. Beginning with the starting transfer rate (1000 kbit/s),
the controller switches to the next lower transfer rate. At the end of the table, the bus controller restarts the search
from the beginning.
Transfer rate
1000 kbit/s
800 kbit/s
500 kbit/s
250 kbit/s
125 kbit/s
100 kbit/s
50 kbit/s
20 kbit/s
10 kbit/s
The bus controller will detect the transfer rate automatically by default. Switch positions 0x80 to 0x88 can be used
to set a fixed transfer rate, or 0x89 can be used to enable automatic transfer rate detection.
Switch position Transfer rate
0x80 1000 kbit/s
0x81 800 kbit/s
0x82 500 kbit/s
0x83 250 kbit/s
0x84 125 kbit/s
0x85 100 kbit/s
0x86 50 kbit/s
0x87 20 kbit/s
0x88 10 kbit/s
0x89 Automatic transfer rate detection
The node number position 0x92 can be used to save automatically generated configurations. This makes it possible
to work with a standardized configuration without having to adapt the application to changes associated with service
work or different development stages for example.
1. Turn off the power supply to the bus controller.
2. Set the node number to 0x90.
3. Turn on the power supply to the bus controller.
4. Wait until the "MS" LED flashes green.
5. The node number switch must be set to 0x00 and then back to 0x90 within this time window of 5 seconds
(turn switch "High").
6. Wait until the "MS" LED blinks with a red double-flash (parameters have been cleared).
7. Turn off the power supply to the bus controller.
8. Set the node number to 0x92.
9. Turn on the power supply to the bus controller.
10.Wait until the "MS" LED flashes green.
11. The node number switch must be set to 0x02 and then back to 0x92 within this time window of 5 seconds
(turn switch "High").
12.Wait until the "MS" LED blinks with a red quad-flash (parameters have been saved).
13.Turn off the power supply to the bus controller.
14.Set the desired node number (0x01 - 0x7F).
15.Turn on the power supply to the bus controller.
16.The bus controller boots with the set node number and automatic transfer rate detection.
Information:
A mapping tool for decoding the saved PDO mapping is available in the Download section of the B&R
website (www.br-automation.com).
A digital mixed module is already integrated in the bus controller. Up to 252 additionalI/O modules can be connected
to the bus controller.
CANopen
master
BC PS
+
DM
X67PS1300
BC
+
DM
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
The bus terminating resistor is housed in a male connector and screwed into the B1 connector when needed.
Connector
Fieldbus X67AC0C0/X67AC2C01
Attachment cables or
X67CA0C22.xxxx Fieldbus
X67CA0C32.xxxx Connection cables Fieldbus
X67CA0C22.xxxx Terminating resistor
X67AC9C03
I/O I/O
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Connector C (male) Connector D (female)
1 1 24 VDC fieldbus and X2X Link 24 VDC I/O
2 24 VDC I/O 24 VDC I/O
4
3 GND GND
4 GND GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 C → Connector (female) in module, routing of I/O power supply
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.5.9.1 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6
X1 to X8 2 DI/DO x-1
M12 ① 3 GND
4 DI/DO x-2
X3 X7
5 NC
X4 X8
8.4.5.9.2 Connection X1 to X8
4
1
5
Connection 5 to 8
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
5
1 3
Monitoring of
Sensor/Actuator power supply
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
Additional documentation about bus controller functions as well as the necessary import files for the master engi-
neering tool are available for download from the Downloads section of the B&R website (www.br-automation.com).
8.4.6 X67BC5321
DeviceNet was developed by Allen-Bradley as a CAN bus based automation network. It is based on a produc-
er/consumer protocol. From the user's point of view, all data is handled completely separately from the features
of the CAN bus (e.g. longer data packets are fragmented automatically by DeviceNet). I/O messages with defined
characteristics are used for access.
This bus controller makes it possible to connect X2X Link I/O nodes to DeviceNet. It has automatic transfer rate de-
tection, auto scan, automatic mapping and automatic configuration of the I/O modules. Explicit messaging, change
of state, cyclic, polled and bit strobe are supported as transfer modes. In addition to the standard communication
objects, there are also vendor-specific objects used to represent the modular X67 system in the best manner pos-
sible.
X67 and other modules that are based on X2X Link can be connected to the bus controller. The entire configuration
of this type of modular system is supported by the DeviceNet standard. Allen Bradley developed the modular I/O
configuration to simplify the necessary configuration steps. The DeviceNet bus controllers from B&R also support
this type of configuration.
■ Fieldbus: DeviceNet
■ 8 digital channels, configurable as inputs or outputs
■ Simple I/O configuration via the fieldbus
■ Support of both linear and modular (Allen Bradley) configuration systems
■ Auto scan, automatic I/O mapping of the I/Os
■ Automatic I/O configuration
■ Integrated connection to local expansion via X2X Link for 39 additional modules (including up to 16 analog
modules)
■ 1 ms cycle time for local expansion
Information:
This bus controller only supports the standard function model for multi-function modules. The stan-
dard function model is explained in the description for each multi-function module.
Digital inputs/outputs 1 to 8
The bus controller is connected to the fieldbus using pre-assembled cables. The connection is made using M12
circular connectors.
Connection Pinout
Pin Name
3 A 1 Shield1)
2 5 V bus supply
3 CAN⊥
2
4 CAN_High
4 5 CAN_Low
1 1) Shielding also provided by threaded insert in the module
5
A → A-keyed (male), input
The MAC ID is configured using the two address switches on the bus controller.
The configurable range lies between 0 and 63. This value range is required in the DeviceNet specifications for a
DeviceNet device.
x 10 x1
Special functions
Position of the address switch Special functions
64 The MAC ID can be configured by setting the address switch using the master/scanner software.
90 Deletes the parameters stored in the bus controller's flash memory. The bus controller is reset back to its factory
settings.
95 Completely deletes the old configuration data and overwrites it automatically with the new values of the connected
I/O modules.
After booting, the bus controller goes into "Listen only" mode. This means the bus controller behaves passively
on the bus and only listens.
The bus controller attempts to receive valid objects. If receive errors occur, the controller switches to the next
transfer rate in the lookup table.
If no objects are received, all transfer rates are tested cyclically. This procedure is repeated until valid objects
are received, indicating that the correct transfer rate has been determined. Only transfer rates permitted by the
DeviceNet specification are tested.
Lookup table
The controller tests the transfer rate according to this table. Beginning with the starting transfer rate (500 kbit/s),
the controller switches to the next lower transfer rate. At the end of the table, the bus controller restarts the search
from the beginning.
Transfer rate
500 kbit/s
250 kbit/s
125 kbit/s
Information:
While automatic transfer rate recognition is running, both DeviceNet LEDs (MOD, NET) are switched
off (since there is no LED status definition in the DeviceNet specifications for this status).
To ensure that the module has also been supplied with power and booted, this vendor-specific status
definition requires that one of the two module I/O status LEDs is active.
Various parameters can be stored in the bus controller's flash memory. Deleting these parameters using switch
position 90 returns the bus controller to its factory settings.
The automatic configuration of the connected I/O modules by the bus controller is supported starting with Rev. D0
(firmware ≥V1.23) of the bus controller.
To prevent the configuration data from being accidentally overwritten on the bus controller, the procedure described
below must be followed when creating the configuration data. When doing this, it is important that all required I/
O modules are also started when booting the bus controller (i.e. supplied with power). This is especially important
when using potential groups (E-stop switches).
The automatic configuration sets the following attributes of class 0x65 on the individual I/O modules:
• Module type (0x01)
• Input length (0x03)
• Output length (0x05)
Additional parameters are not set. That means that the connected modules are configured with their standard
settings and standard I/O lengths. This can be changed by editing the parameters in the respective master engi-
neering tool.
X67 system User's Manual 3.20 271
Data sheets • Bus controller modules • X67BC5321
Automatic configuration
1. Turn off the power supply to the bus controller.
2. Set node number switch to 95 (this is done by turning switch "x10" right to position "P" and switch "x1" to 5).
3. Turn on the power supply to the bus controller.
4. Wait until the "MOD" LED starts blinking green (3 ms on / 500 ms off). This phase of green blinking lasts 5 s.
The node number "x10" switch must be set to 0 within this time frame and then set back to 9.
5. Wait until the "MOD" LED blinks (4 red flashes). The old configuration data is now deleted completely and
overwritten with the new values from the connected I/O modules.
6. Turn off the power supply to the bus controller.
7. Set the desired node number (00 to 63).
8. Turn on the power supply to the bus controller.
9. The bus controller boots using the set node number, automatic transfer rate recognition and standard settings
from the connected I/O modules.
The bus controller is connected to the fieldbus using a Y-connector. This allows the bus controller to be exchanged
without interrupting fieldbus communication.
The bus terminating resistor is housed in a connector and screwed onto the Y-connector when needed.
Fieldbus
Attachment cables Fieldbus Male connector
X67CA0C22.xxxx Connection cables X67AC0C0/X67AC2C01
X67CA0C32.xxxx X67CA0C02.xxxx or
Fieldbus
Fieldbus Terminating resistor
Y-connector X67AC9C03
X67CA8C00
X2X Link
X2X Link Open-ended cables
Connection cables X67CA0X41.xxxx
X67CA0X01.xxxx X67CA0X51.xxxx
X67CA0X11.xxxx
Additional modules are connected to the bus controller via X2X Link using pre-assembled cables. The connection
is made using M12 circular connectors.
Connection Pinout
Pin Name
B 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield provided by threaded insert in the module
1
B → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.6.9.1 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.4.6.9.2 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
VDR 3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
Coil resistance [Ω]
100 mH
100
10 mH
50
0.1 1 10 100
Additional documentation about bus controller functions as well as the necessary import files for the master engi-
neering tool are available in the Downloads section of the B&R website (www.br-automation.com).
8.4.7 X67BC6321
PROFIBUS DP is based on the physics of the RS485 interface. Data transfer is controlled using a hybrid bus access
procedure. Active stations receive communication rights via a token passing procedure and can then access all
stations on the network according to the master-slave principle. The maximum time of circulation for a token can
be configured, which results in a defined cycle time.
Access represents various services for the user for both cyclic and for acyclic data transfer.
This bus controller makes it possible to connect X2X Link I/O nodes to PROFIBUS DP. It supports PROFIBUS DP
with all of its options and other additional properties. In addition to the device, module, and channel diagnostics
provided in the PROFIBUS standard, it is also possible, for example, to switch to the slot diagnostics option in
S7 format. X67 or other modules that are based on X2X Link can be connected to the bus controller. The modular
system configuration is optimally supported by PROFIBUS DP.
■ Fieldbus: PROFIBUS DP
■ 8 digital channels, configurable as inputs or outputs
■ Simple I/O configuration via the fieldbus
■ Integrated connection to local expansions via X2X Link for 59 additional modules
■ Configurable I/O cycle (0.2 to 1 ms)
Information:
This bus controller only supports the standard function model for multi-function modules. The stan-
dard function model is explained in the description for each multi-function module.
The condition of the PROFIBUS DP bus controller is diagnosed using the LED status indicators "STATUS" and
"ERROR".
STATUS ERROR Function Solution
(green) (red)
Off Off HARDWARE FAULT / POWER FAILURE • Check wiring of supply voltage.
On On BUS OFF • Check the PROFIBUS network
• Baud rate not detected • Check the PROFIBUS master
• No connection to the DP master
• DP master not active
On Blinking WAIT FOR CONFIG • Check the node number switch
• Transfer rate has been detected, but the PROFIBUS • Check the slave address in the master configuration
master has not yet configured the bus controller
Blinking Off DATA EXCHANGE - DIAGNOSTICS • Initialization can take a few seconds depending on the
• The bus controller is still initializing the I/O modules number of I/O modules connected
• The I/O modules configured by the master cannot be • Check the wiring and power supply for the I/O modules
found • Read diagnostic messages in the respective PROFIBUS
• An error has occurred on one or more I/O modules (short master's engineering tool
circuit, etc.)
On Off DATA EXCHANGE
• Cyclic data exchange with the PROFIBUS DP master
Blinking Blinking CONFIG ERROR • Check the wiring of the X2X Link and the order of I/O
• One or more I/O modules found do not match with the modules
configuration of the PROFIBUS DP master • Check configuration of the PROFIBUS master
• The configuration received from the PROFIBUS master • Read diagnostic messages in the respective PROFIBUS
is invalid master's engineering tool
• Check the configuration being used - it is possible that
the number of configured I/O modules is too high
Off Blinking SERVICE MODE - BOOT • Set a valid node number
• The bus controller's node number has been set to 255
(0xFF) - after 2 s the bus controller starts in service mode
Single flash Single flash HARDWARE FAULT
Digital inputs/outputs 1 to 8
This module is connected to the PROFIBUS DP fieldbus using pre-assembled cables. The connection is made
using an M12 circular connector.
Connection Pinout
Pin PROFIBUS DP
2 1 +5 V1) - - -
A
2 A RxD/TxD-N Data\ Green
1 3 GND1) - - -
4 B RxD/TxD-P Data Red
5 Shield1) - - -
3
4 1) Shield connection also made via threaded insert in the module
5
A → B-keyed (female), input
1) Supply for terminating resistor (PROFIBUS DP standard) generated internally by the bus controller. These pins are irrelevant for wiring.
The bus controller is connected to a PROFIBUS DP fieldbus using a Y-connector. This allows the bus controller
to be exchanged without interrupting fieldbus communication.
The PROFIBUS DP node number is configured using both number switches of the bus controller.
Node number 0xFF enables service mode. Modus. The bus controller starts with PROFIBUS DP address 2. A
firmware update is possible in service mode. The I/Os cannot be operated.
High Low
After booting or after a communication timeout, the bus controller goes into the status "Baud Search". This means
the bus controller behaves passively on the bus.
The bus controller always begins the search for the configured transfer rate with the highest transfer rate. If a
complete error-free telegram is not received during monitoring time, then the search is continued using the next
lowest transfer rate.
Transfer rate
12 Mbit/s
6 Mbit/s
3 Mbit/s
1.5 Mbit/s
500 kbit/s
187.5 kbit/s
93.75 kbit/s
45.45 kbit/s
19.2 kbit/s
9.6 kbit/s
The maximum possible number of I/O modules that can be connected to the PROFIBUS DP bus controller can
be determined using the design tool.
This tool and the associated device description file (GSD file) is available in the Downloads section of the B&R
website (www.br-automation.com).
A digital mixed module is already integrated in the bus controller.
PROFIBUS DP
Master
BC PS
+
DM
X67PS1300
BC
+
DM
Information:
3 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This supply module provides 15
W for additional modules. It should be mounted in the middle of the modules that are to be supplied
with power.
PROFIBUS DP
Open-ended cables
PROFIBUS DP X67CA0B52.xxxx
Attachment cables
X67CA0B22.xxxx PROFIBUS DP or
X67CA0B32.xxxx Connection cables PROFIBUS DP
X67CA0B12.xxxx Terminating resistor
X67AC9B03
X2X Link
X2X Link
Open-ended cables
Connection cables
X67CA0X41.xxxx
PROFIBUS DP X67CA0X01.xxxx
X67CA0X51.xxxx
Y-connector X67CA0X11.xxxx
X67AC8B01
I/O
Additional modules are connected to the bus controller via X2X Link using pre-assembled cables. The connection
is made using M12 circular connectors.
Connection Pinout
Pin Name
B 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield provided by threaded insert in the module
1
B → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.7.9.1 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.4.7.9.2 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
Additional documentation about PROFIBUS DP bus controller functions as well as the necessary import files for
the master engineering tool are available in the Downloads section of the B&R website (www.br-automation.com).
8.4.8 X67BC6321.L08
PROFIBUS DP is based on the physics of the RS485 interface. Data transfer is controlled using a hybrid bus access
procedure. Active stations receive communication rights via a token passing procedure and can then access all
stations on the network according to the master-slave principle. The maximum time of circulation for a token can
be configured, which results in a defined cycle time.
Access represents various services for the user for both cyclic and for acyclic data transfer.
This bus controller makes it possible to connect X2X Link I/O nodes to PROFIBUS DP. It supports PROFIBUS DP
with all of its options and other additional properties. In addition to the device, module, and channel diagnostics
provided in the PROFIBUS standard, it is also possible, for example, to switch to the slot diagnostics option in
S7 format. X67 or other modules that are based on X2X Link can be connected to the bus controller. The modular
system configuration is optimally supported by PROFIBUS DP.
■ Fieldbus: PROFIBUS DP
■ Integrated Y-connector for fieldbus connection
■ 16 digital channels, configurable as inputs or outputs
■ M8 connection type
■ Simple I/O configuration via the fieldbus
■ Integrated connection to local expansions via X2X Link for 63 additional modules
■ Configurable I/O cycle (0.2 to 1 ms)
The condition of the PROFIBUS DP bus controller is diagnosed using the LED status indicators "STATUS" and
"ERROR".
STATUS ERROR Function Solution
(green) (red)
Off Off HARDWARE FAULT / POWER FAILURE • Check wiring of supply voltage.
On On BUS OFF • Check the PROFIBUS network
• Baud rate not detected • Check the PROFIBUS master
• No connection to the DP master
• DP master not active
On Blinking WAIT FOR CONFIG • Check the node number switch
• Transfer rate has been detected, but the PROFIBUS • Check the slave address in the master configuration
master has not yet configured the bus controller
Blinking Off DATA EXCHANGE - DIAGNOSTICS • Initialization can take a few seconds depending on the
• The bus controller is still initializing the I/O modules number of I/O modules connected
• The I/O modules configured by the master cannot be • Check the wiring and power supply for the I/O modules
found • Read diagnostic messages in the respective PROFIBUS
• An error has occurred on one or more I/O modules (short master's engineering tool
circuit, etc.)
On Off DATA EXCHANGE
• Cyclic data exchange with the PROFIBUS DP master
Blinking Blinking CONFIG ERROR • Check the wiring of the X2X Link and the order of I/O
• One or more I/O modules found do not match with the modules
configuration of the PROFIBUS DP master • Check configuration of the PROFIBUS master
• The configuration received from the PROFIBUS master • Read diagnostic messages in the respective PROFIBUS
is invalid master's engineering tool
• Check the configuration being used - it is possible that
the number of configured I/O modules is too high
Off Blinking SERVICE MODE - BOOT • Set a valid node number
• The bus controller's node number has been set to 255
(0xFF) - after 2 s the bus controller starts in service mode
Single flash Single flash HARDWARE FAULT
Fieldbus interface
Connector A: Input
Connector B1: Output
X2X Link
7
Connector B2: Output
1 11
2 12
8
3 13
4
9
14
Digital inputs/outputs 1 to 16
5 15
10
5 16
The bus controller is connected to the fieldbus using pre-assembled cables. The connection is made using M12
circular connectors.
The Y-connector for PROFIBUS DP is already integrated in this module.
Connection Pinout
3 A Pin PROFIBUS DP
1 +5 V1) - - -
2 A RxD/TxD-N Data\ Green
2
3 GND1) - - -
4 4 B RxD/TxD-P Data Red
1 5 Shield1) - - -
5 1) Shield connection also made via threaded insert in the module
5
B1 3 A → B-keyed (male), input
B1 → B-keyed (female), output
2
4
1
1) Supply for terminating resistor (PROFIBUS DP standard) generated internally by the bus controller. These pins are irrelevant for wiring.
The PROFIBUS DP node number is configured using both number switches of the bus controller.
Node number 0xFF enables service mode. Modus. The bus controller starts with PROFIBUS DP address 2. A
firmware update is possible in service mode. The I/Os cannot be operated.
High Low
After booting or after a communication timeout, the bus controller goes into the status "Baud Search". This means
the bus controller behaves passively on the bus.
The bus controller always begins the search for the configured transfer rate with the highest transfer rate. If a
complete error-free telegram is not received during monitoring time, then the search is continued using the next
lowest transfer rate.
Transfer rate
12 Mbit/s
6 Mbit/s
3 Mbit/s
1.5 Mbit/s
500 kbit/s
187.5 kbit/s
93.75 kbit/s
45.45 kbit/s
19.2 kbit/s
9.6 kbit/s
The maximum possible number of I/O modules that can be connected to the PROFIBUS DP bus controller can
be determined using the design tool.
This tool and the associated device description file (GSD file) is available in the Downloads section of the B&R
website (www.br-automation.com).
A digital mixed module is already integrated in the bus controller.
PROFIBUS DP
Master
BC PS
+
DM
X67PS1300
BC
+
DM
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
PROFIBUS DP
Open-ended cables
PROFIBUS DP X67CA0B52.xxxx
Attachment cables
X67CA0B22.xxxx PROFIBUS DP or
X67CA0B32.xxxx Connection cables PROFIBUS DP
X67CA0B12.xxxx Terminating resistor
X67AC9B03
X2X Link
X2X Link
Open-ended cables
Connection cables
X67CA0X41.xxxx
PROFIBUS DP X67CA0X01.xxxx
X67CA0X51.xxxx
Y-connector X67CA0X11.xxxx
X67AC8B01
I/O
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 C Pin Connector C (male) Connector D (female)
1 1 24 VDC fieldbus and power supply1) 24 VDC supply1)
2 24 VDC supply1) 24 VDC supply1)
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1) Both supply pins must be supplied. Cutting off the outputs is only ensured if both pins are disconnected from the power supply. If the summation current of
the outputs is >4 A, current must also be supplied via connector D (female), pin 2.
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.8.9.1 Pinout
7
1 11
2 12
8 1 +24 VDC
X1 to X16
3 GND
3 13 M8 ①
4 DI/DO x
9
4 14
5 15
10
6 16
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
Coil resistance [Ω]
100 mH
100
10 mH
50
0.1 1 10 100
Additional documentation about PROFIBUS DP bus controller functions as well as the necessary import files for
the master engineering tool are available in the Downloads section of the B&R website (www.br-automation.com).
8.4.9 X67BC6321.L12
PROFIBUS DP is based on the physics of the RS485 interface. Data transfer is controlled using a hybrid bus access
procedure. Active stations receive communication rights via a token passing procedure and can then access all
stations on the network according to the master-slave principle. The maximum time of circulation for a token can
be configured, which results in a defined cycle time.
Access represents various services for the user for both cyclic and for acyclic data transfer.
This bus controller makes it possible to connect X2X Link I/O nodes to PROFIBUS DP. It supports PROFIBUS DP
with all of its options and other additional properties. In addition to the device, module, and channel diagnostics
provided in the PROFIBUS standard, it is also possible, for example, to switch to the slot diagnostics option in
S7 format. X67 or other modules that are based on X2X Link can be connected to the bus controller. The modular
system configuration is optimally supported by PROFIBUS DP.
■ Fieldbus: PROFIBUS DP
■ Integrated Y-connector for fieldbus connection
■ 16 digital channels, configurable as inputs or outputs
■ M12 connections
■ Simple I/O configuration via the fieldbus
■ Integrated connection to local expansions via X2X Link for 63 additional modules
■ Configurable I/O cycle (0.2 to 1 ms)
The condition of the PROFIBUS DP bus controller is diagnosed using the LED status indicators "STATUS" and
"ERROR".
STATUS ERROR Function Solution
(green) (red)
Off Off HARDWARE FAULT / POWER FAILURE • Check wiring of supply voltage.
On On BUS OFF • Check the PROFIBUS network
• Baud rate not detected • Check the PROFIBUS master
• No connection to the DP master
• DP master not active
On Blinking WAIT FOR CONFIG • Check the node number switch
• Transfer rate has been detected, but the PROFIBUS • Check the slave address in the master configuration
master has not yet configured the bus controller
Blinking Off DATA EXCHANGE - DIAGNOSTICS • Initialization can take a few seconds depending on the
• The bus controller is still initializing the I/O modules number of I/O modules connected
• The I/O modules configured by the master cannot be • Check the wiring and power supply for the I/O modules
found • Read diagnostic messages in the respective PROFIBUS
• An error has occurred on one or more I/O modules (short master's engineering tool
circuit, etc.)
On Off DATA EXCHANGE
• Cyclic data exchange with the PROFIBUS DP master
Blinking Blinking CONFIG ERROR • Check the wiring of the X2X Link and the order of I/O
• One or more I/O modules found do not match with the modules
configuration of the PROFIBUS DP master • Check configuration of the PROFIBUS master
• The configuration received from the PROFIBUS master • Read diagnostic messages in the respective PROFIBUS
is invalid master's engineering tool
• Check the configuration being used - it is possible that
the number of configured I/O modules is too high
Off Blinking SERVICE MODE - BOOT • Set a valid node number
• The bus controller's node number has been set to 255
(0xFF) - after 2 s the bus controller starts in service mode
Single flash Single flash HARDWARE FAULT
Fieldbus interface
Connector A: Input
Connector B1: Output
X2X Link
Connector B2: Output
Digital inputs/outputs 1 to 16
The bus controller is connected to the fieldbus using pre-assembled cables. The connection is made using M12
circular connectors.
The Y-connector for PROFIBUS DP is already integrated in this module.
Connection Pinout
3 A Pin PROFIBUS DP
1 +5 V1) - - -
2 A RxD/TxD-N Data\ Green
2
3 GND1) - - -
4 4 B RxD/TxD-P Data Red
1 5 Shield1) - - -
5 1) Shield connection also made via threaded insert in the module
5
B1 3 A → B-keyed (male), input
B1 → B-keyed (female), output
2
4
1
1) Supply for terminating resistor (PROFIBUS DP standard) generated internally by the bus controller. These pins are irrelevant for wiring.
The PROFIBUS DP node number is configured using both number switches of the bus controller.
Node number 0xFF enables service mode. Modus. The bus controller starts with PROFIBUS DP address 2. A
firmware update is possible in service mode. The I/Os cannot be operated.
High Low
After booting or after a communication timeout, the bus controller goes into the status "Baud Search". This means
the bus controller behaves passively on the bus.
The bus controller always begins the search for the configured transfer rate with the highest transfer rate. If a
complete error-free telegram is not received during monitoring time, then the search is continued using the next
lowest transfer rate.
Transfer rate
12 Mbit/s
6 Mbit/s
3 Mbit/s
1.5 Mbit/s
500 kbit/s
187.5 kbit/s
93.75 kbit/s
45.45 kbit/s
19.2 kbit/s
9.6 kbit/s
The maximum possible number of I/O modules that can be connected to the PROFIBUS DP bus controller can
be determined using the design tool.
This tool and the associated device description file (GSD file) is available in the Downloads section of the B&R
website (www.br-automation.com).
A digital mixed module is already integrated in the bus controller.
PROFIBUS DP
Master
BC PS
+
DM
X67PS1300
BC
+
DM
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
PROFIBUS DP
Open-ended cables
PROFIBUS DP X67CA0B52.xxxx
Attachment cables
X67CA0B22.xxxx PROFIBUS DP or
X67CA0B32.xxxx Connection cables PROFIBUS DP
X67CA0B12.xxxx Terminating resistor
X67AC9B03
X2X Link
X2X Link
Open-ended cables
Connection cables
X67CA0X41.xxxx
PROFIBUS DP X67CA0X01.xxxx
X67CA0X51.xxxx
Y-connector X67CA0X11.xxxx
X67AC8B01
I/O
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 C Pin Connector C (male) Connector D (female)
1 1 24 VDC fieldbus and power supply1) 24 VDC supply1)
2 24 VDC supply1) 24 VDC supply1)
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1) Both supply pins must be supplied. Cutting off the outputs is only ensured if both pins are disconnected from the power supply. If the summation current of
the outputs is >4 A, current must also be supplied via connector D (female), pin 2.
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.9.9.1 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6
X1 to X8 2 DI/DO x-1
M12 ① 3 GND
4 DI/DO x-2
X3 X7
5 NC
X4 X8
8.4.9.9.2 Connection X1 to X8
4
1
5
Connection 5 to 8
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
5
1 3
Monitoring of
Sensor/Actuator power supply
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
Additional documentation about PROFIBUS DP bus controller functions as well as the necessary import files for
the master engineering tool are available in the Downloads section of the B&R website (www.br-automation.com).
8.4.10 X67BC7321-1
This X67 bus controller makes it possible to connect X2X Link I/O nodes to CAN I/O. CAN I/O is a transfer protocol
based on standard CAN bus that is fully integrated in the B&R system.
The CAN I/O bus controller is supported by CAN I/O master versions beginning with CANIO library V1.20.4. Up to
43 logical I/O modules can be connected to the bus controller. Up to 16 can be analog modules.
• Fieldbus: CAN bus
• 8 digital channels, configurable as inputs or outputs
• Integrated I/O access in B&R Automation Studio
• Automatic firmware update via the fieldbus
• X67 connection possibility for all B&R CPUs
Information:
The bus controller is unable to detect modules after a gap in the X2X Link station numbers. This can
result from the following:
• Unconnected X67 modules
• Modules with integrated node number switches
Information:
This bus controller only supports the standard function model for multi-function modules. The stan-
dard function model is explained in the description for each multi-function module.
Digital inputs/outputs 1 to 8
The bus controller is connected to the fieldbus using pre-assembled cables. The connection is made using M12
circular connectors.
Connection Pinout
Pin Name
3 A 1 Shield1)
2 Not used
3 CAN⊥
2
4 CAN_High
5 CAN_Low
4
1 1) Shield also provided by threaded insert in module.
5
A → A-keyed (male), input
The node number and transfer rate are configured using the two number switches on the bus controller. The switch
positions 0x00 to 0x40 and 0x60 enable automatic transfer rate detection (see section "Automatic transfer rate
detection" on page 308). The rest of the switch positions have a fixed transfer rate (see table).
High Low
1) When one of these numbers is configured, the bus controller uses the operating parameters from the internal EEPROM. The EEPROM is programmed
using library CANIO.
After booting, the bus controller goes into "Listen only" mode. This means the bus controller behaves passively
on the bus and only listens.
The bus controller attempts to receive valid objects. If receive errors occur, the controller switches to the next
transfer rate in the lookup table.
If no objects are received, all transfer rates are tested cyclically. This procedure is repeated until valid objects are
received.
Starting transfer rate
The bus controller begins the search with this transfer rate. The starting transfer rate can be defined in two different
ways:
• Read from EEPROM
• The last detected transfer rate is used after a software reset (command code 20).
Lookup table
The controller tests the transfer rate according to this table. Beginning with the starting transfer rate, the controller
switches to the next lower transfer rate. At the end of the table, the bus controller restarts the search from the
beginning.
Transfer rate
1000 kbit/s
500 kbit/s
250 kbit/s
125 kbit/s
50 kbit/s
20 kbit/s
10 kbit/s
The X67DM1321 digital mixed module is already integrated in the bus controller. This makes the bus controller the
first I/O module on the CAN bus (ST1 → Station 1).
Up to 28 logical digital modules (including bus controller) and 16 logical analog modules can be operated on the
bus controller. There is no fixed order of modules. Digital and analog modules can be arranged as needed.
BC DIG AN AN PS DIG AN DIG AN DIG
+
DM
ST1 ST2 ST3 ST4 ST5 ST6 ST42 ST43 ST44
Key:
BC → Bus controller
DM → Digital mixed module
DIG → Digital module
AN → Analog module
ST → Station
PS → Power supply module X67PS1300 (not counted as a station on the CAN bus)
Information:
3 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This supply module provides 15 W
for additional modules. It should be mounted in the middle of the modules that are to be supplied with
power.
The bus controller is connected to the fieldbus using a Y-connector. This allows the bus controller to be exchanged
without interrupting fieldbus communication.
The bus terminating resistor is housed in a connector and screwed onto the Y-connector when needed.
Fieldbus
Attachment cables Fieldbus Male connector
X67CA0C22.xxxx Connection cables X67AC0C0/X67AC2C01
X67CA0C32.xxxx X67CA0C02.xxxx or
Fieldbus
Fieldbus Terminating resistor
Y-connector X67AC9C03
X67CA8C00
X2X Link
X2X Link Open-ended cables
Connection cables X67CA0X41.xxxx
X67CA0X01.xxxx X67CA0X51.xxxx
X67CA0X11.xxxx
Additional modules are connected to the bus controller via X2X Link using pre-assembled cables. The connection
is made using M12 circular connectors.
Connection Pinout
Pin Name
B 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield provided by threaded insert in the module
1
B → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.10.9.1 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.4.10.9.2 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
8.4.10.10 SG4
The module comes with preinstalled firmware. The firmware is also part of the Automation Runtime operating
system for the PLC. If the two versions are different, the Automation Runtime firmware is loaded to the module.
The latest firmware is made available automatically when updating Automation Runtime.
Up to 43 I/O modules can be connected to the bus controller (up to 16 can be analog modules). This value refers
not to the physical but the logical I/O module slots.
Information:
Physical I/O modules can take up more than one digital or analog slot.
The following table lists all X67 modules capable of using CAN I/O and how many logical digital and analog slots
are needed.
Module Digital module slots Analog module slots
X67AI1223 0 1
X67AI1233 0 1
X67AI1323 0 1
X67AI1333 0 1
X67AI2744 0 2
X67AI4850 0 1
X67AM1223 0 1
X67AM1323 0 1
X67AO1223 0 1
X67AO1323 0 1
X67AT1311 0 1
X67AT1322 0 1
X67AT1402 0 1
X67BC7321-1 1 0
X67DC1198 0 2
X67DC2322 0 2
X67DI1371 1 0
X67DI1371.L08 2 0
X67DI1371.L12 2 0
X67DI1372 1 0
X67DM1321 1 0
X67DM1321.L08 2 0
X67DM1321.L12-1 2 0
X67DM1321.L12 2 0
X67DM9321 1 0
X67DM9321.L12 2 0
X67DM9331.L12 1 0
X67DO1332 1 0
X67DO9332.L12 1 0
X67DV1311.L08 2 0
X67DV1311.L12 2 0
X67IF1121-1 0 3
X67MM2436 0 2
X67SM2436 0 2
X67SM4320 0 4
X67UM4389 0 2
8.4.11 X67BC8321-1
This bus controller makes it possible to connect X2X Link I/O nodes to POWERLINK.
Additional X2X Link I/O nodes (X67 modules or other X2X Link-based modules) can be connected using the inte-
grated X2X Link connection. When doing so, it is possible to operate the X2X Link cycle either 1:1 synchronously
or synchronously to the POWERLINK network using a prescaler. Mechanically, POWERLINK is connected via an
IP67-rated standard D-keyed M12 Ethernet connector.
POWERLINK is a standard protocol for Fast Ethernet with hard real-time characteristics. The Ethernet POW-
ERLINK Standardization Group (EPSG) ensures that the standard remains open and is continually developed:
www.ethernet-powerlink.org
■ POWERLINK
■ 8 digital channels, configurable as inputs or outputs
■ I/O configuration and firmware update via the fieldbus
■ Integrated connection to the local expansion via X2X Link for up to 250 additional modules
■ Configurable I/O cycle (starting at 200 ms)
The Status/Error LED is a green/red dual LED. The color green (status) is superimposed on the color red (error).
Red - Error Description
On The controlled node (CN) is in an error state (failed Ethernet frames, increased number of collisions on the network, etc.).
If an error occurs in the following states, then the green LED blinks over the red LED:
• PRE_OPERATIONAL_1
• PRE_OPERATIONAL_2
• READY_TO_OPERATE
Status
Green
t
Error
Red
t
LED "S/E"
t
Note:
• The LED blinks red several times immediately after startup. This is not an error, however.
• The LED is lit red for CNs with configured physical node number 0 but that have not yet been assigned a node
number via dynamic node allocation (DNA).
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
Flickering
All times in ms
Digital inputs/outputs 1 to 8
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
Pin Name
2
A 1 TXD Transmit data
2 RXD Receive data
1 3 TXD\ Transmit data\
4 RXD\ Receive data\
3 Shield connection made via threaded insert in the module
4
A → D-keyed (female), input
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
The node number for the POWERLINK node is set using the two number switches.
Switch position Description
0x00 Only permitted when operating the POWERLINK node in DNA mode.
0x01 - 0xEF Node number of the POWERLINK node. Operation as a controlled node.
0xF0 - 0xFF Reserved, switch position not permitted.
This bus controller is used as the last controller in both a tree or line structure.
Manager
Hub
Controller
+
Hub
X67BC8xxx
A digital mixed module is already integrated in the bus controller. Up to 250 I/O modules can be connected to
the bus controller.
Manager
Hub
Hub Hub
X2X Link X2X Link
Controller
Information:
3 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This supply module provides 15
W for additional modules. It should be mounted in the middle of the modules that are to be supplied
with power.
POWERLINK POWERLINK
Attachment cable or Field-assembled connector
X67CA0E41.xxxx X67AC2E01
X2X Link
Connection cables X2X Link
X67CA0X01.xxxx Open-ended cables
X67CA0X11.xxxx X67CA0X41.xxxx
X67CA0X51.xxxx
Additional modules are connected to the bus controller via X2X Link using pre-assembled cables. The connection
is made using M12 circular connectors.
Connection Pinout
Pin Name
B 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield provided by threaded insert in the module
1
B → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.11.9.1 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.4.11.9.2 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
Coil resistance [Ω]
100 mH
100
10 mH
50
0.1 1 10 100
SG3
This module is not supported on SG3 target systems.
SG4
The module comes with preinstalled firmware. The firmware is also part of the Automation Runtime operating
system for the PLC. If the two versions are different, the Automation Runtime firmware is loaded to the module.
The latest firmware is made available automatically when updating Automation Runtime.
8.4.12 X67BC8321.L12
This bus controller makes it possible to connect X2X Link I/O nodes to POWERLINK.
Additional X2X Link I/O nodes (X67 modules or other X2X Link-based modules) can be connected using the inte-
grated X2X Link connection. When doing so, it is possible to operate the X2X Link cycle either 1:1 synchronously
or synchronously to the POWERLINK network using a prescaler. Mechanically, POWERLINK is connected via an
IP67-rated standard D-keyed M12 Ethernet connector.
POWERLINK is a standard protocol for Fast Ethernet with hard real-time characteristics. The Ethernet POW-
ERLINK Standardization Group (EPSG) ensures that the standard remains open and is continually developed:
www.ethernet-powerlink.org
■ POWERLINK
■ 16 digital channels, configurable as inputs or outputs
■ M12 connections
■ Integrated hub for efficient cabling
■ I/O configuration and firmware update via the fieldbus
■ Integrated connection to the local expansion via X2X Link for up to 250 additional modules
■ Configurable I/O cycle (starting at 200 ms)
Blinking A link to the peer station has been established. Indicates Ethernet activity
is taking place on the bus.
S/E 1) Green/Red Status/Error LED. The statuses of this LED are described in section "Sta-
tus/Error LED "S/E"" on page 328.
1-1 5-1
I/O LEDs
1-2 5-2 1-1/2 to 8-1/2 Orange - Input/Output status of the corresponding channel
2-1 6-1
Status indicator 2: Status indicator for module function
2-2 6-2 Left Green Off No power to module
3-1 7-1
Single flash RESET mode
3-2 7-2 Blinking PREOPERATIONAL mode
4-1 8-1
On RUN mode
4-2 8-2
Right Red Off No power to module or everything OK
On Error or reset status
Single flash Warning/Error on an I/O channel. Level monitoring for digital outputs has
been triggered.
Status indicator 2:
Double flash Supply voltage not in the valid range
Left: green; Right: red
The Status/Error LED is a green/red dual LED. The color green (status) is superimposed on the color red (error).
Red - Error Description
On The controlled node (CN) is in an error state (failed Ethernet frames, increased number of collisions on the network, etc.).
If an error occurs in the following states, then the green LED blinks over the red LED:
• PRE_OPERATIONAL_1
• PRE_OPERATIONAL_2
• READY_TO_OPERATE
Status
Green
t
Error
Red
t
LED "S/E"
t
Note:
• The LED blinks red several times immediately after startup. This is not an error, however.
• The LED is lit red for CNs with configured physical node number 0 but that have not yet been assigned a node
number via dynamic node allocation (DNA).
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
Flickering
All times in ms
Fieldbus interface
Connector A: Input
Connector B1: Output
X2X Link
Connector B2: Output
Digital inputs/outputs 1 to 16
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
2 A Pin Name
1 1 TXD Transmit data
2 RXD Receive data
3 TXD\ Transmit data\
4 RXD\ Receive data\
4 Shield connection made via threaded insert in the module
3
A → D-keyed (female), input
3 B1 → D-keyed (female), output
4
B1 1
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
The node number for the POWERLINK node is set using the two number switches.
Switch position Description
0x00 Only permitted when operating the POWERLINK node in DNA mode.
0x01 - 0xEF Node number of the POWERLINK node. Operation as a controlled node.
0xF0 - 0xFF Reserved, switch position not permitted.
Manager
Hub
Hub Hub
A digital mixed module is already integrated in the bus controller. Up to 250 I/O modules can be connected to
the bus controller.
Manager
Hub
Controller
Hub
X67PS1300
X67BC8xxx.L12 X67BC8xxx.L12
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
I/O I/O
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.12.9.1 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6
X1 to X8 2 DI/DO x-1
M12 ① 3 GND
4 DI/DO x-2
X3 X7
5 NC
X4 X8
8.4.12.9.2 Connection X1 to X8
4
1
5
Connection 5 to 8
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
5
1 3
Monitoring of
Sensor/Actuator power supply
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
SG3
This module is not supported on SG3 target systems.
SG4
The module comes with preinstalled firmware. The firmware is also part of the Automation Runtime operating
system for the PLC. If the two versions are different, the Automation Runtime firmware is loaded to the module.
The latest firmware is made available automatically when updating Automation Runtime.
8.4.13 X67BC8331
This bus controller makes it possible to connect X2X Link I/O nodes to POWERLINK.
Additional X2X Link I/O nodes (X67 modules or other X2X Link-based modules) can be connected using the inte-
grated X2X Link connection. When doing so, it is possible to operate the X2X Link cycle either 1:1 synchronously
or synchronously to the POWERLINK network using a prescaler. Mechanically, POWERLINK is connected via an
IP67-rated standard D-keyed M12 Ethernet connector.
POWERLINK is a standard protocol for Fast Ethernet with hard real-time characteristics. The Ethernet POW-
ERLINK Standardization Group (EPSG) ensures that the standard remains open and is continually developed:
www.ethernet-powerlink.org
■ POWERLINK V1/V2
■ 8 digital channels, configurable as inputs or outputs
■ I/O configuration and firmware update via the fieldbus
■ Integrated connection to the local expansion via X2X Link for up to 250 additional modules
■ Configurable I/O cycle (starting at 200 ms)
The Status/Error LED is a green/red dual LED. The color green (status) is superimposed on the color red (error).
Red - Error Description
On The controlled node (CN) is in an error state (failed Ethernet frames, increased number of collisions on the network, etc.).
If an error occurs in the following states, then the green LED blinks over the red LED:
• PRE_OPERATIONAL_1
• PRE_OPERATIONAL_2
• READY_TO_OPERATE
Status
Green
t
Error
Red
t
LED "S/E"
t
Note:
• The LED blinks red several times immediately after startup. This is not an error, however.
• The LED is lit red for CNs with configured physical node number 0 but that have not yet been assigned a node
number via dynamic node allocation (DNA).
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
Flickering
All times in ms
Digital inputs/outputs 1 to 8
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
Pin Name
2
A 1 TXD Transmit data
2 RXD Receive data
1 3 TXD\ Transmit data\
4 RXD\ Receive data\
3 Shield connection made via threaded insert in the module
4
A → D-keyed (female), input
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
The node number for the POWERLINK node is set using the two number switches.
Switch position Description
0x00 Only permitted when operating the POWERLINK node in DNA mode.
0x01 - 0xEF Node number of the POWERLINK node. Operation as a controlled node.
0xF0 - 0xFF Reserved, switch position not permitted.
This bus controller is used as the last controller in both a tree or line structure.
Manager
Hub
Controller
+
Hub
X67BC8xxx
A digital mixed module is already integrated in the bus controller. Up to 250 I/O modules can be connected to
the bus controller.
Manager
Hub
Hub Hub
X2X Link X2X Link
Controller
Information:
3 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This supply module provides 15
W for additional modules. It should be mounted in the middle of the modules that are to be supplied
with power.
POWERLINK POWERLINK
Attachment cable or Field-assembled connector
X67CA0E41.xxxx X67AC2E01
X2X Link
Connection cables X2X Link
X67CA0X01.xxxx Open-ended cables
X67CA0X11.xxxx X67CA0X41.xxxx
X67CA0X51.xxxx
Additional modules are connected to the bus controller via X2X Link using pre-assembled cables. The connection
is made using M12 circular connectors.
Connection Pinout
Pin Name
B 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield provided by threaded insert in the module
1
B → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.13.9.1 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.4.13.9.2 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
The outputs of the module can handle up to 2 A. With a summation current of 8 A, no more than 4 channels are
operable at full load. To ensure optimal use of the module, it is important to assign the channels properly, and to
keep in mind a potential derating.
Correct channel assignment is important, since the 8 outputs are divided between 2 output drivers. The channels
operated with 2 A must therefore be evenly divided between both output drivers.
Output driver 1: Channels 1 to 4
Output driver 2: Channels 5 to 8
The following table provides an overview of the number of fully used channels, the resulting best distribution, and
a potential derating.
Number of channels using 2 A Division Derating
1 Any No
2 1st channel with 2 A ... channel no. 1 to 4 No
2nd channel with 2 A ... channel no. 5 to 8
3 Assign all even or all odd channel numbers.
Examples:
1, 3, 5 Channels 1 and 3
2, 4, 6 Channels 2 and 4
3, 5, 7 Channels 5 and 7
4, 6, 8 Channels 6 and 8
4 Assign all even or all odd channel numbers.
Possible divisions:
1, 3, 5, 7 On each channel
2, 4, 6, 8 On each channel
0.8
SG3
This module is not supported on SG3 target systems.
SG4
The module comes with preinstalled firmware. The firmware is also part of the Automation Runtime operating
system for the PLC. If the two versions are different, the Automation Runtime firmware is loaded to the module.
The latest firmware is made available automatically when updating Automation Runtime.
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
8.4.13.11.3 Configuration
Name:
ConfigIOMask01
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 8 configured as input/output 0 Configured as input
1 Configured as output
An input filter is available for each input. The input delay can be set using register "ConfigOutput03" on page 347.
Disturbance pulses which are shorter than the input delay are suppressed by the input filter.
Eingangs-
signal
Zeit
Zeit
tVerz ⇒ Eingangsverzögerung
Name:
ConfigOutput03
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (default value)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
8.4.13.11.4 Communication
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Without filtering 150 μs
With filtering 200 μs
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without filtering 150 μs
With filtering 200 μs
8.4.14 X67BC8513.L12
This bus controller makes it possible to connect X2X Link I/O nodes to POWERLINK.
Additional X2X Link I/O nodes (X67 modules or other X2X Link-based modules) can be connected using the inte-
grated X2X Link connection. When doing so, it is possible to operate the X2X Link cycle either 1:1 synchronously
or synchronously to the POWERLINK network using a prescaler. Mechanically, POWERLINK is connected via an
IP67-rated standard D-keyed M12 Ethernet connector.
POWERLINK is a standard protocol for Fast Ethernet with hard real-time characteristics. The Ethernet POW-
ERLINK Standardization Group (EPSG) ensures that the standard remains open and is continually developed:
www.ethernet-powerlink.org
■ POWERLINK V1/V2
■ Integrated hub for efficient cabling
■ 12 digital channels, configurable as inputs or outputs
■ 1 analog input, 0 to 20 mA, 12 bits
■ M12 connections
■ I/O configuration and firmware update via the fieldbus
■ Integrated connection to the local expansion via X2X Link for up to 250 additional modules
■ Configurable I/O cycle (starting at 200 µs)
The Status/Error LED is a green/red dual LED. The color green (status) is superimposed on the color red (error).
Red - Error Description
On The controlled node (CN) is in an error state (failed Ethernet frames, increased number of collisions on the network, etc.).
If an error occurs in the following states, then the green LED blinks over the red LED:
• PRE_OPERATIONAL_1
• PRE_OPERATIONAL_2
• READY_TO_OPERATE
Status
Green
t
Error
Red
t
LED "S/E"
t
Note:
• The LED blinks red several times immediately after startup. This is not an error, however.
• The LED is lit red for CNs with configured physical node number 0 but that have not yet been assigned a node
number via dynamic node allocation (DNA).
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
Flickering
All times in ms
X2X Link
Connector B2: Output
Digitale inputs/outputs 1 to 12
Not used
Analog input
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
2 A Pin Name
1 1 TXD Transmit data
2 RXD Receive data
3 TXD\ Transmit data\
4 RXD\ Receive data\
4 Shield connection made via threaded insert in the module
3
A → D-keyed (female), input
3 B1 → D-keyed (female), output
4
B1 1
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
The node number for the POWERLINK node is set using the two number switches.
Switch position Description
0x00 Only permitted when operating the POWERLINK node in DNA mode.
0x01 - 0xEF Node number of the POWERLINK node. Operation as a controlled node.
0xF0 - 0xFF Reserved, switch position not permitted.
Manager
Hub
Hub Hub
A digital mixed module is already integrated in the bus controller. Up to 250 I/O modules can be connected to
the bus controller.
Manager
Hub
Controller
Hub
X67PS1300
X67BC8xxx.L12 X67BC8xxx.L12
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
I/O I/O
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
8.4.14.9 Pinout
SHLD
1 +24 VDC
X1 to X6 2 DI/DO X - 1
M12 ① 3 GND
X1 X5
4 DI/DO X - 2
5 NC
X2 X6
X3 SHLD
1 +24 VDC
X8 2 AI +
M12 ①
X4 X8
3 GND
4 AI -
5 SHLD
8.4.14.9.1 Connection X1 to X6
4
1
5
Connection 5 to 6
8.4.14.9.2 Connection X8
Digital input/output
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
Analog input
Current source
AI +
1 2
+ +24 VDC
I 5 Connection x
AI -
GND 4 3
SG3
This module is not supported on SG3 target systems.
SG4
The module comes with preinstalled firmware. The firmware is also part of the Automation Runtime operating
system for the PLC. If the two versions are different, the Automation Runtime firmware is loaded to the module.
The latest firmware is made available automatically when updating Automation Runtime.
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
8.4.14.12.4 Configuration
Name:
ConfigIOMask01
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Information:
In counter operation, channels 1 to 2 can only be configured as inputs.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 8 configured as input/output 0 Configured as input
1 Configured as output
Name:
ConfigIOMask02
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 9 configured as input/output 0 Configured as input
1 Configured as output
... ...
3 Channel 12 configured as input/output 0 Configured as input
1 Configured as output
An input filter is available for each input. The input delay can be set using register "ConfigOutput03" on page 363.
Disturbance pulses which are shorter than the input delay are suppressed by the input filter.
Eingangs-
signal
Zeit
Zeit
tVerz ⇒ Eingangsverzögerung
Name:
ConfigOutput02
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
Name:
ConfigOutput01
The counter is configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0-3 Counter frequency 0 48 MHz (only with gate measurement)
1 3 MHz (only with gate measurement)
2 187.5 kHz (only with gate measurement)
3 24 MHz (only with gate measurement)
4 12 MHz (only with gate measurement)
5 6 MHz (only with gate measurement)
6 1.5 MHz (only with gate measurement)
7 750 kHz (only with gate measurement)
8 375 kHz (only with gate measurement)
4 Reserved 0
5 Clear event counter 0 No influence on the counter
1 Clear counter (at rising edge)
6-7 Operating mode 0 Event counter measurement
1 Gate measurement
This module is equipped with a configurable input filter. The minimum cycle time must be >400 μs. Filtering is
disabled for shorter cycle times.
If the input filter is active, then the scan rate for the channels is measured in ms. The conversion takes place
asynchronously to the network cycle.
Filter level
A filter can be defined to prevent large input jumps. This filter is used to bring the input value closer to the actual
analog value over a period of several bus cycles.
Filtering takes place after input ramp limitation.
Formula for calculating the input value:
Value Old Input value
Value New = Value Old - +
Filter level Filter level
Adjustable filter levels:
Value Filter level
0 Filter switched off
1 Filter level 2
2 Filter level 4
3 Filter level 8
4 Filter level 16
5 Filter level 32
6 Filter level 64
7 Filter level 128
The following examples show how filtering works in the event of an input jump or disturbance.
Example 1
The input value jumps from 8000 to 16000. The diagram shows the calculated value with the following settings:
Input ramp limitation = 0
Filter level = 2 or 4
Input value
Calculated value: Filter level 2
Calculated value: Filter level 4
16000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input ramp limitation can only take place when a filter is used; the input ramp is limited before filtering takes place.
The amount the input value changes is checked to make sure that specified limits are not exceeded. If the values
are exceeded, the adjusted input value is equal to the old value ± the limit value.
Configurable limit values:
Value Limit value
0 The input value is used without limitation.
1 0x3FFF = 16383
2 0x1FFF = 8191
3 0x0FFF = 4095
4 0x07FF = 2047
5 0x03FF = 1023
6 0x01FF = 511
7 0x00FF = 255
Input ramp limitation is well suited for suppressing disturbances (spikes). The following examples show the function
of the input ramp limitation based on an input jump and a disturbance.
Example 1
The input value jumps from 8000 to 17000. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
17000
8000
0
1 2 3 4 5 6 7 8 t [ms]
Input jump
Example 2
A disturbance interferes with the input value. The diagram shows the adjusted input value with the following settings:
Input ramp limitation = 4 = 0x07FF = 2047
Filter level = 2
Input value
Internally adjusted input value before filtering
16000
Disturbance (spike)
8000
0
1 2 3 4 5 6 7 8 t [ms]
Name:
ConfigOutput03
This register is used to define the filter level and input ramp limitation of the input filter.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Defines the filter level 000 Filter switched off
001 Filter level 2
010 Filter level 4
011 Filter level 8
100 Filter level 16
101 Filter level 32
110 Filter level 64
111 Filter level 128
3 Reserved 0
4-6 Defines the input ramp limit 000 The input value is used without limitation
001 Limit value = 0x3FFF (16383)
010 Limit value = 0x1FFF (8191)
011 Limit value = 0x0FFF (4095)
100 Limit value = 0x07FF (2047)
101 Limit value = 0x03FF (1023)
110 Limit value = 0x01FF (511)
111 Limit value = 0x00FF (255)
7 Reserved 0
Name:
ConfigOutput04
This register can be used to configure the lower limit value for analog values. If the analog value falls below the
limit value, it is frozen at this value and the corresponding "error status bit" on page 371 is set.
Data type Value
INT 0 to 32767
Name:
ConfigOutput05
This register can be used to configure the upper limit value for analog values. If the analog value exceeds the limit
value, it is frozen at this value and the corresponding "error status bit" on page 371 is set.
Data type Value
INT 0 to 32767
8.4.14.12.5 Communication
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Name:
DigitalInput09 to DigitalInput12
This register indicates the input state of digital inputs 9 to 12.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput09 0 or 1 Input state - Digital input 9
... ...
3 DigitalInput12 0 or 1 Input state - Digital input 12
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
Name:
DigitalOutput09 to DigitalOutput12
This register is used to store the switching state of digital outputs 9 to 12.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput09 0 Digital output 09 reset
1 Digital output 09 set
... ...
7 DigitalOutput12 0 Digital output 12 reset
1 Digital output 12 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
StatusDigitalOutput09 to StatusDigitalOutput12
This register is used to indicate the status of digital outputs 9 to 12.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput09 0 Channel 09: No error
1 Channel 09: Short circuit or overload
... ...
3 StatusDigitalOutput12 0 Channel 12: No error
1 Channel 12: Short circuit or overload
Name:
InputLatch01 to InputLatch08
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatch0x" on page 370.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch01 0 Do not latch input 1
1 Latch input 1
... ...
7 InputLatch08 0 Do not latch input 8
1 Latch input 8
Name:
InputLatch09 to InputLatch12
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatchxx" on page 370.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch09 0 Do not latch input 9
1 Latch input 9
... ...
3 InputLatch12 0 Do not latch input 12
1 Latch input 12
Name:
QuitInputLatch01 to QuitInputLatch08
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch01 0 Do not reset input 1
1 Reset input 1
... ...
7 QuitInputLatch08 0 Do not reset input 8
1 Reset input 8
Name:
QuitInputLatch09 to QuitInputLatch12
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch09 0 Do not reset input 9
1 Reset input 9
... ...
3 QuitInputLatch12 0 Do not reset input 12
1 Reset input 12
Name:
Counter01
The result of the counter is indicated in this register.
Event counter or gate measurement (16-bit counter value) depending on operating mode.
Data type Value
USINT Counter value
Name:
AnalogInput01
The analog input value is mapped in this register.
Data type Value Input signal:
INT 0 to 32767 Current signal 0 to 20 mA
Name:
UnderflowAnalogInput01
OverflowAnalogInput01
This register is used to monitor the analog input on the module. A change in the monitoring status generates an
error message.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 UnderflowAnalogInput01 0 No error
1 Measured value < Lower limit value
1 OverflowAnalogInput01 0 No error
1 Measured value > Upper limit value
2-7 Reserved -
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
250 µs
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
250 µs
8.4.15 X67BC8780.L12
This bus controller makes it possible to connect 8 CAN interfaces to the POWERLINK network. The CAN interfaces
are operated via an integrated hub, which increases the total cable length defined by classical CAN bus topology.
POWERLINK is a standard protocol for Fast Ethernet with hard real-time characteristics. The Ethernet POW-
ERLINK Standardization Group (EPSG) ensures that the standard remains open and is continually developed:
www.ethernet-powerlink.org.
■ POWERLINK
■ 8 CAN interfaces
■ M12 connections
■ Integrated hub for efficient cabling
Product ID X67BC8780.L12
Short description
Bus controller POWERLINK (V1/V2) controlled node
General information
Inputs/Outputs 8 CAN interfaces
Isolation voltage between channel and bus 500 Veff
Nominal voltage 24 VDC
B&R ID code
Bus controller 0xED84
Status indicators TX/RX per CAN interface, supply voltage, bus function
Diagnostics
Outputs Yes, using status LED and software
Power supply Yes, using status LED and software
Connection type
Fieldbus M12, D-keyed
Inputs/Outputs 8x M12, A-keyed
Power supply M8, 4-pin
Power consumption
Internal Max. 2.5 W
Electrical isolation
Channel - Fieldbus Yes
Channel - Channel No
Certifications
CE Yes
GOST-R Yes
The Status/Error LED is a green/red dual LED. The color green (status) is superimposed on the color red (error).
Red - Error Description
On The controlled node (CN) is in an error state (failed Ethernet frames, increased number of collisions on the network, etc.).
If an error occurs in the following states, then the green LED blinks over the red LED:
• PRE_OPERATIONAL_1
• PRE_OPERATIONAL_2
• READY_TO_OPERATE
Status
Green
t
Error
Red
t
LED "S/E"
t
Note:
• The LED blinks red several times immediately after startup. This is not an error, however.
• The LED is lit red for CNs with configured physical node number 0 but that have not yet been assigned a node
number via dynamic node allocation (DNA).
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
Flickering
All times in ms
Fieldbus interface
Connector A: Input
Connector B1: Output
No function
CAN interfaces 1 to 8
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
2 A Pin Name
1 1 TXD Transmit data
2 RXD Receive data
3 TXD\ Transmit data\
4 RXD\ Receive data\
4 Shield connection made via threaded insert in the module
3
A → D-keyed (female), input
3 B1 → D-keyed (female), output
4
B1 1
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
The node number for the POWERLINK node is set using the two number switches.
Switch position Description
0x00 Only permitted when operating the POWERLINK node in DNA mode.
0x01 - 0xEF Node number of the POWERLINK node. Operation as a controlled node.
0xF0 - 0xFF Reserved, switch position not permitted.
Manager
Hub
Hub Hub
8.4.15.7.1 Pinout
B1 B5
1 Shield
B2 B6
X1 to X8 2 24 VDC for CAN
M12 ① 3 CAN ground
4 CAN high
B3 B7
5 CAN low
B4 B8
8.4.15.7.2 Connector B1 to B8
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
B1 to B8 Pin Name
1 Shield
1
2 2 Sensor/Actuator power supply 24 VDC for CAN
3 CAN⊥ CAN ground
5
4 CAN_H CAN high
5 CAN_L CAN low
4 Shield connection made via threaded insert in the module
3
B1 to B8 → A-keyed (female), input/output
3
2
4
1
5
Each CAN interface (B1-B8) in the module is equipped with a terminating resistor.
The power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the power supply is 4 A.
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC module 24 VDC module
2 24 VDC actuator/sensor 24 VDC module
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for power supply
D → Connector (female) in module, routing of power supply
D 2
1
The following minimum versions are recommended to generally be able to use all functions:
• Automation Studio 4.3.4.95
• Automation Runtime A4.26
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
In the "Flat" function model, CAN information is transferred via cyclic input and output registers. All data for a CAN
object (8 CAN data bytes, identifier, status, etc.) is accessible as individual data points (see also "CAN object"
on page 383).
To transmit a CAN object, the CAN identifier, the CAN data (max. 8 bytes) and the number of bytes to be transmitted
must be written to the cyclic I/O data points. "TXCount" is then increased to send the transmission. The data
is applied to the module's internal buffer (max. 18 objects) and transmitted over the CAN network at the next
opportunity.
The same algorithm is used for receiving information from the CAN network. The module saves the CAN messages
in its internal buffer along with the respective identifiers. The CAN identifier, CAN data (max. 8 bytes) and number
of bytes to be processed are then written to the cyclic I/O data points. "RXCount" tells the application which data
must be applied from these input data points.
Information:
• Library "CAN_Lib" cannot be used.
Register Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Interface - Configuration
257 ConfigBaudrate USINT ●
259 ConfigSJW USINT ●
261 ConfigSPO USINT ●
266 ConfigTXtrigger UINT ●
673 Cfo_FIFOTXlimit USINT ●
677 Cfo_TXRXinfoFlags USINT ●
Interface - Communication
641 TXCount USINT ●
513 TXCountReadBack USINT ●
545 TXCountLatchReadBack USINT ●
515 RXCount USINT ●
547 RXCountLatch USINT ●
Transmit buffer
645 TXDataSize USINT ●
652 TXIdent UDINT ●
Index * 2 + 657 TXDataByte0 to TXDataByte7 USINT ●
Index * 4 + 658 TXDataWord0 to TXDataWord3 UINT ●
Index * 8 + 660 TXDataLong0 to TXDataLong1 UDINT ●
Receive buffer 0
517 RXDataSize0 USINT ●
524 RXIdent0 UDINT ●
Index * 2 + 529 RXData0Byte0 to RXData0Byte7 USINT ●
Index * 4 + 530 RXData0Word0 to RXData0Word3 UINT ●
Index * 8 + 532 RXData0Long0 to RXData0Long1 UDINT ●
Receive buffer 1
549 RXDataSize1 USINT ●
556 RXIdent1 UDINT ●
Index * 2 + 561 RXData1Byte0 to RXData1Byte7 USINT ●
Index * 4 + 562 RXData1Word0 to RXData1Word3 UINT ●
Index * 8 + 564 RXData1Long0 to RXData1Long1 UDINT ●
8.4.15.9.4 Function model 2 - Stream and Function model 254 - Cyclic stream
Function models "Stream" and "Cyclic stream" use a module-specific driver for the CPU's operating system. The
interface can be controlled using library "CAN_Lib" and reconfigured at runtime.
Function model - Stream
In function model "Stream", the CPU communicates with the module acyclically. The interface is relatively conve-
nient, but the timing is very imprecise.
Function model - Cyclic stream
Function model "Cyclic stream" was implemented later. From the application's point of view, there is no difference
between function models "Stream" and "Cyclic stream". Internally, however, the cyclic I/O registers are used to
ensure that communication follows deterministic timing.
Information:
• In order to use function models "Stream" and "Cyclic stream", you must be using B&R con-
trollers of type "SG4".
• These function models can only be used in X2X Link and POWERLINK networks.
• When using library "CAN_Lib", "ST1.IF1" must be added to the PLC address of CAN interface
IF1.
Register Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Module - Configuration
- AsynSize -
Interface - Configuration
6273 CfO_ErrorID0007 USINT ●
Interface - Communication
6145 CAN error status USINT ●
CANwarning Bit 0
CANpassive Bit 1
CANbusoff Bit 2
CANRXoverrun Bit 3
6209 CAN error acknowledgment USINT ●
QuitCANwarning Bit 0
QuitCANpassive Bit 1
QuitCANbussoff Bit 2
QuitCANRXoverrun Bit 3
Flatstream provides independent communication between an X2X Link master and the module. This interface
was implemented as a separate function model for the CAN module. CAN information (identifier, status, etc.) is
transferred via cyclic input and output registers. The sequence and control bytes are used to control this data
stream (see "Flatstream communication" on page 960).
When using function model Flatstream, the user can choose whether to use library "AsFltGen" in Automation Studio
for implementation or to adapt Flatstream handling directly to the individual requirements of the application.
Information:
• Library "CAN_Lib" cannot be used.
• Higher data rates can be achieved between X2X master and module compared to the "Flat"
function model.
Register Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Interface - Configuration
257 ConfigBaudrate USINT ●
259 ConfigSJW USINT ●
261 ConfigSPO USINT ●
266 ConfigTXtrigger UINT ●
6273 CfO_ErrorID0007 USINT ●
Interface - Communication
6145 CAN error status USINT ●
CANwarning Bit 0
CANpassive Bit 1
CANbusoff Bit 2
CANRXoverrun Bit 3
6209 CAN error acknowledgment USINT ●
QuitCANwarning Bit 0
QuitCANpassive Bit 1
QuitCANbussoff Bit 2
QuitCANRXoverrun Bit 3
Flatstream - Configuration
193 outputMTU USINT ●
195 inputMTU USINT ●
197 mode USINT ●
199 forward USINT ●
206 forwardDelay UINT ●
Flatstream - Communication
0 InputSequence USINT ●
Index * 1 + 0 RxByte1 to RxByte27 USINT ●
32 OutputSequence USINT ●
Index * 1 + 32 TxByte1 to TxByte27 USINT ●
Function model "Bus controller" is a reduced form of function model "Flatstream". Instead of up to 27 Tx/Rx bytes,
a maximum of 7 Tx/Rx bytes can be used.
Register Offset1) Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Interface - Configuration
257 - ConfigBaudrate USINT ●
259 - ConfigSJW USINT ●
261 - ConfigSPO USINT ●
266 - ConfigTXtrigger UINT ●
6273 - CfO_ErrorID0007 USINT ●
Interface - Communication
6145 - CAN error status USINT ●
CANwarning Bit 0
CANpassive Bit 1
CANbusoff Bit 2
CANRXoverrun Bit 3
6209 - CAN error acknowledgment USINT ●
QuitCANwarning Bit 0
QuitCANpassive Bit 1
QuitCANbussoff Bit 2
QuitCANRXoverrun Bit 3
Flatstream - Configuration
193 - outputMTU USINT ●
195 - inputMTU USINT ●
197 - mode USINT ●
199 - forward USINT ●
206 - forwardDelay UINT ●
Flatstream - Communication
0 0 InputSequence USINT ●
Index * 1 + 0 Index * 1 + 0 RxByte1 to RxByte7 USINT ●
32 0 OutputSequence USINT ●
Index * 1 + 32 Index * 1 + 0 TxByte1 to TxByte7 USINT ●
1) The offset specifies the position of the register within the CAN object.
A CAN object is always made up of a 4-byte identifier and a maximum of 8 subsequent data bytes. This also results
in the relationship between CAN object length and the amount of CAN payload data. This is important because
the number of CAN payload data bytes for communication via "FlatStream" always has to be determined using
the frame length.
Composition of a CAN object / CAN frame
Bytes Function Information
1 Code ID bit 0 to 7
2 ID bit 8 to 15
3 ID bit 16 to 23
4 ID bit 24 to 31
5 - 12 CAN payload data 0 to 8 CAN payload data bytes
Code
The 32 bits (4 bytes) of the CAN identifier are used as follows:
Bit Description Value Information
0 Frame format 0 Standard frame format (SFF) with an 11-bit identifier
1 Extended frame format (EFF) with an 29-bit identifier
1 Frame type 0 Data frame
1 Remote frame (RTR)
2 Reserved -
3 - 31 CAN identifier for telegram to be transmitted x Extended frame format (EFF) with 29 bits
Standard frame format (SFF) with 11 bits1)
In function model 254, the data packets to be transferred in a data stream are referred to as frames.
Information:
For the CAN module, that means:
• A frame always contains one CAN object and therefore cannot be longer than 12 bytes.
• The CAN object is only transferred to the transmit buffer after the frame has been completed.
• The CAN payload data length has a fixed relationship with the frame length and the actual size
of the CAN object. The following rules apply:
° CAN payload data length = Frame length - 4
° Frame length = CAN payload data length + 4
Name:
ConfigBaudrate
"Baud rate" in the Automation Studio I/O configuration.
Configuration of the CAN transfer rate for the interface.
Data type Values Bus controller default setting
USINT See bit structure. 0
Bit structure:
Bit Description Value Information
0-3 Transfer rate 0 Interface disabled (bus controller default setting)
1 10 kbit/s
2 20 kbit/s
3 50 kbit/s
4 100 kbit/s
5 125 kbit/s
6 250 kbit/s
7 500 kbit/s
8 800 kbit/s
9 1000 kbit/s
4-7 Reserved -
Name:
ConfigSJW
"Synchronization jump width" in the Automation Studio I/O configuration.
The synchronization jump width (SJW) is used to resynchronize the sample point within a CAN telegram.
See the CAN specification for more details on the SJW.
Data type Values Explanation
USINT 0 to 4 Synchronization jump width.
Bus controller default setting: 3
Name:
ConfigSPO
"Sample point offset" in the Automation Studio I/O configuration.
Offset for the sample instant of the individual bits on the CAN bus.
See the CAN specification for more details on the SPO.
Data type Values Explanation
USINT 0 to 1 Sample point offset.
Bus controller default setting: 0
Name:
ConfigTXtrigger
"TX objects / TX triggers" in the Automation Studio I/O configuration.
Defines the number of CAN objects that must be copied to the transmit buffer before the transmission is started.
Data type Values Explanation
UINT 0 to 8 Number of CAN objects in the transmit buffer before transmission is started.
Bus controller default setting: 1
Name:
CfO_ErrorID0007
The error messages to be transferred must first be configured with this register. If the corresponding enable bit is
not set, no error status will be sent to the higher-level system if the error occurs.
Data type Values Bus controller default setting
USINT See bit structure. 0
Bit structure:
Bit Description Value Information
0 CANwarning 0 Disabled (bus controller default setting)
1 Enabled
1 CANpassive 0 Disabled (bus controller default setting)
1 Enabled
2 CANbussoff 0 Disabled (bus controller default setting)
1 Enabled
3 CANRXoverrun 0 Disabled (bus controller default setting)
1 Enabled
4-7 Reserved -
Name:
Cfo_FIFOTXlimit
"TX FIFO size" in the Automation Studio I/O configuration.
Determines the size of the transmit buffer for the respective interface.
Data type Values Explanation
USINT 0 to 18 Size of the transmit buffer
Name:
Cfo_TXRXinfoFlags
These registers can be used to configure for the interface that the number of unprocessed elements in the transmit
or receive buffer is indicated in the upper 4 bits of registers "TXCountReadBack" and "RXCount".
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 TxFifoInfo 0 Registers "TXCountReadBack" on page 387 and "TXCount-
"Mode of channel TXCountReadBack" in the Automation Stu- LatchReadBack" on page 387 are use to read back "TXCount".
dio I/O configuration 1 The lower 4 bits of registers "TXCountReadBack" on page 387
and "TXCountLatchReadBack" on page 387 are used to read
back "TXCount".
The upper 4 Bits are used to return the number of frames in the
transmit buffer that have not been transmitted.
1 RxFifoInfo 0 Registers "RXCount" on page 387 and "RXCountLatch" on
"Mode of channel RXCount" in the Automation Studio I/O con- page 388 are used to indicate the number of telegrams that
figuration have been received.
1 The lower 4 bits of registers "RXCount" on page 387 and "RX-
CountLatch" on page 388 are used to indicate the number of
telegrams received.
The upper 4 bits are used to indicate the number of received but
not acknowledged telegrams in the receive buffer.
2-7 Reserved -
Name:
CAN error status
The bits in this register indicate the error states defined in the CAN protocol. If an error occurs, the corresponding bit
is set. For an error bit to be reset, the corresponding bit must be acknowledged (see "CAN error acknowledgment"
on page 386).
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 CANwarning 0 No error
1 CANwarning error on IF1
1 CANpassive 0 No error
1 CANpassive error on IF1
2 CANbusoff 0 No error
1 CANbusoff error on IF1
3 CANRXoverrun 0 No error
1 CANRXoverrun error on IF1
4-7 Reserved -
CANwarning
A faulty frame was detected on the CAN bus. This can include bit errors, bit stuffing errors, CRC errors, format
errors in the telegram and acknowledgment errors, for example.
CANpassive
The internal transmit and/or receive error counter is greater than 127. CAN communication continues to run, but
the interface can only issue a "passive error frame". Likewise, "error passive stations" have less ability to send
new telegrams altogether.
CANbusoff
The internal transmit error counter is greater than 255. The bus is switched off, and CAN communication with the
module no longer takes place.
CANRXoverrun
An overflow occurred in the module's receive buffer.
Name:
CAN error acknowledgment
Setting the bits in this register acknowledges the error assigned to the bit and clears the corresponding bit in the
"CAN error status" register. The application thus informs the module that it has recognized the error state.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 QuitCANwarning 0 No acknowledgment
1 Acknowledge CANwarning error on IF1
1 QuitCANpassive 0 No acknowledgment
1 Acknowledge CANpassive error on IF1
2 QuitCANbussoff 0 No acknowledgment
1 Acknowledge CANbusoff error on IF1
3 QuitCANRXoverrun 0 No acknowledgment
1 Acknowledge CANRXoverrun error on IF1
4-7 Reserved -
Name:
TXCount
By increasing this value, the application notifies the module that a new CAN telegram should be transferred into
the transmit buffer.
Data type Value
USINT 0 to 255
Name:
TXCountReadBack
The value of "TXCount" is copied from the module into this register. This makes it possible for the application task
to verify that the CAN telegram data was transfered from the module correctly.
The meaning of the value depends on the "TxFifoInfo" bit. This is located in the register "Cfo_TXRXinfoFlags" on
page 385.
Data type Value "TxFifoInfo" bit Meaning
USINT 0 to 255 0 Read back "TX-Count"
1 See bit structure.
Bit structure:
Bit Function Value Information
0-3 Read back "TX-Count" 0 to 15 Only the lower 4 bits
4-7 Number of frames in the transmit buffer that have not been trans- 0 to 15 If this number exceeds the 15 (a maximum of 18 possible), the
mitted value 15 is returned.
Name:
TXCountLatchReadBack
This register is used to copy the "TxCount" value from the previous cycle from the module. In the event of an X2X
Link or POWERLINK transfer error, this makes it possible to determined if the error occurred on the way from the
CPU to the module or on the way from the module to the CPU (see "Taking possible errors into consideration
when transmitting" on page 389).
The meaning of the value depends on the "TxFifoInfo" bit in the "Cfo_TXRXinfoFlags" on page 385 register.
Data type Value "TxFifoInfo" bit Meaning
USINT 0 to 255 0 TX-Count read back from the previous cycle
1 See bit structure.
Bit structure:
Bit Function Value Information
0-3 TX-Count read back from the previous cycle 0 to 15 Only the lower 4 bits
4-7 Number of frames in the transmit buffer that have not been trans- 0 to 15 From the previous cycle
mitted
Name:
RXCount
This counter is increased by 1 with each CAN telegram. The application task can thus detect when new data is
received and get it from the corresponding "RXData" registers.
The meaning of the value depends on the "RxFifoInfo" on page 385 bit in the "Cfo_TXRXinfoFlags" register.
Data type Value "RxFifoInfo" bit Meaning
USINT 0 to 255 0 Counter for received telegrams
1 See bit structure.
Bit structure:
Bit Function Value Information
0-3 Counter for received telegrams 0 to 15 Only the lower 4 bits
4-7 Number of unacknowledged telegrams in the receive buffer 0 to 15
Name:
RXCountLatch
This register always contains the "RXCount" value from the previous cycle. It can be used to detect transfer errors
from the module to the CPU (see "Taking possible errors into consideration when transmitting" on page 389).
The meaning of the value depends on the RxFifoInfo bit in the "Cfo_TXRXinfoFlags" on page 385 register.
Data type Value "RxFifoInfo" bit Meaning
USINT 0 to 255 0 Counter for received telegrams from the previous cycle
1 See bit structure.
Bit structure:
Bit Function Value Information
0-3 Counter for received telegrams from the previous cycle 0 to 15 Only the lower 4 bits
4-7 Number of telegrams in the receive buffer from the previous cy- 0 to 15
cle
Name:
TXDataSize
Number of CAN payload data bytes to be transmitted If a value less than 0 is specified here, this CAN telegram
is marked as being invalid and is not transferred into the transmit buffer. This is useful in connection with transmit
error detection between the module and the CPU (see "Taking possible errors into consideration when transmitting"
on page 389).
Data type Value Meaning
USINT -128 to 8 Amount of CAN payload data to be transmitted.
Name:
TXIdent
Identifier of the CAN telegram to be transmitted. The frame format and the identifier format are also defined in
this register.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 Frame format 0 Standard frame format (SFF) with an 11-bit identifier
1 Extended frame format (EFF) with an 29-bit identifier
1 Frame type 0 Data frame
1 Remote frame (RTR)
2 Reserved -
3 - 31 CAN identifier for telegram to be transmitted x Extended frame format (EFF) with 29 bits
Standard frame format (SFF) with 11 bits1)
Name:
TXDataByte0 to TXDataByte7
TXDataWord0 to TXDataWord3
TXDataLong0 to TXDataLong1
CAN payload data in the transmit direction. The 8 payload data bytes for a telegram can be used as data points
with 8 individual bytes, 4 words or 2 longs as needed.
Data type Value Description
USINT 0 to 255 CAN payload data transmitted as bytes
UINT 0 to 65,535 CAN payload data transmitted as words
UDINT 0 to 4.294.967.295 CAN payload data transmitted as longs
Data on the POWERLINK network or X2X Link can be lost due to transmission errors. One-time failures of cyclic
data are tolerated by the I/O systems. This is possible since all I/O data is re-transferred in the subsequent cycle.
A transfer error cannot be detected from the I/O variables; they remain frozen on the value from the last cycle.
These tolerated one-time I/O failures can lead to data loss or the delayed CAN telegram transmission. The counter
feedback is derived on the module and used to detect these cases.
Register for counter feedback: • "TXCountReadBack" on page 387
• "TXCountLatchReadBack" on page 387
Name:
RXDataSize0
RXDataSize1
Number of valid CAN payload data bytes.
This register also uses the value -1 (0xFF) to indicate a general error or gap in the input data stream. Details
regarding the error that has occurred can be seen in the "CAN error status" on page 386 register.
Data type Value Meaning
USINT 1 to 8 Number CAN payload data
-1 Error
Name:
RXIdent0
RXIdent1
Identifiers assigned to the received data. The frame format and the identifier format can also be read from this
register.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 Frame format 0 Standard frame format (SFF) with an 11-bit identifier
1 Extended frame format (EFF) with an 29-bit identifier
1 Frame type 0 Data frame
1 Remote frame (RTR)
2 Reserved -
3 - 31 CAN identifier for telegram to be transmitted x Extended frame format (EFF) with 29 bits
Standard frame format (SFF) with 11 bits1)
Name:
RXData0Byte0 to RXData0Byte7
RXData0Word0 to RXData0Word3
RXData0Long0 to RXData0Long1
RXData1Byte0 to RXData1Byte7
RXData1Word0 to RXData1Word3
RXData1Long0 to RXData1Long1
These registers hold the payload data of the CAN object to be transferred from the receive buffer to the CPU in
the current cycle. If new data is received or if the receive buffer contains additional CAN objects, these registers
are overwritten with the new data in the next cycle.
To avoid losing CAN objects, the application must respond immediately to a change in the "RXCount" and copies
the data from these registers.
The maximum 8 bytes for a CAN telegram can be used as data points with 8 individual bytes, 4 words or 2 longs
as needed.
Data type Value Description
USINT 0 to 255 Received CAN payload data as bytes
UINT 0 to 65,535 Received CAN payload data as words
UDINT 0 to 4.294.967.295 Received CAN payload data as longs
Name:
AsynSize
When the stream is used, data is exchanged internally between the module and CPU. For this purpose, a defined
amount of acyclic bytes is reserved for this slot.
Increasing the acyclic frame size leads to increased data throughput on this slot.
Information:
This configuration involves a driver setting that cannot be changed during runtime!
Data type Value Information
- 8 to 28 Acyclic frame size in bytes. Default = 24
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
200 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
200 µs
8.4.16 X67BCD321.L12(-1)
EtherNet/IP is an Ethernet based industrial communication network that utilizes the widely-used TCP/IP and UDP/
IP transport protocols. Like DeviceNet, EtherNet/IP uses CIP (Common Industrial Protocol) as the application layer
for automation applications. The Open DeviceNet Vendor Association (ODVA) published this protocol in March of
2000 as an open industry standard.
This EtherNet/IP X67 bus controller makes it possible to connect X2X Link I/O nodes to EtherNet/IP. The bus
controller can be operated using interface module X20IF10D1-1 or 3rd-party systems with EtherNet/IP scanner
functionality. Additional X2X Link I/O nodes (X67 modules or other X2X Link-based modules) can be connected
using the integrated X2X Link connection.
■ Fieldbus: EtherNet/IP
■ Integrated 3-port switch (1 internal port) for efficient cabling
■ Auto-configuration of I/O modules
■ Can be configured by the scanner using configuration assembly
■ Web interface
■ DHCP-capable
■ 16 digital channels, configurable as inputs or outputs
■ M12 connection type
■ Integrated connection to local expansions via X2X Link for 252 additional modules
■ Configurable I/O cycle (0.5 to 4 ms)
■ Minimum fieldbus cycle time (also requested packet interval or RPI): 1 ms
Information:
Only the standard function model (see the respective module description) is supported when the bus
controller is used together with multi-function modules it has automatically configured itself.
Automation Studio V4.3 or later can be used to create configuration files (e.g. EDS files, binary files)
in 6 easy steps. All other function models are also supported by transferring configuration data to the
bus controller (e.g. using its web interface or the scanner via a "configuration assembly").
Automation Studio can be downloaded at no cost from the B&R website www.br-automation.com. The
evaluation license is permitted to be used to create complete configurations for fieldbus bus con-
trollers at no cost.
1) LED "Mod status" is a green/red dual LED. The LED blinks red several times immediately after startup. However, this is a boot message, not an error (see
EtherNet/IP user's manual).
2) LED "Net status" is a greed/red dual LED.
Fieldbus interface
Connector A: Input
Connector B1: Output
X2X Link
Connector B2: Output
Digital inputs/outputs 1 to 16
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
2 A Pin Name
1 1 TXD Transmit data
2 RXD Receive data
3 TXD\ Transmit data\
4 RXD\ Receive data\
4 Shield connection made via threaded insert in the module
3
A → D-keyed (female), input
3 B1 → D-keyed (female), output
4
B1 1
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
Default parameters:
• IP address: 192.168.100.1
• Subnet mask: 255.255.255.0
• Gateway: 192,168,100,254
• Primary NetBIOS name: "br" + MAC address
• Secondary NetBIOS name: "br" + "eip" + address switch number (decimal)
• X2X Link configuration: 1 ms cycle time
• X2X Link cable length: 0m
Changes to the network address switch are only applied after a restart (power cycle). If the bus controller is restarted
with the address switch value 0xFF, it is initialized with IP address 192.168.100.1. This address is also the factory
default setting.
This IP address can be used to establish a connection to the bus controller. The internationally unique MAC address
is listed on the housing side of the bus controller. The combination of "br" and the MAC address results in a unique
name (primary NetBIOS name) that also makes it possible to access the bus controller.
Example of the primary NetBIOS name:
MAC address: 00-60-65-00-49-02
Resulting NetBIOS name: br006065004902
This means that, without additional parameter changes, either the default IP address 192.168.100.1 or the NetBIOS
name "br+MAC" can be used to communicate with the controller.
Since NetBIOS is being used, the bus controller can only be accessed via this name if there are no intermediary
routers or gateways in the way.
If a address switch position between 0x80 and 0xEF is configured, the bus controller will attempt to request an IP
address from the DHCP server. The assigned IP address can be queried with a "ping" command together with the
hostname. The bus controller registers this hostname on the DHCP server, which should forward it to a DNS server.
Example: The hostname (DNS name) is made up of three elements:
"br" + "eip" + Address switch value (three decimal places).
This means, for example, that the following hostname is generated for address switch setting 0xD7 (dec.
215): "breip215".
If DNS service is not available on the network, the bus controller's two NetBIOS names can also be used for
access. The secondary NetBIOS name is identical to the hostname; at address switch value 0x00, it is identical
with the primary NetBIOS name. The bus controller can only be reached via its NetBIOS name if no other routers
or gateways are in the way.
The address switches can be used to change the last byte in the IP address configured on the bus controller. The
IP address saved in flash memory is not changed. If the address switches are set to 0x00, the bus controller applies
the IP address last saved to flash memory. Switch positions between 0x01 and 0x7F cause the last position of the
IP address (the lowest byte) to be overwritten by the value of the address switch. This provides the user a quick
and easy way to address a large number of bus controllers. In short, an IP address between 192.168.100.1 and
192.168.100.127 can be selected for a bus controller using the address switches without requiring any additional
software configuration.
The IP parameters in the flash memory can be changed via the EtherNet/IP protocol or using the Telnet interface
(see EtherNet/IP in the user's manual). If the IP address should be set via the TCP/IP object (class 0xF5), then
the new address will only be saved to flash if instance attribute 3 (configuration control) of the TCP/IP object is
set to 0 (see CIP specification).
Scanner
Switch
Switch Switch
A digital mixed module is already integrated in the bus controller. Up to 252 I/O modules can be connected to
the bus controller.
Scanner
Switch
I/O device
X67PS1300
X67BCD321.L12(-1) X67BCD321.L12(-1)
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
I/O I/O
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.16.9.1 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6
X1 to X8 2 DI/DO x-1
M12 ① 3 GND
4 DI/DO x-2
X3 X7
5 NC
X4 X8
8.4.16.9.2 Connection X1 to X8
4
1
5
Connection 5 to 8
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
5
1 3
Monitoring of
Sensor/Actuator power supply
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
8.4.17 X67BCE321.L12
PROFINET (Process Field Network) is an Industrial Ethernet protocol. It uses TCP/IP and is real-time capable.
PROFINET IO was developed for real-time (RT) and synchronous communication (IRT = Isochronous Real Time).
The designations RT and IRT merely describe the real-time properties for communication taking place within
PROFINET IO. PROFINET IO defines how all data is exchanged between controllers (masters) and devices
(slaves) and how parameter settings and diagnostics are handled. The bus system is designed to exchange data
between Ethernet-based field devices using the producer/consumer model.
X67 modules or other modules that are based on X2X Link can be connected to the bus controller. Modular system
configurations are optimally supported by PROFINET. Using the device description file (GSDML format), it is very
easy to handle project configuration in the respective engineering tool from the manufacturer of the master device.
• Fieldbus: PROFINET RT
• I/O configuration via the fieldbus
• Conformance Class B
• 1 ms minimum cycle time
• Integrated switch for wiring multiple slaves
• 100 Mbit/s full-duplex mode
• Up to 1440 bytes of input data and up to 1440 bytes of output data are possible
• Integrated website
• PROFINET diagnostics and module diagnostics during runtime from within the master environment
• Module and switch diagnostics during runtime using the Web interface or SNMP
• 16 digital channels, configurable as inputs or outputs
• Integrated connection for additional 253 modules via X2X Link
Blinking 2
250
Blinking 3
500
Blinking 4
1000
Quad flash
300 300 300 300 300 300 300 1500
Double flash
300 300 300 1500
All times in ms
Fieldbus interface
Connector A: Input
Connector B1: Output
X2X Link
Connector B2: Output
Digital inputs/outputs 1 to 16
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
2 A Pin Name
1 1 TXD Transmit data
2 RXD Receive data
3 TXD\ Transmit data\
4 RXD\ Receive data\
4 Shield connection made via threaded insert in the module
3
A → D-keyed (female), input
3 B1 → D-keyed (female), output
4
B1 1
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
The bus controller has 2 node number switches. The bus controller can be set to different operating modes using
certain, pre-defined switch positions. They can also be used to configure various additional parameters (PROFINET
device name, DHCP mode, etc.).
Switch position Description
0x00 All parameters are loaded from flash memory: Default PROFINET initialization via the DCP protocol (factory state)
0x01 to 0xEF These switch positions generate a valid PROFINET device name. This name is composed as follows: "brpnXXX".
XXX refers to the decimal value of the node number switch position. Leading zeros are automatically added by
the bus controller and must be taken into account on the master side (e.g. node number 0x01 corresponds to
"brpn001" on the master side).
0xF0 Clears flash (see "Erasing flash memory" on page 409)
0xF1 to 0xFD Reserved, switch position not permitted
0xFE IP address via DHCP server
0xFF All parameters set to default: PME mode
Erasing flash memory using switch position 0xF0 returns the bus controller to its factory state.
Steps to be performed
1. Turn off the power supply to the bus controller.
2. Set the node number to 0xF0.
3. Turn on the power supply to the bus controller.
4. Wait until the MS LED flashes green for 5 s. The node number switch must be set to 0x00 and then back to
0xF0 within this time window of 5 seconds (turn switch "High").
5. Wait until the MS LED blinks with a red double-flash (flash memory has been erased).
6. Turn off the power supply to the bus controller.
7. Set the desired node number (0x00 to 0xEF).
8. Turn on the power supply to the bus controller.
9. The bus controller boots with the configured node number.
Master
Switch
Switch
A digital mixed module is already integrated in the bus controller. Up to 252 I/O modules can be connected to
the bus controller.
Master
Switch
I/O device
X67PS1300
X67BC X67BC
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
I/O I/O
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.17.9.1 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6
X1 to X8 2 DI/DO x-1
M12 ① 3 GND
4 DI/DO x-2
X3 X7
5 NC
X4 X8
8.4.17.9.2 Connection X1 to X8
4
1
5
Connection 5 to 8
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
5
1 3
Monitoring of
Sensor/Actuator power supply
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
The integrated website gives the user an overview of the bus controller's network parameters, the configured I/
O modules and the switch configuration. The starting page includes information regarding specific bus controller
settings such as IP address, hostname and the PROFINET device name. In addition, the website provides infor-
mation about the current firmware version. Information concerning module diagnostics is incorporated into a tree
structure. Expanding and collapsing the individual module nodes provides an overview of the configured I/O mod-
ules. In addition, various package counters are read from the integrated switch. This makes diagnosing errors on
the network quick and easy.
Network parameters concerning the bus controller itself can be read, but they cannot be modified. The bus con-
troller's IP configuration is handled during booting or by the PROFINET master when a connection is established.
Each page of the website contains help information that describes the functions and parameters displayed on that
page. The link to this information can be found in the upper right corner of the page in the form of a question mark.
A connection to the website is established by entering the current IP address or the unique hostname in a Web
browser. Some functions require authentication.
The hostname is composed of a predefined text and a unique MAC address. For example, if the bus controller has
the MAC address 00:60:65:11:22:33, this will result in the following hostname: br006065112233.
Default parameters available for the integrated website
IP address: 192.168.100.1
Username: admin
Password: B&R
Information:
Take note of the node number switch position.
Please note that authentication parameters are case-sensitive.
8.4.18 X67BCG321.L12
EtherCAT is an Ethernet-based fieldbus developed by Beckhoff. The protocol is suitable for hard and soft real-time
requirements in automation technology. In addition to a ring structure, which becomes logically necessary because
of the summation frame telegram used, the EtherCAT technology also physically supports topologies such as line,
tree, star (limited) and combinations of these topologies. B&R's X20BC80G3 (expandable bus controller module)
and X20HB88G0 (standalone junction base module) are available for implementing these topologies.
EtherCAT slave devices take the data designated for them from a telegram as it is passing through the device. Input
data is also added to the telegram as it is passing through. Bus controller X67BCG321.L12 allows the coupling of
X2X Link I/O modules to EtherCAT and can be operated on any EtherCAT master systems. A transition between
IP20 and IP67 protection outside of the control cabinet is possible by arranging X20, X67 or XV modules one after
the other as needed at distances up to 100 m.
Master systems without FoE (File access over EtherCAT) support require an appropriate configuration tool to
transfer the configuration (optional).
• Fieldbus: EtherCAT
• 16 digital channels, configurable as inputs or outputs
• Auto-configuration of I/O modules
• I/O configuration and firmware update via the fieldbus (FoE)
• Integrated connection to local expansion via X2X Link for 250 additional modules
• Full support of the modular slice concept via CoE (CANopen over EtherCAT)
• Configurable I/O cycle (0.2 to 4 ms)
• Synchronization between the fieldbus and X2X Link
Information:
Only the standard function model (see the respective module description) is supported when the bus
controller is used together with multi-function modules it has automatically configured itself.
All other function models are supported when configured accordingly in Automation Studio V4.3 or
later (see the EtherCAT user's manual).
Automation Studio can be downloaded at no cost from the B&R website www.br-automation.com. The
evaluation license is permitted to be used to create complete configurations for fieldbus bus con-
trollers at no cost.
Required accessories
See "Required cables and connectors" on page 420.
For a general overview, see "Accessories - General overview" on page 54.
1) LED "L/A IF" shows the signals of the 2 EtherCAT interfaces combined (IN and OUT).
2) LED "STATUS" is a green/red dual LED used to indicate EtherCAT states ERROR (red) and RUN (green).
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
Flickering
All times in ms
Fieldbus interface
Connector A: Input
Connector B1: Output
X2X Link
Connector B2: Output
Digital inputs/outputs 1 to 16
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
2 A Pin Name
1 1 TXD Transmit data
2 RXD Receive data
3 TXD\ Transmit data\
4 RXD\ Receive data\
4 Shield connection made via threaded insert in the module
3
A → D-keyed (female), input
3 B1 → D-keyed (female), output
4
B1 1
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
Master
Examples of junctions:
Junction
- X20BC80G3 + X20HB28G0
- X20HB88G0 + X20HB28G0
Junction
A digital mixed module is already integrated in the bus controller. Up to 250 I/O modules can be connected to
the bus controller.
Master
Junction
Slave
X67PS1300
X67BCG321.L12 X67BCG321.L12
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
I/O I/O
Information:
The network address switches on this bus controller have no function.
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
8.4.18.10.2 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6
X1 to X8 2 DI/DO x-1
M12 ① 3 GND
4 DI/DO x-2
X3 X7
5 NC
X4 X8
8.4.18.10.3 Connection X1 to X8
4
1
5
Connection 5 to 8
5
1 3
Monitoring of
Sensor/Actuator power supply
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
8.4.19 X67BCJ321
Established in 1979, the Modbus protocol has approved the use of Ethernet with both Modbus TCP and Mod-
bus/UDP. Today, Modbus TCP is an open Internet draft standard introduced by Schneider Automation to the In-
ternet Engineering Task Force (IETF), the organization responsible for Internet standardization. The Modbus ser-
vices and object model have been preserved since the original version and left unchanged for use with the TCP/
IP transmission medium.
Modbus/UDP differs from Modbus TCP in that it uses connectionless communication via UDP/IP. The advantages
of faster and easier communication with UDP/IP also brings with it the disadvantage of requiring error detection
and correction in the application layer.
This bus controller makes it possible to connect X2X Link I/O nodes to Modbus via Ethernet. The bus controller
can be operated on B&R controllers through the use of Automation Studio or on third-party systems with Modbus
TCP or -UDP master functionality.
■ Fieldbus: Modbus/TCP, Modbus/UDP
■ I/O configuration via the fieldbus
■ DHCP-capable
■ Response time: <1 ms
■ Check validity of command sequences before execution
■ 8 digital channels, configurable as inputs or outputs
■ Integrated connection to local expansions via X2X Link for 250 additional modules
■ Configurable I/O cycle (0.5 to 4 ms)
Information:
Only the standard function model (see the respective module description) is supported when the bus
controller is used together with multi-function modules it has automatically configured itself.
All other function models are supported when configured accordingly in Automation Studio V4.3 or
later.
Automation Studio can be downloaded at no cost from the B&R website www.br-automation.com. The
evaluation license is permitted to be used to create complete configurations for fieldbus bus con-
trollers at no cost.
1) The Status/Error LED is a green/red dual LED. The LED blinks red several times immediately after startup. This is a boot message, however, and not an error.
Digital inputs/outputs 1 to 8
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
Pin Name
2
A 1 TXD Transmit data
2 RXD Receive data
1 3 TXD\ Transmit data\
4 RXD\ Receive data\
3 Shield connection made via threaded insert in the module
4
A → D-keyed (female), input
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
Changes to the network address switches are only applied after a restart. If the bus controller is restarted with
the address switch value 0xFF, it is initialized with the IP address 192.168.100.1. This address is also the factory
default setting. The interface number is set to 502 (reserved for Modbus).
This IP address can be used to establish a connection to the bus controller. The internationally unique MAC address
is listed on the housing side of the bus controller. The combination of "br" and the MAC address results in a unique
name (primary NetBIOS name) that also makes it possible to access the bus controller.
Example of the primary NetBIOS name:
MAC address: 00-60-65-00-49-02
Resulting NetBIOS name: br006065004902
This means that, without additional parameter changes, either the default IP address 192.168.100.1 or the NetBIOS
name "br+MAC" can be used to communicate with the controller.
Since NetBIOS is being used, the bus controller can only be accessed via this name if there are no intermediary
routers or gateways in the way.
If a network address switch setting between 0x80 and 0xEF is configured, the bus controller will attempt to request
an IP address from the DHCP server. The assigned IP address can be queried with a "ping" command together
with the hostname. The bus controller registers this hostname on the DHCP server, which should forward it to a
DNS server.
Example The hostname (DNS name) is made up of three elements:
"br" + "mb" + Address switch value (3 decimal places)
This means, for example, that the following hostname is generated for address switch setting
0xD7 (dec. 215): "brmb215".
If DNS service is not available on the network, the bus controller's two NetBIOS names can also be used for access.
The secondary NetBIOS name is identical to the hostname. If the address switches are set to 0x00, it is identical
to the primary NetBIOS name. The bus controller can only be reached via its NetBIOS name if no other routers
or gateways are in the way.
The address switches can be used to change the last byte in the IP address configured on the bus controller. The
IP address saved in flash memory is not changed. If the address switches are set to 0x00, the bus controller applies
the IP address last saved to flash memory. Switch positions between 0x01 and 0x7F cause the last position of the
IP address (the lowest byte) to be overwritten by the value of the address switch. This provides the user a quick
and easy way to address a large number of bus controllers. In short, an IP address between 192.168.100.1 and
192.168.100.127 can be selected for a bus controller using the address switches without requiring any additional
software configuration.
The IP parameters in flash memory can be changed via the Modbus protocol, the ModbusTCP Toolbox or the
Telnet interface. The ModbusTCP Toolbox can be downloaded from the B&R website.
The IP address, subnet and gateway are all defined in the address range 0x1003 to 0x100E. Each has a length of 4
words. The data is applied by writing constant 0xC1 to address 0x1140 ("Write Single Register" fc6, addr. 0x1140,
data 0xC1). The new settings are applied after the bus controller is restarted.
The bus controller is used as the last controller in both a tree or line structure.
Master
Switch
Controller
+
Switch
X67BCJ321
A digital mixed module is already integrated in the bus controller. Up to 250 I/O modules can be connected to
the bus controller.
Master
Switch
Switch
X2X Link X2X Link
I/O device
Information:
3 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This supply module provides 15 W
for additional modules. It should be mounted in the middle of the modules that are to be supplied with
power.
POWERLINK POWERLINK
Attachment cable or Field-assembled connector
X67CA0E41.xxxx X67AC2E01
X2X Link
Connection cables X2X Link
X67CA0X01.xxxx Open-ended cables
X67CA0X11.xxxx X67CA0X41.xxxx
X67CA0X51.xxxx
Up to 250 additional modules can be connected to the bus controller via X2X Link using pre-assembled cables.
The connection is made using an M12 circular connector.
Connection Pinout
Pin Name
B 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.19.9.1 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.4.19.9.2 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
8.4.19.10 SG3
8.4.20 X67BCJ321.L12
Established in 1979, the Modbus protocol has approved the use of Ethernet with both Modbus TCP and Mod-
bus/UDP. Today, Modbus TCP is an open Internet draft standard introduced by Schneider Automation to the In-
ternet Engineering Task Force (IETF), the organization responsible for Internet standardization. The Modbus ser-
vices and object model have been preserved since the original version and left unchanged for use with the TCP/
IP transmission medium.
Modbus/UDP differs from Modbus TCP in that it uses connectionless communication via UDP/IP. The advantages
of faster and easier communication with UDP/IP also brings with it the disadvantage of requiring error detection
and correction in the application layer.
This bus controller makes it possible to connect X2X Link I/O nodes to Modbus via Ethernet. The bus controller
can be operated on B&R controllers through the use of Automation Studio or on third-party systems with Modbus
TCP or -UDP master functionality.
■ Modbus/TCP, Modbus/UDP
■ Integrated 2-port switch for efficient cabling
■ I/O configuration via the fieldbus
■ DHCP-capable
■ Response time: <1 to 8 ms (depends on the load on the integrated switch)
■ Check validity of command sequences before execution
■ 16 digital channels, configurable as inputs or outputs
■ M12 connection type
■ Integrated connection to local expansions via X2X Link for 250 additional modules
■ Configurable I/O cycle (0.5 to 4 ms)
Information:
Only the standard function model (see the respective module description) is supported when the bus
controller is used together with multi-function modules it has automatically configured itself.
All other function models are supported when configured accordingly in Automation Studio V4.3 or
later.
Automation Studio can be downloaded at no cost from the B&R website www.br-automation.com. The
evaluation license is permitted to be used to create complete configurations for fieldbus bus con-
trollers at no cost.
1) The Status/Error LED is a green/red dual LED. The LED blinks red several times immediately after startup. This is a boot message, however, and not an error.
Fieldbus interface
Connector A: Input
Connector B1: Output
X2X Link
Connector B2: Output
Digital inputs/outputs 1 to 16
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
2 A Pin Name
1 1 TXD Transmit data
2 RXD Receive data
3 TXD\ Transmit data\
4 RXD\ Receive data\
4 Shield connection made via threaded insert in the module
3
A → D-keyed (female), input
3 B1 → D-keyed (female), output
4
B1 1
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
Changes to the network address switches are only applied after a restart. If the bus controller is restarted with
the address switch value 0xFF, it is initialized with the IP address 192.168.100.1. This address is also the factory
default setting. The interface number is set to 502 (reserved for Modbus).
This IP address can be used to establish a connection to the bus controller. The internationally unique MAC address
is listed on the housing side of the bus controller. The combination of "br" and the MAC address results in a unique
name (primary NetBIOS name) that also makes it possible to access the bus controller.
Example of the primary NetBIOS name:
MAC address: 00-60-65-00-49-02
Resulting NetBIOS name: br006065004902
This means that, without additional parameter changes, either the default IP address 192.168.100.1 or the NetBIOS
name "br+MAC" can be used to communicate with the controller.
Since NetBIOS is being used, the bus controller can only be accessed via this name if there are no intermediary
routers or gateways in the way.
If a network address switch setting between 0x80 and 0xEF is configured, the bus controller will attempt to request
an IP address from the DHCP server. The assigned IP address can be queried with a "ping" command together
with the hostname. The bus controller registers this hostname on the DHCP server, which should forward it to a
DNS server.
Example The hostname (DNS name) is made up of three elements:
"br" + "mb" + Address switch value (3 decimal places)
This means, for example, that the following hostname is generated for address switch setting
0xD7 (dec. 215): "brmb215".
If DNS service is not available on the network, the bus controller's two NetBIOS names can also be used for access.
The secondary NetBIOS name is identical to the hostname. If the address switches are set to 0x00, it is identical
to the primary NetBIOS name. The bus controller can only be reached via its NetBIOS name if no other routers
or gateways are in the way.
The address switches can be used to change the last byte in the IP address configured on the bus controller. The
IP address saved in flash memory is not changed. If the address switches are set to 0x00, the bus controller applies
the IP address last saved to flash memory. Switch positions between 0x01 and 0x7F cause the last position of the
IP address (the lowest byte) to be overwritten by the value of the address switch. This provides the user a quick
and easy way to address a large number of bus controllers. In short, an IP address between 192.168.100.1 and
192.168.100.127 can be selected for a bus controller using the address switches without requiring any additional
software configuration.
The IP parameters in flash memory can be changed via the Modbus protocol, the ModbusTCP Toolbox or the
Telnet interface. The ModbusTCP Toolbox can be downloaded from the B&R website.
The IP address, subnet and gateway are all defined in the address range 0x1003 to 0x100E. Each has a length of 4
words. The data is applied by writing constant 0xC1 to address 0x1140 ("Write Single Register" fc6, addr. 0x1140,
data 0xC1). The new settings are applied after the bus controller is restarted.
Master
Switch
Switch Switch
A digital mixed module is already integrated in the bus controller. Up to 250 I/O modules can be connected to
the bus controller.
Master
Switch
I/O device
X67PS1300
X67BC X67BC
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
I/O I/O
Up to 250 additional modules can be connected to the bus controller via X2X Link using pre-assembled cables.
The connection is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1 additional mixed module can be saved by the digital mixed module integrated in the bus controller.
8.4.20.9.1 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6
X1 to X8 2 DI/DO x-1
M12 ① 3 GND
4 DI/DO x-2
X3 X7
5 NC
X4 X8
8.4.20.9.2 Connection X1 to X8
4
1
5
Connection 5 to 8
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
5
1 3
Monitoring of
Sensor/Actuator power supply
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
8.4.20.10 SG3
8.5.1 Summary
Model number Short description Page
X67DC1198 X67 digital counter module, 2x 3 inputs 5 V for SSI 1 Mbit/s or ABR 250 kHz, 8 digital channels 24 VDC, 0.1 448
A, configurable as inputs or outputs or 4 AB counters 100 kHz or 4x comparator outputs or 2x PWM outputs,
local time measurement functions
X67DC2322 X67 resolver module, 2x 14-bit resolver input BRX/BRT, 2 digital inputs, 24 VDC, sink, 2 digital outputs, 0.5 A, 494
source
8.5.2 X67DC1198
The possibilities are almost endless with this digital counter module.
Connectors 1 and 3 are 12-pin M12 connectors. Each of these can be used to connect 1 incremental encoder or
SSI encoder with 5 V differential signals. In addition, there are 2 digital channels available on the same output
which, when configured as inputs, can be used with incremental encoders with status outputs (e.g. alarms). When
configured as outputs, they act as preset and count direction switching functions when used together with SSI
encoders, for example.
2 more sockets and 2 more configurable digital channels are available on female connectors 2 and 4. The inputs
can be used as latch, gate, or home enable switches, while the outputs can be used as comparator outputs, for
example.
■ 2 incremental or SSI encoder inputs 5 V
■ 2 digital channels, 24 V per connection, configurable either as inputs or outputs
■ 4 AB counters on the digital inputs
■ Pulse width modulation of the digital outputs
■ Encoder power supply 5 V and 24 V integrated in encoder connection
Information:
In contrast to freely configurable function model "Standard", the function selection cannot be modified
in function model "Bus controller".
Function model "Bus Contoller":
• 1x ABR incremental encoder (5 V)
• 1x SSI absolute encoder (5 V)
• 1x PWM output (24 V)
• 1x up/down counter (24 V)
• 3x AB counter (24 V)
X2X Link
Connector A: Input
Connector B: Output
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.5.2.8 Pinout
Shield
1 ABR-B\; DI/DO
2 DI/DO; AB-A
3 ABR-R; SSI clock; DI/DO
4 ABR-R\; SSI clock\; DI/DO
5 ABR-A; SSI data; DI/DO
X1 and X3
6 ABR-A\; SSI data\; DI/DO
M12 ① 7 DI/DO; AB-B
X1 X3
8 ABR-B; DI/DO
9 Reserved
10 +5 VDC
11 +24 VDC
X2 X4 12 GND
Shield
1 +24 VDC
X2 and X4 2 DI/DO; PWM; AB-A
M12 ② 3 GND
4 DI/DO; AB-B
5 Shield
4
1
5
Connection 4
R\
R 1 2
Counter
B\
B 12 11 Connection 1 / 3
8 4
A\
A 6
Clock 1
10 3
Counter
Clock\
12 Connection 1 / 3
Data 4
Data\ 5
6
+5 VDC
Sensor 2
DI
1 2
GND
10
12 11 Connection 1 / 3
+24 VDC
Sensor 1
DI 7
GND
PWM output
PWM 1 2
Valve
PWM
5 Connection 2 / 4
GND
4 3
5 V input
Input x
RS485
driver Input status
LED (green)
GND
GND
PTC
24 V
24 V
5V
24 V
24 V input
Input x
VDR
Input status
I/O status
GND
GND
LED (green)
PTC
24 V
24 V
5 V output
Output x
RS485
Output status driver
Transmitter
Output x
24 V output
24 V
PTC
Output x
VDR
Output status Pull
GND
Output monitoring
100 H 10 H 1H
1000
0.1 H
Coil resistance
Coil inductance
[Ω]
0.01 H
240 Ω ≙ 100 mA
0.1 1 10 100 1000 10000
The functions listed here are directly assigned to the respective hardware channels and cannot be changed:
Channel Signal connections
1 • Digital input/output 1 (24 VDC)
• Event counter 1
• AB counter 1, signal line A
• Up/down counter 1 - frequency
2 • Digital input/output 2 (24 VDC)
• Event counter 2
• AB counter 1, signal line B
• Up/down counter 1 - direction
3 • Digital input/output 3 (24 VDC)
• Event counter 3
• AB counter 2, signal line A
• Up/down counter 2 - frequency
• PWM output 1
4 • Digital input/output 4 (24 VDC)
• Event counter 4
• AB counter 2, signal line B
• Up/down counter 2 - direction
5 • Digital input/output 5 (24 VDC)
• Event counter 5
• AB counter 3, signal line A
• Up/down counter 3 - frequency
6 • Digital input/output 6 (24 VDC)
• Event counter 6
• AB counter 3, signal line B
• Up/down counter 3 - direction
7 • Digital input/output 7 (24 VDC)
• Event counter 7
• AB counter 4, signal line A
• Up/down counter 4 - frequency
• PWM output 2
8 • Digital input/output 8 (24 VDC)
• Event counter 8
• AB counter 4 - signal line B
• Up/down counter 4 - direction
9 • Digital input/output 9 (5 VDC)
• Event counter 9
• ABR counter 1, signal line A
• SSI encoder 1 - data line
10 • Digital input/output 10 (5 VDC)
• Event counter 10
• ABR encoder 1 - signal line B
11 • Digital input/output 11 (5 VDC)
• Event counter 11
• ABR encoder 1 - signal line R
• SSI encoder 1 - clock line
12 Not used
13 • Digital input/output 13 (5 VDC)
• Event counter 13
• ABR encoder 2 - signal line A
• SSI encoder 2 - data line
14 • Digital input/output 14 (5 VDC)
• Event counter 14
• ABR encoder 2 - signal line B
15 • Digital input/output 15 (5 VDC)
• Event counter 15
• ABR encoder 2 - signal line R
• SSI encoder 2 - clock line
Options available in addition to these basic functions, such as comparator outputs or latch inputs, can be configured
freely to unused input/output channels.
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
8.5.2.14.2 Function model 0 "16-bit counter" and function model 1 "32-bit counter"
Unlike the function models 0 and 1, this model only offers a selection of functions with a limited scope of config-
uration on the module.
The following functions are provided and can be run at the same time:
• 1 SSI encoder
• 1 ABR encoder with configurable reference pulse edge and reference position
• 1 event counter with configurable counting direction
• 3 AB counters
• 1 PWM output
Register Offset1) Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Configuration - Event counter
2816 - CfO_Counter4config USINT ●
2824 - CfO_Counter4configReg0 USINT ●
2826 - CfO_Counter4configReg1 USINT ●
Configuration - ABR encoder
3088 - CfO_Counter5PresetValue1 UINT ●
3092 - CfO_Counter5PresetValue2 UINT ●
3072 - CfO_Counter5config USINT ●
3080 - CfO_CounterNconfigReg0 USINT ●
3082 - CfO_CounterNconfigReg1 USINT ●
3136 - CfO_Counter5event0IDwr UINT ●
3144 - CfO_Counter5event0config UINT ●
512 - CfO_DIREKTIOevent0IDwr UINT ●
516 - CfO_DIREKTIOevent0mode USINT ●
Configuration - AB counter
2048 + (N-1) * 256 - CfO_CounterNconfig (index N = 1 to 3) USINT ●
2056 + (N-1) * 256 - CfO_CounterNconfigReg0 (index N = 1 to 3) USINT ●
2058 + (N-1) * 256 - CfO_CounterNconfigReg1 (index N = 1 to 3) USINT ●
Configuration - Inputs for SSI encoders
7424 - CfO_SSI2eventIDwr UINT ●
7428 - ConfigAdvanced02 UDINT ●
Configuration - Outputs for PWM (pulse width modulation)
6160 - CfO_PWM1prescaler UINT ●
Module communication - General
40 3 Status of encoder supplies USINT ●
PowerSupply01 Bit 0
PowerSupply02 Bit 1
Communication - Event counters
2852 14 EventCounter08 UINT ●
Communication - Input for ABR encoders
3104 0 ABRConnector01 INT ●
3140 0 ReferenceModeABRConnector01 USINT ●
3142 2 StatusABRConnector01 USINT ●
Communication - Input for AB counters
2080 8 ABConnector01 INT ●
2336 10 ABConnector02 INT ●
2592 12 ABConnector02 INT ●
Communication - Input for SSI encoders
7440 4 SSIConnector03 UDINT ●
Communication - Outputs for PWM (pulse width modulation)
6162 2 PWMOutput07 UINT ●
1) The offset specifies the position of the register within the CAN object.
Name:
CfO_LED0source to CfO_LED7source
These registers can be used to define how the module's LED status indicators are used. Blinking patterns can be
generated from the application, and the status of the physical inputs and outputs can be indicated.
The following applies:
Connection LED
CfO_LED0source 1 Green
CfO_LED1source 1 Orange
... ... ...
CfO_LED6source 4 Green
CfO_LED7source 4 Orange
Bit structure:
Bit Description Value Information
0-3 MODE = 0 0 LED off
1 Blinking quickly
2 Blinking
3 Blinking slowly
4 Single flash
5 Double flash
6 to 15 Reserved
MODE = 1 (inverted) 0 LED on
1 Blinking quickly
2 Blinking
3 Blinking slowly
4 Single flash
5 Double flash
6 to 15 Reserved
MODE = 2 0 to 15 Number of the physical input channel
MODE = 3 0 to 15 Number of the physical output channel
4-7 Selection of the mode for the LED status indicator 0 LED blinking pattern
1 Inverted LED blinking pattern
2 Displays a channel's physical input status
3 Displays a channel's physical output status
4 to 15 Reserved
Name:
PowerSupply01 to PowerSupply02
This register shows the status of the integrated encoder supplies. A faulty encoder power supply is displayed as
a warning.
Data type Value
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 PowerSupply01 0 24 VDC encoder power supply OK
1 24 VDC encoder power supply faulty
1 PowerSupply02 0 5 VDC encoder power supply OK
1 5 VDC encoder power supply faulty
2-7 Reserved -
Name:
CfO_CFGchannel01 to CfO_CFGchannel15
This register can be used to configure physical I/O channels 1 to 15.
Information:
CfO_CFGchannel12 is not connected to a physical I/O channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Pull1) 0 Disabled
1 Enabled
1 Push1) 0 Disabled
1 Enabled
2 Inverted input 0 Disabled
1 Enabled
3 Inverted output 0 Disabled
1 Enabled
4-7 Output type 0 Direct I/O
1 to 5 Reserved
6 PWM (channel-specific)
7 Reserved
Name:
CfO_OutClearMask
The settings in this register only affect the values written to register "DigitalOutput xx" on page 466.
• 0 allows manual reset of digital outputs using registers DigitalOutput01 to 15.
• 1 prevents manual reset of digital outputs using registers DigitalOutput01 to 15.
When "1" is used, the output event function can be used to reset the outputs.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 DigitalOutput01 0 Writing 0 to register DigitalOutput01 resets the output.
1 Writing 0 to register DigitalOutput01 does not reset the output.
... ... ...
10 DigitalOutput11 0 Writing 0 to register DigitalOutput11 resets the output.
1 Writing 0 to register DigitalOutput11 does not reset the output.
11 Reserved (output 12 does not exist) -
12 DigitalOutput13 0 Writing 0 to register DigitalOutput13 resets the output.
1 Writing 0 to register DigitalOutput13 does not reset the output.
... ... ...
14 DigitalOutput15 0 Writing 0 to register DigitalOutput15 resets the output.
1 Writing 0 to register DigitalOutput15 does not reset the output.
15 Reserved -
Name:
CfO_OutSetMask
The settings in this register only affect the values written to register "DigitalOutput xx" on page 466.
• 0 allows manual setting of digital outputs using registers DigitalOutput01 to 15.
• 1 prevents manual setting of digital outputs using registers DigitalOutput01 to 15.
When "1" is used, the output event function can be used to reset the outputs.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 DigitalOutput01 0 Writing 1 to register DigitalOutput01 sets the output.
1 Writing 1 to register DigitalOutput01 does not set the output.
... ... ...
10 DigitalOutput11 0 Writing 1 to register DigitalOutput11 sets the output.
1 Writing 1 to register DigitalOutput11 does not set the output.
11 Reserved (output 12 does not exist) -
12 DigitalOutput13 0 Writing 1 to register DigitalOutput13 sets the output.
1 Writing 1 to register DigitalOutput13 does not set the output.
... ... ...
14 DigitalOutput15 0 Writing 1 to register DigitalOutput15 sets the output.
1 Writing 1 to register DigitalOutput15 does not set the output.
15 Reserved -
Name:
DigitalInput1_16
DigitalInput01 to DigitalInput11
DigitalInput13 to DigitalInput15
This register reads the input status of a physical channel. The polarity settings are accounted for in the value (bit
2 in "CfO_CFGchannel[x]" on page 464 register).
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state of the physical channel
.. ... ...
10 DigitalInput11 0 or 1 Input state of the physical channel
11 Reserved (input 12 does not exist) -
12 DigitalInput13 0 or 1 Input state of the physical channel
... ... ...
14 DigitalInput15 0 or 1 Input state of the physical channel
Name:
DigitalOutput1_16
DigitalOutput01 to DigitalOutput11
DigitalOutput13 to DigitalOutput15
The output status of a physical channel can be written using this register. In order to configure a channel as an
output:
1 Bit 0 "Push" and/or bit 1 "Pull" must be enabled in the "CfO_CFGchannel[x]" on page 464 register.
2 Bits 4 to 7 in the "CfO_CFGchannel[x]" on page 464 register must be set to Direct I/O.
3 0 must be set for the respective channel in the "CfO_OutClearMask" on page 464 and "CfO_OutSetMask"
on page 465 registers.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 or 1 Output state of the physical channel
.. ... ...
10 DigitalOutput11 0 or 1 Output state of the physical channel
11 Reserved (output 12 does not exist) -
12 DigitalOutput13 0 or 1 Output state of the physical channel
... ... ...
14 DigitalOutput15 0 or 1 Output state of the physical channel
Name:
StatusDigitalOutput01 to StatusDigitalOutput11
StatusDigitalOutput13 to StatusDigitalOutput15
The state of the output channel passed to the hardware is indicated in this register.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 or 1 State of the hardware output channel
.. ... ...
10 StatusDigitalOutput11 0 or 1 State of the hardware output channel
11 Reserved (output 12 does not exist) -
12 StatusDigitalOutput13 0 or 1 State of the hardware output channel
... ... ...
14 StatusDigitalOutput15 0 or 1 State of the hardware output channel
Name:
ComparatorActualValueABConnector01 to ComparatorActualValueABConnector04
ComparatorActualValueCounterConnector01 to ComparatorActualValueCounterConnector04
ComparatorActualValueABRConnector01 and ComparatorActualValueABRConnector03
ReferenceEnableSwitchABRConnector01 and ReferenceEnableSwitchABRConnector03
ComparatorActualValueSSIConnector01 and ComparatorActualValueSSIConnector03
This register reads out the input state of a physical channel. The polarity settings are accounted for in the value
(bit 2 in "CfO_CFGchannel[x]" on page 464 register).
To improve readability, the bits in this register are shown in the Automation Studio I/O mapping table under different
names based on the function being used.
Information:
In Automation Studio, only the BOOL value of the channel configured in Automation Studio is returned
for each function instead of the entire UINT value.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 Channel 1 0 or 1 Input state of the physical channel
..
14 Channel 15 0 or 1 Input state of the physical channel
The following table shows which input channels can be assigned to the individual names/functions.
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 12 14
Channel XX 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15
ComparatorActualValueABConnector01 ● ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueABConnector02 ● ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueABConnector03 ● ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueABConnector04 ● ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueABRConnector01 ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueABRConnector03 ● ● ● ● ● ● ● ● ● ● ●
ReferenceEnableSwitchABRConnector01 ● ● ● ● ● ● ● ● ● ● ●
ReferenceEnableSwitchABRConnector03 ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueCounterConnector01 ● ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueCounterConnector02 ● ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueCounterConnector03 ● ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueCounterConnector04 ● ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueSSIConnector01 ● ● ● ● ● ● ● ● ● ● ● ●
ComparatorActualValueSSIConnector03 ● ● ● ● ● ● ● ● ● ● ● ●
The module provides configurable event functions. An event function can be connected to physical I/O and the
values derived from them (e.g. counters) or be purely used for internal processing.
Every event function has event inputs and outputs. Event functions can also have only inputs or only outputs. Each
event output has a unique event ID. It is possible to configure when an event is generated on an event output. The
effect of an event is determined by the respective event function.
Event functions can also be linked to one another. The link takes place using the event input. Every event input
has a 16-bit register to which the event number of the linked event output is written.
Information:
The module functions that can be configured in the Automation Studio I/O configuration are primarily
based on these event functions and their links. Changes in the Automation Studio I/O configuration
have multiple effects on event functions and their links.
Various hardware and software functions send event IDs or require event IDs in order to start. The following table
shows all of the IDs available to configure the module.
Event ID Description
Direct event inputs
512 Comparator condition 1 FALSE
513 TRUE
544 Comparator condition 2 FALSE
545 TRUE
576 Comparator condition 3 FALSE
577 TRUE
608 Comparator condition 4 FALSE
609 TRUE
Counter comparator functions
2112 Counter function 1 Event function 1; FALSE
2113 Event function 1; TRUE
2144 Event function 2; FALSE
2145 Event function 2; TRUE
2368 Counter function 2 Event function 1; FALSE
2369 Event function 1; TRUE
2400 Event function 2; FALSE
2401 Event function 2; TRUE
2624 Counter function 3 Event function 1; FALSE
2625 Event function 1; TRUE
2656 Event function 2; FALSE
2657 Event function 2; TRUE
2880 Counter function 4 Event function 1; FALSE
2881 Event function 1; TRUE
2912 Event function 2; FALSE
2913 Event function 2; TRUE
Edge events
4096 Falling edge on I/O channel Channel 1
... ...
4111 Channel 16
4112 Rising edge on I/O channel Channel 1
... ...
4127 Channel 16
4128 Rising or falling edge on I/O channel Channel 1
... ...
4143 Channel 16
SSI counter events
7168 SSI 1 SSI valid
7169 SSI ready
7424 SSI 2 SSI valid
7425 SSI ready
SSI comparator events
7232 SSI 1 comparator condition FALSE
7233 TRUE
7488 SSI 2 comparator condition FALSE
7489 TRUE
Timer events
208 Timer1 50 μs
209 Timer2 100 μs
210 Timer3 200 μs
211 Timer4 400 μs
212 Timer5 800 μs
213 Timer6 1600 μs
214 Timer7 3200 μs
215 Timer8 3200 μs (time offset to timer 7)
Network functions
224 SOAISOP (synchronous out asynchronous in start of protocol)
225 AOSISOP (asynchronous out synchronous in start of protocol)
226 SOAIEOP (synchronous out asynchronous in end of protocol)
227 AOSIEOP (asynchronous out synchronous in end of protocol)
Idle event
192 No-load operation
Timer
There are 8 timer events that the module can generate.
Information:
The timers have the highest event priority. All other system functions are interrupted when a timer
event occurs, and jitter for the amount of time it takes to process the event.
Idle event
Idle time is the time that remains after the system has processed all higher priority events and operations. The
module performs the following functions during idle time:
• Handling of the asynchronous protocol
• Mechanism for (re-)linking events
• Operation of LEDs
• Execution of event event functions linked to the idle function
Information:
Edge detection can also be used for channels that are configured as outputs.
To stabilize the system, there is a mechanism that limits the number of events created through edge recognition.
At least one idle event must occur between two edge events for the same edge.
The "CfO_FallingDisProtection" on page 471 and "CfO_RisingDisProtection" on page 471 registers can be
used to disable this limitation for each edge, and then an event will be generated for every edge. However, this can
cause a system overload, i.e. I/O operation can fail for up to 100 ms before the module changes to the reset state.
Name:
CfO_EdgeDetectFalling
This register defines whether an event is generated on a falling edge.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 0 No event generated on falling edge.
1 Events 4096 and 4128 are generated on falling edge.
... ...
15 Channel 16 0 No event generated on falling edge.
1 Events 4111 and 4143 are generated on falling edge.
Name:
CfO_EdgeDetectRising
This register defines whether an event is generated on a rising edge.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 0 No event generated on rising edge.
1 Events 4112 and 4128 are generated on rising edge.
... ...
15 Channel 16 0 No event generated on rising edge.
1 Events 4127 and 4143 are generated on rising edge.
Name:
CfO_FallingDisProtection
This register can be used to enable/disable the event frequency limit for falling edges on the respective channel.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 0 Event frequency limit enabled.
1 Event frequency limit disabled.
... ...
15 Channel 16 0 Event frequency limit enabled.
1 Event frequency limit disabled.
Name:
CfO_RisingDisProtection
This register can be used to enable/disable the event frequency limit for rising edges on the respective channel.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 0 Event frequency limit enabled.
1 Event frequency limit disabled.
... ...
15 Channel 16 0 Event frequency limit enabled.
1 Event frequency limit disabled.
Name:
CfO_DIREKTIOevent0IDwr to CfO_DIREKTIOevent1IDwr
This register holds the event ID generated by the direct input function. For a list of all possible event IDs, see "List
of event IDs" on page 469
Data type Value Information
UINT 192 to 7489 ID of event function
Name:
CfO_DIREKTIOevent0mode to CfO_DIREKTIOevent1mode
The mode in which the direct input function operates can be set in this register.
Comparator functions can be operated in 4 different modes. For a description, see "Comparator modes" on page
481.
Data typ Value Information
USINT See bit structure. Default value in the bus controller function model: CfO_DIREKTIOevent1mode= 0x03
Bit structure:
Bit Description Value Information
0-1 Comparator mode 0 Off
1 Individual
2 State change
3 Continuous
2-7 Reserved -
Name:
CfO_DIREKTIOevent0compState to CfO_DIREKTIOevent1compState
This register contains the status bits that are compared with the bits specified in the "CfO_Ev0CompMask" on page
472 register, which contain the I/O input status, when an event is received.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Comparator status of channel 1 0 or 1
... ...
14 Comparator status of channel 15 0 or 1
Name:
CfO_Ev0CompMask to CfO_Ev1CompMask
If a bit is set, then the input status of the respective channel is compared with that bit in the "CfO_DIREKTIOevent-
compState" on page 472 register.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 0 Do not compare bit
1 Compare bit in register
... ...
14 Channel 15 0 Do not compare bit
1 Compare bit in register
Name:
CfO_DIREKTIOoutevent0IDwr to CfO_DIREKTIOoutevent3IDwr
These registers hold the event IDs that trigger the direct output function. For a list of all possible event IDs, see
"List of event IDs" on page 469
Data type Value Information
INT 192 to 7489 ID of event function
Name:
CfO_DIREKTIOoutclearmask0 to CfO_DIREKTIOoutclearmask3
Writing "1" to the bit position that corresponds to a channel resets the output if the output event function is being
executed. This corresponds to writing "0" in register "DigitalOutput" on page 466.
The bit that corresponds to channels that should be reset should be set to "1" in the "CfO_OutClearMask" on page
464 register.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 0 Reset channel 1
1 Do not reset channel 1
... ...
14 Channel 15 0 Reset channel 15
1 Do not reset channel 15
15 Reserved -
Name:
CfO_DIREKTIOoutsetmask0 to CfO_DIREKTIOoutsetmask3
Writing "1" to the bit position that corresponds to a channel sets the output if the output event function is being
executed. This corresponds to writing "1" in register "DigitalOutput" on page 466.
The bit that corresponds to channels that should be reset should be set to "1" in the "CfO_OutSetMask" on page
465 register.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 0 Set channel 1
1 Do not set channel 1
... ...
14 Channel 15 0 Set channel 15
1 Do not set channel 15
15 Reserved -
The module has 8 internal counter functions, each with 2 event counter registers. Each of these 8 counters is
permanently assigned to 2 physical inputs. This assignment cannot be changed.
The counter registers perform different functions based on how the event functions are connected. The counter
registers can be configured in the following ways:
• AB counters
• Up/down counters
• Event counter
Different names are used for them in Automation Studio and in the register description to improve clarity.
Channel Counter function Counter register Name in Automation Studio
1 1 1 ABConnector01
CounterConnector01
EventCounter01
2 2 EventCounter02
3 2 1 ABConnector02
CounterConnector02
EventCounter03
4 2 EventCounter04
5 3 1 ABConnector03
CounterConnector03
EventCounter05
6 2 EventCounter06
7 4 1 ABConnector04
CounterConnector04
EventCounter07
8 2 EventCounter08
9 5 1 EventCounter09
10 2 EventCounter10
11 6 1 EventCounter11
12 2 Not used
13 7 1 EventCounter13
14 2 EventCounter14
15 8 1 EventCounter15
16 2 Not used
There are 3 steps for calculating the state of any counter function
1. The counter value is based on the 2 absolute value counters "abs1" and "abs2". These are only used internally in
the module and cannot be read. Depending on the mode, these registers show the respective physical input signals.
Mode
Edge counters AB counters Up/Down counters
abs1 Edges of counter channel 1 Increments in positive direction Counter channel 2 = 0:
Edges of counter channel 1
in up direction
abs2 Edges of counter channel 2 Increments in negative direction Counter channel 2 = 1
Edges of counter channel 1
in down direction
2. 2 more counters are formed from absolute value registers "abs1" and "abs2": "counter1" and "counter2". They
are only used internally in the module and cannot be read. The following values are used for the calculation:
• Absolute value registers "abs1" and "abs2"
• SW_reference_counter 1 and 2: This reference value can be predefined by register "CfO_CounterPreset-
Value" on page 478 to allow referencing <> 0.
• HW_reference_counter 1 and 2: In register "CfO_CounterEventMode" on page 482, you can configure
whether latched values should be copied to these registers when counter events occur.
counter1 = abs1 + SW_reference_counter1 - HW_reference_counter1
counter2 = abs2 + SW_reference_counter2 - HW_reference_counter2
3. The counter registers contain the sum of the two internal counters "counter 1" and "counter 2". The "CfO_Coun-
terConfigReg" on page 478 register allows you to define a sign for each "counter" register and define whether
or not it should be used.
Counter register = counter1 + counter2
All of the settings available in Automation Studio for ABR encoders, AB counters, up/down counters and event
counters are based on the 2 counter functions.
The following configuration examples show the values with which Automation Studio initializes the module registers
in order to implement these functions.
The following table shows how the module's various event functions can be linked in order to configure an ABR
encoder.
Register Value Comment
For the function
CfO_Counter5PresetValue1 (any) Desired offset value for referencing
CfO_Counter7PresetValue1
CfO_Counter5event0IDwr 0x0201 Link between the first counter event and the "direct input" comparator condition
CfO_Counter7event0IDwr TRUE
CfO_Counter5config 0x01 Mode = AB counter
CfO_Counter7config
CfO_Counter5configReg0 0x0D Configures the calculation of the internal registers "counter1" and
CfO_Counter7configReg0 "counter2" (see "Counter value calculation" on page 474 and "Examples of
calculation configurations" on page 478)
CfO_DIREKTIOevent0IDwr 0x1002 or 0x1012 Selection of the desired input edge as trigger for the ABR encoder function
CfO_DIREKTIOevent1IDwr
CfO_Counter5event0config 0x0000 Configuration of the first counter event (for referencing)
CfO_Counter7event0config
CfO_DIREKTIOevent0mode 0x03 Mode of the "direct input function" - Continuous
CfO_DIREKTIOevent1mode
CfO_DIREKTIOevent0compState 0x00 or 0x08 Comparator status for the "direct input function"
CfO_DIREKTIOevent1compState
CfO_Ev0CompMask 0x08 Comparator mask for the "direct input function"
CfO_Ev1CompMask
For the latch
CfO_Counter5event0config 0x000D Configuration of the calculation of the value used for the latch
CfO_Counter7event1config
CfO_Counter5event0mode 0x03 Mode of the first counter event function - Continuous
CfO_Counter7event1mode
CfO_Counter5event0IDwr (any) Number of the event that should trigger the latch
CfO_Counter7event1IDwr
For the comparator
CfO_Counter5event1IDwr 0x00D0 Event number of Timers1 (50 µs)
CfO_Counter7event1IDwr
Information:
The latch and comparator must not have the same event number!
CfO_Counter5event1config 0x900D or 0xA00D Configuration of the comparator for the second counter event
CfO_Counter7event1config
CfO_DIREKTIOoutevent0IDwr 0x0861 TRUE event output of the second counter to trigger the direct output function
CfO_DIREKTIOoutevent2IDwr 0x0A61 (set outputs).
CfO_DIREKTIOoutsetmask0 0x08, 0x20, 0x80 Outputs that should be set when comparator condition = TRUE
CfO_DIREKTIOoutsetmask2 0x02, 0x08, 0x80
CfO_DIREKTIOoutevent1IDwr 0x0860 FALSE event output of the second counter to trigger the direct output function
CfO_DIREKTIOoutevent3IDwr 0x0A60 (reset outputs).
CfO_DIREKTIOoutclearmask1 0x08, 0x20, 0x80 Outputs that should be reset when comparator condition = FALSE
CfO_DIREKTIOoutclearmask3 0x02, 0x08, 0x80
The following table shows how the module's various event functions can be linked in order to configure an AB
counter.
[x] stands for the respective counter function, from 1 to 4
Register Value Comment
For the function
CfO_Counter[x]config 0x01 Mode = Up/down counter
CfO_Counter[x]configReg0 0x0D Configures the calculation of the internal registers "counter1" and
"counter2" (see "Counter value calculation" on page 474 and "Examples of
calculation configurations" on page 478)
For the latch
CfO_Counter[x]event0config 0x000D Configuration of the calculation of the first value used for the latch
CfO_Counter[x]event0mode 0x03 Mode of the first counter event function - Continuous
CfO_Counter[x]event0IDwr (any) Number of the event that should trigger latch 1 ("Latch 01 - Channel" in the Au-
tomation Studio I/O configuration).
CfO_Counter[x]event1config 0x0D Configuration of the calculation of the second value used for the latch
CfO_Counter[x]event1mode 0x03 Mode of the second counter event function - Continuous
CfO_Counter[x]event1IDwr (any) Number of the event that should trigger latch 2
For the comparator
CfO_Counter1event1IDwr 0x00D0 Event number of Timer 1 (50 μs)
CfO_Counter3event1IDwr
Information:
The latch and comparator must not have the same event number!
CfO_Counter1event1config 0x900D or 0xA00D Configuration of the comparator for the second counter event
CfO_Counter3event1config
CfO_Counter1event1mode 0x03 Mode of the second counter event function - Continuous
CfO_Counter3event1mode
CfO_DIREKTIOoutevent0IDwr 0x0861 TRUE event output of the second counter to trigger the direct output function
CfO_DIREKTIOoutevent2IDwr 0x0A61 (set outputs).
CfO_DIREKTIOoutsetmask0 0x08, 0x20, 0x80 Outputs that should be set when comparator condition = TRUE
CfO_DIREKTIOoutsetmask2 0x02, 0x08, 0x80
CfO_DIREKTIOoutevent1IDwr 0x0860 FALSE event output of the second counter to trigger the direct output function
CfO_DIREKTIOoutevent3IDwr 0x0A60 (reset outputs).
CfO_DIREKTIOoutclearmask1 0x08, 0x20, 0x80 Outputs that should be reset when comparator condition = FALSE
CfO_DIREKTIOoutclearmask3 0x02, 0x08, 0x80
The following table shows how the module's various event functions can be linked in order to configure an up/
down counter.
[x] stands for the respective counter function, from 1 to 4
Register Value Comment
For the function
CfO_Counter[x]config 0x03 Counter mode = Up/down counter
CfO_Counter[x]configReg0 0x0D, 0x07 Configures the calculation of the internal registers "counter1" and
"counter2" (see "Counter value calculation" on page 474 and "Examples of
calculation configurations" on page 478)
For the latch
CfO_Counter[x]event0config 0x0D, 0x07 Configuration of the calculation of the first value used for the latch
CfO_Counter[x]event0mode 0x03 Mode of the first counter function - Continuous
CfO_Counter[x]event0IDwr (any) Number of the event that should trigger Latch 1
CfO_Counter[x]event1config 0x0D, 0x07 Configuration of the calculation of the second value used for the latch
CfO_Counter[x]event1mode 0x03 Mode of the second counter function - Continuous
CfO_Counter[x]event1IDwr (any) Number of the event that should trigger Latch 2
For the comparator
CfO_Counter1event1IDwr 0x00D0 Event number of Timer 1 (50 μs)
CfO_Counter3event1lDwr
Information:
The latch and comparator must not have the same event number!
CfO_Counter1event1config 0x900D, 0xA00d or 0x9007, 0xA007 Configuration of the comparator for the second counter event
CfO_Counter3event1config
CfO_Counter1event1mode 0x03 Mode of the second counter event function - Continuous
CfO_Counter3event1lmode
CfO_DIREKTIOoutevent0IDwr 0x0861 TRUE event output of the second counter to trigger the direct output function
CfO_DIREKTIOoutevent2lDwr (set outputs).
CfO_DIREKTIOoutsetmask0 0x08, 0x20, 0x80 Outputs that should be set when comparator condition = TRUE
CfO_DIREKTIOoutsetmask2 0x02, 0x08, 0x80
CfO_DIREKTIOoutevent1IDwr 0x0860 FALSE event output of the second counter to trigger the direct output function
CfO_DIREKTIOoutevent3lDwr 0x0A60 (reset outputs).
CfO_DIREKTIOoutclearmask1 0x08, 0x20, 0x80 Outputs that should be reset when comparator condition = FALSE
CfO_DIREKTIOoutclearmask3 0x02, 0x08, 0x80
The following table shows how the module's various event functions can be linked in order to configure an event
counter.
[x] stands for the respective counter function, from 1 to 8
Register Value Comment
For event counters on uneven channel numbers (counter register 1)
CfO_Counter[x]configReg0 0x01 or 0x03 Configures the calculation of the internal registers "counter1" and
"counter2" (see "Counter value calculation" on page 474 and "Examples of
calculation configurations" on page 478)
CfO_Counter[x]event0mode 0x43 Mode of the first counter event function and referencing configuration
CfO_Counter[x]event0IDwr (any) Number of the event that should trigger referencing
For event counters on even channels (counter register 2)
CfO_Counter[x]configReg1 0x04 or 0x08 Configures the calculation of the internal registers "counter1" and
"counter2" (see "Counter value calculation" on page 474 and "Examples of
calculation configurations" on page 478)
CfO_Counter[x]event1mode 0x83 Mode of the second counter event function and referencing configuration
CfO_Counter[x]event1IDwr (any) Number of the event that should trigger referencing
Each of the 8 counter functions has 2 counter event functions. These consist of:
• Event ID that triggers the counter event function
• A window comparator
• Latch register for saving the counter value
When the counter event function is complete, a combined event ID in the range 2112 to 2913 (see "List of event
IDs" on page 469) is sent.
Each counter event function also has the option to copy the current counter value to the "reference counter" when
an event occurs (see "Counter value calculation" on page 474).
Event input
E
Latch true
True True
Hardware reference Hardware reference
Counter 1 = abs 1 Counter 1 = abs 1
True True
Hardware reference Hardware reference
Counter 2 = abs 2 Counter 2 = abs 2
E E
Event output Event output
True False
Name:
CfO_Counter1config to CfO_Counter8config
These registers are used to configure the mode of the counter function. Each counter function can be operated
in 3 different modes.
Counter function mode
Edge counters AB counters Up/down counter
Counter channel 11) Counting pulses, edge counter 1 A Metering pulses
Counter channel 21) Counting pulses, edge counter 2 B Counting direction (0 =
positive, 1 = negative)
Counter register 1 Counter value 1 Position Counter value
Counter register 2 Counter value 2
1) Corresponds to the physical channels of the counter functions. See "Description of channel assignments" on page 458
Bit structure:
Bit Description Value Information
0-1 Counter mode 00 Edge counters
01 AB counters
11 Up/Down counters
2-7 Reserved -
Name:
CfO_Counter1configReg0 to CfO_Counter8configReg0 ("counter1")
CfO_Counter1configReg1 to CfO_Counter8configReg1 ("counter2")
The calculation of the internal "counter1" and "counter2" registers can be configured in these registers. For infor-
mation on using these internal registers, see "Counter value calculation" on page 474.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 counter 1 - use 0 0 is added instead of "counter 1"
1 "counter 1" is used for addition
1 counter 1 - sign 0 The sign of the "counter 1" register is not changed for addition
1 The sign of the "counter 1" register is reversed for addition
2 counter 2 - use 0 0 is added instead of "counter 2"
1 "counter 2" is used for addition
3 counter 2 - sign 0 The sign of the "counter 2" register is not changed for addition
1 The sign of the "counter 2" register is reversed for addition
4-7 Reserved -
Name:
CfO_Counter1PresetValue1 to CfO_Counter8PresetValue1
CfO_Counter1PresetValue1_32Bit to CfO_Counter8PresetValue1_32Bit (SW_reference_counter1)
CfO_Counter1PresetValue2 to CfO_Counter8PresetValue2
CfO_Counter1PresetValue2_32Bit to CfO_Counter8PresetValue2_32Bit (SW_reference_counter2)
These registers can be used to define an offset value for referencing. This value is copied to internal register
SW_reference_counter of the respective counter register.
Data type Value
INT -32768 to 32767
DINT -2,147,483,648 to 2,147,483,647
Counter registers
Name:
Different names are used for these 16 registers in Automation Studio and in the register description depending
on the function.
ABConnector01 to ABConnector04
CounterConnector01 to CounterConnector04
EventCounter01 to EventCounter15
ABRConnector01 and ABRConnector03
These 16 registers show the results of the counter value calculation for the respective register. Depending on the
function, this corresponds to either the encoder position or the counter value.
For information on the relationship between physical channels and counter registers, see "Counters and encoders"
on page 474 and "Description of channel assignments" on page 458
Data type Value Information
INT -32,768 to 32,767 Encoder position or counter value
DINT1) -2,147,483,648 Encoder position or counter value
to 2,147,483,647
Name:
StatusABRConnector01 to StatusABRConnector02
The referencing status of the ABR encoder is indicated in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Reserved 0
2 Bit is always 1 after the first reference pulse. 0 No reference pulses have occurred since the start of referenc-
ing.
1 The first reference pulse has occurred.
3 State change when referencing is complete 0 or 1 State change when referencing is complete
4 Bit is always 1 after the first reference pulse. 0 No reference pulses have occurred since the start of referenc-
ing.
1 The first reference pulse has occurred.
5-7 Continuous counter xxx Increased with each reference pulse
Name:
ReferenceModeABRConnector01 and ReferenceModeABRConnector03
The bits in this register are used to configure the reaction to the configured reference pulse.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Sets the referencing mode 00 Referencing OFF
01 Single-shot referencing
10 Reserved
11 Continuous referencing
2-5 Reserved -
6-7 Reserved 11 Must always be 11!
The ABR and AB counters and the up/down counter have a comparator function. It always works the same and
is described here globally for all three.
The comparators are implemented in software form. They do not work actively but rather passively, i.e. the com-
parison is only carried out when an event is received. The event received is forwarded along the TRUE or FALSE
branch depending on the status of the comparator condition. An event function like this generally also offers a latch
for the TRUE and FALSE branch to save the value used for the comparator at the time of the event.
Comparator modes
Name:
CfO_Counter1event0config to CfO_Counter8event0config (event function 1)
CfO_Counter1event1config to CfO_Counter8event1config (event function 2)
These registers are used to configure the counter event function for the respective counter function.
Bits 0 to 3 configure the calculation of the comparison or to latch the value. This calculation is similar to the calcu-
lation of the counter register (see "Counter value calculation" on page 474)
Bits 8 to 13 can be used to limit the number of bits used for the comparison. A mask is calculated as 2n - 1 and
linked with an "AND" operation. This makes it possible to generate a comparator pulse every 2n increments.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 counter 1 - use 0 0 is added instead of "counter 1"
1 "counter 1" is used for addition
1 counter 1 - sign 0 The sign of the "counter 1" register is not changed for addition
1 The sign of the "counter 1" register is reversed for addition
2 counter 2 - use 0 0 is added instead of "counter 2"
1 "counter 2" is used for addition
3 counter 1 - sign 0 The sign of the "counter 2" register is not changed for addition
1 The sign of the "counter 2" register is reversed for addition
4-7 Reserved -
8 - 13 Number of bits for comparator mask x The mask value is calculated as 2n-1, where n is value set in
these bits. Default: 0
14 Reserved -
15 Margin comparator mode 0 MarginComparator >= (Current position - OriginComparator)
1 MarginComparator > (Current position - OriginComparator)
Name:
CfO_Counter1event0mode to CfO_Counter8event0mode (event function 1)
CfO_Counter1event1mode to CfO_Counter8event1mode (event function 2)
In these registers you can set the mode for the comparator function and optional copying of the latched registers.
Comparator functions can be operated in 4 different modes. For a description, see "Comparator modes" on page
481.
Bits 4 to 7 can be used to define hardware referencing actions.
Based on these bits, the values of the internal absolute value counters "abs1" and "abs2" can be copied to the
respective "HW_reference_counter" register at every counter event (see "Counter value calculation" on page 474).
This function can be used to reference the counter values directly in the hardware.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Comparator mode 0 Off
1 Individual
2 State change
3 Continuous
2-3 Reserved -
4 Copy abs1 counter value 0 No action
1 When event is FALSE → hardware reference counter 1 = abs1
5 Copy abs2 counter value 0 No action
1 When event is FALSE → hardware reference counter 2 = abs2
6 Copy abs1 counter value 0 No action
1 When event is TRUE → hardware reference counter 1 = abs1
7 Copy abs2 counter value 0 No action
1 When event is TRUE → hardware reference counter 2 = abs2
Name:
MarginComparatorABConnector01 to MarginComparatorABConnector04
MarginComparatorABRConnector01 and MarginComparatorABRConnector03
MarginComparatorCounterConnector01 to MarginComparatorCounterConnector04
This register is available for the comparator function of the ABR encoder, AB counter and up/down counter.
It defines the width of the comparator window in the positive direction.
Data type Value Information
INT -32768 to 32767 Width of comparator window, 16-bit
DINT -2,147,483,648 Width of comparator window, 32-bit
to 2,147,483,647
Comparator origin
Name:
OriginComparatorABConnector01 to OriginComparatorABConnector04
OriginComparatorABRConnector01 and OriginComparatorABRConnector03
OriginComparatorCounterConnector01 to OriginComparatorCounterConnector04
This register is available for the comparator function of the ABR encoder, AB counter and up/down counter.
It defines the position value at which the respective configured comparator output channel is set.
Data type Value Information
INT -32,768 to 32,767 Comparator window origin, 16-bit
DINT -2,147,483,648 Comparator window origin, 32-bit
to 2,147,483,647
Name:
Latch01ABConnector01 to Latch01ABConnector04 (event function 1)
Latch02ABConnector01 to Latch02ABConnector04 (event function 2)
Latch01ABRConnector01 and Latch01ABRConnector03
Latch01CounterConnector01 and Latch01CounterConnector04 (event function 1)
Latch02CounterConnector01 and Latch02CounterConnector04 (event function 2)
These registers are available for the comparator function of the ABR encoder, AB counter and up/down counter.
If the comparator returns "TRUE", then the current counter value is latched and copied to these registers. The
calculation of the comparator value used for the latch can be configured in the "CfO_Counter[x]event[y]config" on
page 482 register.
Data type Value Information
INT -32,768 to 32,767 Latched encoder position or counter value
DINT1) -2,147,483,648 Latched encoder position or counter value
to 2,147,483,647
The module has 2 SSI encoders available, supported directly in the hardware. 2 5 V output channels are set for
each SSI encoder and cannot be changed. (See also "Description of channel assignments" on page 458)
When using the SSI encoder, the corresponding clock channel can be configured in the "CfO_CFGchannel" on
page 464 register as "Channel-specific" and "Push/Pull".
Encoder Data channel Clock channel
SSI1 9 11
SSI2 13 15
Each of the 2 SSI encoders consists of an event function and an event input. The SSI cycle is started when an
event is received on this input.
Information:
The SSI event function is not linked to an event by default, i.e. SSI functions are disabled.
2 events are sent from the SSI encoder interface..
• An "SSI valid" event is triggered immediately after the end of the SSI cycle if a new counter value is available.
• The "SSI ready" event then shows when the monoflop time has expired (tp in SSI encoder timing diagram).
This is the earliest that the next SSI cycle can be started.
SSI encoder - Timing diagram
SSI cycle
Clock 1 2 3 4 5 6 n
Data
SSI valid
SSI start event SSI ready
Name:
CfO_SSI1eventIDwr to CfO_SSI2eventIDwr
This register holds the event ID that should start the SSI cycle. For a list of all possible event IDs, see "List of
event IDs" on page 469
Normally this register is set to network event 225 "AOSISOP"- This ensures that the new encoder position is
available at the next "I/O → Synchronous Frame" transfer. Check the SSI transfer time and the X2X cycle time,
because the SSI cycle must be completed within this time.
Data type Value Information
UINT 192 to 7489 ID of event function
Configure SSI
Name:
CfO_SSI1cfg to CfO_SSI2cfg
This configuration register is used to set the coding, the clock rate and the number of bits. Default = 0.
Data typ Value Information
UINT See bit structure. Default value in the bus controller function model: CfO_SSI1cfg = 0x0000
Bit structure:
Bit Name Value Information
0-5 SSI value valid bits x
6-7 Clock rate 00 1 MHz
01 500 kHz
10 250 kHz
11 125 kHz
8 - 13 SSI number of bits x Number of bits including leading zeros
14 Reserved 0
15 Keying 0 Binary coding
1 Gray coding
Name:
ConfigAdvanced01 to ConfigAdvanced02
This configuration register is used to set the coding, the clock rate, the number of bits and the monostable multi-
vibrator settings. Default = 0.
It only differs from "CfO_SSI1cfg" on page 485 by data length and additional monostable multivibrator testing.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Name Value Information
0-5 SSI value valid bits x
6-7 Clock rate 00 1 MHz
01 500 kHz
10 250 kHz
11 125 kHz
8 - 13 SSI number of bits x Number of bits including leading zeros
14 Reserved 0
15 Keying 0 Binary coding
1 Gray coding
16 - 17 Monostable multivibrator check 00 Check OFF, no additional clock bit
01 Check set to High level
10 Check set to Low level
11 Level is clocked but ignored
18 - 31 Reserved 0
Name:
CfO_SSI1control to CfO_SSI2control
The 2 SSI encoder events can be enabled/disabled using this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Event: "SSI valid" 0 Not sent
1 Sent
1 Event: "SSI ready" 0 Not sent
1 Sent
2-7 Reserved -
Name:
SSIConnector01 and SSIConnector03
The last transferred SSI position can be read out from this register. The SSI encoder value is displayed as a 32-
bit position value. This position value is generated synchronously with the X2X cycle.
Data type Value Information
UDINT 0 to 4,294,967,295 Last SSI position transferred
The module has an assigned comparator function for the SSI function. These consist of:
• Event ID that triggers the comparator function
• The window comparator
• Latch register for saving the SSI position
When the comparator function is complete, event ID 7232 to7489 (see "List of event IDs" on page 469) is sent.
Name:
CfO_SSI1event0IDwr to CfO_SSI2event0IDwr
This register holds the event ID that should start the SSI comparator function. For a list of all possible event IDs,
see "List of event IDs" on page 469
Data type Value Information
INT 192 to 7489 ID of comparator function
Name:
CfO_SSI1event0mode to CfO_SSI2event0mode
This register can be used to configure the mode of the comparator function.
Comparator functions can be operated in 4 different modes. For a description, see "Comparator modes" on page
481.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Comparator mode 0 Off
1 Individual
2 State change
3 Continuous
2-7 Reserved -
Name:
CfO_SSI1event0config and CfO_SSI2event0config
The calculation of the position value used for the comparator can be configured in this register.
The window comparator condition is calculated as follows:
counter_window_value = ssi_counter & (2^ssi_data_bits - 1)
diff = counter_window_value – origin_comparator
if ((diff & (2^(comparator_mask)-1)) <= margin_comparator)
condition = True;
else
condition = False;
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-5 SSI data bits x Number of data bits used for masking
6-7 Reserved -
8 - 13 Comparator mask x The mask value is calculated from 2n-1, where n is the value
configured in SSI data bits. Default: 0
14 Comparator mode 0 MarginComparator >= SSI position - OriginComparator
1 MarginComparator > SSI position - OriginComparator
Name:
OriginComparatorSSIConnector01 and OriginComparatorSSIConnector03
This register contains the origin of the window comparator.
Data type Value Information
UDINT 0 to 4,294,967,295 Origin of the window comparator.
Name:
MarginComparatorSSIConnector01 and MarginComparatorSSIConnector03
This register provides the width of the window comparator.
Data type Value Information
UDINT 0 to 4,294,967,295 Width of the SSI window comparator
Name:
Latch01SSIConnector01 and Latch01SSIConnector03
If the SSI window comparator returns "True", then the current SSI position is latched and saved in this register.
Data type Value Information
UDINT 0 to 4,294,967,295 Latched SSI position
The module has 2 PWM functions available, supported directly by the hardware. A 24 V output channel is set for
each PWM encoder and cannot be changed. (See also "Description of channel assignments" on page 458)
When using the PWM function, the corresponding channel can be configured in the "CfO_CFGchannel" on page
464 register as "Channel-specific".
PWM function Channel
PWM1 3
PWM2 7
Name:
CfO_PWM0prescaler to CfO_PWM1prescaler
The length of the PWM cycle is configured using this register. The base is a 48 MHz clock, which can be changed
(divided) using the setting in this register. One PWM cycle consists of 1000 of the resulting clocks after they have
been divided. The period duration of the PWM cycle is calculated as follows:
prescale
PWM_cycle = 1000 [s]
48000000
Data type Value Information
UINT 2 to 65535 Prescaler for PWM cycle
Information:
The period duration of the PWM function must be greater than 500 µs. Period durations that are too
short cause the outputs to heat up considerably.
Name:
PWMOutput03, PWMOutput07
In this register, a configuration is made for the percentage of the PWM cycle (in 1/10% steps) that the PWM output
is logical 1, i.e. ON.
Data type Value Information
UINT 0 PWM output always off
1 to 999 Turn on time in 1/10% steps
1000 PWM output always on
The module has a time measurement function for each I/O channel. It can be configured separately for rising and
falling edges on each channel.
A starting edge can be configured for each time measurement function. When a configured starting edge occurs,
the value of the internal timer is saved in a FIFO. This FIFO holds up to 16 elements. When the actual trigger edge
occurs, the difference in time between the starting edge and the triggered edge is copied to the respective register.
Bits 8 to 11 "Previous start edge" of the "CfO_EdgeTimeFallingMode" on page 489 and "CfO_EdgeTimeRising-
Mode" on page 490 registers can be used to define which detected starting edge from the FIFO should be used
to calculate the difference. Additionally, when the trigger edge occurs, the counter clocked internally using bits
12 to 15 "Time measurement resolution" are copied to the "TimeStampFallingCH" on page 492 and "TimeStam-
pRisingCH" on page 492 registers.
Information:
The time measurement function is an extension of edge detection, so all of the channels used must
be configured there.
Name:
CfO_EdgeTimeglobalenable
This register enables/disables the time measurement function for the entire module.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Time measurement function 0 Disabled for entire module
1 Enabled for entire module
1-7 Reserved -
Name:
CfO_EdgeTimeFallingMode01 to CfO_EdgeTimeFallingMode15
These registers can be used to configure the time measurement function for the falling edge of the respective
channel.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Selects the channel for the starting edge 0 Channel 1
...
14 Channel 15
4 Selects the edge for the starting edge 0 The falling edge of the channel configured in bits 0 to 3 serves
as the starting edge.
1 The rising edge of the channel configured in bits 0 to 3 serves
as the starting edge.
5-6 Reserved -
7 Trigger 0 Triggered1)
1 Continuous2)
8 - 11 Previous start edge 0 to 15 The value determines which entry in the starting edge FIFO
should be used to calculate the time difference.
12 - 15 Time measurement resolution 0 8 MHz
1 4 MHz
2 2 MHz
3 1 MHz
4 500 kHz
5 250 kHz
6 125 kHz
7 62.5 kHz
1) The time measurement is triggered by the corresponding bit in register "TriggerFallingCH" on page 490.
2) Time measurement runs continuously and is triggered at every edge.
Name:
CfO_EdgeTimeRisingMode01 to CfO_EdgeTimeRisingMode15
These registers can be used to configure the time measurement function for the rising edge of the respective
channel.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Selects the channel for the starting edge 0 Channel 1
...
14 Channel 15
4 Selects the edge for the starting edge 0 The falling edge of the channel configured in bits 0 to 3 serves
as the starting edge.
1 The rising edge of the channel configured in bits 0 to 3 serves
as the starting edge.
5-6 Reserved -
7 Trigger 0 Triggered1)
1 Continuous2)
8 - 11 Previous start edge 0 to 15 The value determines which entry in the starting edge FIFO
should be used to calculate the time difference.
12 - 15 Time measurement resolution 0 8 MHz
1 4 MHz
2 2 MHz
3 1 MHz
4 500 kHz
5 250 kHz
6 125 kHz
7 62.5 kHz
1) The time measurement is triggered by the corresponding bit in the "TriggerRisingCH" on page 491 register.
2) Time measurement runs continuously and is triggered at every edge.
Name:
1: TriggerFallingCH01 to TriggerFallingCH08
2: TriggerFallingCH09 to TriggerFallingCH15
If bit 7 "Trigger" is cleared in the "CfO_EdgeTimeFallingMode" on page 489 register, then detection of a falling
edge on the respective input can be triggered using the respective bit in this register. After a bit has been set, the
next falling edge on the corresponding channel is detected.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 1: TriggerFallingCH01 0 Falling edges on the channel are not detected.
2: TriggerFallingCH09 1 The next falling edge on the channel will be detected.
... ...
6 1: TriggerFallingCH07 0 Falling edges on the channel are not detected.
2: TriggerFallingCH15 1 The next falling edge on the channel will be detected.
7 1: TriggerFallingCH08 0 Falling edges on the channel are not detected.
2: Reserved 1 The next falling edge on the channel will be detected.
Name:
1: TriggerRisingCH01 to TriggerRisingCH08
2: TriggerRisingCH09 to TriggerRisingCH15
If bit "Continued/Triggered" in register "CfO_EdgeTimeRisingMode" on page 490 is cleared, then detection of a
rising edge on the respective input can be triggered using the respective bit in this register. After a bit has been
set, the next rising edge on the corresponding channel is detected.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 1: Trigger rising edge - Channel 01 0 Rising edges on the channel are not detected.
2: Trigger rising edge - Channel 09 1 The next rising edge on the channel will be detected.
... -
6 1: Trigger rising edge - Channel 07 0 Rising edges on the channel are not detected.
2: Trigger rising edge - Channel 15 1 The next rising edge on the channel will be detected.
7 1: Trigger rising edge - Channel 08 0 Rising edges on the channel are not detected.
2: Reserved 1 The next rising edge on the channel will be detected.
Name:
1: BusyTriggerFallingCH01 to BusyTriggerFallingCH08
2: BusyTriggerFallingCH09 to BusyTriggerFallingCH15
If edges are triggered via the bits in the "TriggerFallingCH" on page 490 register, then a set bit in this register
indicates that no falling edges have been detected on the respective channel since the corresponding bit was
set in the "TriggerFallingCH" register. If a falling edge occurs on the respective channel, then the corresponding
BusyTriggerFalling bit is cleared.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 1: BusyTriggerFallingCH01 0 A falling edge was detected on the channel.
2: BusyTriggerFallingCH01 1 The module is waiting for a falling edge on the channel.
... ...
1: BusyTriggerFallingCH07 0 A falling edge was detected on the channel.
2: BusyTriggerFallingCH15 1 The module is waiting for a falling edge on the channel.
7 1: BusyTriggerFallingCH08 0 A falling edge was detected on the channel.
2: Reserved 1 The module is waiting for a falling edge on the channel.
Name:
1: BusyTriggerRisingCH01 to BusyTriggerRisingCH08
2: BusyTriggerRisingCH09 to BusyTriggerRisingCH15
If edges are triggered via the bits in the "TriggerRisingCH" on page 491 register, then a set bit in this register
indicates that no rising edges have been detected on the respective channel since the corresponding bit was
set in the "TriggerRisingCH" register. If a rising edge occurs on the respective channel, then the corresponding
BusyTriggerRising bit is cleared.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 1: BusyTriggerRisingCH01 0 A rising edge was detected on the channel.
2: BusyTriggerRisingCH09 1 The module is waiting for a rising edge on the channel.
... ...
6 1: BusyTriggerRisingCH07 0 A rising edge was detected on the channel.
2: BusyTriggerRisingCH15 1 The module is waiting for a rising edge on the channel.
7 1: BusyTriggerRisingCH08 0 A rising edge was detected on the channel.
2: Reserved 1 The module is waiting for a rising edge on the channel.
Name:
CountFallingCH01 to CountFallingCH15
These registers contain cyclic counters that are incremented with every detected falling edge on the respective
channel.
Data type Value Information
USINT 0 to 255 Counter for falling edges
Name:
CountRisingCH01 to CountRisingCH15
These registers contain cyclic counters that are incremented with every detected rising edge on the respective
channel.
Data type Value Information
USINT 0 to 255 Counter for rising edges
Name:
TimeStampFallingCH01 to TimeStampFallingCH15
When a falling edge occurs on the respective channel, the current counter value of the module timer is copied
to these registers.
Data type Value Information
UINT 0 to 65535 Timestamp for rising edges
Name:
TimeStampRisingCH01 to TimeStampRisingCH15
When a rising edge occurs on the respective channel, the current counter value of the module timer is copied to
these registers.
Data type Value Information
UINT 0 to 65535 Timestamp for rising edges
Name:
TimeDiffFallingCH01 to TimeDiffFallingCH15
When a falling edge occurs on the respective channel, the time difference compared to the starting edge configured
in bit 4 of the "CfO_EdgeTimeFallingMode" on page 489 register is copied to this register.
Data type Value Information
UINT 0 to 65535 Time difference from starting edge
Name:
TimeDiffRisingCH01 to TimeDiffRisingCH15
When a rising edge occurs on the respective channel, the time difference compared to the starting edge configured
in bit 4 of the "CfO_EdgeTimeRisingMode" on page 490 register is copied to this register.
Data type Value Information
UINT 0 to 65535 Time difference from starting edge
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
150 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
150 µs
8.5.3 X67DC2322
The module is equipped with 2 resolver connections as well as 2 digital inputs and outputs for each. It is possible
to evaluate BRX and BRT resolvers using a configurable sine gain of 1 or 0.25.
• 2 resolvers
• BRX/BRT evaluation
• 2 digital inputs and outputs for each
X2X Link
Connector A: Input
Connector B: Output
Resolver inputs 1 to 2
Digital inputs/outputs 1 to 2
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.5.3.8 Pinout
Shield
1 /REF
2 REF
3 NC
4 COS
5 /COS
X1 and X3
6 SIN
M12 ① 7 /SIN
X1 X3
8 NC
9 NC
10 NC
11 Shield
X2 X4 12 Shield
Shield
1 +24 VDC
X2 and X4 2 DI
M12 ② 3 GND
4 DO
5 Shield
4
1
5
Connection 4
Example X1 and X3
/REF
REF 1
2
Resolver
/SIN
4 Connection 1 / 3
SIN 7 6 5
/COS
COS
Example X2 and X4
+24 VDC
Sensor
DI 1 2
5 Connection 2 / 4
DO
Actuator
4 3
GND
Connection X2/X4
1 2
Output status Control logic
5
temperature
cutoff
3
4
Filter (t IN)
Output monitoring
Filter (t IN)
Digital input
VDR
Status of
Filter (t IN)
actuator power supply
C D
I/O supply +24 V
2 2
1 4 1
4
3 3
GND
VDR
>30 V
Information:
If the stator winding exhibits high inductance, this can cause problems when using long cables.
In this case, the inductance of the stator winding and capacitance of the cable can result in an oscil-
lating circuit. The oscillating circuit expands the voltage signal beyond the permitted measurement
limits. This causes the module to indicate a resolver fault.
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
8.5.3.12.4 Configuration
A BRT resolver is usually supplied with 2 sine signals. The signal on the output of the rotor is measured to calculate
the angle of rotation of the axis (primary winding = stator).
In order to use a BRT resolver with this module that only provides 1 sine signal, the resolver must be inverted. The
sine signal is fed into the rotor winding (R1 and R2), and the 2 stator signals are measured in order to calculate
the angle of rotation of the axis. In this case, the transformation ratio is also inverted.
Primary winding : Stator
Stator Rotor
S1
R1
S3
S2
R2
S4
1
±10%
Transformation ratio
With inversion, it is also possible to use resolvers with the primary stator winding and a transformation ratio of 2
±10%. In this case, a transformation ratio of 0.5 must be configured in the BRX configuration.
Primary winding Transformation ratio according to data sheet Configuration in Automation Studio
Rotor 0.5 ±10% BRX
Rotor 1.0 ±10% BRT
Stator 1.0 ±10% BRT
Stator 2.0 ±10% BRX
Name:
ConfigurationResolver01 to ConfigurationResolver02
The resolvers can be configured in these registers.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Trigger mode1) 00 No trigger
01 On rising edge of digital input
10 On falling edge of digital input
11 On rising and falling edge of digital input
2-3 Homing mode 00 No referencing
Set null position of register PosVal0x 01 On rising edge
10 On falling edge
11 Immediately if EnableReferencing0x = 1
4 Resolver type 0 BRX (default)
1 BRT
5 - 15 Reserved 0
Name:
ZeroPositionResolver1 to ZeroPositionResolver2
The zero position of the resolver can be defined in this register. There are two possibilities for this:
• Edge event on the digital input. See register "ConfigurationResolver0x" on page 503.
• Setting the zero position directly. See bit 1 of register "Control0x" on page 504.
Data type Values
DINT -2,147,483,648 to 2,147,483,647
8.5.3.12.5 Communication
Name:
Status01 to Status02
ResolverError01 to ResolverError02
ErrPosition01 to ErrPosition02
DigitalInput01 to DigitalInput02
DOReadback01 to DOReadback02
The status of the resolvers and digital inputs/outputs can be read out in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 ResolverError0x 0 No error
1 Open circuit or resolver not connected1)
1 ErrPosition0x 0 No error
1 Resolver not yet initialized1)
2-3 Reserved 0
4 DigitalInput0x 0 Input not set
1 Input set
5 DOReadback0x 0 Output not set
1 Output set
6-7 Reserved 0
1) No update of registers "Trigger counter" on page 505 and "Trigger time" on page 505
Name:
Control01 to Control02
EnableTriggerCnt01 to EnableTriggerCnt02
EnableReferencing01 to EnableReferencing02
DigitalOutput01 to DigitalOutput02
The digital outputs, resolver homing and the mode of the trigger counter can be set in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 EnableTriggerCnt0x1) 0 "Trigger counter" on page 505 and "Trigger time" on page
505 are set to 0.
1 Trigger mode corresponds to bits 0 to 1 of register "Resolver
configuration" on page 503.
1 EnableReferencing0x 0 Disabled
1 Sets the zero position
2 DigitalOutput0x 0 Digital output not set
1 Digital output set
3-7 Reserved 0
Name:
PosTime01 to PosTime02
The timestamp (X2X system time) of the last measurement of the resolver position is indicated in this register.
This register can be hidden in the Automation Studio I/O mapping in order to reduce the X2X Link load.
Data type Values
INT -32768 to 32767
Name:
PosVal01 to PosVal02
The current position of the resolver is indicated in this register.
• The high word contains the number of revolutions.
• The low word contains the position within a revolution.
Datentyp Werte
DINT -2.147.483.648 bis 2.147.483.647
Name:
TriggerCnt01 to TriggerCnt02
The counter in this register is increased on every occurrence of a trigger event.
Data type Values
SINT -128 to 127
Name:
TriggerTime01 to TriggerTime02
The system time of the last trigger event is indicated in this register.
Data type Values
INT -32768 to 32767
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
250 µs
8.6.1 Summary
Model number Short description Page
X67DI1371 X67 digital input module, 8 inputs, 24 VDC, sink, input filter 1 ms 507
X67DI1371.L08 X67 digital input module, 16 inputs, 24 VDC, sink, input filter 1 ms, M8 connectors, high-density module 514
X67DI1371.L12 X67 digital input module, 16 inputs, 24 VDC, sink, input filter 1 ms, M12 connectors, high-density module 521
X67DI1372 X67 digital input module, 8 inputs, 24 VDC, source, 1 ms input filter 528
8.6.2 X67DI1371
The module is a digital input module for 24 VDC. It has 8 inputs for sink input circuits.
■ For all standard sensors with M8 connectors
■ Extremely short cycle times
■ Integrated sensor supply with short circuit protection
X2X Link
Connector A: Input
Connector B: Output
Digital inputs 1 to 8
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.6.2.8 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI x
8.6.2.8.1 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
24 V digital in
1…8
4
VDR 3 1
Input status Filter (tIN)
I/O status
LED (green)
C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
150 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
150 µs
8.6.3 X67DI1371.L08
The module is a digital input module with high component density. The module is equipped with 16 inputs and
M8 connectors.
■ 16 digital inputs
■ For all standard sensors with M8 connectors
■ 1:1 replacement for passive distributors
■ Extremely short cycle times
■ Integrated sensor supply with short circuit protection
X2X Link
Connection A: Input
Connection B: Output
7
1 11
2 12
8
3 13
9
Digital inputs 1 to 16
4 14
5 15
10
6 16
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
1 1 24 VDC power supply
2 24 VDC power supply1)
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
C → Connector (female) in module, routing of I/O power supply
2
1
3
1) The I/O power supply on pin 2 is not used by this module. Pin 2 must still be connected, however, since the I/O power supply is passed on to subsequent
modules.
8.6.3.8 Pinout
7
1 11
2 12
1 +24 VDC
8 X1 to X16
3 GND
3 13 M8 ①
4 DI x
9
4 14
5 15
10
6 16
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
24 V digital in
1…16
4
VDR 3 1
Input status Filter (tIN)
I/O status
LED (green)
+24 V
+24 V
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Name:
DigitalInput09 to DigitalInput16
This register indicates the input state of digital inputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput09 0 or 1 Input state - Digital input 9
... ...
7 DigitalInput16 0 or 1 Input state - Digital input 16
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
150 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
150 µs
8.6.4 X67DI1371.L12
This module is a digital input module with high component density. The module is equipped with 16 inputs and
M12 connectors.
■ 16 digital inputs
■ For all standard sensors with M12 connectors
■ 1:1 replacement for passive distributors
■ Extremely short cycle times
■ Integrated sensor supply with short circuit protection
X2X Link
Connection A: Input
Connection B: Output
1-1 5-1
1-2 5-2
2-1 6-1
2-2 6-2
Digital inputs 1 to 16
3-1 7-1
3-2 7-2
4-1 8-1
4-2 8-2
24 VDC I/O power supply
Connection C: Supply
Connection D: Routing
Left side / Channels 1 to 8 in the first byte Right side / Channels 9 to 16 in the second byte
Channel Connection Connection Channel
1 1-1 5-1 9
2 1-2 5-2 10
... ... ... ...
7 4-1 8-1 15
8 4-2 8-2 16
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
1 1 24 VDC power supply
2 24 VDC power supply1)
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
C → Connector (female) in module, routing of I/O power supply
2
1
3
1) The I/O power supply on pin 2 is not used by this module. Pin 2 must still be connected, however, since the I/O power supply is passed on to subsequent
modules.
8.6.4.8 Pinout
X1 X5
Shield
1 +24 VDC
X2 X6
X1 to X8 2 DI x-1
M12 ① 3 GND
4 DI x-2
X3 X7
5 NC
X4 X8
8.6.4.8.1 Connections X1 to X8
4
1
5
+24 VDC
Sensor 1
DI
GND 1 2
5 Connection X
+24 VDC
Sensor 2
4 3
DI
GND
24 V digital in 1-x…8-x
VDR
VDR
+24 V
+24 V
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Name:
DigitalInput09 to DigitalInput16
This register indicates the input state of digital inputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput09 0 or 1 Input state - Digital input 9
... ...
7 DigitalInput16 0 or 1 Input state - Digital input 16
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
150 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
150 µs
8.6.5 X67DI1372
This module is a digital input module for 24 VDC. It has 8 inputs for source input circuits.
■ For all standard sensors with M8 connectors
■ Extremely short cycle times
■ Integrated sensor supply with short circuit protection
X2X Link
Connector A: Input
Connector B: Output
Digital inputs 1 to 8
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.6.5.8 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI x
8.6.5.8.1 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 V
V CC
1…8
I/O status 4
LED (green)
Input status +
Filter (tIN) − V ref 3 1
24 V digital input
C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle.
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
150 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
150 µs
8.7.1 Summary
Model number Short description Page
X67DM1321 X67 digital mixed module, 8 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 536
2 event counters 50 kHz
X67DM1321.L08 X67 digital mixed module, 16 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input 570
filter, 2 event counters 50 kHz, M8 connectors, high-density module
X67DM1321.L12 X67 digital mixed module, 16 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input 551
filter, 2 event counters 50 kHz, M12 connectors, high-density module
X67DM1321.L12-1 X67 digital mixed module, 16 channels configurable as input or output, 24 VDC, 0.5 A, pinning variant, config- 551
urable input filter, 2 event counters 50 kHz, M12 connectors, high-density module
X67DM9321 X67 digital mixed module, 8 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input filter, 588
2 event counters 50 kHz X2X Link address switch
X67DM9321.L12 X67 digital mixed module, 16 channels configurable as inputs or outputs, 24 VDC, 0.5 A, configurable input 603
filter, 2 event counters 50 kHz, M12 connectors, X2X Link address switch, high-density module
X67DM9331.L12 X67 digital mixed module, 8 channels configurable as inputs or outputs, 24 VDC, 2 A, configurable input fil- 622
ter, single-channel sensor/actuator supply monitoring, M12 connectors, X2X Link address switch, high-density
module
8.7.2 X67DM1321
This module has 8 digital channels that can be configured as inputs or outputs. The inputs are designed for sink
connections, the outputs for source connections.
■ 8 digital channels, configurable as inputs or outputs
■ Outputs with short circuit protection
■ All outputs with single-channel diagnostics
■ Configurable input delay
■ 2 additional channels with counter functions
X2X Link
Connector A: Input
Connector B: Output
Digital inputs/outputs 1 to 8
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.7.2.8 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.7.2.8.1 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
8.7.2.12.5 Configuration
Name:
ConfigIOMask01
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Information:
In counter operation, channels 1 to 4 can only be configured as inputs.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 8 configured as input/output 0 Configured as input
1 Configured as output
An input filter is available for each input. The input delay can be set using register "ConfigOutput03" on page 546.
Disturbance pulses which are shorter than the input delay are suppressed by the input filter.
Eingangs-
signal
Zeit
Zeit
tVerz ⇒ Eingangsverzögerung
Name:
ConfigOutput03
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (default value)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
Name:
ConfigOutput01 to ConfigOutput02
ResetCounter01 to ResetCounter02
Counter channels 1 and 2 are configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Configuration of the counter frequency (only with gate mea- 000 Counter frequency = 48 MHz
surement) 001 Counter frequency = 3 MHz
010 Counter frequency = 187.5 kHz
011 to 111 Reserved
3-4 Reserved 0
5 ResetCounter0x 0 No influence on the counter
1 Delete counter
6-7 Configuration of the operating mode 0 Event counter operation
1 Gate measurement
Gate measurement
Information:
Only one of the counter channels at a time can be used for gate measurement.
The time of rising to falling edges for the gate input is registered using an internal frequency. The result is checked
for overflow (0xFFFF).
The recovery time between measurements must be >100 µs.
The measurement result is transferred with the falling edge to the result memory.
8.7.2.12.6 Communication
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
InputLatch01 to InputLatch08
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatch0x" on page 549.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch01 0 Do not latch input 1
1 Latch input 1
... ...
7 InputLatch08 0 Do not latch input 8
1 Latch input 8
Name:
QuitInputLatch01 to QuitInputLatch08
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch01 0 Do not reset input 1
1 Reset input 1
... ...
7 QuitInputLatch08 0 Do not reset input 8
1 Reset input 8
Name:
Counter01 and Counter02
Depending on the mode, this register contains the counter value or gate time of channel 1 and channel 2.
Data type Values
UINT 0 to 65535
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
8.7.3 X67DM1321.L12(-1)
This module has 16 digital channels that can be configured as inputs or outputs. The inputs are designed for sink
connections, the outputs for source connections.
■ 16 digital channels, configurable as inputs or outputs
■ Replacement of passive distributors
■ 2 additional channels with counter functions
■ All outputs with single-channel diagnostics
■ Extensive additional status information
X2X Link
Connection A: Input
Connection B: Output
1-1 5-1
1-2 5-2
2-1 6-1
2-2 6-2
3-1 7-1
Digital inputs/outputs 1 to 16
3-2 7-2
4-1 8-1
4-2 8-2
24 VDC I/O power supply
Connection C: Supply
Connection D: Routing
Left side / Channels 1 to 8 in the first byte Right side / Channels 9 to 16 in the second byte
Channel Connection Connection Channel
1 1-1 5-1 9
2 1-2 5-2 10
... ... ... ...
7 4-1 8-1 15
8 4-2 8-2 16
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Name
1 1 24 VDC1)
2 24 VDC1)
4
3 GND
4 GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1) Both supply pins must be supplied. Cutting off the outputs is only ensured if both pins are disconnected from the power supply.
Information:
If the summation current of the outputs is >4 A, current must also be supplied via connector D, pin 2.
8.7.3.8 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6
X1 to X8 2 DI/DO x-1
M12 ① 3 GND
4 DI/DO x-2
X3 X7
5 NC
X4 X8
8.7.3.8.1 Connection X1 to X8
4
1
5
Connection 5 to 8
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
5
1 3
Monitoring of
Sensor/Actuator power supply
+24 V1)
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
1) Cutting off the outputs is only ensured if both pins are disconnected from the power supply.
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
8.7.3.12.5 Configuration
Name:
ConfigIOMask01
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Information:
In counter operation, channels 1 to 4 can only be configured as inputs.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 8 configured as input/output 0 Configured as input
1 Configured as output
Name:
ConfigIOMask02
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 9 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 16 configured as input/output 0 Configured as input
1 Configured as output
An input filter is available for each input. The input delay can be set using register "ConfigOutput03" on page 563.
Disturbance pulses which are shorter than the input delay are suppressed by the input filter.
Eingangs-
signal
Zeit
Zeit
tVerz ⇒ Eingangsverzögerung
Name:
ConfigOutput03
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (default value)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
Name:
ConfigOutput01 to ConfigOutput02
ResetCounter01 to ResetCounter02
Counter channels 1 and 2 are configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Configuration of the counter frequency (only with gate mea- 000 Counter frequency = 48 MHz
surement) 001 Counter frequency = 3 MHz
010 Counter frequency = 187.5 kHz
011 to 111 Reserved
3-4 Reserved 0
5 ResetCounter0x 0 No influence on the counter
1 Delete counter
6-7 Configuration of the operating mode 0 Event counter operation
1 Gate measurement
Gate measurement
Information:
Only one of the counter channels at a time can be used for gate measurement.
The time of rising to falling edges for the gate input is registered using an internal frequency. The result is checked
for overflow (0xFFFF).
The recovery time between measurements must be >100 µs.
The measurement result is transferred with the falling edge to the result memory.
8.7.3.12.6 Communication
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
DigitalInput01 to DigitalInput16
This register indicates the input state of digital inputs 1 to 16.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
15 DigitalInput16 0 or 1 Input state - Digital input 16
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Bit structure:
Bit Name Value Information
0 DigitalInput09 0 or 1 Input state - Digital input 9
... ...
7 DigitalInput16 0 or 1 Input state - Digital input 16
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput16
This register is used to store the switching state of digital outputs 1 to 16.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
15 DigitalOutput16 0 Digital output 16 reset
1 Digital output 16 set
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
Name:
DigitalOutput09 to DigitalOutput16
This register is used to store the switching state of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput09 0 Digital output 09 reset
1 Digital output 09 set
... ...
7 DigitalOutput16 0 Digital output 16 reset
1 Digital output 16 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput16
This register is used to indicate the status of digital outputs 1 to 16.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
15 StatusDigitalOutput16 0 Channel 16: No error
1 Channel 16: Short circuit or overload
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
StatusDigitalOutput09 to StatusDigitalOutput16
This register is used to indicate the status of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput09 0 Channel 09: No error
1 Channel 09: Short circuit or overload
... ...
7 StatusDigitalOutput16 0 Channel 16: No error
1 Channel 16: Short circuit or overload
Name:
InputLatch01 to InputLatch08
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatch0x" on page 567.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch01 0 Do not latch input 1
1 Latch input 1
... ...
7 InputLatch08 0 Do not latch input 8
1 Latch input 8
Name:
InputLatch09 to InputLatch16
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatchxx" on page 568.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch09 0 Do not latch input 9
1 Latch input 9
... ...
7 InputLatch16 0 Do not latch input 16
1 Latch input 16
Name:
QuitInputLatch01 to QuitInputLatch08
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch01 0 Do not reset input 1
1 Reset input 1
... ...
7 QuitInputLatch08 0 Do not reset input 8
1 Reset input 8
Name:
QuitInputLatch09 to QuitInputLatch16
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch09 0 Do not reset input 9
1 Reset input 9
... ...
7 QuitInputLatch16 0 Do not reset input 16
1 Reset input 16
Name:
Counter01 and Counter02
Depending on the mode, this register contains the counter value or gate time of channel 1 and channel 2.
Data type Values
UINT 0 to 65535
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Input supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1 Reserved 0
2 Output supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
3-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Without filtering 150 μs
With filtering 200 μs
Counter operation 250 µs
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without filtering 150 μs
With filtering 200 μs
Counter operation 250 µs
8.7.4 X67DM1321.L08
This module has 16 digital channels that can be configured as inputs or outputs. The inputs are designed for sink
connections, the outputs for source connections.
■ 16 digital channels, configurable as inputs or outputs
■ Replacement of passive distributors
■ 2 additional channels with counter functions
■ All outputs with single-channel diagnostics
■ Extensive additional status information
X2X Link
Connection A: Input
Connection B: Output
7
1 11
2 12
8
3 13
9 Digital inputs/outputs 1 to 16
4 14
5 15
10
6 16
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Name
1 1 24 VDC1)
2 24 VDC1)
4
3 GND
4 GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1) Both supply pins must be supplied. Cutting off the outputs is only ensured if both pins are disconnected from the power supply.
Information:
If the summation current of the outputs is >4 A, current must also be supplied via connector D, pin 2.
8.7.4.8 Pinout
7
1 11
2 12
1 +24 VDC
8 X1 to X16
3 GND
3 13 M8 ①
4 DI/DO x
9
4 14
5 15
10
6 16
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
VDR 3 1
Input status Filter (tIN)
I/O status
LED (orange)
Monitoring of
Sensor/Actuator power supply
+24 V1)
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
Module power supply
GND
VDR
>30 V
1) Cutting off the outputs is only ensured if both pins are disconnected from the power supply.
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
8.7.4.12.5 Configuration
Name:
ConfigIOMask01
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Information:
In counter operation, channels 1 to 4 can only be configured as inputs.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 8 configured as input/output 0 Configured as input
1 Configured as output
Name:
ConfigIOMask02
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 9 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 16 configured as input/output 0 Configured as input
1 Configured as output
An input filter is available for each input. The input delay can be set using register "ConfigOutput03" on page 581.
Disturbance pulses which are shorter than the input delay are suppressed by the input filter.
Eingangs-
signal
Zeit
Zeit
tVerz ⇒ Eingangsverzögerung
Name:
ConfigOutput03
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (default value)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
Name:
ConfigOutput01 to ConfigOutput02
ResetCounter01 to ResetCounter02
Counter channels 1 and 2 are configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Configuration of the counter frequency (only with gate mea- 000 Counter frequency = 48 MHz
surement) 001 Counter frequency = 3 MHz
010 Counter frequency = 187.5 kHz
011 to 111 Reserved
3-4 Reserved 0
5 ResetCounter0x 0 No influence on the counter
1 Delete counter
6-7 Configuration of the operating mode 0 Event counter operation
1 Gate measurement
Gate measurement
Information:
Only one of the counter channels at a time can be used for gate measurement.
The time of rising to falling edges for the gate input is registered using an internal frequency. The result is checked
for overflow (0xFFFF).
The recovery time between measurements must be >100 µs.
The measurement result is transferred with the falling edge to the result memory.
8.7.4.12.6 Communication
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
DigitalInput01 to DigitalInput16
This register indicates the input state of digital inputs 1 to 16.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
15 DigitalInput16 0 or 1 Input state - Digital input 16
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Bit structure:
Bit Name Value Information
0 DigitalInput09 0 or 1 Input state - Digital input 9
... ...
7 DigitalInput16 0 or 1 Input state - Digital input 16
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput16
This register is used to store the switching state of digital outputs 1 to 16.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
15 DigitalOutput16 0 Digital output 16 reset
1 Digital output 16 set
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
Name:
DigitalOutput09 to DigitalOutput16
This register is used to store the switching state of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput09 0 Digital output 09 reset
1 Digital output 09 set
... ...
7 DigitalOutput16 0 Digital output 16 reset
1 Digital output 16 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput16
This register is used to indicate the status of digital outputs 1 to 16.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
15 StatusDigitalOutput16 0 Channel 16: No error
1 Channel 16: Short circuit or overload
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
StatusDigitalOutput09 to StatusDigitalOutput16
This register is used to indicate the status of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput09 0 Channel 09: No error
1 Channel 09: Short circuit or overload
... ...
7 StatusDigitalOutput16 0 Channel 16: No error
1 Channel 16: Short circuit or overload
Name:
InputLatch01 to InputLatch08
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatch0x" on page 585.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch01 0 Do not latch input 1
1 Latch input 1
... ...
7 InputLatch08 0 Do not latch input 8
1 Latch input 8
Name:
InputLatch09 to InputLatch16
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatchxx" on page 586.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch09 0 Do not latch input 9
1 Latch input 9
... ...
7 InputLatch16 0 Do not latch input 16
1 Latch input 16
Name:
QuitInputLatch01 to QuitInputLatch08
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch01 0 Do not reset input 1
1 Reset input 1
... ...
7 QuitInputLatch08 0 Do not reset input 8
1 Reset input 8
Name:
QuitInputLatch09 to QuitInputLatch16
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch09 0 Do not reset input 9
1 Reset input 9
... ...
7 QuitInputLatch16 0 Do not reset input 16
1 Reset input 16
Name:
Counter01 and Counter02
Depending on the mode, this register contains the counter value or gate time of channel 1 and channel 2.
Data type Values
UINT 0 to 65535
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Input supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1 Reserved 0
2 Output supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
3-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Without filtering 150 μs
With filtering 200 μs
Counter operation 250 µs
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without filtering 150 μs
With filtering 200 μs
Counter operation 250 µs
8.7.5 X67DM9321
This module has 8 digital channels that can be configured as inputs or outputs. The inputs are designed for sink
connections, the outputs for source connections.
The node number switch for setting the X2X Link address is a unique feature. When modular machine configura-
tions change, it is necessary, for example, to define specific module groups at a fixed address that is independent
of the preceding modules in the line. All subsequent standard modules refer to this offset and use it automatically
for addressing purposes.
■ 8 digital channels, configurable as inputs or outputs
■ Node number switches for setting the X2X Link address
■ Outputs with short circuit protection
■ All outputs with single-channel diagnostics
■ Configurable input delay
■ 2 additional channels with counter functions
X2X Link
Connection A: Input
Connection B: Output
Digital inputs/outputs 1 to 8
High Low
The decentralized X2X Link backplane, which connects individual X67 modules with one another, is set up to be
self-addressing. Because of this, it is not necessary to set the node numbers. The module address is assigned
according to its position in the X2X Link line.
In certain cases, e.g. when configurations of modular machines change, it is necessary to define specific module
groups at a fixed address, regardless of the preceding modules in the line.
For this reason, the digital mixed module is equipped with node number switches that can be used to set the X2X
Link address. All subsequent modules refer to this offset and use it automatically for addressing purposes.
#10 #11 #12 #30 #31 #20 #21 #22 #50 #51 #52
X2X Link
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.7.5.9 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x
8.7.5.9.1 Connections X1 to X8
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
3 1
Input status Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
8.7.5.13.5 Configuration
Name:
ConfigIOMask01
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Information:
In counter operation, channels 1 to 4 can only be configured as inputs.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 8 configured as input/output 0 Configured as input
1 Configured as output
An input filter is available for each input. The input delay can be set using register "ConfigOutput03" on page 598.
Disturbance pulses which are shorter than the input delay are suppressed by the input filter.
Eingangs-
signal
Zeit
Zeit
tVerz ⇒ Eingangsverzögerung
Name:
ConfigOutput03
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (default value)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
Name:
ConfigOutput01 to ConfigOutput02
ResetCounter01 to ResetCounter02
Counter channels 1 and 2 are configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Configuration of the counter frequency (only with gate mea- 000 Counter frequency = 48 MHz
surement) 001 Counter frequency = 3 MHz
010 Counter frequency = 187.5 kHz
011 to 111 Reserved
3-4 Reserved 0
5 ResetCounter0x 0 No influence on the counter
1 Delete counter
6-7 Configuration of the operating mode 0 Event counter operation
1 Gate measurement
Gate measurement
Information:
Only one of the counter channels at a time can be used for gate measurement.
The time of rising to falling edges for the gate input is registered using an internal frequency. The result is checked
for overflow (0xFFFF).
The recovery time between measurements must be >100 µs.
The measurement result is transferred with the falling edge to the result memory.
8.7.5.13.6 Communication
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
InputLatch01 to InputLatch08
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatch0x" on page 601.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch01 0 Do not latch input 1
1 Latch input 1
... ...
7 InputLatch08 0 Do not latch input 8
1 Latch input 8
Name:
QuitInputLatch01 to QuitInputLatch08
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch01 0 Do not reset input 1
1 Reset input 1
... ...
7 QuitInputLatch08 0 Do not reset input 8
1 Reset input 8
Name:
Counter01 and Counter02
Depending on the mode, this register contains the counter value or gate time of channel 1 and channel 2.
Data type Values
UINT 0 to 65535
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
8.7.6 X67DM9321.L12
This module has 16 digital channels that can be configured as inputs or outputs. The inputs are designed for sink
connections, the outputs for source connections.
The node number switch for setting the X2X Link address is a unique feature. When modular machine configura-
tions change, it is necessary, for example, to define specific module groups at a fixed address that is independent
of the preceding modules in the line. All subsequent standard modules refer to this offset and use it automatically
for addressing purposes.
■ 16 digital channels, configurable as inputs or outputs
■ Node number switches for setting the X2X Link address
■ Replacement of passive distributors
■ 2 additional channels with counter functions
■ All outputs with single-channel diagnostics
■ Extensive additional status information
X2X Link
Connection A: Input
Connection B: Output
1-1 5-1
1-2 5-2
2-1 6-1
2-2 6-2
3-1 7-1
Digital inputs/outputs 1 to 16
3-2 7-2
4-1 8-1
4-2 8-2
24 VDC I/O power supply
Connection C: Supply
Connection D: Routing
Left side / Channels 1 to 8 in the first byte Right side / Channels 9 to 16 in the second byte
Channel Connection Connection Channel
1 1-1 5-1 9
2 1-2 5-2 10
... ... ... ...
7 4-1 8-1 15
8 4-2 8-2 16
High Low
The decentralized X2X Link backplane, which connects individual X67 modules with one another, is set up to be
self-addressing. Because of this, it is not necessary to set the node numbers. The module address is assigned
according to its position in the X2X Link line.
In certain cases, e.g. when configurations of modular machines change, it is necessary to define specific module
groups at a fixed address, regardless of the preceding modules in the line.
For this reason, the digital mixed module is equipped with node number switches that can be used to set the X2X
Link address. All subsequent modules refer to this offset and use it automatically for addressing purposes.
#10 #11 #12 #30 #31 #20 #21 #22 #50 #51 #52
X2X Link
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Name
1 1 24 VDC1)
2 24 VDC1)
4
3 GND
4 GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1) Both supply pins must be supplied. Cutting off the outputs is only ensured if both pins are disconnected from the power supply.
Information:
If the summation current of the outputs is >4 A, current must also be supplied via connector D, pin 2.
8.7.6.9 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6
X1 to X8 2 DI/DO x-1
M12 ① 3 GND
4 DI/DO x-2
X3 X7
5 NC
X4 X8
8.7.6.9.1 Connection X1 to X8
4
1
5
Connection 5 to 8
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
5
1 3
Monitoring of
Sensor/Actuator power supply
+24 V1)
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
I/O power supply
GND
VDR
>30 V
1) Cutting off the outputs is only ensured if both pins are disconnected from the power supply.
Coil inductance
100 H 10 H
1000
1H
100
10 mH
50
0.1 1 10 100
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
8.7.6.13.5 Configuration
Name:
ConfigIOMask01
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Information:
In counter operation, channels 1 to 4 can only be configured as inputs.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 8 configured as input/output 0 Configured as input
1 Configured as output
Name:
ConfigIOMask02
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 9 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 16 configured as input/output 0 Configured as input
1 Configured as output
An input filter is available for each input. The input delay can be set using register "ConfigOutput03" on page 615.
Disturbance pulses which are shorter than the input delay are suppressed by the input filter.
Eingangs-
signal
Zeit
Zeit
tVerz ⇒ Eingangsverzögerung
Name:
ConfigOutput03
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (default value)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
Name:
ConfigOutput01 to ConfigOutput02
ResetCounter01 to ResetCounter02
Counter channels 1 and 2 are configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Configuration of the counter frequency (only with gate mea- 000 Counter frequency = 48 MHz
surement) 001 Counter frequency = 3 MHz
010 Counter frequency = 187.5 kHz
011 to 111 Reserved
3-4 Reserved 0
5 ResetCounter0x 0 No influence on the counter
1 Delete counter
6-7 Configuration of the operating mode 0 Event counter operation
1 Gate measurement
Gate measurement
Information:
Only one of the counter channels at a time can be used for gate measurement.
The time of rising to falling edges for the gate input is registered using an internal frequency. The result is checked
for overflow (0xFFFF).
The recovery time between measurements must be >100 µs.
The measurement result is transferred with the falling edge to the result memory.
8.7.6.13.6 Communication
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
DigitalInput01 to DigitalInput16
This register indicates the input state of digital inputs 1 to 16.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
15 DigitalInput16 0 or 1 Input state - Digital input 16
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Bit structure:
Bit Name Value Information
0 DigitalInput09 0 or 1 Input state - Digital input 9
... ...
7 DigitalInput16 0 or 1 Input state - Digital input 16
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput16
This register is used to store the switching state of digital outputs 1 to 16.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
15 DigitalOutput16 0 Digital output 16 reset
1 Digital output 16 set
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
Name:
DigitalOutput09 to DigitalOutput16
This register is used to store the switching state of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput09 0 Digital output 09 reset
1 Digital output 09 set
... ...
7 DigitalOutput16 0 Digital output 16 reset
1 Digital output 16 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput16
This register is used to indicate the status of digital outputs 1 to 16.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
15 StatusDigitalOutput16 0 Channel 16: No error
1 Channel 16: Short circuit or overload
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
StatusDigitalOutput09 to StatusDigitalOutput16
This register is used to indicate the status of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput09 0 Channel 09: No error
1 Channel 09: Short circuit or overload
... ...
7 StatusDigitalOutput16 0 Channel 16: No error
1 Channel 16: Short circuit or overload
Name:
InputLatch01 to InputLatch08
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatch0x" on page 619.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch01 0 Do not latch input 1
1 Latch input 1
... ...
7 InputLatch08 0 Do not latch input 8
1 Latch input 8
Name:
InputLatch09 to InputLatch16
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatchxx" on page 620.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 InputLatch09 0 Do not latch input 9
1 Latch input 9
... ...
7 InputLatch16 0 Do not latch input 16
1 Latch input 16
Name:
QuitInputLatch01 to QuitInputLatch08
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch01 0 Do not reset input 1
1 Reset input 1
... ...
7 QuitInputLatch08 0 Do not reset input 8
1 Reset input 8
Name:
QuitInputLatch09 to QuitInputLatch16
This register is used to reset the input latch by channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 QuitInputLatch09 0 Do not reset input 9
1 Reset input 9
... ...
7 QuitInputLatch16 0 Do not reset input 16
1 Reset input 16
Name:
Counter01 and Counter02
Depending on the mode, this register contains the counter value or gate time of channel 1 and channel 2.
Data type Values
UINT 0 to 65535
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Input supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1 Reserved 0
2 Output supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
3-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Without filtering 150 μs
With filtering 200 μs
Counter operation 250 µs
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without filtering 150 μs
With filtering 200 μs
Counter operation 250 µs
8.7.7 X67DM9331.L12
This module has 8 digital channels that can be configured as inputs or outputs. The inputs are designed for sink
connections, the outputs for source connections. The outputs can handle up to 2 A. The summation current is 8 A.
The node number switch for setting the X2X Link address is a unique feature. When modular machine configura-
tions change, it is necessary, for example, to define specific module groups at a fixed address that is independent
of the preceding modules in the line. All subsequent standard modules refer to this offset and use it automatically
for addressing purposes.
■ 8 digital channels, configurable as inputs or outputs
■ Outputs can handle up to 2 A
■ Node number switches for setting the X2X Link address
■ Replacement of passive distributors
■ All outputs with single-channel diagnostics
■ Extensive additional status information
X2X Link
Connection A: Input
Connection B: Output
1 5
2 6
3 7
Digital inputs/outputs 1 to 8
4 8
High Low
The decentralized X2X Link backplane, which connects individual X67 modules with one another, is set up to be
self-addressing. Because of this, it is not necessary to set the node numbers. The module address is assigned
according to its position in the X2X Link line.
In certain cases, e.g. when configurations of modular machines change, it is necessary to define specific module
groups at a fixed address, regardless of the preceding modules in the line.
For this reason, the digital mixed module is equipped with node number switches that can be used to set the X2X
Link address. All subsequent modules refer to this offset and use it automatically for addressing purposes.
#10 #11 #12 #30 #31 #20 #21 #22 #50 #51 #52
X2X Link
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Name
1 1 24 VDC1)
2 24 VDC1)
4
3 GND
4 GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
1) Both supply pins must be supplied. Cutting off the outputs is only ensured if both pins are disconnected from the power supply.
Information:
If the summation current of the outputs is >4 A, current must also be supplied via connector D, pin 2.
8.7.7.9 Pinout
X1 X5
SHLD
1 +24 VDC
X2 X6 X1 to X8 2 Reserved
M12 ① 3 GND
4 DI/DO
X3 X7
5 NC
X4 X8
8.7.7.9.1 Connection X1 to X8
4
1
5
Connection 5 to 8
+24 VDC 1 2
Sensor
DI
5 Connection x
GND
4 3
+24 VDC 1 2
Actuator
DO
5 Connection x
GND
4 3
VDR
Input status Filter (tIN)
I/O status
LED (orange)
Status of
sensor/actuator power supply
+24 V1)
2 2
1 4 4 1
C 3 3 D
Reverse polarity protection
Input supply
GND
VDR
>30 V
1) Cutting off the outputs is only ensured if both pins are disconnected from the power supply.
Coil inductance
100 H 10 H
500
1H
10 mH
12
0.1 1 10 100
The outputs of the module can handle up to 2 A. With a summation current of 8 A, no more than 4 channels are
operable at full load. To ensure optimal use of the module, it is important to assign the channels properly, and to
keep in mind a potential derating.
Correct channel assignment is important, since the 8 outputs are divided between 2 output drivers. The channels
operated with 2 A must therefore be evenly divided between both output drivers.
Output driver 1: Channels 1 to 4
Output driver 2: Channels 5 to 8
The following table provides an overview of the number of fully used channels, the resulting best distribution, and
a potential derating.
Number of channels using 2 A Division Derating
1 Any No
2 1st channel with 2 A ... channel no. 1 to 4 No
2nd channel with 2 A ... channel no. 5 to 8
3 Assign all even or all odd channel numbers.
Examples:
1, 3, 5 Channels 1 and 3
2, 4, 6 Channels 2 and 4
3, 5, 7 Channels 5 and 7
4, 6, 8 Channels 6 and 8
4 Assign all even or all odd channel numbers.
Possible divisions:
1, 3, 5, 7 On each channel
2, 4, 6, 8 On each channel
1.5
Output current [A]
0.5
0
-25 50 60
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
8.7.7.14.4 Configuration
Name:
ConfigIOMask01
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Channel 1 configured as input/output 0 Configured as input
1 Configured as output
... ...
7 Channel 8 configured as input/output 0 Configured as input
1 Configured as output
An input filter is available for each input. The input delay can be set using register "ConfigOutput01" on page 630.
Disturbance pulses which are shorter than the input delay are suppressed by the input filter.
Eingangs-
signal
Zeit
Zeit
tVerz ⇒ Eingangsverzögerung
Name:
ConfigOutput01
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (default value)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
8.7.7.14.5 Communication
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
Name:
StatusSensor01 to StatusSensor08
This register is used to indicate the status of digital actuator/sensor power supply 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusSensor01 0 Channel 01: Actuator/Sensor power supply in valid range
1 Channel 01: Short circuit or overload
... ...
7 StatusSensor08 0 Channel 08: Actuator/Sensor power supply in valid range
1 Channel 08: Short circuit or overload
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Without filtering 150 μs
With filtering 200 μs
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without filtering 150 µs
With filtering 200 µs
8.8.1 Summary
Model number Short description Page
X67DO1332 X67 digital output module, 8 outputs, 24 VDC, 2 A, readable output status 635
X67DO9332.L12 X67 digital output module, 8 outputs, 24 VDC, 2 A, single-channel actuator power supply monitoring, M12 643
connectors, X2X Link address switch, high-density module
8.8.2 X67DO1332
The module is a digital output module for 24 VDC. It has 8 outputs for the source output circuit.
■ 8 A summation current per module
■ All outputs with single-channel diagnostics for short circuit or overload
■ Extremely short cycle times
■ Outputs with short circuit protection
■ Integrated protection for switching inductances
X2X Link
Connection A: Input
Connection B: Output
Digital outputs 1 to 8
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.8.2.8 Pinout
1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DO x
8.8.2.8.1 Connections X1 to X8
+24 VDC 4 1
Actuator
DO
Connection X
GND
3
24 V 2 A digital output
VDR 3 1
Output
monitoring Filter (tIN)
I/O status
LED (orange)
Short circuit
and overload protection
C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
100 H 10 H
500
1H
10 mH
12
0.1 1 10 100
The outputs of the module can handle up to 2 A. With a summation current of 8 A, no more than 4 channels are
operable at full load. To ensure optimal use of the module, it is important to assign the channels properly, and to
keep in mind a potential derating.
Correct channel assignment is important, since the 8 outputs are divided between 2 output drivers. The channels
operated with 2 A must therefore be evenly divided between both output drivers.
Output driver 1: Channels 1 to 4
Output driver 2: Channels 5 to 8
The following table provides an overview of the number of fully used channels, the resulting best distribution, and
a potential derating.
Number of channels using 2 A Division Derating
1 Any No
2 1st channel with 2 A ... channel no. 1 to 4 No
2nd channel with 2 A ... channel no. 5 to 8
3 Assign all even or all odd channel numbers.
Examples:
1, 3, 5 Channels 1 and 3
2, 4, 6 Channels 2 and 4
3, 5, 7 Channels 5 and 7
4, 6, 8 Channels 6 and 8
4 Assign all even or all odd channel numbers.
Possible divisions:
1, 3, 5, 7 On each channel
2, 4, 6, 8 On each channel
1.5
Output current [A]
0.5
0
-25 50 60
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
150 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
150 µs
8.8.3 X67DO9332.L12
The module is a digital output module with 8 channels. The outputs can handle up to 2 A. The summation current
is 8 A.
The node number switches for setting the X2X Link address are a unique feature. When modular machine configu-
rations change, it is necessary, for example, to define specific module groups at a fixed address that is independent
of the preceding modules in the line. All subsequent standard modules refer to this offset and use it automatically
for addressing purposes.
■ 8 digital outputs
■ Outputs can handle up to 2 A
■ Node number switches for setting the X2X Link address
■ 1:1 replacement for passive distributors
■ All outputs with single-channel diagnostics
■ Extensive additional status information
X2X Link
Connection A: Input
Connection B: Output
Digital outputs 1 to 8
High Low
The decentralized X2X Link backplane, which connects individual X67 modules with one another, is set up to be
self-addressing. Because of this, it is not necessary to set the node numbers. The module address is assigned
according to its position in the X2X Link line.
In certain cases, e.g. when configurations of modular machines change, it is necessary to define specific module
groups at a fixed address, regardless of the preceding modules in the line.
For this reason, the digital mixed module is equipped with node number switches that can be used to set the X2X
Link address. All subsequent modules refer to this offset and use it automatically for addressing purposes.
#10 #11 #12 #30 #31 #20 #21 #22 #50 #51 #52
X2X Link
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Name
1 1 24 VDC I/O power supply1)
2 24 VDC output supply1)
4
3 GND
4 GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1 1) Both supply pins must be supplied. Due to the division of the supply voltage, the output supply can be cut off
while the module continues to be supplied.
4
Information:
If the summation current of the outputs is >4 A, current must also be supplied via connector D, pin 2.
8.8.3.8 Pinout
X1 X5
Shield
1 +24 VDC
X2 X6
X1 to X8 2 Reserved
M12 ① 3 GND
4 DO
X3 X7
5 NC
X4 X8
8.8.3.8.1 Connections X1 to X8
4
1
5
+24 VDC 1 2
Actuator
DO
5 Connection X
GND
4 3
VDR
Output
Filter (tIN)
monitoring I/O status
LED (orange)
Status of the
Actuator supply
Short circuit
and overload protection
Monitoring the
I/O power supply +24 V
+24 V
2 2
Monitoring the
Output supply 1 4 1
4
C 3 3 D
Reverse polarity protection
I/O power supply
GND
Coil inductance
100 H 10 H
500
1H
Coil resistance [Ω]
100 mH
100
10 mH
12
0.1 1 10 100
The outputs of the module can handle up to 2 A. With a summation current of 8 A, no more than 4 channels are
operable at full load. To ensure optimal use of the module, it is important to assign the channels properly, and to
keep in mind a potential derating.
Correct channel assignment is important, since the 8 outputs are divided between 2 output drivers. The channels
operated with 2 A must therefore be evenly divided between both output drivers.
Output driver 1: Channels 1 to 4
Output driver 2: Channels 5 to 8
The following table provides an overview of the number of fully used channels, the resulting best distribution, and
a potential derating.
Number of channels using 2 A Division Derating
1 Any No
2 1st channel with 2 A ... channel no. 1 to 4 No
2nd channel with 2 A ... channel no. 5 to 8
3 Assign all even or all odd channel numbers.
Examples:
1, 3, 5 Channels 1 and 3
2, 4, 6 Channels 2 and 4
3, 5, 7 Channels 5 and 7
4, 6, 8 Channels 6 and 8
4 Assign all even or all odd channel numbers.
Possible divisions:
1, 3, 5, 7 On each channel
2, 4, 6, 8 On each channel
1.5
Output current [A]
0.5
0
-25 50 60
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
The actuator supply is monitored for each channel. The status of each individual channel can be read.
Name:
StatusSupplyOutput01 to StatusSupplyOutput08
The status of the actuator supply for digital outputs 1 to 8 is mapped in this register.
Data type Value
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusSupplyOutput01 0 Channel 01: Supply within valid range
1 Channel 01: Short circuit or overload
... ...
8 StatusSupplyOutput08 0 Channel 08: Supply within valid range
1 Channel 08: Short circuit or overload
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Input supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1 Reserved 0
2 Output supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
3-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
150 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
150 µs
8.9.1 Summary
Model number Short description Page
X67DV1311.L08 X67 digital valve control module, 16 digital outputs, 24 VDC, 0.1 A, 1 M16 connection, 16 digital inputs, 24 VDC, 655
sink, configurable input filter, M8 connectors, high-density module
X67DV1311.L12 X67 digital valve control module, 16 digital outputs, 24 VDC, 0.1 A, 1 M16 connection, 16 digital inputs, 24 VDC, 668
sink, configurable input filter, M12 connectors, high-density module
8.9.2 X67DV1311.L08
This module lets you control valve terminals using multi-pin technology. The digital inputs use M8 connectors.
■ Controlling valve manifolds with multi-pin technology
■ Up to 16 valves per valve manifold
■ 16 digital inputs for feedback
■ Separate feed for inputs and valve coils
■ Configurable digital input filter
■ All outputs with single channel diagnostics
■ Extensive additional status information
X2X Link
Connection A: Input
Connection B: Output
2 12
8
3 13
9 Digital inputs 1 to 16
4 14
5 15
10
6 16
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Name
1 1 24 VDC input supply1)
2 24 VDC output supply1)
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 C → Connector (female) in module, routing of I/O power supply
1
1) Dividing up the supply voltage can cause the power supply to the outputs to be cut off. The power supply of the inputs is maintained, however.
Information:
In order to achieve category 4 shutdown in accordance with EN 954-1, the entire I/O power supply
(supply via 2 pins) must be safely cut off.
8.9.2.8 Pinout
A DO 1
B DO 2
C DO 3
D DO 4
E DO 5
F DO 6
Valves
G DO 7
H DO 8
7 J DO 9
1 11 Valves
K DO 10
M16 ①
L DO 11
2 12
8 M GND
N DO 12
3 13
O DO 13
9 P DO 14
4 14
R DO 15
5 15 S DO 16
10 T NC
6 16 U GND
1 +24 VDC
X1 to X16
3 GND
M8 ②
4 DI x
GND
Valve U
DO A
A
Digital inputs
+24 VDC 4 1
Sensor
DI
Connection X
GND
3
24 V digital in 1…16
4
VDR 3 1
Input status Filter (t IN)
I/O status
LED (green)
+24 V
Monitoring the 2 2
output supply
1 4 4 1
C 3 3 D
Reverse polarity protection
input supply
GND
VDR
Reverse polarity protection
>30 V
output supply
Coil inductance
10000
1000 H
1000
10 H
240
0.1 1 10 100
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
ConfigOutput01
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (default value)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Name:
DigitalInput09 to DigitalInput16
This register indicates the input state of digital inputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput09 0 or 1 Input state - Digital input 9
... ...
7 DigitalInput16 0 or 1 Input state - Digital input 16
The output status is transferred to the output channels with a fixed offset (<60 µs) in relation to the network cycle
(SyncOut).
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
Name:
DigitalOutput09 to DigitalOutput16
This register is used to store the switching state of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput09 0 Digital output 09 reset
1 Digital output 09 set
... ...
7 DigitalOutput16 0 Digital output 16 reset
1 Digital output 16 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
StatusDigitalOutput09 to StatusDigitalOutput16
This register is used to indicate the status of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput09 0 Channel 09: No error
1 Channel 09: Short circuit or overload
... ...
7 StatusDigitalOutput16 0 Channel 16: No error
1 Channel 16: Short circuit or overload
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Input supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1 Reserved 0
2 Output supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
3-7 Reserved 0
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without filtering 150 µs
With filtering 200 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Without filtering 150 μs
With filtering 200 μs
8.9.3 X67DV1311.L12
This module lets you control valve terminals using multi-pin technology. The digital inputs use M12 connectors.
■ Controlling valve manifolds with multi-pin technology
■ Up to 16 valves per valve manifold
■ 16 digital inputs for feedback
■ Separate feed for inputs and valve coils
■ Configurable digital input filter
■ All outputs with single channel diagnostics
■ Extensive additional status information
X2X Link
Connection A: Input
Connection B: Output
1-1 5-1
1-2 5-2
2-1 6-1
2-2 6-2
3-1 7-1
Digital inputs 1 to 16
3-2 7-2
4-1 8-1
4-2 8-2
24 VDC I/O power supply
Connection C: Supply
Connection D: Routing
Left side / Channels 1 to 8 in the first byte Right side / Channels 9 to 16 in the second byte
Channel Connection Connection Channel
1 1-1 5-1 9
2 1-2 5-2 10
... ... ... ...
7 4-1 8-1 15
8 4-2 8-2 16
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 C Pin Name
1 1 24 VDC input supply1)
2 24 VDC output supply1)
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 C → Connector (female) in module, routing of I/O power supply
1
1) Dividing up the supply voltage can cause the power supply to the outputs to be cut off. The power supply of the inputs is maintained, however.
Information:
In order to achieve category 4 shutdown in accordance with EN 954-1, the entire I/O power supply
(supply via 2 pins) must be safely cut off.
8.9.3.8 Pinout
A DO 1
B DO 2
C DO 3
D DO 4
E DO 5
F DO 6
G DO 7
H DO 8
Valves
J DO 9
Valves
K DO 10
X1 X5
M16 ①
L DO 11
M GND
X2 X6 N DO 12
O DO 13
P DO 14
X3 X7 R DO 15
S DO 16
T NC
X4 X8
U GND
Shield
1 +24 VDC
X1 to X8 2 DI x-1
M12 ② 3 GND
4 DI x-2
5 NC
8.9.3.8.2 Connections X1 to X8
4
1
5
GND
U
Valve
DO A
A
Digital inputs
+24 VDC
Sensor 1
DI
GND 1 2
5 Connection X
+24 VDC
Sensor 2
4 3
DI
GND
24 V digital in 1-1/2…8-1/2
VDR
Input status x-1 Filter (tIN) 2
I/O status
LED (green) 5
1 3
VDR
Input status x-2 Filter (tIN)
I/O status
LED (green)
+24 V
Monitoring the 2 2
output supply 1 1
4 4
C 3 3 D
Reverse polarity protection
input supply
GND
VDR
Reverse polarity protection
>30 V
output supply
Coil inductance
10000
1000 H
1000
10 H
240
0.1 1 10 100
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
ConfigOutput01
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (default value)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8
Name:
DigitalInput09 to DigitalInput16
This register indicates the input state of digital inputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput09 0 or 1 Input state - Digital input 9
... ...
7 DigitalInput16 0 or 1 Input state - Digital input 16
The output status is transferred to the output channels with a fixed offset (<60 µs) in relation to the network cycle
(SyncOut).
Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set
Name:
DigitalOutput09 to DigitalOutput16
This register is used to store the switching state of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput09 0 Digital output 09 reset
1 Digital output 09 set
... ...
7 DigitalOutput16 0 Digital output 16 reset
1 Digital output 16 set
On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.
Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload
Name:
StatusDigitalOutput09 to StatusDigitalOutput16
This register is used to indicate the status of digital outputs 9 to 16.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 StatusDigitalOutput09 0 Channel 09: No error
1 Channel 09: Short circuit or overload
... ...
7 StatusDigitalOutput16 0 Channel 16: No error
1 Channel 16: Short circuit or overload
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Input supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1 Reserved 0
2 Output supply within / outside of the warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
3-7 Reserved 0
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without filtering 150 µs
With filtering 200 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Without filtering 150 μs
With filtering 200 μs
8.10.1 Summary
Model number Short description Page
X67IF1121-1 X67 interface module, 1 RS232 interface, 1 RS422/RS485 interface, 2 digital channels configurable as inputs 683
or outputs, 24 VDC, 0.5 A, configurable input filter, 2 inputs 24 VDC, sink, configurable input filter
8.10.2 X67IF1121-1
Serial interfaces (barcode scanners for example) are often scattered throughout systems. This interface module
from the remote X67 system is the optimal choice for this area of application: RS232 and RS485/RS422 connection
options directly where they are needed, distributed on the machine or system.
In addition, there are digital inputs and outputs on the same module so that corresponding 24 V sensors/actuators
can also be connected.
■ RS232 and RS485/RS422 usable in parallel
■ 2 digital channels, configurable as inputs or outputs
■ 2 digital inputs
■ Connection of barcode readers, ID systems and sensors on one module
1) Both LEDs are lit, but a mixed color is seen because there is only one light conductor.
X2X Link
Connection A: Input
Connection B: Output
Connection 1: RS232
Connection 3: RS485/RS422
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.10.2.8 Pinout
Shield
1 Reserved
X1 2 TxD
M12 ① 3 GND
4 RxD
5 Shield
Shield
1 TxD\
X2 2 TxD
M12 ① 3 RxD\
4 RxD
5 GND
Shield
1 +24 VDC
X3 to X4 2 AI-1
M12 ① 3 GND
4 AI-2
5 Shield
4
1
5
Connection 4
In the application displayed here, the proximity sensor and barcode reader are connected with the communication
module. The sensor activates the barcode scanner when a corresponding product arrives in the read area.
X20 control system
X67 I/O system
I/O status 5
VDR 1 3
LED (green)
Input status 1/2 Filter (tIN) 4
VDR
I/O status
LED (orange)
Input status 3/4 Filter (t IN)
2 2
1 4 4 1
C 3 3
D
Reverse polarity protection
GND
VDR
>30 V
Coil inductance
10 H 1H 100 mH
1000
10 mH
Coil resistance [Ω]
100
48
0.1 1 10 100 1000 5000
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
8.10.2.12.2 Function model 2 - Stream and Function model 254 - Cyclic stream
Function models "Stream" and "Cyclic stream" use a module-specific driver for the operating system. The interface
can be controlled using library "DvFrame" and reconfigured at runtime.
Function model - Stream
In function model "Stream", the CPU communicates with the module acyclically. The interface is relatively conve-
nient, but the timing is very imprecise.
Function model - Cyclic stream
Function model "Cyclic stream" was implemented later. From the application's point of view, there is no difference
between function models "Stream" and "Cyclic stream". Internally, however, the cyclic I/O registers are used to
ensure that communication follows deterministic timing.
Information:
• In order to use function models "Stream" and "Cyclic stream", you must be using B&R con-
trollers of type "SG4".
• These function models can only be used in X2X Link and POWERLINK networks.
Register Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Module - Configuration
- AsynSize -
Configuration
1294 InputFilter UINT ●
1281 OutputEnable USINT ●
6273 CfO_ErrorID0007 USINT ●
Communication
135 Input state of digital inputs 1 to 4 USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput04 Bit 3
129 Output status of the digital outputs USINT ●
DigitalOutput03 Bit 2
DigitalOutput04 Bit 3
133 Status of the digital outputs USINT ●
StatusDigitalOutput03 Bit 2
StatusDigitalOutput04 Bit 3
137 Status of the operating limits USINT ●
StatusSupplyVoltage Bit 0
Flatstream provides independent communication between an X2X Link master and the module. This interface was
implemented as a separate function model for the module. Serial information is transferred via cyclic input and
output registers. The sequence and control bytes are used to control the data stream (see section 9.2 "Flatstream
communication").
When using function model Flatstream, the user can choose whether to use library "AsFltGen" in Automation Studio
for implementation or to adapt Flatstream handling directly to the individual requirements of the application.
Register Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Configuration - I/O and status
1294 InputFilter UINT ●
1281 OutputEnable USINT ●
6273 CfO_ErrorID0007 USINT ●
Configuration - Interface
260 IF1CfgPhy UDINT ●
772 IF2CfgPhy UDINT ●
268 IF1phyBaud UDINT ●
780 IF2phyBaud UDINT ●
Configuration - Handshake
284 IF1hshCfg UDINT ●
796 IF2hshCfg UDINT ●
292 IF1hssXOnOff UDINT ●
804 IF2hssXOnOff UDINT ●
298 IF1hssPeriod UINT ●
810 IF2hssPeriod UINT ●
274 IF1hshInvTxF UINT ●
786 IF2hshInvTxF UINT ●
324 IF1rxlLockUnlock UDINT ●
836 IF2rxlLockUnlock UDINT ●
Configuration - Frame
332 IF1rxCtoEomSize UDINT ●
844 IF2rxCtoEomSize UDINT ●
364 IF1txCtoEomSize UDINT ●
876 IF2txCtoEomSize UDINT ●
340 IF1rxEomChar01 UDINT ●
852 IF2rxEomChar01 UDINT ●
348 IF1rxEomChar23 UDINT ●
860 IF2rxEomChar23 UDINT ●
372 IF1txEomChar01 UDINT ●
884 IF2txEomChar01 UDINT ●
380 IF1txEomChar23 UDINT ●
892 IF2txEomChar23 UDINT ●
Communication
135 Input state of digital inputs 1 to 4 USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput04 Bit 3
129 Output status of the digital outputs USINT ●
DigitalOutput03 Bit 2
DigitalOutput04 Bit 3
6145 Error message status bits USINT ●
IF1StartBitError Bit 0
IF1StopBitError Bit 1
IF1ParityError Bit 2
IF1RXoverrun Bit 3
IF2StartBitError Bit 4
IF2StopBitError Bit 5
IF2ParityError Bit 6
IF2RXoverrun Bit 7
6209 Acknowledging the status bits USINT ●
IF1QuitStartBitError Bit 0
IF1QuitStopBitError Bit 1
IF1QuitParityError Bit 2
IF1QuitRXoverrun Bit 3
IF2QuitStartBitError Bit 4
IF2QuitStopBitError Bit 5
IF2QuitParityError Bit 6
IF2QuitRXoverrun Bit 7
133 Status of the digital outputs USINT ●
StatusDigitalOutput03 Bit 2
StatusDigitalOutput04 Bit 3
137 Status of the operating limits USINT ●
Function model "Bus controller" is a reduced form of function model "Flatstream". Instead of up to 27 Tx / Rx bytes,
a maximum of 7 Tx / Rx bytes can be used.
Information:
It is not possible to change or expand the predefined configuration in this function model!
Register Offset1) Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Configuration - I/O and status
1294 - InputFilter UINT ●
1281 - OutputEnable USINT ●
6273 - CfO_ErrorID0007 USINT ●
Configuration - Interface
260 - IF1CfgPhy UDINT ●
772 - IF2CfgPhy UDINT ●
268 - IF1phyBaud UDINT ●
780 - IF2phyBaud UDINT ●
Configuration - Handshake
284 - IF1hshCfg UDINT ●
796 - IF2hshCfg UDINT ●
292 - IF1hssXOnOff UDINT ●
804 - IF2hssXOnOff UDINT ●
298 - IF1hssPeriod UINT ●
810 - IF2hssPeriod UINT ●
274 - IF1hshInvTxF UINT ●
786 - IF2hshInvTxF UINT ●
324 - IF1rxlLockUnlock UDINT ●
836 - IF2rxlLockUnlock UDINT ●
Configuration - Frame
332 - IF1rxCtoEomSize UDINT ●
844 - IF2rxCtoEomSize UDINT ●
364 - IF1txCtoEomSize UDINT ●
876 - IF2txCtoEomSize UDINT ●
340 - IF1rxEomChar01 UDINT ●
852 - IF2rxEomChar01 UDINT ●
348 - IF1rxEomChar23 UDINT ●
860 - IF2rxEomChar23 UDINT ●
372 - IF1txEomChar01 UDINT ●
884 - IF2txEomChar01 UDINT ●
380 - IF1txEomChar23 UDINT ●
892 - IF2txEomChar23 UDINT ●
Communication
135 18 Input state of digital inputs 1 to 4 USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput04 Bit 3
129 18 Output status of the digital outputs USINT ●
DigitalOutput03 Bit 2
DigitalOutput04 Bit 3
6145 16 Error message status bits USINT ●
IF1StartBitError Bit 0
IF1StopBitError Bit 1
IF1ParityError Bit 2
1) The offset specifies the position of the register within the CAN object.
2) A separate Flatstream is available for each interface.
Name:
InputFilter
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value
Name:
OutputEnable
This register configures channels 3 and 4 as either an input or output.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0-1 Reserved -
2 Channel 03 0 Configured as input
1 Configured as output
3 Channel 04 0 Configured as input
1 Configured as output
4-7 Reserved -
Name:
CfO_ErrorID0007
This register sets which error messages are forwarded to the application.
Data type Value
USINT See bit structure
Bit structure:
Bit Name Value Information
0 StartBitError - IF1 0 Ignore
1 Indicate faulty start bit
1 StopBitError - IF1 0 Ignore
1 Indicate faulty stop bit
2 ParityError - IF1 0 Ignore
1 Indicate faulty parity bit
3 RXoverrun - IF1 0 Ignore
1 Indicate overflow in the receive direction
4 StartBitError - IF2 0 Ignore
1 Indicate faulty start bit
5 StopBitError - IF2 0 Ignore
1 Indicate faulty stop bit
6 ParityError - IF2 0 Ignore
1 Indicate faulty parity bit
7 RXoverrun - IF2 0 Ignore
1 Indicate overflow in the receive direction
Name:
IF1CfgPhy to IF2CfgPhy
These registers are used to configure the interfaces. Only the corresponding interface values are permitted to be
used for each register.
• IF1CfgPhy configures RS232 interface
• IF2CfgPhy configures RS422/485 interface
After all other configuration registers have been written, the last write command must enable the interface. If pa-
rameters need to be changed, the interface must first be disabled.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0-7 Parity bit configuration1) 48 "0" - (low) bit is always 0
49 "1" - (high) bit is always 1
69 "E" - (even) even parity (default)
78 "N" - (no) no bit
79 "O" - (odd) odd parity
8 - 15 Number of stop bits 2 1 stop bit (default)
4 2 stop bits
16 - 23 Number of data bits per character 7 7 data bits
8 8 data bits (default)
24 - 31 Interface mode 0 Interface disabled (default)
2 RS232 interface active
4 RS422 interface active2)
5 RS422 interface active as bus3)
6 RS485 interface active with echo
7 RS485 interface active without echo
Name:
IF1phyBaud to IF2phyBaud
This register sets the baud rate of the interface in bit/s.
Data type Value Function
UDINT 1200 1.2 kbaud
2400 2.4 kbaud
4800 4.8 kbaud
9600 9.6 kbaud
19200 19.2 kbaud
38400 38.4 kbaud
57600 57.6 kbaud
115200 115.2 kbaud
In order to guarantee that serial communication runs smoothly, the size of the receive buffer in the module must
be known. In addition, the user can configure a software or hardware handshake algorithm.
Name:
IF1hshCfg to IF2hshCfg
This register configures how the hardware RTS handshake line is controlled depending on the fill level of the receive
buffer in addition to generally enabling frame detection on the hardware side.
The RTS line is enabled as long as data is being sent. This Tx-Framing mode can be used to control external
interface converters.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0-7 Frame detection 0 RTS line freely available for other flow control methods (default)
16 Tx frame detection switched on for RTS line
80 Tx frame detection switched on for RTS line (without echo)
8 - 15 Flow control 0 RTS line freely available for other flow control methods (default)
16 RTS line controlled by the fill level of the receive buffer
16 - 31 Reserved 0
Name:
IF1hssXOnOff to IF2hssXOnOff
These registers configure the XOn and XOff control characters, which are used for flow control via software hand-
shake. Valid XOn/XOff control characters must be defined in order to ensure proper functionality.
The default values are XOn (17) and XOff (19), but other values can also be used.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 15 XOff control character 19 Default XOff ASCII character
65535 No software handshake (default)
16 - 31 XOn control character 17 Default XOn ASCII character
65535 No software handshake (default)
Name:
IF1hssPeriod to IF2hssPeriod
When using a software handshake, some applications require periodic repetition of the current status. The repeat
time can be defined in this register in ms for this purpose.
Data type Value Function
UINT 0 Automatic status repetition disabled
500 to 10000 Repeat time in ms (default = 5000)
Name:
IF1hshInvTxF to IF2hshInvTxF
This register can be used to create a logical inverse of the RTS/CTS signals.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0-7 Mask TX signal 0 No masking (default)
1 Mask CTS signal
8 - 15 Invert signals 0 Inverse off (default)
1 CTS signal inversion on
16 RTS signal inversion on
17 CTS and RTS signal inversion on
Name:
IF1rxlLockUnlock to IF2rxlLockUnlock
The two registers "Lock" and "Unlock" can be used for "flow control" monitoring of the communication. If the amount
of data from the module input exceeds the value of register "Lock", flow control switches to state "Passive". To
return to state "Active" or "Ready", the amount of data in the receive buffer must fall below the default value of
register "Unlock".
Information:
These registers simulate the behavior of a Schmitt trigger, so the value of register "Lock" must be
greater than the value of register "Unlock".
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 15 Lower limit of the receive buffer 0 to 4095 (default = 512)
16 - 31 Upper limit of the receive buffer 0 to 4095 (default = 1024)
Different message termination codes can be specified in order to correctly create transmitted Tx frames and cor-
rectly interpret received Rx frames.
Name:
IF1rxCtoEomSize to IF2rxCtoEomSize
This register is used to configure the maximum number of bytes of the receive frame and the duration until a receive
timeout is triggered.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 15 Maximum number of bytes of the receive frame 0 Function disabled
1 to 4096 Configurable receive frame length in characters (default = 256)
16 - 31 Duration until a receive timeout is triggered. 0 Function disabled
1 to 65535 Receive timeout in characters (default = 4)
Name:
IF1txCtoEomSize to IF2txCtoEomSize
This register is used to configure the maximum byte number of the transmit frame and the duration until a transmit
timeout is triggered.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 15 Maximum number of bytes of the transmit frame 0 Function disabled
1 to 4096 Configurable transmit frame length in characters (default = 256)
16 - 31 Transmit timeout 0 Function disabled
1 to 65535 Transmit timeout in characters (default = 5)
Transmit timeout
No characters are transmitted for the specified time. The time is specified here in characters to ensure that it is
independent of the transfer rate. The number of characters is then multiplied by the time needed to transfer a
character.
Name:
IF1rxEomChar01 to IF2rxEomChar01
IF1rxEomChar23 to IF2rxEomChar23
It is possible to configure a receive terminator for all registers.
All 4 characters are equal. The message is considered to be terminated as soon as one of the defined characters
is transferred.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 15 2. Character: IF1rxEomChar01 0 to 255 Frame terminator (ASCII code)
4. Character: IF1rxEomChar23 65535 Function disabled (default)
16 - 31 1. Character: IF2rxEomChar01 0 to 255 Frame terminator (ASCII code)
3. Character: IF2rxEomChar23 65535 Function disabled (default)
Name:
IF1txEomChar01 to IF2txEomChar01
IF1txEomChar23 to IF2txEomChar23
It is possible to configure a transmit terminator for all registers.
All 4 characters are equal. The message is considered to be terminated as soon as one of the defined characters
is transferred.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 15 2. Character: IF1txEomChar01 0 to 255 Frame terminator (ASCII code)
4. Character: IF1txEomChar23 65535 Function disabled (default)
16 - 31 1. Character: IF2txEomChar01 0 to 255 Frame terminator (ASCII code)
3. Character: IF2txEomChar23 65535 Function disabled (default)
Name:
IF1CfgMTU to IF2CfgMTU
These registers configure the Maximum Transmission Unit settings. For a description, see the corresponding sec-
tion in "Flatstream communication" on page 960.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0-7 Number of unacknowledged sequences 1 to 7 Default = 1
8 Flatstream mode (bit 0) 0 Multiple segments not permitted (default)
1 Multiple segments permitted within MTU
9 Flatstream mode (bit 1) 0 Maximum segment size is MTU size (default)
1 Segment size can exceed MTU size
10 - 15 Reserved -
16 - 23 Number of enabled Tx and Rx bytes (InputMTU size) 1 to 27 Default = 71)
24 - 31 Number of enabled Tx and Rx bytes (OutputMTU size) 1 to 27 Default = 71)
1) The size cannot be altered in function model 254 - Bus controller. Fixed length = 7.
8.10.2.12.10 Communication
Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.
Name:
DigitalInput01 to DigitalInput04
This register indicates the input state of digital inputs 1 to 4.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input status of digital input 1
... ...
3 DigitalInput04 0 or 1 Input status of digital input 4
The output status is transferred to the output channels with a fixed offset (<60 µs) in relation to the network cycle
(SyncOut).
Name:
DigitalOutput03 to DigitalOutput04
This register is used to store the switching state of digital outputs 3 to 4.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0-1 Reserved -
2 DigitalOutput03 0 Digital output 03 reset
1 Digital output 03 set
3 DigitalOutput04 0 Digital output 04 reset
1 Digital output 04 set
4-7 Reserved -
Name:
StatusDigitalOutput03 to StatusDigitalOutput04
This register is used to indicate the status of digital outputs 3 and 4.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Reserved -
2 StatusDigitalOutput03 0 Channel 03: No error
1 Channel 03: Short circuit or overload
3 StatusDigitalOutput04 0 Channel 04: No error
1 Channel 04: Short circuit or overload
4-7 Reserved -
Name:
IF1StartBitError to IF2StartBitError
IF1StopBitError to IF2StopBitError
IF1ParityError to IF2ParityError
IF1RXoverrun to IF2RXoverrun
This register transfers the individual bits that indicate an error. If a error occurs, the corresponding bit is set and
maintained until it is acknowledged.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 IF1StartBitError 0 No error
1 Start bit error occurred1)
1 IF1StopBitError 0 No error
1 Stop bit error occurred1)
2 IF1ParityError 0 No error
1 Parity bit error occurred1)
3 IF1RXoverrun 0 No error
1 Receive buffer overflow occurred2)
4 IF2StartBitError 0 No error
1 Start bit error occurred1)
5 IF2StopBitError 0 No error
1 Stop bit error occurred1)
6 IF2ParityError 0 No error
1 Parity bit error occurred1)
7 IF2RXoverrun 0 No error
1 Receive buffer overflow occurred2)
1) This error can result from things such as mismatched interface configurations or problems with the wiring.
2) This data point reports a receive buffer overrun. The buffer capacity on the module is exhausted and all subsequent data arriving at the interface is lost. An
overrun always means that the data received on the module is not read fast enough by the higher-level system.
The solution here is to optimize the cycle times of all transfer routes and task classes involved and utilize the available handshake options.
Name:
IF1QuitStartBitError to IF2QuitStartBitError
IF1QuitStopBitError to IF2QuitStopBitError
IF1QuitParityError to IF2QuitParityError
IF1QuitRXoverrun to IF2QuitRXoverrun
This register is used to transfer the individual bits that acknowledge an indicated error state. After one of the bits
has been set, it can be reset using the corresponding acknowledgment bit.
If the error is still actively pending, the error status bit is not deleted. The acknowledgment bit can only be reset
if the error status bit is no longer set.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 IF1QuitStartBitError 0 No acknowledgment
1 Acknowledge start bit error
1 IF1QuitStopBitError 0 No acknowledgment
1 Acknowledge stop bit error
2 IF1QuitParityError 0 No acknowledgment
1 Acknowledge parity bit error
3 IF1QuitRXoverrun 0 No acknowledgment
1 Acknowledge receive buffer overflow error
4 IF2QuitStartBitError 0 No acknowledgment
1 Acknowledge start bit error
5 IF2QuitStopBitError 0 No acknowledgment
1 Acknowledge stop bit error
6 IF2QuitParityError 0 No acknowledgment
1 Acknowledge parity bit error
7 IF2QuitRXoverrun 0 No acknowledgment
1 Acknowledge receive buffer overflow error
Name:
StatusSupplyVoltage
This register can be used to read the status of the operating limits.
Data type Value
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 StatusSupplyVoltage 0 I/O power supply within the warning limits (18 to 30 V)
1 I/O power supply outside the warning limits (<18 V or >30 V)
1-7 Reserved 0
When using FlatStream communication, the module acts as a bridge between the X2X Link master and an intelligent
field device connected to the module. FlatStream mode can be used for either point-to-point connections as well
as for multidrop systems. Specific algorithms such as timeout and checksum monitoring are usually managed
automatically. During normal operation, the user does not have access to these details.
In a serial network, the module is always the master (DTE). Various adjustments can be made to ensure that
signals are transmitted without errors.
The user can, for example, define a handshake algorithm or set the baud rate in order to adapt the transmission
quality to the requirements of the application.
Operation
When using FlatStream, the general structure of the FlatStream frame must be maintained.
Input/Output sequence Tx/Rx bytes
(unchanged) Control byte (unchanged) Serial frame (without hand-
shake or similar measures)
Name:
AsynSize
When the stream is used, data is exchanged internally between the module and CPU. For this purpose, a defined
amount of acyclic bytes is reserved for this slot.
Increasing the acyclic frame size leads to increased data throughput on this slot.
Information:
This configuration involves a driver setting that cannot be changed during runtime!
Data type Value Information
- 8 to 28 Acyclic frame size in bytes. Default = 24
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
200 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
200 µs
8.11.1 Summary
Model number Short description Page
X67HB8880.L12 X67 8-port industrial hub (layer 2), 10/100 Mbit/s with autonegotiation, automatic MDIX, 8x M12, 8-32 VDC 704
8.11.2 X67HB8880.L12
The Ethernet hub is a standalone device that can be used universally as a hub in POWERLINK networks. It is
suitable for both 100 Mbit/s (Fast Ethernet) and 10 Mbit/s networks. The hub automatically recognizes the transfer
speed for the channels.
The Ethernet connections are made using D-keyed M12 connectors. All ports are equipped with auto-MDIX (au-
to-crossover).
The module is designed for a voltage range of 8 to 32 VDC and equipped with a power supply protected against
load dump.
• 8-port industrial hub
• Large voltage range of 8 to 32 VDC
• Load dump protection
Ethernet interfaces 1 to 8
8-1 8-2
Status display
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
X1 to X8 Pin Name
1 TXD Transmit data
2
2 RXD Receive data
3 TXD\ Transmit data\
1
4 RXD\ Receive data\
Shield connection made via threaded insert in the module
3
4 A → D-keyed (female), input
The module supply is connected via M8 connectors C and D. The I/O power supply is connected via connector C
(male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permitted current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 12/24 VDC1)
2 12/24 VDC1)
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
Information:
This section applies to the use of Ethernet networks, not POWERLINK networks.
According to Ethernet specification IEEE 802.3, the transmission duration of a frame of minimum length must
always be greater than the round-trip delay time (RTD). RTD is the time needed by a data packet to travel from
one end of the network to the other.
If this is not observed, collision detection can no longer be guaranteed.
Illustration of RTD
2 * Maximum length = RTD
Station Station
A Z
When using copper cables, the maximum distance is generally 100 m. Since there are often many different devices
with different PHYs in a network, the propagation delay of the frames changes due to the different latency of each
PHY. This also affects the network size, and collision detection can no longer be guaranteed at 100 m.
Example for calculating the network reach with devices between 2 stations
Corresponding to the previous example, the following situation occurs in a network with 3 hubs and 100 m cables:
• The transmission duration of a frame of minimum length is 5.76 µs.
Calculation procedure
1. Propagation delay in cable and hub
– 100 m cable = 0.5 µs
– 3 hubs = 3 x 1 µs
2. Calculation of total propagation delay
– Outbound/Inbound propagation delay
Result
Collision detection is not possible since the total time of 7 µs is greater than the minimum Ethernet
propagation delay of 5.76 µs.
The ≈1.3 µs missing for collision detection can only be recovered by removing a hub.
8.11.2.9 Derating
The module may become warm depending on the number of ports in use.
100°C
94.5°C
Maximum
Module temperature
80°C
Module temperature
4 ports
5 ports
60°C 8 ports
40°C
20°C
0°C
80°C 70°C 60°C 50°C 25°C
Ambient temperature
Note:
The maximum module temperature of 94.5°C is not permitted to be exceeded at any time since this will
result in irreparable damage to the module.
8.12.1 Summary
Model number Short description Page
X67MM2436 X67 PWM motor module, I/O power supply 24-38.5 VDC ±25%, 2 PWM motor bridges, 3 A continuous current, 711
5 A peak current, 2x 3 digital inputs 24 VDC, sink, configurable as incremental encoder
X67SM2436 X67 stepper motor module, I/O power supply 24-38.5 VDC ±25%, max. 8 A, 2 motor connections, 3 A continuous 731
current, 5 A peak current, 2x 3 digital inputs 24 VDC, sink, configurable as incremental encoder, NetTime
function
X67SM4320 X67 stepper motor module, I/O power supply 24 VDC ±25%, 4 motor connections, 1 A continuous current, 1.5 786
A peak current
8.12.2 X67MM2436
This motor bridge module is used to control 2 DC motors with a nominal voltage of 24 to 38.5 VDC ±25% at a
nominal current up to 3 A. The module can be reconfigured and used in current controller mode for controlling
inductive loads. The module is also equipped with 6 digital inputs, which can be used as incremental counters.
Each motor is controlled with a full-bridge (H-bridge). This enables the motors to be moved in both directions.
• 2x outputs (H bridge) with PWM control and 24 to 38.5 VDC ±25% supply
– Sink connection
– Integrated sensor supply with short circuit protection
– 1-wire connections
– 24 VDC and GND for encoder supply
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected using circular connectors (M8, 4-pin). The supply is connected via connector
C (male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current per supply is 4 A (in summation 8 A)!
Connection Pinout
2 Pin Name
1 1 24 to 38.5 VDC ±25%
2 24 to 38.5 VDC ±25%
4
3 GND
4 GND
3
C → Connector (male) in module, supply
D → Connector (female) in module, routing
2
1
8.12.2.8 Pinout
Shield
1 PWM +
X1 to X2 2 NC
M12 ① 3 NC
4 PWM -
5 Shield
Shield
1 +24 VDC
X3 to X4 2 A
M12 ① 3 GND
4 B
5 R
Warning!
Circular connectors are not permitted to be plugged in or unplugged during operation.
Information:
Shielded motor cables must be used in order to meet the limits according to the EN55011 standard
(emissions).
Information:
The maximum permitted current for the digital inputs is 8 A (4 A per connection pin).
M12, 5-pin Pinout
Connections 3 and 4 Pin Connection 31) Connection 41)
1 Supply for digital inputs (24 V, total current 0.02 A)
3
2 2 Digital input 1, ABR1 - A Digital input 4, ABR2 - A
3 GND GND
4 Digital input 2, ABR1 - B Digital input 5, ABR2 - B
5 Digital input 3, ABR1 - R, Latch_1 Digital input 6, ABR2 - R, Latch_2
4
Shield connection made via threaded insert in the module
1
5
1) All digital inputs: 24 V / <4 μs
Warning!
Circular connectors are not permitted to be plugged in or unplugged during operation.
Every input always retains its function as a digital input. The special functions are additional functions that the
digital input can perform. It is also possible for a channel to perform two functions at once. For example input 3 can
be used simultaneously as both limit switch 1 and a trigger input that starts the trigger counter.
PWM + 1 2
Valve
PWM
5 Connection x
PWM -
4 3
+24 VDC
ABR counter
1 2
GND
A 5 Connection x
B
4 3
R
24 - 38.5 V ±25%
HPWM +
PWM 1/2 +
LPWM +
1 2
5 X1/X2
HPWM - 4
3
PWM 1/2 -
LPWM -
Comp PWM
24 V / 20 mA
Sensor supply
X3/X4
E1/E4
E2/E5
1 2
E3/E6
VDR 5
E1 - E6
4 Internal electronics
3 VDR
24 V / 20 mA 24 V / 20 mA 24 - 38.5 V ±25%
Sensor supply Sensor supply
X3 pin 1 X4 pin 1
Power supply
24 V
Transil diode
48 V
VDR
GND
<30 V
8.12.2.13 Installation
Top-hat rail installation can only be recommended if the module is used for low power ratings.
To improve heat dissipation, we recommended mounting the module on a cooler part of the machine or on a base
plate that is at least 1 dm². A minimum distance of 1 cm must be maintained between X67 modules.
The I/O power supply voltage is monitored. Its status can be read. The error "Module power supply error" occurs
when the voltage falls below 18 V or rises above 50 V.
Overvoltage cutoff
If the supply voltage on the module exceeds 50 V (e.g. through feedback during generator operation), then both
PWM outputs are switched off (PWM output pins are shorted). The outputs are enabled again as soon as the
supply voltage is back in the valid range.
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
8.12.2.16.3 Configuration
Switched off
Current mode
At the beginning of each period, the current output is switched on. After reaching the value set in PulseWidthCur-
rentPWM, the output is switched off and the voltage drops according to the decay configuration until switched
back on.
Switched off
Name:
This register can be used to set the period duration between 20 μs (50 kHz) and 65535 μs (15 Hz). See also
"Registers for "Standard PWM/current mode" operating mode" on page 720.
Data type Value Information
UINT 20 to 65535 Time in µs
Name:
PulseWidthCurrentPWM01 to PulseWidthCurrentPWM04
The PWM pulse width (PWM mode) or current setting (in current mode) is entered in this register according to
the setting in the module configuration register. (see also "Registers for "Standard PWM/current mode" operating
mode" on page 720.) A negative value changes the output polarity.
PWM mode
Data type Value Output + Output -
INT 32767 High Low
16384 PWM 50/50 Low
0 Low Low
-16384 Low PWM 50/50
-32767 Low High
Current mode
Data type Value Current mode
INT 19661 to 32767 3 to 5 A (max. 2 s)
19660 3A
0 0A
-19660 -3 A
-19661 to -32767 -3 to -5 A (max. 2 s)
Resolution/Derating
As mentioned earlier in the technical data, the PWM resolution is 15-bit (+ sign). This value is derated for a period
duration of less than 328 µs because of the minimal PWM timing resolution (10 ns) (see following diagram). With
the minimum PWM period duration of 20 µs, the PWM has 11-bit resolution (+ sign):
16
15
14
Resolution (bit)
15-bit at 328 µs
13
11-bit at 20 µs
12
11
10
10 100 1000
Period duration (µs)
Name:
ConfigOutput05 to ConfigOutput06
This register can be used to configure the counters.
This function is available beginning with firmware version ≥8.
Data type Value
USINT See bit structure.
Counter Name E1 E2 E3
1 ConfigOutput05 DI 1 DI 2 DI 3
2 ConfigOutput06 DI 4 DI 5 DI 6
Bit structure:
Bit Description Value Information
0-2 Sets the type of counter. 000 ABR counter with 4x evaluation (A = E1, B = E2, R = E3)
001 Event counter (E1)
010 Period measurement (E1)
011 Gate measurement (E1)
100 ABR counter with 4x evaluation (A = E1, B = E2).
101 to 111 No counter. Counter is disabled and not shown in the I/O map-
ping.
3 Start the counter 0 Start at rising edge on E1)
1 Start at falling edge on E1)
4-5 Set the counter frequency for gate or period measurement 00 4 MHz
01 Externally via E3
10 31.25 kHz
11 Reserved
6-7 Reserved -
Name:
ConfigOutput04
The behavior of the latch and the trigger function is configured in this register.
Bits 0 to 1 and 4 to 5 are used to configure the time for the counters at which the latch event occurs for applying the
counter value to the "Counter latch 1/2" register. This setting is only relevant if the latch function has been enabled
in the configuration register (see "Configure the counter latch" on page 722).
The setting "Counter 1/2 latch unconditional" means that the latch event is triggered by activation of the latch
function.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Counter 1 latch 00 Counter 1 latch unconditional
01 Counter 1 latch on rising edge of input 3 (R pulse)
10 Counter 1 latch on falling edge of input 3 (R pulse)
11 Reserved
1 StartLatch02 0 The latch function for counter 2 is deactivated at the falling edge
of this bit
1 The latch function for counter 2 is activated at the rising edge
of this bit
2 Latch mode counter 1 0 Single shot
1 Continuous1)
3 Latch mode counter 2 0 Single shot
1 Continuous1)
4-5 Counter latch 2 00 Counter 2 latch unconditional
01 Counter 2 latch on rising edge of input 6 (R pulse)
10 Counter 2 latch on falling edge of input 6 (R pulse)
11 Reserved
6-7 Trigger input 00 No trigger input
01 Input 3 used as trigger input
10 Input 6 used as trigger input
11 Reserved
Name:
ConfigOutput03
The output control for each motor and the limit switches can be configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Output 1 0 PWM control
1 Current control
1 Output 2 0 PWM control
1 Current control
2-3 Limit switch 1 00 Limit switch disabled
01 Trigger edge for limit switch: Rising edge on input 3
10 Trigger edge for limit switch: Falling edge on input 3
11 Reserved (limit switch disabled)
4-5 Limit switch 2 00 Limit switch disabled
01 Trigger edge for limit switch: Rising edge on input 6
10 Trigger edge for limit switch: Falling edge on input 6
11 Reserved (limit switch disabled)
6-7 Reserved -
Name:
DecayConfig
The decay configuration determines the method and dynamics of current reduction for inductive loads or motors.
"Slow decay" is configured by default. In this mode, the current is automatically reduced relatively slowly with
resistance in the load. No energy is regenerated into the module.
"Mixed decay" mode is recommended for applications that require a dynamic and linear reduction of current. In
this mode, energy is regenerated into the module during part of the PWM cycle (fast decay).
This function is available beginning with firmware version ≥6.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 PWM 1 00 Slow decay (default setting)
01 Mixed decay
10 to 11 Reserved
2-3 Reserved 0
4-5 PWM 2 00 Slow decay (default setting)
01 Mixed decay
10 to 11 Reserved
6-7 Reserved 0
Mixed decay
As its name suggests, mixed decay mode is a mix of "slow decay" and "fast decay". This occurs as follows:
A check is made at the beginning of each PWM cycle to determine if the actual current for the phases is below the
current setpoint. If this is the case, PWM is enabled (On) until the set current is reached. The system switches to
fast decay mode for the rest of the first half of the PWM cycle. If the current setpoint has already been exceeded at
the beginning of the PWM cycle (generator operation), the system immediately switches to fast decay mode. The
second half of the PWM cycle always takes place in slow decay mode.
This also permits generator operation as long as the valid range for the supply voltage has not been exceeded
due to the regeneration into the DC circuit.
On Fast decay Slow decay
I I I
Off Off Off
On Slow decay On
Fast decay
Slow decay
PWM frequency
Operating DC motors
In PWM mode, the motor current is limited to the maximum current (5 A), independent of the supply voltage.
However, the motor switches to generator operation when braking. Because of the counter EMF, which is depen-
dent on the rotary speed, a current is generated in the module that is only limited by the internal resistance of the
motor. This is not permitted to exceed 7 A (maximum 2 seconds).
The counter EMF closely corresponds to the voltage needed to achieve this speed. Therefore, the maximum brake
current is very easy to calculate with the following formula.
Example:
Module supply 38 V
Pulse width 16364 (equal to 50%)
Internal resistance of motor 3.5 Ω
8.12.2.16.3.8 Dither
When the position setpoint for valves remains constant for a long period of time, especially in fluids, there is a risk
that a valve will stick. This is normally prevented using "dithering". When doing so, the value is permitted to slightly
oscillate around the position setpoint.
By default, the dither is active for both outputs as soon as the dither amplitude and dither frequency are set to a
value >0. If necessary, the dither can be disabled for each output individually or simultaneously (see bit 6 and 7 in
register "Error acknowledgment and dither switch-off" on page 729).
Dither amplitude
Name:
ConfigOutput01
This register can be used to configure the amplitude value or pulse width.
Data type Value Information
USINT 0 to 255 Current mode: 0 to 25.5% of the module's nominal current1)
PWM mode: 0 to 25.5% of the period duration
Dither frequency
Name:
ConfigOutput02
This register can be used to set the frequency in 2 Hz steps.
Data type Value Information
USINT 0 to 255 Corresponds to 0 to 510 Hz
Dither example
The values specified in the data sheet for a valve should be used to calculate Dither amplitude and Dither frequency.
Selected values
These values correspond to the average values on the value data sheet.
ADither = 27% of the valve's nominal current (peak values)
FDither = 56 Hz
Formulas
Dither amplitude = (ADither / 2) * (Nominal currentValve / Nominal currentModule) * 10
Information: (ADither / 2) = conversion of the peak values to amplitude; " * 10" = scaling of the dither amplitude
to 1/10%
Dither frequency = FDither / 2 Hz
Info: Dither frequency is configured in 2 Hz steps
Calculation
By using the selected values in the formulas.
Dither frequency = 56 Hz / 2 Hz = 28
Dither amplitude
Current
Current setpoint
Time
8.12.2.16.4 Communication
8.12.2.16.4.1 Counter
Name:
Counter01 to Counter02
This register indicates the status of counters 1 and 2. The counter configuration is described in section "Counter
configuration" on page 722.
The following counter types or measurements can be configured starting with firmware version 8:
• AB counter
• ABR counter ("single shot" or "continuous")
• Event counter
• Period measurement
• Gate measurement
Data type Values
INT -32768 to 32767
Name:
CounterLatch01 to CounterLatch02
The current value for the respective counter is saved in this register when a latch event occurs.
Data type Values
INT -32768 to 32767
Name:
StatusInput01 to StatusInput06
This register is used to indicate the status of the inputs.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 StatusInput01 0 or 1 Logical state of input 1
... ...
5 StatusInput06 0 or 1 Logical state of input 6
6-7 Reserved -
Name:
StatusInput07 to StatusInput08
LatchDone01 to LatchDone02
TriggerInput
This register is used to indicate the status of the counter and latch function.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 StatusInput07 0 Latch function for counter 1 has been enabled (see "Configure
the counter latch" on page 722). Resister "counter latch 1" on
page 727 does not contain a valid value.
1 Counter 1 has been latched
1 LatchDone01 0 or 1 Bit state changes each time counter 1 is successfully latched
(reset value = 0)
2 StatusInput08 0 Latch function for counter 2 has been enabled (see "Configure
the counter latch" on page 722). Resister "counter latch 1" on
page 727 does not contain a valid value.
1 Counter 2 has been latched
3 LatchDone02 0 or 1 Bit state changes each time counter 2 is successfully latched
(reset value = 0)
4 TriggerInput 0 or 1 Trigger input state (level)
5 Reserved -
61) Counter overflow 1 0 Period duration or gate measurements of counter 1 are within
the valid range (0x0 to 0xFFFF). The bit is only valid if overflow
detection is enabled (bit 2 = 1 in the "Error acknowledgment and
dither switch-off" on page 729 register).
1 Overflow during period duration or gate measurement (reset
with bit 2 = 0 in the "Error acknowledgment and dither switch-
off" on page 729 register).
71) Counter overflow 2 0 Period duration or gate measurements of counter 2 are within
the valid range (0x0 to 0xFFFF). The bit is only valid if overflow
detection is enabled (bit 3 = 1 in the "Error acknowledgment and
dither switch-off" on page 729 register).
1 Overflow during period duration or gate measurement (reset
with bit 3 = 0 in the "Error acknowledgment and dither switch-
off" on page 729 register).
Name:
UnderVoltageError
OverVoltageError
OvertemperatureError
OpenLoadError01 to OpenLoadError02
OverCurrentError01 to OverCurrentError02
If an error is detected, the corresponding error bit remains set in this register until the error is acknowledged (see
"Error acknowledgment and dither switch-off" on page 729).
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 UnderVoltageError 0 No error
1 Lower limit of I/O power supply <18 V
1 OverVoltageError 0 No error
1 Upper limit of I/O power supply >50 V
2 OvertemperatureError 0 No error
1 Overtemperature
3 Reserved -
4 CurrentError01 0 No error
1 Open load error Output 1
5 OverCurrentError01 0 No error
1 Overcurrent error Output 1
6 CurrentError02 0 No error
1 Open load error Output 2
7 OverCurrentError02 0 No error
1 Overcurrent error Output 2
Overcurrent error
An overcurrent error is registered if one of the following conditions is met:
• ≥5 A flow from a PWM output for at least 2 seconds
• ≥8 A flow for 3 consecutive PWM cycles
In both cases, the affected PWM output is deactivated by the firmware (i.e. the pins on the PWM output are short-
circuited). The user must acknowledge the error (see "Error acknowledgment and dither switch-off" on page 729)
before a PWM output disabled in this manner can be made operational again.
Name:
ClearError01 to ClearError02
CounterOverflowDetectEnable01 to CounterOverflowDetectEnable02
CounterReset01 to CounterReset02
DitherDisable01 to DitherDisable02
FrequencyPrescale01 to FrequencyPrescale02
This register can be used to acknowledge errors; to enable/disable overflow detection, counters and dither; and
to set a prescaler for the frequency domains.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 ClearError01 0 No effect
1 Error acknowledgment on output 1 (overcurrent or open load) or
acknowledgment from limit switch 1
1 ClearError02 0 No effect
1 Error acknowledgment on output 2 (overcurrent or open load) or
acknowledgment from limit switch 2
21) CounterOverflowDetectEnable01 0 Overflow detection disabled. Bit 6 in the counter status register
is reset (see section "Input status" on page 727)
1 Counter 1: Overflow detection enabled
31) CounterOverflowDetectEnable02 0 Overflow detection disabled. Bit 7 in the counter status register
is reset (see section "Input status" on page 727)
1 Counter 2: Overflow detection enabled
41) CounterReset01 0 Counter 1 is enabled (default).
1 Counter 1 is set to 0 and disabled. If counter 1 is configured as
an ABR counter (see section "Counter configuration" on page
722), then counter latch 1 is also set to 0.
51) CounterReset02 0 Counter 2 is enabled (default).
1 Counter 2 is set to 0 and disabled. If counter 2 is configured as
an ABR counter (see section "Counter configuration" on page
722), then counter latch 2 is also set to 0.
6 DitherDisable01 0 Dither for PWM output 1 is enabled (default). The dither frequen-
cy and dither amplitude must be >0 (see "Dither" on page 725).
1 Dither for PWM output 1 is disabled.
7 DitherDisable02 0 Dither for PWM output 2 is enabled (default). The dither frequen-
cy and dither amplitude must be >0 (see "Dither" on page 725).
1 Dither for PWM output 2 is disabled.
Name:
usSinceTrigger
This register indicates the time (in µs) that has passed since the trigger event occurred (see "Configure the counter
latch" on page 722).
Data type Values
UINT 0 to 65,535
8.12.2.16.4.8 Temperature
Name:
Temperature01
The module temperature is displayed in this register.
Data type Value Information
SINT -40 to 125 Module temperature in °C
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
250 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
250 µs
8.12.3 X67SM2436
This stepper motor module is used to control up to 2 stepper motors with a rated voltage of 24 to 38.5 VDC ±25%
at a motor current of up to 3 A (5 A peak).
Additionally, this module has 6 digital inputs that can be used as limit switches or as encoder inputs.
Individually adjusting the coil currents allows the motor to be operated with only the current it actually needs. This
simplifies selection of the available motors and prevents unnecessary heating. Because the latter reduces energy
consumption and thermal load, the effects are positive on the lifespan of the entire system. Complete flexibility
is achieved by using the values for holding current, boost current and nominal current, which are completely inde-
pendent of each other. The current for microsteps is automatically adjusted to the configured current values.
The automatic motor identification system is an enormous help during standstills. The stepper motor modules can
identify the connected motors using their coil characteristics and generate feedback in the form of an analog value.
This makes it possible to detect not only wiring errors, but also incorrect motor types that are being used mistakenly.
A stall detection mechanism is integrated to analyze the motor load. A stall is recognized using a configurable
threshold. This allows an overload or motor standstill to be detected precisely in many different types of applications.
■ 2 stepper motors, 24 to 38.5 VDC ±25%, 3 A (5 A peak)
■ Current value resolution of 1%
■ Boost, nominal and holding current configured independent of each other
■ 38.5 kHz PWM frequency
■ Integrated motor detection
■ 256 microsteps
■ Stall detection
■ Complete integration in Automation Studio and CNC applications
■ 2x 3 inputs 24 VDC, can be configured as ABR
■ Integrated encoder supply with short circuit protection
■ Function model 3 (ramp) is based on the CANopen communication profile DS402
■ Net time timestamp: Position change, trigger time
Net time timestamp of the position and trigger time
It is not just the position value that is important for highly dynamic positioning tasks, but also the exact time the
position is measured. The module is equipped with a net time function for this that supplies a timestamp for the
recorded position and trigger time with microsecond accuracy.
The timestamp function is based on synchronized timers. If a timestamp event occurs, the module immediately
saves the current net time. After the respective data is transferred to the CPU, including this precise time, the CPU
can then evaluate the data using its own net time (or system time), if necessary.
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected using circular connectors (M8, 4-pin). The supply is connected via connector
C (male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current per supply is 4 A (in summation 8 A)!
Connection Pinout
2 Pin Name
1 1 24 to 38.5 VDC ±25%
2 24 to 38.5 VDC ±25%
4
3 GND
4 GND
3
C → Connector (male) in module, supply
D → Connector (female) in module, routing
2
1
8.12.3.8 Pinout
Shield
1 A
X1 to X2 2 A\
M12 ① 3 B
4 B
5 Shield
Shield
1 +24 VDC
X3 to X4 2 A
M12 ① 3 GND
4 B
5 R
8.12.3.8.1 Connections X1 to X2
Warning!
Circular connectors are not permitted to be plugged in or unplugged during operation.
Information:
Shielded motor cables must be used in order to meet the limits according to the EN55011 standard
(emissions).
8.12.3.8.2 Connections X3 to X4
Warning!
Circular connectors are not permitted to be plugged in or unplugged during operation.
M A 4
5
3
Connection x
B B\
+24 VDC
ABR counter
1 2
GND
A 5 Connection x
B
4 3
R
24 - 38.5 V ±25 %
HA\ HB
X1/X2
A\
LA\ LB
A 1 2
5
HA 4 HB\
3 B
B\
LA LB\
Comp A Comp B
24 V / 20 mA
Sensor supply
X3/X4
E1/E4
E2/E5
1 2
E3/E6
VDR 5
E1 - E6
4 Internal electronics
3 VDR
24 V / 20 mA 24 V / 20 mA 24 - 38.5 V ±25%
Sensor supply Sensor supply
X3 pin 1 X4 pin 1
Power supply
24 V
Transil diode
48 V
VDR
GND
<30 V
8.12.3.13 Installation
Top-hat rail installation can only be recommended if the module is used for low power ratings.
To improve heat dissipation, we recommended mounting the module on a cooler part of the machine or on a base
plate that is at least 1 dm². A minimum distance of 1 cm must be maintained between X67 modules.
The I/O power supply voltage is monitored. Its status can be read. The error "Module power supply error" occurs
when the voltage falls below 18 V or rises above 50 V.
Overvoltage cutoff
This function is supported starting with the following hardware revision or runtime version:
• From hardware revision: B0
• From firmware version: I2.88
If the supply voltage on the module exceeds 50 V (e.g. due to feedback during generator operation), then the motor
output is switched off. The motor output is reactivated as soon as the supply voltage is back within the valid range.
The motor's current consumption depends on the defined motor currents, the available power and the actual motor
being used.
Example
Motor model number 80MPD5.300S000-01
Defined current in the motor module 3A
Motor module supply voltage 48 VDC
Motor load 1 Nm
2.75
60.00
2.50
2.25
50.00
2.00
1.75 40.00
1.25 30.00
1.00
20.00
0.75
0.50 Legend:
Ieff 10.00
0.25 Pout
0.00 0.00
50 75 100 125 150 175 200 225 250 275 300 325 350 375 400 425 450 475 500 525 550 575 600
Speed [rpm]
The power supply line should be protected by a circuit breaker or a fuse. In general, dimensioning the supply line
and overcurrent protection depends on the structure of the power supply (modules can be connected individually
or in groups).
Information:
The effective current for the power supply depends on the load but is always less than the motor
current. Make sure the maximum nominal current of 10 A is not exceeded on the power supply terminals
of the power unit.
When choosing a suitable fuse, the user must also account for characteristics such as aging effects, temperature
derating, overcurrent capacity and the definition of the rated current, which can vary by manufacturer and type. In
addition, the fuse that is selected must also be able to handle application-specific characteristics (e.g. overcurrent
that occurs in acceleration cycles).
The cross section of the power mains and the rated current of the overcurrent protection used are chosen according
to current load so that the maximum current load for the cable cross section selected (depending on wiring, see
table) is greater than or equal to the current load in the power mains. The rated current of the fuse protection must
be less than or equal to the permissible current-carrying capacity of the selected cable cross section (depending
on the how it is installed, see table):
IMains ≤ Ib ≤ IZ
Mains ≤ Fuse ≤ Line/cable
Current load of the cable cross section IZ / rated current of the over current protection Ib [A] according to type
of installation in an ambient air temperature of + 40 °C in accordance to EN 60204-1
Wire cross section [mm²] B1 B2 C E
1.5 13.5 / 13 13.1 / 10 15.2 / 13 16.1 / 16
2.5 18.3 / 16 16.5 / 16 21 / 20 22 / 20
Table 147: Cable cross section of the mains power input depending on the type of wiring
The tripping current of the fuse is not permitted to exceed the rated current of the fuse Ib.
Type of wiring Description
B1 Wires in conduit or cable duct
B2 Cables in conduit or cable duct
C Cables or wires on walls
E Cables or wires on open-ended cable tray
Table 148: Type of wiring used for the mains power input
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
8.12.3.18.5 Function model 254 - Bus controller and function model 3 - Ramp
1) The offset specifies the position of the register within the CAN object.
The following function model can be used when the SM module is used together with a bus controller.
Bus controller Function model
X67BC8513.L12, X67BC8321.L12, X67BC81RT.L12, X67BC8331, All function models
X67BC8321-1
All others Function model 254 - Bus controller (identical to Ramp function model)
Stall threshold
Name:
ConfigOutput01
The SM module features integrated sensorless load measurement for the motor axis. This is especially useful for
detecting a "stall condition" (e.g. if the motor moves to the end point during a homing procedure). It cannot be used
for torque monitoring during dynamic movements.
With the "stall threshold" register, a threshold can be defined according to the motor load, and the module detects
a stall condition started at this threshold (see "Error status" on page 749).
This threshold value must be determined on a case-by-case basis, since the results of load measurement are
influenced by a variety of factors.
• Motor speed: A higher speed results in higher measurement values
• Speeds that cause motor resonances (which interfere with load measurement) are to be avoided
• Motor accelerations that create a dynamic load (and also affect the measurement) should also be avoided
• It is especially important to be aware that mixed decay mode must be disabled or optimized for reliable
stall detection (see "Mixed decay threshold" on page 746)
The higher the load measurement value, the lower the load. That means: A stall condition is detected if the load
measurement value drops below the trigger threshold for stall detection.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Trigger threshold stall detection for Motor 1 0 Stall detection is disabled
1 Minimum sensitivity for stall detection
2 to 6 Setting the sensitivity of stall detection
7 Maximum sensitivity for stall detection
3 Reserved 0
4-6 Trigger threshold stall detection for Motor 2 0 Stall detection is disabled
1 Minimum sensitivity for stall detection
2 to 6 Setting the sensitivity of stall detection
7 Maximum sensitivity for stall detection
7 - 15 Reserved 0
Name:
ConfigOutput16
The mixed decay threshold is configured in this register. This value must be adjusted according to the motor being
used, current and voltage when using "stall detection" on page 745. Otherwise, the default value 15 will be used.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Mixed Decay Threshold Motor 1 0 Mixed decay disabled
1 to 14 Setting for mixed decay threshold
15 Mixed decay always enabled
4-7 Mixed Decay Threshold Motor 2 0 to 15 See motor 1
8 - 15 Reserved -
Mixed decay modules provide a greatly optimized sinusoidal current profile in the individual phases of the stepper
motor, especially for fast current changes and low current values.
Mixed decay interferes with reliable stall detection, however. For this reason, mixed decay mode can be disabled
during stall detection (motor load measurement) using the mixed decay threshold. The smaller the configured mixed
decay threshold, the larger the range in which mixed decay is disabled while motor load measurement takes place.
Mixed decay mode is always enabled if the mixed decay threshold is set to 15.
Relationship between stall detection and mixed decay
Depending on the application and the motor used, satisfactorily smooth operation can be achieved while using
stall detection by setting the mixed decay threshold to a value between 1 and 14. This is a compromise between
smooth operation and stall detection quality and must be fine tuned during commissioning.
Stall detection
Quality
Smooth running
0 2 4 6 8 10 12 14
Mixed decay threshold
Name:
StallDetectMinSpeed01 to StallDetectMinSpeed02
If the motor speed exceeds the value set in this register, then stall detection is enabled and the configured "mixed
decay threshold" on page 746 is used. The value 15 is always used for the mixed decay threshold below this
threshold value, and no stall error is reported. This means that mixed decay mode is always enabled at low speeds
where stall detection principally does not work.
Data type Value Information
UINT 0 to 65535 Minimum speed in steps per second.
Name:
ConfigOutput03 (holding current 1)
ConfigOutput06 (holding current 2)
ConfigOutput04 (nominal current 1)
ConfigOutput07 (nominal current 2)
ConfigOutput05 (maximum current 1)
ConfigOutput08 (maximum current 2)
The holding current, nominal current and maximum current registers are used to configure the desired motor
current.
Reasonable values are:
• Holding current < Nominal current < Maximum current
The motor's nominal current is entered in the nominal current register according to the motor's data sheet.
Register Description
Nominal current Current during normal operation
Maximum current Should be selected if a higher motor torque is required briefly during acceleration
phases.
Holding current The holding current should be used in situations when less torque is required
(e.g. at a standstill). This reduces the amount of heat generated by the motor.
Switching between preset current values (holding current, rated current, maximum current):
Function model Switching between preset current values at runtime
Standard and ARNC0 Using bits 14 and 15 in the registers "Motor setting - MotorXStepX" on page 756
ARNC0 with enabled SDC information Using the register "Motor current" on page 762
Counter configuration
Name:
ConfigOutput09
Data type Values
USINT See bit structure.
Bit structure:
Bit Description
Motor 1 Motor 2
Value Standard function model ARNC0/ARNC0 with SDC function model
0 4 0 ABRx counter value not affected Falling edge: Deactivate ABRx latch function
1 Rising edge: Activate ABRx counter value homing with de- Rising edge: Activate ABRx latch function
fault value (register Set counter)
1-2 5-6 00 Homing counter value ABRx unconditional Latch counter value ABRx unconditional
01 Homing counter value ABRx at rising edge of the ABRx R Latch counter value ABRx at rising edge of the ABRx R input
input
10 Homing counter value ABRx at falling edge of the ABRx R Latch counter value ABRx at falling edge of the ABRx R in-
input put
11 Reserved Reserved
3 7 0 • Position sync: Internal position counter • Position sync: Internal position counter
• Position async: ABRx counter value • Position async: ABRx counter value
• Position latched sync: Internal position counter
• Position latched async: ABRx counter value
1 • Position sync: ABRx counter value • Position sync: ABRx counter value
• Position async: Internal position counter • Position async: Internal position counter
• Position latched sync: ABRx counter value
• Position latched async: Internal position counter
Reading back the holding current, nominal current and maximum current
Name:
ConfigOutput03Read (holding current 1)
ConfigOutput04Read (nominal current 1)
ConfigOutput05Read (maximum current 1)
ConfigOutput06Read (holding current 2)
ConfigOutput07Read (nominal current 2)
ConfigOutput08Read (maximum current 2)
These registers are used to read the respective current values in percent.
Register Description
Nominal current Current during operation at constant speed
Maximum current Current during acceleration phases
Holding current Current when motor is at standstill
Error status
Name: The bits in this register are distributed between Motor 1 and Motor 2 as follows.
Motor 1 Motor 2
StallError01 StallError02
OvertemperatureError01 OvertemperatureError02
OpenLoadError01 OpenLoadError02
OvercurrentError01 OvercurrentError02
InputPowerSupplyError01 InputPowerSupplyError02
DrvOk01 DrvOk02
The error status of the drive is indicated in this register. Each bit indicates a certain error or status. If an error is
registered in bits 0 to 7, then the corresponding bit remains set until the error has been acknowledged (see "Error
acknowledgment" on page 750).
Data type Values
UINT See bit structure.
Bit structure:
Bit Description
Motor 1 Motor 2 Motor 1 Motor 2 Value Information
0 4 StallError01 StallError02 0 No stall
1 Stall
1 5 Overtemperature on Motor 1 Overtemperature on Motor 2 0 No overtemperature
OvertemperatureError01 OvertemperatureError02 1 Overtemperature
2 6 Current error on Motor 1 Current error on Motor 2 0 No current error
OpenLoadError01 OpenLoadError02 1 Current error
3 7 Overcurrent error on Motor 1 Overcurrent error on Motor 2 0 No overcurrent
OvercurrentError01 OvercurrentError02 1 Overcurrent
8 12 Supply error for digital inputs 1 Supply error for digital inputs 4 0 The supply for the digital inputs is OK
to 3 (connector 3) to 6 (connector 4) 1 Supply error for the digital inputs:
InputPowerSupplyError011) InputPowerSupplyError021)
9 13 Status of the drive for Motor 1 Status of the drive for Motor 2 0 An error was triggered for the motor axis
DrvOk012) DrvOk022) 1 The drive is running error-free
10 - 11 14 - 15 Reserved 0
Overtemperature error
The "Overtemperature" error bit can be set for the following reasons:
• A specific temperature was exceeded near the channel due to overload
• Module temperature exceeds 85°C
Current error
This error bit occurs whenever the required current cannot be supplied to the motor windings. This can be (but
is not necessarily) caused by an open line. At higher speeds (depending on the motor), this error can also occur
without an open line. In this case it is simply no longer possible to supply the desired current to the motor windings.
Because of the Back-EMF on the motor, this bit is set at slightly lower speeds if the motor is operated with no load
compared with full or partial loads.
Overcurrent error
Overcurrent occurs if the motor current measured in the motor windings is twice as high as it should be (e.g. short
circuit).
Error acknowledgment
Name:
ClearError01 to ClearError02
This register can be used to acknowledge errors that have occurred on the motor.
For more info, see "Error status" on page 749.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 ClearError01 0 No effect
1 Error acknowledgment for Motor 1
1 ClearError02 0 No effect
1 Error acknowledgment for Motor 2
2-7 Reserved 0
Position sync/async
Name:
Position1Sync to Position2Sync
Position1async to Position2async
Depending on the "Counter configuration" on page 748, these registers can be used to read either the internal
position counter or the counter value on the ABR input.
Data type Values
INT -32768 to 32767
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
8 7 6 5 4 3 2 1 0 6 5 4 3 2 1 0
Information:
The following limitation only applies to "Normal mode".
The smallest physical step division that is possible is 1/64 of a full-step. Therefore, bits with a rating
of 1/128 or 1/256 of a full-step remain 0. This must be taken into consideration if this position register
is used for controller feedback.
ABR counter
This counter is a cyclic 16-bit counter for each channel. The relationship between this counter and the internal
position counter depends on the resolution of the ABR encoder and the defined microsteps of the internal position
counter.
Temperature
Name:
Temperature
This register outputs the internal module temperature in °C.
Data type Values
SINT -128 to 127
Name:
MotorLoad
This register contains the current measured load value for stall detection. This can be used to tune stall detection.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Motor 1 0 to 7 Motor load value
3 Reserved -
4-6 Motor 2 0 to 7 Motor load value
7-8 Reserved -
Motor ID trigger
Name:
MotorIdentTrigger
This register can be used to trigger acyclic motor identification (see "Module configuration" on page 755). The
application must ensure that the conditions for measurement are fulfilled.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 0 No effect
1 Rising edge triggers motor ID measurements for Motor 1
1 0 No effect
1 Rising edge triggers motor ID measurements for Motor 2
2-7 Reserved 0
Motor identification
Name:
Motoridentification01 to Motoridentification02
This register is used to identify the connected motor type for service purposes and to differentiate between motors in
the application. The function of this register depends on the defined operating mode (see bit 11 in register "Module
configuration" on page 755).
Set counter
Name:
SetCounter01 to SetCounter02
This register can be used to determine which value the position counter should be set to during homing.
Data type Values
UINT 0 to 65,535
Name:
StatusInput
This register is used to indicate the status of the digital inputs and counters.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 0 OK
1 Error on Motor 1 (connector 1) or supply voltage for inputs 1-3
(connector 3)
1 0 OK
1 Error on Motor 2 (connector 2) or supply voltage for inputs 4-0
(connector 4)
2 When bit 0 in the module configuration = 0
0 or 1 Input state - Digital input 1
When bit 0 in the module configuration = 1
x Ref toggle bit for ABR encoder counter 1:
The state of this bit is changed after the homing procedure is
complete.
3 When bit 0 in the module configuration = 0
0 or 1 Input state - Digital input 2
When bit 0 in the module configuration = 1
0 Homing of ABR counter 1 active
1 Homing of ABR counter 1 complete
4 0 or 1 Input state - Digital input 3
5 When bit 1 in the module configuration = 0
0 or 1 Input state - Digital input 4
When bit 1 in the module configuration = 1
0 or 1 Ref toggle bit for ABR encoder counter 2:
The state of this bit is changed after the homing procedure is
complete.
6 When bit 1 in the module configuration = 0
0 or 1 Input state - Digital input 5
When bit 1 in the module configuration = 1
0 Homing of ABR counter 2 active
1 Homing of ABR counter 2 complete
7 0 or 1 Input state - Digital input 6
8.12.3.18.8 Register description: Function model 0 - Standard and function model 1 - ARNC0 without
SDC
Module configuration
Name:
ConfigOutput02
The number of transfer values and the resolution of microsteps for the drive can be configured in this register.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 The setting for these two bits determines the meaning of bits 2 x
and 3 in the "Input counter value" on page 758 register.
2 Reserved 0
3-4 Number of transfer values per X2X Link cycle 00 1 x Δs / Δt (transfer values: MotorXStep0)
(See "Motor setting - MotorXStepX" on page 756) 01 2 x Δs / Δt (transfer values: MotorXStep0 - MotorXStep1
10 4 x Δs / Δt (transfer values: MotorXStep0 - MotorXStep3
11 Reserved
5-6 Resolution of microsteps for the following registers: 00 Resolution: 5 bits (bit 0 - 4) microsteps; 8 bits (bit 5 - 13) full steps
• "Motor setting - MotorXStepX" on page 756 01 Resolution: 6 bits (bit 0 - 5) microsteps; 7 bits (bit 6 - 13) full steps
• "Position sync/async" on page 751 10 Resolution: 7 bits (bit 0 - 6) microsteps; 6 bits (bit 7 - 13) full steps
11 Resolution: 8 bits (bit 0 - 7) microsteps; 5 bits (bit 8 - 13) full steps
7 - 10 Reserved 0
11 Operating mode 0 Normal mode (default)
1 Enhanced mode
12 - 15 Reserved
Name:
Motor1Step0 to Motor1Step3 and
Motor2Step0 to Motor2Step3
These registers are used to specify the number and direction of steps that must be carried out by the module during
the next X2X Link cycle, and to select the motor current (see also "Holding current, rated current and maximum
current" on page 747).
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 12 Number of steps for the module to move during the next X2X x
cycle
13 Direction of movement 0 Positive
1 Negative
14 - 15 Selection of motor current 00 Motor not powered
01 Holding current
10 Rated current
11 Maximum current
Depending on the required resolution and maximum configurable speed, the module configuration can be used to
specify which bit position is used as the 1s position for full steps (see bits 5 and 6 of the "Module configuration"
on page 755).
Example for 5-bit microsteps (set bits 5 and 6 of the module configuration to binary 00):
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0 4 3 2 1 0
The number of transfer values per X2X Link cycle is specified by bits 3 and 4 in the module configuration (see
"Module configuration" on page 755). If only one transfer value (bits 3 and 4 = 00) is specified, then the motor is
advanced by MotorXStep0 until the next X2X Link cycle. If 2 or 4 transfer values are specified, then the X2X Link
cycle is divided accordingly.
Example: X2X Link cycle = 1 ms (1000 μs)
Time Number of transfer values (see "Module configuration" on page 755)
1 (bits 3 - 4 = 00) 2 (bits 3 - 4 = 01) 4 (bits 3 - 4 = 10)
0 - 250 μs) MotorXStep0 MotorXStep0 MotorXStep0
250 - 500 μs) MotorXStep1
500 - 750 μs) MotorXStep1 MotorXStep2
750 - 1000 μs) MotorXStep3
Name:
FullStepThreshold01 to FullStepThreshold02
This register is used to configure a rotational speed. When this defined speed has been reached, the drive will
automatically change from microsteps to full step mode. This makes it possible to optimize the torque at higher
speeds, while microstep mode ensures optimum concentricity at lower speeds.
It does not make sense to change to full step mode when at a standstill because fine positioning would then
no longer be possible. This is why the value "0" does not make sense in the full step threshold register and is
interpreted as disabling full step mode (i.e. the motor will always be operated in microstep mode).
Data type Values Information
UINT 0 Full step mode disabled
1 to 65,535 Steps/second
Example
Microstep mode should change to full step mode at 500 steps/second. On a motor with 200 steps per revolution,
this would be equal to a speed of:
Name: The bits in this register are distributed between Motor 1 and Motor 2 as follows.
Motor 1 Motor 2
StartLatch01 StartLatch02
TriggerEdgePos01 TriggerEdgePos02
TriggerEdgeNeg01 TriggerEdgeNeg02
This register is used to configure the latch mode and the latch function for the stepper motor position.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description
Motor 1 Motor 2 Motor 1 Motor 2 Value Information
0 4 Latch function for stepper motor position:
StartLatch01 StartLatch02 0 The latch function for the current motor position is deac-
tivated at the falling edge of this bit.
1 The latch function for the current motor position is acti-
vated at the rising edge of this bit. After a latch event
has completed, the latch function can be started again
with a new rising edge.
1-2 5-6 Latch mode for stepper motor position:
Bit 1: TriggerEdgePos01 Bit 5: TriggerEdgePos02 00 Latch position of stepper motor, unconditional
Bit 2: TriggerEdgeNeg01 Bit 6: TriggerEdgeNeg02 01 Latch position of stepper motor at a rising edge on the
respective digital input1)
10 Latch position of stepper motor at a falling edge on the
respective digital input
11 Reserved
3 7 Reserved 0
Trigger configuration
Name:
StartTrigger
TriggerEdge
The trigger functions for the stepper motor can be configured with this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 TriggerEdge 0 Trigger edge (input DI5) = positive
1 Trigger edge (input DI5) = negative
1 Enable trigger (when changes occur) x
StartTrigger
2-7 Reserved 0
Name:
ModulePowerSupplyError
StatusInput01 to StatusInput06
This register is used to indicate the status of the digital inputs and counters.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 ModulePowerSupplyError 0 OK
1 Module supply error
1 Reserved 0
2 StatusInput01 When bit 0 in the module configuration = 0
0 or 1 Input state - Digital input 1
When bit 0 in the module configuration = 1
x Ref toggle bit for ABR encoder counter 1:
The state of this bit is changed after the homing procedure is
complete.
3 StatusInput02 When bit 0 in the module configuration = 0
0 or 1 Input state - Digital input 2
When bit 0 in the module configuration = 1
0 Homing of ABR counter 1 active
1 Homing of ABR counter 1 complete
4 StatusInput03 0 or 1 Input state - Digital input 3
5 StatusInput04 When bit 1 in the module configuration = 0
0 or 1 Input state - Digital input 4
When bit 1 in the module configuration = 1
0 or 1 Ref toggle bit for ABR encoder counter 2:
The state of this bit is changed after the homing procedure is
complete.
6 StatusInput05 When bit 1 in the module configuration = 0
0 or 1 Input state - Digital input 5
When bit 1 in the module configuration = 1
0 Homing of ABR counter 2 active
1 Homing of ABR counter 2 complete
7 StatusInput06 0 or 1 Input state - Digital input 6
Name:
Position1LatchedSync to Position2LatchedSync
Position1LatchedAsync to Position2LatchedAsync
The position counter (internal position counter or ABR counter) is applied at the latch event (see "Stepper latch
configuration" on page 757). Bits 3 and 7 of the counter configuration register are used to determine which counter
state (internal position counter or ABR encoder) should be saved in the registers "Position latched sync" and
"Position latched async".
Data type Values
INT -32768 to 32767
Counter configuration
Register Bit 3 (channel 1) / Bit 7 (channel 2) = 0 Bit 3 (channel 1) / Bit 7 (channel 2) = 1
Position latched sync Internal position counter ABR counter
Position latched async ABR counter Internal position counter
Description of the two counters (internal position counter and ABR counter), see "Position sync/async" on page 751.
usSinceTrigger
Name:
usSinceTrigger
This register indicates the time (in µs) that has passed since the trigger event occurred (see "Trigger configuration"
on page 758).
Data type Values
UINT 0 to 65,535
Name: The bits in this register are distributed between Motor 1 and Motor 2 as follows.
Motor 1 Motor 2
LatchInput01 LatchInput02
LatchDone01 LatchDone02
Motor 1 and 2
TriggerInput
Data type Values
USINT See bit structure.
Bit structure:
Bit Description
Motor 1 Motor 2 Motor 1 Motor 2 Value Information
0 2 LatchInput01 LatchInput02 x Digital input for the latch event (level)
1 3 LatchDone01 LatchDone02 x State changes each time the counter state is success-
fully latched (reset value = 0)
4 TriggerInput x Trigger input (level)
5-7 Reserved 0
Name:
MotorSettlingTime01 to MotorSettlingTime02
The motor settling time determines the minimum time from energizing the motor up to setting the drive bit (DrvOk)
(see "Error status" on page 749). The setting is made in steps of 10 ms.
Data type Value Information
USINT 1 to 255 10 ms to 2.55 s, default: 10 ms
SDC configuration
Name:
SDCConfig01
This register can be used to enable/disable additional SDC information.
The additional cyclic registers are hidden or shown depending on whether SDC information is disabled or enabled.
It is comparable to the two variants of the ARNC0 function model with and without SDC information.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Trigger edge 0 Rising trigger edge
1 Falling trigger edge
1-5 Reserved 0
6 SDC life sign monitoring 0 Disabled
1 Enabled
7 SDC information1) 0 Disabled
1 Enabled
1) When the "SDC information" bit is enabled, the "EncOK01" bit is shown in the Automation Studio I/O mapping. This bit is linked to the ModulOK bit and
always indicates its value.
Note:
Neither SDC information nor SDC life sign monitoring is permitted to be changed at runtime.
Turn-off delay
Name:
DelayedCurrentSwitchOff01 to DelayedCurrentSwitchOff02
If the "SDC life sign monitoring" on page 763 is triggered (i.e. the net time timestamp is in the past) the motor
is decelerated at nominal current with speed setpoint = 0.
Then the motor is switched off after the delay configured with this register.
Data type Value Information
USINT 0 to 255 0 to 25.5 ms in steps of 100 ms (default: 100 ms)
Name:
ModulePowerSupplyError
StatusInput01 to StatusInput06
This register is used to indicate the status of the digital inputs and the counter.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 ModulePowerSupplyError 0 OK
1 I/O power supply error
1 Reserved 0
2 StatusInput01 x Input status of digital input 1
... ...
7 StatusInput06 x Input status of digital input 6
Lifecycle counter
Name:
LifeCnt
This register is incremented by one with each X2X Link cycle.
Data type Values
SINT -128 to 127
Name:
Motor1Step0 to Motor2Step0
This registers is used to specify the number and direction of steps that should be carried out by the module during
the next X2X cycle.
The value is specified with a resolution of 1/256 of a full step (corresponds to 8-bit microsteps).
The direction of movement is derived from the value's sign:
Data type Value Information
INT >0 Movement in positive direction in 1/256 full steps
<0 Movement in negative direction in 1/256 full steps
Unlike the ARNC0 function model without enabled SDC information, the motor current is selected using a separate
register (see "Motor current" on page 762).
Home position
Name:
RefPulsePos01 to RefPulsePos02
These 4 registers contain the following:
Register Description
Home position of the internal position counter This register indicates the home position of the internal position counter.
Home position for the ABR counter This register indicates the home position of the ABR counter.
The "Latch Sync" setting in the Automation Studio I/O configuration can be used to select which of the 4 registers
will be addressed by the variables RefPulsePos0x.
Variables in Automation Studio I/O configuration, counter 0x, option "Latch Sync"
Stepper counter 0x shown at ActPos0x ABR counter 0x shown at ActPos0x
RefPulsePos0x Home position of internal position counter Home position of ABR counter
The bits 3/7 in register "Counter configuration" on page 748 are also set for counter 1/2 with the option "Latch Sync":
Bit 3 (counter 1) 0 1
Bit 7 (counter 2) 0 1
Name:
RefPulseCnt01 to RefPulseCnt02
These 4 registers contain the following:
Register Description
Reference pulse counter for the internal position counter The reference pulses of the internal position counter are counted in this register.
Reference pulse counter for the ABR counter The reference pulses of the ABR counter are counted in this register.
The "Latch Sync" setting in the Automation Studio I/O configuration can be used to select which of the 4 registers
will be addressed by the variable RefPulseCnt0x.
Variables in Automation Studio I/O configuration, counter 0x, option "Latch Sync"
Stepper counter 0x shown at ActPos0x ABR counter 0x shown at ActPos0x
RefPulseCnt0x Reference pulse counter Reference pulse counter of ABR counter
for internal position counter
The bits 3/7 in the "Counter configuration" on page 748 register are also set for counter 1/2 with the option "Latch Sync":
Bit 3 (counter 1) 0 1
Bit 7 (counter 2) 0 1
Name:
ActTime01 to ActTime02
This register contains the net time of the most recent valid position value.
Data type Values
INT -32768 to 32767
Motor current
Name: The bits in this register are distributed between Motor 1 and Motor 2 as follows.
Motor 1 Motor 2
DriveEnable01 DriveEnable02
BoostCurrent01 BoostCurrent02
StandstillCurrent01 StandstillCurrent02
Bits 0 to 6 of this register can be used to control the motors' current supply.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description
Motor 1 Motor 2 Motor 1 Motor 2 Value Information
0 4 DriveEnable01 DriveEnable02 x Motor powered
1 5 BoostCurrent01 BoostCurrent02 x Maximum current
2 6 StandstillCurrent01 StandstillCurrent02 x Holding current
3 7 Reserved 0
Name:
SetTime01 to SetTime02
The module uses SDC life sign monitoring to check whether valid values have been received for the speed setpoint.
SDC life sign monitoring is activated in register "SDC configuration" on page 760 by setting bit 6 (SDCSetTime
= on).
If the specified net time timestamp is in the past, then an error is triggered for the motor axis (only when the motor
is switched on). The module performs the following steps:
1) The CPU is informed of the error using the Drive bit (DrvOk) = 0
2) Braking at configured nominal current with speed setpoint = 0
3) Wait for configured turn-off delay to expire
4) Power off motor
When the timestamp is back within the valid range, the motor can be operated again by a rising edge on the
DriveEnable bit (see section "Motor current" on page 762).
Data type Values
INT -32768 to 32767
Trigger timestamp
Name:
TriggerTime01
This register contains the point in time (net time) of the most recent trigger event. The trigger edge must be con-
figured in register "SDC configuration" on page 760.
Data type Values
INT -32768 to 32767
Trigger counter
Name:
TriggerCnt01
This register contains a cyclic counter that is incremented with each trigger event.
Data type Values
SINT -128 to 127
8.12.3.18.11 Register description: Function model 254 - Bus controller and function model 3 - Ramp
Name:
ConfigOutput03a (holding current 1)
ConfigOutput04a (nominal current 1)
ConfigOutput05a (maximum current 1)
ConfigOutput06a (holding current 2)
ConfigOutput07a (nominal current 2)
ConfigOutput08a (maximum current 2)
The holding current, nominal current and maximum current registers are used to configure the desired motor
current.
Reasonable values are:
• Holding current < Nominal current < Maximum current
The motor's nominal current is entered in the nominal current register according to the motor's data sheet.
Register Description
Nominal current Current during operation at constant speed
Maximum current Current during acceleration phases. In the mode "Referencing during stall" on
page 777, the rated current is always used instead of the maximum current,
even in acceleration phases.
Holding current Current when motor is at standstill
When the current changes to a weaker value (e.g. when transitioning from the acceleration phase to the constant
speed mode), the stronger current is maintained for an additional 100 ms. This is done according to the following
priority regardless of the actual defined values: maximum current before rated current before holding current.
Data type Value Unit
USINT 0 to 167 Percent of the module's rated current
• 100% corresponds to the rated current of the motor bridge power unit listed in the tech-
nical data
• 167% corresponds to the maximum current of the motor bridge power unit listed in the
technical data
Bus controller default setting: 0
Maximum speed
Name:
MaxSpeed01pos to MaxSpeed02pos
This register defines the maximum speed for the absolute positioning modes (1, -123, -124, -125, -126).
Information:
The setting does not apply to the speed and homing modes (2, -127, -128).
Data type Value Information
UNIT 0 to 65,535 Speed in microsteps/cycle.
Bus controller default setting: 0
Maximum acceleration
Name:
MaxAcc01 to MaxAcc02
This register defines the maximum acceleration (also applies for homing modes).
Data type Value Information
UINT 0 to 65,535 Acceleration in microsteps/cycle².
Bus controller default setting: 0
Maximum deceleration
Name:
MaxDec01 to MaxDec02
This register defines the maximum deceleration (also applies for homing modes).
Data type Value Information
UINT 0 to 65,535 Brake deceleration in microsteps/cycle².
Bus controller default setting: 0
Reversing loop
Name:
RevLoop01 to RevLoop02
This parameter is only used in modes 1, -123, -124, -125, -126 (absolute positioning modes).
If the value for the reversing loop is not equal to 0, the position setpoint is approached directly when coming from
one direction; when coming from the other direction, the position setpoint is initially exceeded by the configured
number of steps before finally moving to the position setpoint. This ensures that the target position is always
approached from the same direction (to avoid mechanical backlash).
The sign of the defined value determines the direction in which the reversing loop runs.
Sign Effective direction
Positive Reversing loop in positive direction of movement
Negative Reversing loop in negative direction of movement
Fixed position A
Name:
FixedPos01a to FixedPos02a
This register defines the position to move to in modes -124 (when the digital input is set to 1) and -125.
Data type Values Information
DINT -2,147,483,648 Bus controller default setting: 0
to 2,147,483,647
Fixed position B
Name:
FixedPos01b to FixedPos02b
This register defines the position to move to in modes -124 (when the digital input is set to 0) and -126.
Data type Values Information
DINT -2,147,483,648 Bus controller default setting: 0
to 2,147,483,647
Referencing speed
Name:
RefSpeed01 to RefSpeed02
This register sets the speed for homing modes -127 and -128.
Data type Value Information
UINT 0 to 65,535 Speed in microsteps/cycle.
Bus controller default setting: 0
Referencing configuration
Name:
RefConfig01 to RefConfig02
The homing mode can be set with this register.
Data type Value Information
SINT -120 Set home position
-121 Homing at rising edge on input DI 4
-122 Homing at falling edge on input DI 4
-125 Homing on rising edge of input DI 3/6 (R pulse).
Bus controller default setting
-126 Homing at falling edge on input DI 3/6 (R pulse)
-127 Homing during stall detection
-128 Immediate homing
Everything else No effect
Name:
StallDetectConfig01 to StallDetectConfig02
The mixed decay threshold and stall detection sensitivity can be configured in this register.
Data type Values Bus controller default setting
USINT See bit structure. 0
Bit structure:
Bit Description Value Information
0-3 Mixed decay threshold 0 Mixed decay disabled (bus controller default setting)
1 to 14 Setting for mixed decay threshold
15 Mixed decay always enabled
4-6 Stall threshold 0 Stall detection is disabled (bus controller default setting).
1 to 6 Steps involved in setting stall detection sensitivity
7 Maximum sensitivity for stall detection
7 Motor load 0 The motor load value is not shown (bus controller default set-
ting).
1 Show value in register "Status word" on page 7781)
1) If this bit is 1, then the motor load value is indicated in bits 13 to 15 of the status word register (otherwise these bits are 0). This value can help when testing
stall detection and "Home during stall" on page 777 mode.
Stall threshold
The SM module features integrated sensorless load measurement for the motor axis. This is especially useful for
detecting a "stall condition" (e.g. if the motor moves to the end point during a homing procedure). It cannot be used
for torque monitoring during dynamic movements.
The "stall threshold" (bits 4 to 6 of this register) can be used to define a threshold value for each axis individually
according to the motor load, beyond which the motor will detect a stall condition.
This threshold value must be determined on a case-by-case basis, since the results of load measurement are
influenced by a variety of factors.
• Motor speed: A higher speed results in higher measurement values
• Speeds that cause motor resonances (which interfere with load measurement) are to be avoided
• Motor accelerations that create a dynamic load (and also affect the measurement) should also be avoided
• It is especially important to be aware that mixed decay mode must be optimized for reliable stall detection.
The higher the load measurement value, the lower the load. This means that a stall condition is detected if the load
measurement value drops below the trigger threshold for stall detection.
Stall detection
Quality
Smooth running
0 2 4 6 8 10 12 14
Mixed decay threshold
Name:
StallRecognitionDelay01 to StallRecognitionDelay02
The value in this register is only relevant for "Referencing during stall" on page 777.
A stall is only detected after the time specified here has expired and after the homing procedure has started.
For example, a setting of 4 (and a cycle time of 25 ms) means that a stall will not be detected until 100 ms after
the motor starts moving (start of the homing procedure).
Set to 0 to eliminate delay.
Data type Value Information
USINT 0 to 255 In cycles, see "General configuration" on page 769.
Bus controller default setting: 0
Name:
StallDetectMinSpeed01 to StallDetectMinSpeed02
If the motor speed exceeds the value set in this register, then stall detection is enabled and the configured "mixed
decay threshold" on page 766 is used. The value 15 is always used for the mixed decay threshold below this
threshold value, and no stall error is reported. This means that mixed decay mode is always enabled at low speeds
where stall detection principally does not work.
Data type Value Information
UINT 0 to 65535 Minimum speed in microsteps per cycle.
Bus controller default setting: 0
Jolt time
Name:
JoltTime01 to JoltTime02
If a value other than 0 is assigned to this register, then jolt limitation is performed. This is done by averaging the
values for the steps to be carried out (speed setpoint) in each cycle using FIFO memory. The jolt time corresponds
to the number of FIFO elements (0 to 80). If a value greater than 80 is entered, then it will be limited internally to 80.
Changes made while a motor is running will be applied as soon as ...
• the motor has reached the position setpoint (positioning modes only)
• the motor has stopped (all modes)
Data type Value Information
USINT 0 No jerk time limitation.
Bus controller default setting
1 to 801) Number of FIFO elements
1) Starting with upgrade 1.3.1.1 (firmware version 100); For older versions: 16
General configuration
Name:
GeneralConfig01
Bit 0 of this register can be used to switch the positioning mode. This register can also be used to configure the
cycle time of the motion profile generator.
• 0: "Mode 1: Position mode without extended control word" on page 772
• 1: "Mode 1: Position mode with extended control word" on page 772
Data type Values Bus controller default setting
USINT See bit structure. 0
Bit structure:
Bit Description Value Information
0 Position mode 0 Without extended control word (bus controller default setting)
1 With extended control word
1-2 Cycle time of the motion profile generator1) 00 25 ms (bus controller default setting)
01 10 ms
10 5 ms
11 Reserved
3-7 Reserved 0
1) This parameter is supported starting with upgrade 1.3.1.1 (firmware version 100).
The cycle time for the motion profile generator is configured with this cycle. This cycle time affects the unit for specifying the speed and acceleration:
Name:
LimitSwitchConfig01 to LimitSwitchConfig02
This register configures the behavior of the limit switches.
Data type Values Bus controller default setting
USINT See bit structure. 0
Bit structure:
Bit Description Value Information
0-1 Negative limit switch 00 Switched off (bus controller default setting)
01 Active if low
10 Reserved
11 Active if high
2-3 Positive limit switch 00 Switched off (bus controller default setting)
01 Active if low
10 Reserved
11 Active if high
4-6 Reserved 0
7 Direction monitoring 0 Off (bus controller default setting)
1 On
Direction monitoring
If this function is enabled, then the two limit switches will be linked with the respective direction of movement. This
means that the negative limit switch is only triggered in the negative direction and the positive limit switch only in
the positive direction of movement (specified direction).
This prevents specifying a movement in the wrong direction when direction monitoring is enabled and limit switches
are active.
Warning!
If the motor is wired incorrectly with this configuration (wrong direction of movement), then the limit
switch will not be triggered and the actual correct direction of movement will be denied. This will also
be the case when the limit switch connections are reversed.
Software limit
Name:
PositionLimitMin01 to PositionLimitMin02
PositionLimitMax01 to PositionLimitMax02
This register configures software limits. The function is active if at least one of the two registers is not equal to zero.
These limits are effective in all positioning modes. Position overrun is not possible when this function is enabled.
Movement is always contained within the two limits.
If a position is specified that violates the minimum/maximum software limit, the "Internal limit active" bit will be
set in the "Status word" on page 778 register. The motor movement will be stopped until a position is specified
within the limits.
The "Internal limit active" bit will also be set in the "Status word" register if there is a configuration error (minimum
> maximum).
Data type Values Information
DINT -2,147,483,648 Bus controller default setting: 0
to 2,147,483,647
Information:
The software limits will only be monitored when using the following CANopen bus controllers:
• X20BC0043-10
• X20BC0143-10
• X67BC4321-10
• X67BC4321.L08-10
• X67BC4321.L12-10
Reading back the holding current, nominal current and maximum current
Name:
ConfigOutput03aRead (holding current 1)
ConfigOutput04aRead (nominal current 1)
ConfigOutput05aRead (maximum current 1)
ConfigOutput06aRead (holding current 2)
ConfigOutput07aRead (nominal current 2)
ConfigOutput08aRead (maximum current 2)
These registers are used to read the respective current values in percent.
Register Description
Nominal current Current during operation at constant speed
Maximum current Current during acceleration phases
Holding current Current when motor is at standstill
Set position/speed
Name:
AbsPos01 to AbsPos02
This register is used to set position or speed, depending on the operating mode.
• Position mode (see "Mode" on page 772): Cyclic setting of the position setpoint in microsteps. In this
mode, one micro-step is always 1/256 full-step.
• Speed mode (see "Mode" on page 772): In this mode, this register is considered a signed speed setpoint.
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Control word
Name:
MpGenControl01 to MpGenControl02
This register can be used to issue commands based on the module's state.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Switch on x
1 Enable voltage x
2 Quick stop x
3 Enable operation x
4-6 Mode-specific x
7 Fault reset x
8 Stop1) x
9 - 10 Reserved 0
11 Motor ID trigger 0 No effect
1 Rising edge: Motor ID trigger2)
12 Warning reset 0 No effect
1 Rising edge: Reset warnings
13 Undercurrent detection 0 Disable current error detection (default)
1 Enable current error detection
14 ABR counter sync/async 0 Default:
• Internal position counter, cyclic
• ABR counter, acyclic
1 • Internal position counter, acyclic
• ABR counter, cyclic
15 Stall detection 0 Disable stall detection (default)
1 Enable stall detection
1) The "Halt" bit is only evaluated when the extended control word is enabled (see "General configuration" on page 769).
2) This bit can be used to trigger a measurement of the motor ID. Keep in mind that the application must ensure that the conditions for measurement are fulfilled
(see table in the "Motor identification" on page 779 register).
Mode
Name:
MpGenMode01 to MpGenMode02
Data type Value Information
SINT 0 No mode selected
1 Depending on bit 0 in the "General configuration" on page 769 register, the position mode will
behave as follows:
• Position mode without extended control word: Move to target position as soon as the
target position changes
• Position mode with extended control word: Move to position setpoint as described in
"Mode 1: Position mode with extended control word" on page 772
2 Speed mode: Constant speed
-120 Set reference position
-121 Remaining distance mode
-122 Set actual position
-123 Move to target position when external input set
-124 Two-position module
-125 Move to fixed position A (position set acyclically)
-126 Move to fixed position B (position set acyclically)
-127 Positive homing (see also "Referencing configuration" on page 766)
-128 Negative homing (see also "Mode -127/-128: Positive / Negative referencing" on page 777)
Information:
For all modes: The "Target reached" bit is set in the "Status word" on page 778 register when the
current action is finished (i.e. when the position or speed is reached, depending on the mode).
A new position or speed can be specified even before the current action is finished.
The position setpoint is specified in the "Set position/speed" on page 771 register. The motor is then moved to this
new position. This is done with a ramp function that accounts for the defined maximum speed and acceleration
values.
The position setpoint can also be changed during an active positioning procedure.
The position setpoint is specified in microsteps (1/256 of a full step).
If bit 0 in the "General configuration" on page 769 register is 0 (no extended control word), then the position setpoint
will be applied as soon as it is different from the current position. Then the new position is used for the movement.
However, if bit 0 in the "General configuration" on page 769 register is set to 1 (extended control word), then the
position setpoint will be applied as described under "Mode 1: Position mode with extended control word" on page
772.
Position mode with extended control word behaves like "Position mode 1" on page 772 as described previously
(without the extended control word), but the new position setpoint ("Position/Speed" on page 771 register) is applied
according to the "extended control word" on page 773.
This register can be used to issue commands based on the module's state (see "Ramp function model operation"
on page 782).
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Corresponds to the standard Control word x
4 New setpoint 0 Do not apply target position
1 Apply target position
5 Change set immediately 0 Complete current positioning movement and then start next po-
sitioning movement
1 Interrupt current positioning movement and then start next posi-
tioning movement
6 abs / rel 0 Position setpoint is an absolute value
1 Position setpoint is a relative value
7 Corresponds to the standard Control word x
8 Stop1) 0 Execute positioning
1 Stop axis with deceleration
9 - 15 Corresponds to the standard Control word x
The bits in the status word reflect the status of the state machine (for a detailed description, see "Status word" on
page 783 and "State machine" on page 784).
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-9 Corresponds to the standard Status word x
10 Target reached, depending on bit 8 (Halt) in the Control word If Halt = 0
register 0 Position setpoint not reached
1 End position reached
If Halt = 1
0 Axis decelerating
1 Axis speed = 0
11 Corresponds to the standard Status word x
12 Setpoint acknowledge 0 Ramp generator did not apply the position value
1 Ramp generator applied the position value
13 - 15 Corresponds to the standard Status word x
Position setting
The two modes "Single setpoint" and "Set of setpoints" are controlled by the timing of bits New setpoint and Change
set immediately in the "extended control word" on page 773 and Setpoint acknowledge in register "Extended control
word" on page 773.
These bits can be used to create a Request-Response mechanism. This makes it possible to specify a position
setpoint while previous setpoint is still being processed.
New setpoint
③ ⑤
Ⓑ
Change set immediately
Ⓐ
Setpoint acknowledge
① ④ ⑥
v2
v1
t0 t1 t2 t3
v2
v1
t0 t1 t2
When the abs / rel bit in the Extended control word register is set, then the position setpoint is interpreted as a
relative value. At each New setpoint trigger, the position setpoint will be increased by this value (or decreased if
the value is negative).
If the mode changes between the position settings, relative movement will then proceed starting at the last specified
position. The position setpoint mode is initialized with 0 when the module is started.
The value in the "Position/Speed" on page 771 register is now interpreted as the speed setpoint (microsteps/ cycle).
Observing the maximum permissible acceleration, the motor moves with a ramp to the desired speed setpoint and
maintains this speed until a new speed setpoint is specified.
Values are allowed within the range -65535 to 65535. When a value is entered outside of this range, it is readjusted
to these limits.
This mode is supported starting with upgrade 1.3.1.1 (firmware version 100).
The current value for the actual position is modified so that the position specified by the "Position/Speed" on page
771 register is the home position. If you subsequently move to this position, the motor is at the home position.
The home position in the "Home position" on page 780 register is also set to this value.
Before this mode is called, the motor must be at a standstill and the home position must have been determined
using "Positive / negative homing" on page 777 mode. In order to set the position, the "State machine" on page
784 must be in state "Operation enable".
The number of steps defined in the "Fixed position A" on page 765 register are added to the current position and
the resulting position is approached at a rising/falling edge on digital input 3.
Note:
Steps are not added to the target position, but rather to the current position at the moment the trigger
occurs.
Negative values are also allowed for the offset defined in "Fixed position A" on page 765.
New position setpoints are no longer accepted in the "Position/speed" on page 771 register after the trigger event.
There must first be a switch made to mode 0 and then back to mode -121.
The "Target reached" bit in the "Status word" on page 766 register is not set to 1 until the end position (after the
trigger event) has been reached.
The "homing configuration" on page 766 determines whether a rising or falling edge of the digital input is used
as a trigger.
The Reversing loop is not enabled in this mode (i.e. any configured values not equal to 0 are ignored).
The position setpoint set in the "Position/Speed" on page 771 register is accepted as the current actual position in
the internal position counter when the state machine is in the "Operation Enable" state.
Before this mode is started, the motor must be at a standstill and physically located at the point for which the
position being set should be applied.
Mode -123: Move to the target position when the external input is set
The position setpoint defined in the "Position/speed" on page 771 register is moved to when a rising edge occurs
on the corresponding digital input.
A new position setpoint is not accepted until another rising edge occurs on the corresponding digital input. This
can also occur during the active positioning procedure and will be applied immediately.
Note:
Corresponding digital input
• For Motor 1: DI 3 (connector 3, pin 5)
• For Motor 2: DI 6 (connector 4, pin 5)
The positions "Fixed position A" and "Fixed position B" are defined in the acyclic registers.
Value 1 on the respective digital input starts a movement to fixed position A. Value 0 starts a movement to fixed
position B. It is also possible to switch between the two during an active positioning movement.
Note:
Corresponding digital input
• For Motor 1: DI 3 (connector 3, pin 5)
• For Motor 2: DI 6 (connector 4, pin 5)
The purpose of these modes is to enable a virtual switch from speed mode to position mode, which otherwise is
not possible because of the shared use of the register for position and speed setpoints.
• Mode -125: "Fixed position A" on page 765
• Mode -126: "Fixed position B" on page 765
Mode -127 and -128 are used to select which direction to move.
The motor must be at a standstill before switching from another mode to one of the homing modes.
If the referencing condition occurs, then the motor stops and the values of the position counter and ABR counter
valid at the moment when the referencing condition occurs are written to the "Referenced zero position" on page
780 register.
In the "referencing configuration" on page 766 you must specify whether referencing should occur at low/high level
on the digital input, during stall or unconditionally.
Name:
AbsPos01ActVal to AbsPos02ActVal
This cyclic register contains the current position.
Default: Value of the internal position counter, can be changed to ABR counter
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Status word
Name:
MpGenStatus01 to MpGenStatus02
The bits in this register reflect the state of the state machine. For a more detailed description, see "Status word"
on page 783 and "State machine" on page 784.
Bit structure:
Bit Description Value Information
0 Ready to switch on x
1 Switched on x
2 Operation enabled x
3 Fault (error bit) x
4 Voltage enabled x
5 Quick stop x
6 Switch on disabled x
7 Warning x
8 Reserved 0
9 Remote 1 Always 1 because there is no local mode for the SM module
10 Target reached x
11 Internal limit active 0 No limit violation
1 Internal limit is active (upper or lower software limit violated)
12 Mode-specific x
13 - 15 Reserved / Motor load value 0 Always 0 when bit 7 in the "Stall detection configuration / Mixed
decay" on page 766 register is set to 0.
x Returned motor load value
Input status
Name:
InputStatus
This register indicates the logical states of digital inputs.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Digital input 1 0 or 1 Input state - Digital input 1
... ...
5 Digital input 6 0 or 1 Input state - Digital input 6
6-7 Reserved 0
Motor identification
Name:
Motoridentification01 to Motoridentification02
This register is used to identify the connected motor type for service purposes and to differentiate between motors
in the application. Following measurement, this register contains the time [µs] needed to apply a current increase
of ΔI = 1 A to a motor winding.
This depends on:
• Operating voltage
• The inductance and resistance of the motor winding
Notes
1) To achieve reproducible results, the measurement must be made under the following defined conditions:
a) Motor is at standstill
b) The motor must be in a half-step position (phase A fully powered, phase B not powered). This means the internal position counter on the SM
module must have a value that fulfills the following conditions:
• Full steps are divisible by 4
• Microsteps = 0
2) Condition 1b) is fulfilled after a the SM module is reset or powered on. Immediately afterwards, when the holding current is applied to the motor for the
first time (at standstill), the duration for applying the current is measured. This is therefore a suitable time to read the motor identification register in the
application.
3) The current range from approximately 1/3 of the rated current up to the rated current is used as operating range for determining the motor identifier.
Temperature
Name:
Temperature
This register outputs the internal module temperature in °C.
Data type Values
SINT -128 to 127
Name:
RefPos01CyclicCounter to RefPos02CyclicCounter
RefPos01AcyclicCounter to RefPos02AcyclicCounter
After a homing procedure, the homing point for the cyclic or acyclic position counter can be read back with these
registers (either the internal position counter or ABR counter depending on bit 14 of register "Control word" on
page 771).
The following two registers are provided for each motor:
• Referenced zero position for cyclic counter
• Referenced zero position for acyclic counter
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Name:
AbsPos01ActValAcyclic to AbsPos02ActValAcyclic
This acyclic register contains the current position.
Defa: Value of the ABR counter, can be changed to internal position counter
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Name:
ControlReadback01 to ControlReadback02
This register can be used to read the content of the "Control word" on page 771 register.
Data type Values
UINT 0 to 65,535
Name:
ModeReadback01 to ModeReadback02
This register can be used to read the content of the "Mode" on page 772 register.
Data type Values
SINT -128 to 127
Error code
Name:
ErrorCode01 to ErrorCode02
The cause of an error or warning can be read in this register.
Data type Error code Error type Priority Description
UINT 0x0000 - - No error
0x3000 Error High Voltage
0x4200 Error : Overtemperature
0xFF20 Warning : Negative limit switch
:
0xFF21 Warning Positive limit switch
:
0x2300 Warning : Overcurrent
0xFF00 Warning : Current error1)
0xFF01 Warning Low Stall 2)
1) A current error is only detected if bit 13 = 1 in the control word (current error detection enabled).
2) Stall is only detected if bit 15 = 1 in the control word (stall detection enabled).
Control for this model has been based on the CANopen communication profile DS402.
Commands for controlling the modules are written to the "Control word" on page 782. The current module state
is returned to the "Status word" on page 783 register. The function mode (absolute position, constant speed,
homing, etc.) is set in the "Mode" on page 772 register.
Control word
Control word bits and their state for the commands of the state machine:
ABR counter sync/async
Enable operation
Motor ID trigger
Mode-specific
Mode-specific
Mode-specific
Enable voltage
Warning reset
Quick stop
Fault reset
Switch on
Reserved
Reserved
Stop 2)
Com-
mand
Bit1) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Shut- x x x x x 0 0 x 0 x x x x 1 1 0
down
Switch x x x x x 0 0 x 0 x x x 0 1 1 1
on
Disable x x x x x 0 0 x 0 x x x x x 0 x
voltage
Quick x x x x x 0 0 x 0 x x x x 0 1 x
stop
Disable x x x x x 0 0 x 0 x x x 0 1 1 1
opera-
tion
Enable x x x x x 0 0 x 0 x x x 1 1 1 1
opera-
tion
Fault x x x x x 0 0 x ↑ x x x x x x x
reset
Bits 0, 1, 2, 3 and 7 These bits control the state of the "State machine" on page 784 according to the commands in the table above.
(light gray in the previous table)
Stop 0 ... Perform motor movement
1 ... Stop axis with deceleration
This bit is only evaluated when the extended control word is activated in the "General configuration" on page
769 register.
Motor ID trigger A rising edge enables the motor ID measurement.
Warning reset A rising edge resets warnings (no effect on errors, which are reset using "Fault Reset"; the state machine is not
affected by this bit)
Fault reset A rising edge resets errors and warnings (see "State machine" on page 784)
Current error detection 0 ... Current error detection disabled
1 ... Current error detection enabled
ABR counter sync/async 0 ... Value of the ABR counter on the "Current position (acyclic)" on page 780 register.
Internal position counter of the ramp generator on the "Current position (cyclic)" register.
1 ... Value of the ABR counter on the "Current position (cyclic)" on page 778 register.
Internal position counter of the ramp generator on the "Current position (acyclic)" register.
Stall detection 0 ... Stall detection disabled
1 ... Stall detection enabled
Status word
The individual bits of this register and its states depend on the current state of the state machine:
1)
1)
1)
Reserviert / MotorLoadBit 2
Reserviert / MotorLoadBit 1
Reserviert / MotorLoadBit 0
Ready to switch on
Switch on disabled
Operation enabled
Voltage enabled
Target reached
Mode-specific
Switched on
Quick stop
Reserved
Warning
Remote
Fault
Status
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Not ready to switch on x x x x x x 1 0 x 0 x 0 0 0 0 0
Switch on disabled x x x x x x 1 0 x 1 x 0 0 0 0 0
Ready to switch on x x x x x x 1 0 x 0 1 0 0 0 0 1
Switched on x x x x x x 1 0 x 0 1 1 0 0 1 1
Operation enable x x x x x x 1 0 x 0 1 1 0 1 1 1
Quick stop active x x x x x x 1 0 x 0 0 1 0 1 1 1
Fault reaction active x x x x x x 1 0 x 0 x 0 1 1 1 1
Fault x x x x x x 1 0 x 0 x 0 1 0 0 0
1) If bit 7 is set to 1 in the "Mixed Decay / Stall Detection" on page 766 register, then the motor load value is returned in bits 13-15 of the status word. Otherwise
these bits are always 0.
1) If Halt has not been activated in the "General configuration" on page 769 register, then "Target Reached" behaves the same as when Halt = 0.
State machine
The motor is controlled according to the state machine illustrated below. After the module is started, the state
machine automatically changes to the state "Not ready to switch on". The application then operates the state
machine by writing commands to the "Control word" on page 782.
The state machine successively reaches the states "Ready to switch on", "Switched on" and "Operation enable"
by writing the consecutive commands "Shutdown", "Switch on" and "Enable operation".
Information:
Motor movements are not performed according to the setting in the "Mode" on page 772 register (see
section ) until the "Operation enable" state.
(Internal reset)
Disable Voltage
Disable Voltage Shutdown Quick stop Quick stop executed
Ready to switch on
Disable Voltage
Quick stop Switch on Shutdown
Operation enable
Quick stop
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Standard function model 250 μs
ARNC0 function model 250 μs
Ramp function model 250 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Standard function model 250 μs
Function model ARNC0 250 μs
Ramp function model
Inputs 250 μs
Outputs1) 25 ms
8.12.4 X67SM4320
This stepper motor module is used to control up to 4 stepper motors with a rated voltage of 24 VDC ±25% at a
motor current up to 1 A (1.5 A peak).
By individually adjusting the coil currents, the motor is only operated with the current it actually needs. This sim-
plifies selection of the available motors and prevents unnecessary heating. Because the latter reduces energy
consumption and thermal load, the effects are positive on the lifespan of the complete system. Complete flexibility
is achieved by using the values for holding current, boost current and continuous current, which are completely
independent of each other. The current for microsteps is automatically adjusted to the configured current values.
A stall detection mechanism is integrated to analyze the motor load. The stall is recognized using a configurable
threshold. This allows an overload or motor standstill to be detected precisely in many different types of applications.
■ 4 stepper motors, 24 VDC ±25%, 1.0 A (1.5 A peak)
■ Current value resolution of 1%
■ Boost, nominal and holding current configured independent of each other
■ 38.5 kHz PWM frequency
■ 256 microsteps
■ Stall detection
■ Complete integration in Automation Studio and CNC applications
■ Function model 3 (ramp) is based on the CANopen communication profile DS402
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected using circular connectors (M8, 4-pin). The supply is connected via connector
C (male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum current per supply is 4 A (in summation 8 A)!
Connection Pinout
2 Pin Name
1 1 24 VDC ±25%
2 24 VDC ±25%
4
3 GND
4 GND
3
C → Connector (male) in module supply
D → Connector (female) in module routing
2
1
8.12.4.8 Pinout
Shield
1 A
X1 to X4 2 A\
M12 ① 3 B
4 B\
5 Shield
8.12.4.8.1 Connections X1 to X4
3
2
4
1
5
Connection X3/X4
Warning!
Circular connectors are not permitted to be plugged in or unplugged during operation.
Information:
Shielded motor cables must be used in order to meet the limits according to the EN55011 standard
(emissions).
A\
1 2
M A 4
5
3
Connection x
B B\
24 V ±25%
HA\ HB
X1 to X4
A\
LA\ LB
A 1 2
5
HA 4 HB\
3 B
B\
LA LB\
Comp A Comp B
C D
2 2
1 4 4 1
Transil diode
48 V 3 3
VDR
GND
<30 V
The module supply voltage is continually monitored. Its status can be read. The error "Module power supply error"
occurs when the voltage falls below 18 V or rises above 30 V.
Overvoltage cutoff
If the supply voltage on the module exceeds 30 V (e.g. due to feedback during generator operation), then the motor
output is switched off. The motor output is reactivated as soon as the supply voltage is back within the valid range.
8.12.4.14 Installation
Top-hat rail installation can only be recommended if the module is used for low power ratings.
To improve heat dissipation, we recommended mounting the module on a cooler part of the machine or on a base
plate that is at least 1 dm². A minimum distance of 1 cm must be maintained between X67 modules.
The motor's current consumption depends on the defined motor currents, the available power and the actual motor
being used. An increase in the motor load causes an increase in the current consumption.
An increase in the motor load causes an increase in the effective current of the module supply.
8.12.4.16 Protection
The power supply line should be protected by a circuit breaker or a fuse. In general, dimensioning the supply line
and overcurrent protection depends on the structure of the power supply (modules can be connected individually
or in groups).
Information:
The effective current for the power supply depends on the load but is always less than the motor
current. Make sure that the maximum nominal current of 8 A (4 A per pin) is not exceeded on the power
supply terminals of the power unit.
When choosing a suitable fuse, the user must also account for characteristics such as aging effects, temperature
derating, overcurrent capacity and the definition of the rated current, which can vary by manufacturer and type. In
addition, the fuse that is selected must also be able to handle application-specific characteristics (e.g. overcurrent
that occurs in acceleration cycles).
The cross section of the power mains and the rated current of the overcurrent protection used are chosen according
to the current load so that the maximum current load for the cable cross section selected (based on the type of
wiring, see table) is greater than or equal to the current load in the power mains. The rated current of the overcurrent
protection must be less than or equal to the maximum current load for the cable cross section selected (based
on the type of wiring, see table):
IMains ≤ Ib ≤ IZ
Mains ≤ Fuse ≤ Line/cable
Current load of the cable cross section IZ / rated current of the over current protection Ib [A] according to type of installation in an
Wire cross-section ambient air temperature of + 40°C in accordance to EN 60204-1
[mm²] B1 B2 C E
1.5 13.5 / 13 13.1 / 10 15.2 / 13 16.1 / 16
2.5 18.3 / 16 16.5 / 16 21 / 20 22 / 20
Table 151: Cable cross section of the mains power input depending on the type of wiring
The tripping current of the fuse cannot exceed the rated current of the fuse Ib.
Type of wiring Description
B1 Wires in conduit or cable duct
B2 Cables in conduit or cable duct
C Cables or wires on walls
E Cables or wires on open-ended cable tray
Table 152: Type of wiring used for the mains power input
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
8.12.4.17.4 Function model 254 - Bus controller and function model 3 - Ramp
1) The offset specifies the position of the register within the CAN object.
The following function model can be used when the SM module is used together with a bus controller.
Bus controller Function model
X67BC8513.L12, X67BC8321.L12, X67BC81RT.L12, X67BC8331, All function models
X67BC8321-1
All others Function model 254 - Bus controller (identical to Ramp function model)
Stall threshold
Name:
ConfigOutput01
The SM module features integrated sensorless load measurement for the motor axis. This is especially useful for
detecting a "stall condition" (e.g. if the motor moves to the endpoint during a homing procedure). It cannot be used
for torque monitoring during dynamic movements.
With the "stall threshold" register, a threshold can be defined according to the motor load, and the module detects
a stall condition started at this threshold (see "Motor error" on page 803).
This threshold value must be determined on a case-by-case basis, since the results of load measurement are
influenced by a variety of factors.
• Motor speed: A higher speed results in higher measured values.
• Speeds that cause motor resonances (which interfere with load measurement) are to be avoided.
• Motor accelerations that create a dynamic load (and also affect the measurement) should also be avoided
• It is especially important to be aware that mixed decay mode must be optimized for reliable stall detection
(see "Mixed decay threshold" on page 799).
The higher the load measured value, the lower the load. This means that a stall condition is detected if the load
measured value drops below the trigger threshold for stall detection.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Trigger threshold stall detection for Motor 1 0 Stall detection is disabled
1 Minimum sensitivity for stall detection
2 to 6 Setting the sensitivity of stall detection
7 Maximum sensitivity for stall detection
3 Reserved 0
4-6 Trigger threshold stall detection for Motor 2 0 Stall detection is disabled
1 Minimum sensitivity for stall detection
2 to 6 Setting the sensitivity of stall detection
7 Maximum sensitivity for stall detection
7 Reserved 0
8 - 10 Trigger threshold stall detection for Motor 3 0 Stall detection is disabled
1 Minimum sensitivity for stall detection
2 to 6 Setting the sensitivity of stall detection
7 Maximum sensitivity for stall detection
11 Reserved 0
12 - 14 Trigger threshold stall detection for Motor 4 0 Stall detection is disabled
1 Minimum sensitivity for stall detection
2 to 6 Setting the sensitivity of stall detection
7 Maximum sensitivity for stall detection
15 Reserved 0
Name:
MotorLoad
This register contains the current measured load value for stall detection. This can be used to tune stall detection.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Motor 1 0 to 7 Motor load value
3 Reserved -
4-6 Motor 2 0 to 7 Motor load value
7 Reserved -
8 - 10 Motor 3 0 to 7 Motor load value
11 Reserved -
12 - 14 Motor 4 0 to 7 Motor load value
15 Reserved -
Name:
ConfigOutput16
The mixed decay threshold is configured in this register. This value must be adjusted according to the motor being
used, current and voltage when using "stall detection" on page 798. Otherwise, the default value 15 will be used.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Mixed Decay Threshold Motor 1 0 Mixed decay disabled
1 to 14 Setting for mixed decay threshold
15 Mixed decay always enabled
4-7 Mixed Decay Threshold Motor 2 0 to 15 See motor 1
8 - 11 Mixed Decay Threshold Motor 3 0 to 15 See motor 1
12 - 15 Mixed Decay Threshold Motor 4 0 to 15 See motor 1
Mixed decay modules provide a greatly optimized sinusoidal current profile in the individual phases of the stepper
motor, especially for fast current changes and low current values.
Mixed decay interferes with reliable stall detection, however. For this reason, mixed decay mode can be disabled
during stall detection (motor load measurement) using the mixed decay threshold. The smaller the configured mixed
decay threshold, the larger the range in which mixed decay is disabled while motor load measurement takes place.
Mixed decay mode is always enabled if the mixed decay threshold is set to 15.
Stall detection
Quality
Smooth running
0 2 4 6 8 10 12 14
Mixed decay threshold
Name:
StallDetectMinSpeed01 to StallDetectMinSpeed04
If the motor speed exceeds the value set in this register, then stall detection is enabled and the configured "mixed
decay threshold" on page 799 is used. The value 15 is always used for the mixed decay threshold below this
threshold value, and no stall error is reported. This means that mixed decay mode is always enabled at low speeds
where stall detection principally does not work.
Data type Value Information
UINT 0 to 65535 Minimum speed in steps per second.
Name:
ConfigOutput03 to ConfigOutput14
The holding current, nominal current and maximum current registers are used to configure the desired motor
current.
Reasonable values are:
• Holding current < Nominal current < Maximum current
The motor's nominal current is entered in the nominal current register according to the motor's data sheet.
Register Description
Nominal current Current during normal operation
Maximum current Should be selected if a higher motor torque is required briefly during acceleration
phases.
Holding current The holding current should be used in situations when less torque is required
(e.g. at a standstill). This reduces the amount of heat generated by the motor.
Switching between preset current values (holding current, rated current, maximum current):
Function model Switching between preset current values at runtime
Standard Using bits 14 and 15 in the registers "Number of steps and direction" on page
806
Standard with enabled SDC information Using the register "Motor current" on page 809
Module status
Name:
DrvOk01 to DrvOk04 (only for standard function model with SDC)
ModulePowerSupplyError
The status of the drive is indicated in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit
Motor 1 Motor 2 Motor 3 Motor 4 Description Value Information
0 1 2 3 DrvOk01-041) 0 An error was triggered for the motor axis
1 The drive is running error-free
4-6 Reserved 0
7 ModulePowerSupplyError 0 I/O power supply voltage within the valid range
1 I/O power supply voltage outside the valid range
Motor error
Name:
StallError01 to StallError04
OvertemperatureError01 to OvertemperatureError04
OpenLoadError01 to OpenLoadError04
OvercurrentError01 to OvercurrentError04
The error status of the drive is indicated in this register. Each bit indicates a certain error. If an error is registered
in bits 0 to 15, then the corresponding bit remains set until the error has been acknowledged (see "Error acknowl-
edgment" on page 804).
Data type Values
UINT See bit structure.
Bit structure:
Bit
Motor 1 Motor 2 Motor 3 Motor 4 Description Value Information
0 4 8 12 StallError01-04 0 No stall
1 Stall
1 5 9 13 OvertemperatureError01-04 0 No overtemperature
1 Overtemperature
2 6 10 14 OpenLoadError01-04 0 No current error
1 Current error
3 7 11 15 OvercurrentError01-04 0 No overcurrent
1 Overcurrent
Stall error
The stall error bit is set if the load measurement value is below the stall threshold.
Overtemperature error
The "Overtemperature" error bit can be set for the following reasons:
• A specific temperature was exceeded near the channel due to overload
• Module temperature exceeds 85°C
Current error
This error bit occurs whenever the required current cannot be supplied to the motor windings. This can be (but
is not necessarily) caused by an open line. At higher speeds (depending on the motor), this error can also occur
without an open line. In this case it is simply no longer possible to supply the desired current to the motor windings.
Because of the Back-EMF on the motor, this bit is set at slightly lower speeds if the motor is operated with no load
compared with full or partial loads.
Overcurrent error
Overcurrent occurs if the motor current measured in the motor windings is twice as high as it should be (e.g. short
circuit).
Error acknowledgment
Name:
Standard functional model without SDC Standard functional model with SDC
ErrorReset01 ClearError01
ErrorReset02 ClearError02
ErrorReset03 ClearError03
ErrorReset04 ClearError04
This register can be used to acknowledge errors that have occurred on the motor.
For more info, see "Motor error" on page 803.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 ClearError01 or ErrorReset01 0 No effect
1 Error acknowledgment for motor 1
1 ClearError02 or ErrorReset02 0 No effect
1 Error acknowledgment for Motor 2
2 ClearError03 or ErrorReset03 0 No effect
1 Error acknowledgment for motor 3
3 ClearError04 or ErrorReset04 0 No effect
1 Error acknowledgment for motor 4
4-7 Reserved 0
Current position
Name:
Standard functional model without SDC Standard functional model with SDC
Position1Sync ActPos01
Position2Sync ActPos02
Position3Sync ActPos03
Position4Sync ActPos04
This register represents the motor position calculated by the module (position setpoint). Each of these is a cyclic
16-bit counter for each channel.
The lowest 5 to 8 bits represent microsteps, while the highest 8 to 11 bits represent full steps (depending on bits
5 and 6 of the "Module configuration" on page 805).
Data type Values
INT -32768 to 32767
Example of the "current position" format (7-bit microsteps, i.e. setting bits 5 and 6 of the module configuration
register to binary 10):
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
8 7 6 5 4 3 2 1 0 6 5 4 3 2 1 0
Information:
The smallest physical full-step division of the modules that is possible is 1/64 of a full-step. Therefore,
bits with a rating of 1/128 or 1/256 of a full-step remain 0. This must be taken into consideration if this
position register is used for controller feedback.
Module configuration
Name:
ConfigOutput02
The number of transfer values and the resolution of microsteps for the drive can be configured in this register.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Reserved 0
3-4 Number of transfer values per X2X Link cycle This setting applies to all 4 channels.
(See "Number of steps and direction" on page 806) 00 1x Δs / Δt (transfer values: MotorXStep1)
01 2x Δs / Δt (transfer values: MotorXStep1 - MotorXStep2)
10 Reserved
11 Reserved
5-6 Resolution of microsteps for the following registers: 00 Resolution: 5 bits (bit 0 - 4) microsteps; 8 bits (bit 5 - 12) full steps
• "Number of steps and direction" on page 806 01 Resolution: 6 bits (bit 0 - 5) microsteps; 7 bits (bit 6 - 12) full steps
• "Current position" on page 804 10 Resolution: 7 bits (bit 0 - 6) microsteps; 6 bits (bit 7 - 12) full steps
11 Resolution: 8 bits (bit 0 - 7) microsteps; 5 bits (bit 8 - 12) full steps
7 - 10 Reserved 0
11 Operating mode 0 Normal mode (default)
1 Enhanced mode
12 - 15 Reserved 0
Name:
Motor1Step1 to Motor4Step1
Motor1Step2 to Motor4Step2
These registers are used to specify the number and direction of steps that must be carried out by the module during
the next X2X Link cycle, and to select the motor current (see also "Holding current, rated current and maximum
current" on page 801).
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 12 Number of steps for the module to move during the next X2X x
Link cycle
13 Direction of movement 0 Positive
1 Negative
14 - 15 Selection of motor current 00 Motor not powered
01 Holding current
10 Nominal current
11 Maximum current
Depending on the required resolution and maximum configurable speed, the module configuration can be used
to specify which bit position is used as the 1's position for full steps (see bits 5 and 6 of "Module configuration"
on page 805).
Example for 5-bit microsteps (set bits 5 and 6 of the module configuration to binary 00):
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0 4 3 2 1 0
The number of transfer values per X2X Link cycle is specified by bits 3 and 4 in the module configuration (see
"Module configuration" on page 805). If only one transfer value (bits 3 and 4 = 00) is specified, then the motor
is advanced by MotorXStepX until the next X2X Link cycle. If 2 or 4 transfer values are specified, then the X2X
Link is subdivided accordingly.
Example: X2X Link cycle = 1 ms (1000 μs)
Number of transfer values (see "Module configuration" on page 805)
Time 1 (bits 3 - 4 = 00) 2 (bits 3 - 4 = 01)
0 - 500 µs MotorXStep1 MotorXStep1
500 - 1000 µs MotorXStep2
SDC configuration
Name:
SdcConfig01
This register can be used to enable/disable additional SDC information.
Enabling/disabling the SDC information shows or hides additional cyclic registers. It is possible here to compare
the two variants of the standard function model, i.e. with and without enabled SDC information.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-5 Reserved 0
6 SDC life sign monitoring 0 Disabled
1 Enabled
7 SDC information 0 Disabled
1 Enabled
Note:
Neither SDC information nor SDC life sign monitoring is permitted to be changed at runtime.
Turn-off delay
Name:
DelayedCurrentSwitchOff01 to DelayedCurrentSwitchOff04
When the "SDC life sign monitoring" on page 808 is triggered (i.e. the net time timestamp is in the past) the motor
is decelerated at nominal current with speed setpoint = 0.
Then the motor is switched off after the delay configured with this register.
Data type Value Information
USINT 0 to 255 0 to 25.5 ms in steps of 100 ms (default: 100 ms)
Lifecycle counter
Name:
LifeCnt
This register is incremented by one with each X2X Link cycle.
Data type Values
SINT -128 to 127
Name:
SetTime01 to SetTime04
The module uses SDC life sign monitoring to check whether valid values have been received for the speed setpoint.
SDC life sign monitoring is activated in register "SDC configuration" on page 807 by setting bit 6 (SDCSetTime
= on).
If the specified net time timestamp is in the past, then an error is triggered for the motor axis (only when the motor
is switched on). The module performs the following steps:
1) The CPU is informed of the error using the Drive bit (DrvOk) = 0
2) Braking at configured nominal current with speed setpoint = 0
3) Wait for configured turn-off delay to expire
4) Power off motor
When the timestamp is back within the valid range, the motor can be operated again by a rising edge on the
DriveEnable bit (see section "Motor current" on page 809).
Data type Values
INT -32768 to 32767
Name:
Motor1Step0 to Motor4Step0
This registers is used to specify the number and direction of steps that should be carried out by the module during
the next X2X cycle.
The value is specified with a resolution of 1/256 of a full step (corresponds to 8-bit microsteps).
The direction of movement is derived from the value's sign:
Data type Value Information
INT >0 Movement in positive direction in 1/256 full steps
<0 Movement in negative direction in 1/256 full steps
Unlike the standard function model without enabled SDC information, the motor current is selected using a separate
register (see register "Motor current" on page 809).
Motor current
Name:
DriveEnable01 to DriveEnable04
BoostCurrent01 to BoostCurrent04
StandstillCurrent01 to StandstillCurrent04
Bits 0 to 14 of this register can be used to control the motors' current supply.
Data type Values
USINT See bit structure.
Bit structure:
Bit
Motor 1 Motor 2 Motor 3 Motor 4 Description Value Information
0 4 8 12 DriveEnable01-04 x Motor powered
1 5 9 13 BoostCurrent01-04 x Maximum current
2 6 10 14 StandstillCurrent01-04 x Holding current
3 7 11 15 Reserved 0
Name:
ActTime01 to ActTime04
This register contains the net time of the most recent valid position value.
Data type Values
INT -32768 to 32767
8.12.4.17.8 Register description: Function model 254 - Bus controller and function model 3 - Ramp
General configuration
Name:
GeneralConfig01
Bit 0 of this register can be used to switch the positioning mode. This register can also be used to configure the
cycle time of the motion profile generator.
• 0: "Mode 1: Position mode without extended control word" on page 817
• 1: "Mode 1: Position mode with extended control word" on page 817
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Position mode 0 Without extended control word
1 With extended control word
1-2 Cycle time of the motion profile generator1) 00 25 ms
01 10 ms
10 5 ms
11 Reserved
3-7 Reserved 0
1) This parameter is supported starting with upgrade 1.3.1.1 (firmware version 100).
The cycle time for the motion profile generator is configured with this cycle. This cycle time affects the unit for specifying the speed and acceleration:
When the current changes to a weaker value (e.g. when transitioning from the acceleration phase to the constant
speed mode), the stronger current is maintained for an additional 100 ms. This is done according to the following
priority regardless of the actual defined values: maximum current before rated current before holding current.
Data type Value Unit
USINT 0 to 150 Percent of the module's rated current
• 100% corresponds to the rated current of the motor bridge power unit listed in the tech-
nical data
• 150% corresponds to the maximum current of the motor bridge power unit listed in the
technical data
Maximum speed
Name:
MaxSpeed01 to MaxSpeed04
This register defines the maximum speed for the absolute positioning modes (1, -125, -126).
Information:
The setting does not apply to the speed and homing modes (2, -127, -128).
Data type Value Information
UNIT 0 to 65,535 Speed in microsteps / cycle
Maximum acceleration
Name:
MaxAcc01 to MaxAcc04
This register defines the maximum acceleration (also applies to homing modes).
Data type Value Information
UINT 0 to 65,535 Acceleration in microsteps / cycle²
Maximum deceleration
Name:
MaxDec01 to MaxDec04
This register defines the maximum deceleration (also applies to homing modes).
Data type Value Information
UINT 0 to 65,535 Deceleration in microsteps / cycle²
Reversing loop
Name:
RevLoop01 to RevLoop04
This parameter is only used in modes 1, -125, -126 (absolute positioning modes).
If the value for the reversing loop is not equal to 0, the position setpoint is approached directly when coming from
one direction; when coming from the other direction, the position setpoint is initially exceeded by the configured
number of steps before finally moving to the position setpoint. This ensures that the position setpoint is always
approached from the same direction (to avoid mechanical backlash).
The sign of the defined value determines the direction in which the reversing loop runs.
Sign Effective direction
Positive Reversing loop in positive direction of movement
Negative Reversing loop in negative direction of movement
Fixed position A
Name:
FixedPos01a to FixedPos04a
This register defines the position to move to in mode -125.
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Fixed position B
Name:
FixedPos01b to FixedPos04b
This register defines the position to move to in mode -126.
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Homing speed
Name:
RefSpeed01 to RefSpeed04
This register sets the speed for homing modes -127 and -128.
Data type Value Information
UINT 0 to 65,535 Speed in microsteps / cycle
Homing configuration
Name:
RefConfig01 to RefConfig04
The homing mode can be set with this register.
Data type Value Information
SINT -120 Set home position
-127 Homing during stall detection1)
-128 Immediate homing
Everything else No effect
Name:
StallDetectConfig01 to StallDetectConfig04
The mixed decay threshold and stall detection sensitivity can be configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Mixed decay threshold 0 Mixed decay disabled
1 to 14 Setting for mixed decay threshold
15 Mixed decay always enabled
4-6 Stall threshold 0 Stall detection is disabled
1 to 6 Steps involved in setting stall detection sensitivity
7 Maximum sensitivity for stall detection
7 Motor load 0 Motor load value not shown
1 Show value in register "Status word" on page 8161)
1) If this bit is 1, then the motor load value is indicated in bits 13 to 15 of the status word register (otherwise these bits are 0). This value can help when testing
stall detection and "Home during stall" on page 820 mode.
Stall threshold
The SM module features integrated sensorless load measurement for the motor axis. This is especially useful for
detecting a "stall condition" (e.g. if the motor moves to the end point during a homing procedure). It cannot be used
for torque monitoring during dynamic movements.
The "stall threshold" (bits 4 to 6 of this register) can be used to define a threshold value for each axis individually
according to the motor load, beyond which the motor will detect a stall condition.
This threshold value must be determined on a case-by-case basis, since the results of load measurement are
influenced by a variety of factors.
• Motor speed: A higher speed results in higher measurement values
• Speeds that cause motor resonances (which interfere with load measurement) are to be avoided
• Motor accelerations that create a dynamic load (and also affect the measurement) should also be avoided
• It is especially important to be aware that mixed decay mode must be optimized for reliable stall detection.
The higher the load measurement value, the lower the load. This means that a stall condition is detected if the load
measurement value drops below the trigger threshold for stall detection.
Stall detection
Quality
Smooth running
0 2 4 6 8 10 12 14
Mixed decay threshold
Name:
StallDetectMinSpeed01 to StallDetectMinSpeed04
If the motor speed exceeds the value set in this register, then stall detection is enabled and the configured "mixed
decay threshold" on page 799 is used. The value 15 is always used for the mixed decay threshold below this
threshold value, and no stall error is reported. This means that mixed decay mode is always enabled at low speeds
where stall detection principally does not work.
Data type Value Information
UINT 0 to 65535 Minimum speed in microsteps per cycle.
Name:
StallRecognitionDelay01 to StallRecognitionDelay04
The value in this register is only relevant for "Referencing during stall" on page 820.
A stall is only detected after the time specified here has expired and after the homing procedure has started.
For example, a setting of 4 (and a cycle time of 25 ms) means that a stall will not be detected until 100 ms after
the motor starts moving (start of the homing procedure).
Set to 0 to eliminate delay.
Data type Value Information
USINT 0 to 255 in cycles, see "General configuration" on page 810
Jolt time
Name:
JoltTime01 to JoltTime04
If a value other than 0 is assigned to this register, then jolt limitation is performed. This is done by averaging the
values for the steps to be carried out (speed setpoint) in each cycle using FIFO memory. The jolt time corresponds
to the number of FIFO elements (0 to 80). If a value greater than 80 is entered, then it will be limited internally to 80.
Changes made while a motor is running will be applied as soon as ...
• the motor has reached the position setpoint (positioning modes only)
• the motor has stopped (all modes)
Data type Value Information
USINT 0 No jolt time limitation
1 to 801) Number of FIFO elements
1) Starting with upgrade 1.3.1.1 (firmware version 100); For older versions: 16
Software limit
Name:
PositionLimitMin01 to PositionLimitMin04
PositionLimitMax01 to PositionLimitMax04
This register configures software limits. The function is enabled if at least one of the registers is not equal to zero.
These limits are effective in all positioning modes. Position overrun is not possible when this function is enabled.
Movement is always contained within the two limits.
If a position is specified that violates the minimum/maximum software limit, the "Internal limit active" bit will be
set in the "Status word" on page 816 register. The motor movement will be stopped until a position is specified
within the limits.
The "Internal limit active" bit will also be set in the "Status word" register if there is a configuration error (minimum
> maximum).
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Information:
The software limits will only be monitored when using the following CANopen bus controllers:
• X20BC0043-10
• X20BC0143-10
• X67BC4321-10
• X67BC4321.L08-10
• X67BC4321.L12-10
Name:
AbsPos01 to AbsPos04
This register is used to set position or speed, depending on the operating mode.
• Position mode (see "Mode" on page 816): Cyclic setting of the position setpoint in microsteps. In this
mode, one micro-step is always 1/256 full-step.
• Speed mode (see "Mode" on page 816): In this mode, this register is considered a signed speed setpoint.
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Control word
Name:
MpGenControl01 to MpGenControl04
This register can be used to issue commands based on the module's state.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0 Switch on x
1 Enable voltage x
2 Quick stop x
3 Enable operation x
4-6 Mode-specific x
7 Fault reset x
8 Stop1) x
9 - 11 Reserved 0
12 Warning reset 0 No effect
1 Rising edge: Reset warnings
13 Undercurrent detection 0 Disable current error detection (default)
1 Enable current error detection
14 Reserved 0
15 Stall detection warning 0 Disable stall detection warning (default)
1 Enable stall detection warning
1) The "Halt" bit is only evaluated when the extended control word is enabled (see "General configuration" on page 810).
Status word
Name:
MpGenStatus01 to MpGenStatus04
The bits in this register reflect the state of the state machine. For a more detailed description, see "Status word"
on page 823 and "State machine" on page 824.
Bit structure:
Bit Description Value Information
0 Ready to switch on x
1 Switched on x
2 Operation enabled x
3 Fault (error bit) x
4 Voltage enabled x
5 Quick stop x
6 Switch on disabled x
7 Warning x
8 Reserved 0
9 Remote 1 Always 1 because there is no local mode for the SM module
10 Target reached x
11 Internal limit active 0 No limit violation
1 Internal limit is active (upper or lower software limit violated)
12 Mode-specific x
13 - 15 Reserved / Motor load value 0 Always 0 when bit 7 in the "Stall detection configuration / Mixed
decay" on page 812 register is set to 0.
x Returned motor load value
Mode
Name:
MpGenMode01 to MpGenMode04
Data type Value Information
SINT 0 No mode selected
1 Depending on bit 0 in the "General configuration" on page 810 register, the position mode will
behave as follows:
• Position mode without extended control word: Move to target position as soon as the
target position changes
• Position mode with extended control word: Move to position setpoint as described in
"Mode 1: Position mode with extended control word" on page 817
2 Speed mode: Constant speed
-120 Set reference position
-122 Set actual position
-125 Move to fixed position A (position set acyclically)
-126 Move to fixed position B (position set acyclically)
-127 Positive homing (see also "Homing configuration" on page 812)
-128 Negative homing (see also "Homing configuration" on page 812)
Information:
For all modes: The "Target reached" bit is set in the "Status word" on page 816 register when the
current action is finished (i.e. when the position or speed is reached, depending on the mode).
A new position or speed can be specified even before the current action is finished.
The position setpoint is specified in the "Setting target position/speed" on page 815 register. The motor is then
moved to this new position. This is done with a ramp function that accounts for the defined maximum speed and
acceleration values.
The position setpoint can also be changed during an active positioning procedure.
The position setpoint is specified in microsteps (1/256 of a full step).
If bit 0 in the "General configuration" on page 810 register is 0 (no extended control word), then the position setpoint
will be applied as soon as it is different from the current position. Then the new position is used for the movement.
However, if bit 0 in the "General configuration" on page 810 register is set to 1 (extended control word), then the
position setpoint will be applied as described under "Mode 1: Position mode with extended control word" on page
817.
Position mode with extended control word behaves like "Position mode 1" on page 817 as described previously
(without the extended control word), but the new position setpoint ("Position/Speed" on page 815 register) is applied
according to the "extended control word" on page 817.
This register can be used to issue commands based on the module's state (see "Ramp function model operation"
on page 822).
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Corresponds to the standard Control word x
4 New setpoint 0 Do not apply target position
1 Apply target position
5 Change set immediately 0 Complete current positioning movement and then start next po-
sitioning movement
1 Interrupt current positioning movement and then start next posi-
tioning movement
6 abs / rel 0 Position setpoint is an absolute value
1 Position setpoint is a relative value
7 Corresponds to the standard Control word x
8 Stop1) 0 Execute positioning
1 Stop axis with deceleration
9 - 15 Corresponds to the standard Control word x
The bits in the status word reflect the status of the state machine (for a detailed description, see "Status word" on
page 823 and "State machine" on page 824).
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-9 Corresponds to the standard Status word x
10 Target reached, depending on bit 8 (Halt) in the Control word If Halt = 0
register 0 Position setpoint not reached
1 End position reached
If Halt = 1
0 Axis decelerating
1 Axis speed = 0
11 Corresponds to the standard Status word x
12 Setpoint acknowledge 0 Ramp generator did not apply the position value
1 Ramp generator applied the position value
13 - 15 Corresponds to the standard Status word x
Position setting
The two modes "Single setpoint" and "Set of setpoints" are controlled by the timing of the bits New setpoint and
Change set immediately in the "extended control word" on page 817 and Setpoint acknowledge in the "Extended
control word" on page 817 register.
These bits can be used to create a Request-Response mechanism. This makes it possible to specify a position
setpoint while previous setpoint is still being processed.
New setpoint
③ ⑤
Ⓑ
Change set immediately
Ⓐ
Setpoint acknowledge
① ④ ⑥
v2
v1
t0 t1 t2 t3
v2
v1
t0 t1 t2
When the abs / rel bit in the Extended control word register is set, then the position setpoint is interpreted as a
relative value. At each New setpoint trigger, the position setpoint will be increased by this value (or decreased if
the value is negative).
If the mode changes between the position settings, relative movement will then proceed starting at the last specified
position. The position setpoint mode is initialized with 0 when the module is started.
The value in the "Position/Speed" on page 815 register is now interpreted as the speed setpoint (microsteps/ cycle).
Observing the maximum permissible acceleration, the motor moves with a ramp to the desired speed setpoint and
maintains this speed until a new speed setpoint is specified.
Values are allowed within the range -65535 to 65535. When a value is entered outside of this range, it is readjusted
to these limits.
This mode is supported starting with upgrade 1.3.1.1 (firmware version 100).
The current value for the actual position is modified so that the position specified by the "Position/Speed" on page
815 register is the home position. If you subsequently move to this position, the motor is at the home position.
The home position in the "Home position" on page 821 register is also set to this value.
Before this mode is called, the motor must be at a standstill and the home position must have been determined
using "Positive / negative homing" on page 820 mode. In order to set the position, the "State machine" on page
824 must be in the "Operation Enable" state.
The position setpoint set in the "Position/Speed" on page 815 register is accepted as the current actual position in
the internal position counter when the state machine is in the "Operation Enable" state.
Before this mode is started, the motor must be at a standstill and physically located at the point for which the
position being set should be applied.
The purpose of these modes is to enable a virtual switch from the speed mode to the position mode, which otherwise
is not possible because of the double use of the register for position – and speed specification.
• Mode -125: "Fixed position A" on page 811
• Mode -126: "Fixed position B" on page 811
Mode -127 and -128 are used to select which direction to move.
The motor must be at a standstill before switching from another mode to one of the homing modes.
If the referencing condition occurs, then the motor stops and the values of the position counter valid at the moment
when the referencing condition occurs are written to the "Referenced zero position" on page 821 register.
Whether homing should occur during a stall or unconditionally must be set in the "homing configuration" on page
812.
Name:
AbsPos01ActVal to AbsPos04ActVal
This cyclic register contains the current position.
Default: Value of the internal step counter
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Name:
RefPos01CyclicCounter to RefPos04CyclicCounter
After a referencing procedure, the reference position of the position counter can be read with these registers.
Data type Values
DINT -2,147,483,648 to 2,147,483,647
Name:
ControlReadback01 to ControlReadback04
This register can be used to read the content of the "Control word" on page 815 register.
Data type Values
UINT 0 to 65,535
Name:
ModeReadback01 to ModeReadback04
This register can be used to read the content of the "Mode" on page 816 register.
Data type Values
SINT -128 to 127
Error code
Name:
ErrorCode01 to ErrorCode04
The cause of an error or warning can be read in this register.
Data type Error code Error type Priority Description
UINT 0x0000 - - No error
0x3000 Errors Portrait Voltage
0x4200 Errors : Overtemperature
0x2300 Warning : Overcurrent
:
0xFF00 Warning Current error1)
:
0xFF01 Warning : Stall 2)
:
Low
1) A current error is only detected if bit 13 = 1 in the control word (current error detection enabled).
2) Stall is only detected if bit 15 = 1 in the control word (stall detection warning enabled).
Control for this model has been based on the CANopen communication profile DS402.
Commands for controlling the modules are written to the "Control word" on page 822. The current module state
is returned to the "Status word" on page 823 register. The function mode (absolute position, constant speed,
homing, etc.) is set in the "Mode" on page 816 register.
Control word
Control word bits and their state for the commands of the state machine:
Current error detection
Stall detection warning
Enable operation
Mode-specific
Mode-specific
Mode-specific
Enable voltage
Warning reset
Quick stop
Fault reset
Switch on
Reserved
Reserved
Reserved
Reserved
Stop 2)
Com-
mand
Bit1) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Shut- x 0 x x x 0 0 x 0 x x x x 1 1 0
down
Switch x 0 x x x 0 0 x 0 x x x 0 1 1 1
on
Disable x 0 x x x 0 0 x 0 x x x x x 0 x
voltage
Quick x 0 x x x 0 0 x 0 x x x x 0 1 x
stop
Disable x 0 x x x 0 0 x 0 x x x 0 1 1 1
opera-
tion
Enable x 0 x x x 0 0 x 0 x x x 1 1 1 1
opera-
tion
Fault x 0 x x x 0 0 x ↑ x x x x x x x
reset
Bits 0, 1, 2, 3 and 7 These bits control the state of the "State machine" on page 824 according to the commands in the table above.
(light gray in the previous table)
Halt 0 ... Perform motor movement
1 ... Stop axis with deceleration
This bit is only evaluated when the extended control word is activated in the "General configuration" on page
810 register.
Warning reset A rising edge resets warnings (no effect on errors, which are reset using "Fault Reset"; the state machine is not
affected by this bit)
Fault reset A rising edge resets errors and warnings (see "State machine" on page 824)
Current error detection 0 ... Current error detection disabled
1 ... Current error detection enabled
Stall detection warning 0 ... Stall detection warning disabled
1 ... Stall detection warning enabled
Status word
The individual bits of this register and its states depend on the current state of the state machine:
1)
1)
1)
Reserviert / MotorLoadBit 2
Reserviert / MotorLoadBit 1
Reserviert / MotorLoadBit 0
Ready to switch on
Switch on disabled
Operation enabled
Voltage enabled
Target reached
Mode-specific
Switched on
Quick stop
Reserved
Warning
Remote
Fault
Status
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Not ready to switch on x x x x x x 1 0 x 0 x 0 0 0 0 0
Switch on disabled x x x x x x 1 0 x 1 x 0 0 0 0 0
Ready to switch on x x x x x x 1 0 x 0 1 0 0 0 0 1
Switched on x x x x x x 1 0 x 0 1 1 0 0 1 1
Operation enable x x x x x x 1 0 x 0 1 1 0 1 1 1
Quick stop active x x x x x x 1 0 x 0 0 1 0 1 1 1
Fault reaction active x x x x x x 1 0 x 0 x 0 1 1 1 1
Fault x x x x x x 1 0 x 0 x 0 1 0 0 0
1) If bit 7 is set to 1 in the "Mixed Decay / Stall Detection" on page 812 register, then the motor load value is returned in bits 13-15 of the status word. Otherwise
these bits are always 0.
1) If Halt has not been activated in the "General configuration" on page 810 register, then "Target Reached" behaves the same as when Halt = 0.
State machine
The motor is controlled according to the state machine illustrated below. After the module is started, the state
machine automatically changes to the state "Not ready to switch on". The application then operates the state
machine by writing commands to the "Control word" on page 822.
The state machine successively reaches the states "Ready to switch on", "Switched on" and "Operation enable"
by writing the consecutive commands "Shutdown", "Switch on" and "Enable operation".
Information:
Motor movements are not performed according to the setting in the "Mode" on page 816 register (see
section ) until the "Operation enable" state.
(Internal reset)
Disable Voltage
Disable Voltage Shutdown Quick stop Quick stop executed
Ready to switch on
Disable Voltage
Quick stop Switch on Shutdown
Operation enable
Quick stop
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Standard function model 400 μs
Ramp function model 400 μs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Standard function model 400 μs
Ramp function model
Inputs 400 μs
Outputs1) 25 ms
8.13.1 Summary
Model number Short description Page
X67BC81RT.L12 X67 bus controller, 2 POWERLINK interfaces, X2X Link power supply 15 W, reACTION Technology module, 827
2 digital inputs, 24 VDC, <1 µs, 3 digital channels, 5 VDC, <1 µs, configurable as inputs or outputs, 2 digital
channels, 24 VDC, 0.4 A, <1 µs, configurable as inputs or outputs, 2 analog inputs ±10 V, 5 µs 200 kHz sampling
frequency, 13-bit converter resolution (including sign), configurable input filter, 1 analog output ±10 V, 2.5 µs,
13-bit converter resolution (including sign), M12 connectors, high-density module
8.13.2 X67BC81RT.L12
This bus controller makes it possible to connect X2X Link I/O nodes to POWERLINK.
Additional X2X Link I/O nodes (X67 modules or other X2X Link-based modules) can be connected using the inte-
grated X2X Link connection. When doing so, it is possible to operate the X2X Link cycle either 1:1 synchronously
or synchronously to the POWERLINK network using a prescaler. Mechanically, POWERLINK is connected via an
IP67-rated standard D-keyed M12 Ethernet connector.
POWERLINK is a standard protocol for Fast Ethernet with hard real-time characteristics. The Ethernet POW-
ERLINK Standardization Group (EPSG) ensures that the standard remains open and is continually developed:
www.ethernet-powerlink.org
Ultrafast reACTION Technology makes it possible to control I/O channels with response times down to 1 μs. All
of the commands that can be used for reACTION programs are provided as function blocks in special libraries
(e.g. AsIORTI). Programming using the standard Function Block Diagram (FBD) editor in Automation Studio is
compliant with IEC 61131-3.
• POWERLINK
• reACTION Technology module
• Integrated hub for efficient cabling
• 4 digital inputs
• 5 digital channels, configurable as inputs or outputs
• 2 analog inputs ±10 V
• 1 analog input ±10 V
• 1 ABR incremental encoder input 5 V
• 5 V and 24 V encoder power supply integrated in the encoder connector
• I/O configuration and firmware update via the fieldbus
• Integrated connection to local expansions via X2X Link for 250 additional modules
• Cycle time configurable starting at 200 µs for local expansions
Status
Green
t
Error
Red
t
LED "S/E"
t
Note:
• The LED blinks red several times immediately after startup. This is not an error, however.
• The LED is lit red for CNs with configured physical node number 0 but that have not yet been assigned a node
number via dynamic node allocation (DNA).
Triple flash
200 200 200 200 200 1000
Double flash
200 200 200 1000
Single flash
200 1000
Blinking
200 200
Flickering
All times in ms
X2X Link
Connection 2
2x analog inputs
(or 2x 1 analog input)
Connection 3
2x digital inputs (24 VDC) and
1x analog output 3x digital inputs/outputs (5 VDC)
Connection 4 Connection 8
The module is connected to the network using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
2 A Pin Name
1 1 TXD Transmit data
2 RXD Receive data
3 TXD\ Transmit data\
4 RXD\ Receive data\
4 Shield connection made via threaded insert in the module
3
A → D-keyed (female), input
3 B1 → D-keyed (female), output
4
B1 1
Information:
The color of the wires used in field-assembled cables for connecting to the fieldbus interface may
deviate from the standard.
It is extremely important to make sure that the pinout is correct (see section "Accessories - POWER-
LINK cables" on page 83").
Some X67 system bus controllers are based on Ethernet technology. POWERLINK cables supplied by B&R can
be used for wiring.
Model number Connection type
X67CA0E41.xxxx Attachment cables - RJ45 to M12
X67CA0E61.xxxx Connection cables - M12 to M12
Information:
Using POWERLINK cables supplied by B&R (X67CA0E61.xxxx and X67CA0E41.xxxx) satisfies product
standard EN 61131-2.
The customer must implement additional measures in the event of further requirements.
High Low
The node number for the POWERLINK node is set using the two number switches.
Switch position Description
0x00 Only permitted when operating the POWERLINK node in DNA mode.
0x01 - 0xEF Node number of the POWERLINK node. Operation as a controlled node.
0xF0 - 0xFF Reserved, switch position not permitted.
Manager
Hub
Hub Hub
A digital mixed module is already integrated in the bus controller. Up to 250 I/O modules can be connected to
the bus controller.
Manager
Hub
Controller
Hub
X67PS1300
X67BC8xxx.L12 X67BC8xxx.L12
Information:
15 W are provided by the bus controller for additional X67 modules or other X2X Link-based modules.
System supply module X67PS1300 is needed for additional power. This system supply module pro-
vides 15 W for additional modules. Each one should be mounted in the middle of the modules that are
to be supplied with power.
I/O I/O
Additional modules can be connected to the bus controller via X2X Link using pre-assembled cables. The connec-
tion is made using an M12 circular connector.
Connection Pinout
Pin Name
B2 3
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4 Shield connection made via threaded insert in the module
1
B2 → B-keyed (female), output
The I/O power supply is connected via M8 connectors C and D. The power supply is connected via connection C
(male). Connector D (female) is used to route the power supply to other modules.
Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per pin).
Connection Pinout
2 Pin Connector C (male) Connector D (female)
C
1 1 24 VDC fieldbus 24 VDC module
2 24 VDC module 24 VDC I/O
4
3 GND GND
4 GND GND
3 C → Connector (male) in module, feed for I/O power supply
D → Connector (female) in module, routing of I/O power supply
D 2
1
The following table provides an overview of the connections to the I/O channels and their properties.
Digital inputs/outputs
Connection Pin Channel Description
X1 2 DI 1 24 VDC, sink, ≤50 ns, configurable software filter
4 DI 2 24 VDC, sink, ≤50 ns, configurable software filter
X5 2 DI 3 / DO 3 DI: 24 VDC, sink, ≤50 ns, configurable software filter
DO: 24 VDC, 0.4 A, push-pull, <1 μs
4 DI 4 / DO 4 DI: 24 VDC, sink, ≤50 ns, configurable software filter
DO: 24 VDC, 0.4 A, push-pull, <1 μs
X8 5, 6 DI 5 / DO 5 DI: 5 VDC module, differential: Type RS485
DO: 5 VDC, 100 mA, differential: Type RS485 (tri-state, if inactive)
8, 1 DI 6 / DO 6 DI: 5 VDC module, differential: Type RS485
DO: 5 VDC, 100 mA, differential: Type RS485 (tri-state, if inactive)
3, 4 DI 7 / DO 7 DI: 5 VDC module, differential: Type RS485
DO: 5 VDC, 100 mA, differential: Type RS485 (tri-state, if inactive)
2 DI 8 24 VDC, sink, ≤50 ns, configurable software filter
7 DI 9 24 VDC, sink, ≤50 ns, configurable software filter
Analog inputs
Connection Pin Channel Description
X21) 2 AI 1 ±10 V, 12-bit, 5 µs
4 AI 2 ±10 V, 12-bit, 5 µs
X31) 2 AI 2 ±10 V, 12-bit, 5 µs
4 AI 1 ±10 V, 12-bit, 5 µs
1) The connections 2 and 3 are cross-connected with each other (see "Analog inputs - Connection examples" on page 839).
Analog output
Connection Pin Channel Description
X4 1, 3 AO 1 ±10 V, 12-bit, 2 µs
8.13.2.10 Pinout
Shield
1 +24 VDC
X1 2 DI 1
M12 ① 3 GND
4 DI 2
5 NC
Shield
1 +24 VDC
X2 2 AI 1
M12 ① 3 GND
4 AI 2
5 Shield
Shield
1 +24 VDC
X3 2 AI 2
M12 ① 3 GND
4 AI 1
5 Shield
X1 X5
Shield
X2 1 AO + 1
X4 2 +24 VDC
M12 ① 3 AO - 1 (GND)
X3 4 GND
5 Shield
X4 X8
Shield
1 +24 VDC
X5 2 DI 3 / DO 3
M12 ① 3 GND
4 DI 4 / DO 4
5 NC
Shield
1 DI 6\ / DO 6\
2 DI 8
3 DI 7 / DO 7
4 DI 7\ / DO 7\
5 DI 5 / DO 5
X8
6 DI 5\ / DO 5\
M12 ②
7 DI 9
8 DI 6 / DO 6
9 NC
10 +5 VDC
11 +24 VDC
12 GND
8.13.2.10.1 Connection X1
8.13.2.10.3 Connection X4
8.13.2.10.4 Connection X5
8.13.2.10.5 Connection X8
Connections X2 and X3 make 2 analog inputs available. The connections are directly connected with each other
(see input circuit diagram "Analog inputs (X2/X3)" on page 841) with the result that they have to be considered
together. Depending on the pinout of the sensors, either the two signals can be processed by the module on the
same connection or one signal per connection.
Connection example 1
Channel 1 1 2
Channel 2 1 2
Sensor 2
+24 VDC
5 Connection 3
GND
4 3
Connection example 2
Channel 1
Sensors 1 & 2
1 2
+24 VDC
Channel 2
5 Connection 2
GND 4 3
Connection example 3
Channel 2
Sensors 1 & 2
1 2
+24 VDC
Channel 1
5 Connection 3
GND 4 3
Input status 1
1 5
3
Input status 2
4
I/O status
LED (green)
Input x
VDR
Input status
I/O status
GND
GND
LED (green)
PTC
24 V
24 V
+24 VDC
Output status 1
Logic,
Out 1
temperature
and overload
Input status 1 cutoff
In 1 +24 VDC
LED
+24 VDC
Output status 2
Logic,
Out 2
temperature
and overload
Input status 2 cutoff
In 2
I/O status 2
LED
Input x
RS485
driver Input status
LED (green)
GND
GND
PTC
24 V
24 V
5V
24 V
Output x
RS485
Output status driver
Transmitter
Output x
Information:
The digital inputs and outputs of the X8 connection were designed for signal levels of 5 VDC.
- +24 VDC
Input value
D/A converter
Short circuit and
overload protection 2
1 5
+ 3
I/O status 1
4
+ 2
LED (green)
-
1 5
I/O status 2 3
4
LED (green)
Enable relay
Short circuit
Short circuit
protection
and overload protection
Output value +24 VDC
D/A converter
2 3
5
Reset
1 4
I/O status
LED (orange)
The following diagram shows that the differential output voltage sinks when the output current rises.
5
4.5
4
Differential output voltage [V]
3.5
2.5
1.5
0.5
0
0 10 20 30 40 50 60 70 80
Output current [mA]
When using the "reACTION" function model, an individual reACTION program must be created for the module.
This program will be executed by the reACTION module later on, not by the CPU. This allows individual machine
tasks to be managed decentrally and with a very short response time.
The inputs and outputs of a reACTION module can only be operated by an enabled reACTION program. Interaction
registers allow information to be exchanged between the CPU and the reACTION program in the module.
In addition to communication with the CPU, the cyclic interaction registers can also be used for "cross-mapping". In
this way, inputs/outputs can also be read/controlled by external modules across the entire X2X Link or POWERLINK
network.
Read Write
Register Name Data type
Cyclic Acyclic Cyclic Acyclic
Module - Configuration
131 CfO_LedEnable_AI USINT ●
Module communication
158 ModuleStatus UINT ●
162 DigitalStatus UINT ●
reACTION - Configuration
772 ReActionCycleTimeValue UDINT ●
780 ReActionCycleTimeMultiplier UDINT ●
Index*8 CfO_PARType01
UDINT ●
+ 508 CfO_PARType[02…04]
reACTION - Communication
129 reACTION - Control byte USINT ●
RTEnable Bit 0
RTHardwareWarningQuit Bit 2
145 reACTION - Status byte USINT ●
RTEngineRun Bit 0
RTCycleTimeOverrun Bit 1
RTHardwareWarning Bit 2
RTFileInvalid Bit 4
RTFunctionInvalid Bit 5
RTInstanceInvalid Bit 6
RTFileNotLoaded Bit 7
154 RTCycleCounter UINT ●
150 RTCycleTime UINT ●
reACTION - Interaction
Index*8 PAR01 ●
(U)SINT
+ 4095 PAR[02...32]
PAR01_Bit1
Bit 0
PAR[02...32]_Bit1
PAR01_Bit2
Bit 1
PAR[02...32]_Bit2
PAR01_Bit3
Bit 2
PAR[02...32]_Bit3
PAR01_Bit4
Bit 3
PAR[02...32]_Bit4
PAR01_Bit5
Bit 4
PAR[02...32]_Bit5
PAR01_Bit6
Bit 5
PAR[02...32]_Bit6
PAR01_Bit7
Bit 6
PAR[02...32]_Bit7
PAR01_Bit8
Bit 7
PAR[02...32]_Bit8
Index*8 PAR01
(U)INT ●
+ 4094 PAR[02...32]
Index*8 PAR01
(U)DINT ●
+ 4092 PAR[02...32]
Index*8 RES01 ●
(U)SINT
+ 5119 RES[02…32]
RES01_Bit1
Bit 0
RES[02…32]_Bit1
RES01_Bit2
Bit 1
RES[02…32]_Bit2
RES01_Bit3
Bit 2
RES[02…32]_Bit3
RES01_Bit4
Bit 3
RES[02…32]_Bit4
RES01_Bit5
Bit 4
RES[02…32]_Bit5
RES01_Bit6
Bit 5
RES[02…32]_Bit6
In the "Direct I/O" function model, a special reACTION program is executed in the module in order to manage the
I/O. In addition, cyclic registers are used to exchange information with the CPU. This reproduces the behavior of
a standard module.
Register Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Module - Configuration
131 CfO_LedEnable_AI USINT ●
Module communication
129 Status acknowledgment USINT ●
RTHardwareWarningQuit Bit 2
145 Status - Composite message USINT ●
RTHardwareWarning Bit 2
158 ModuleStatus UINT ●
SensorSupplyX5Ok Bit 2
SensorSupplyX1Ok Bit 3
SensorSupplyX23Ok Bit 4
SensorSupplyX48Ok Bit 5
SupplyIoOk Bit 6
SupplyBusOk Bit 7
162 DigitalStatus UINT ●
DigitalOutput3Overload Bit 2
DigitalOutput4Overload Bit 3
Direct I/O configuration
556 CfO_DigitalDirection UDINT ●
548 CfO_DigitalFilter UDINT ●
564 CfO_AnalogFilter01 UDINT ●
588 CfO_AnalogFilter02
572 CfO_LowerLimit01 UDINT ●
596 CfO_LowerLimit02
580 CfO_UpperLimit01 UDINT ●
604 CfO_UpperLimit02
Direct I/O communication
22 AnalogOutput01 INT ●
14 AnalogInput01 INT ●
18 AnalogInput02
9 StatusInput01 USINT ●
11 StatusInput02
5 Digital outputs USINT ●
DigitalOutput03 Bit 2
... ...
DigitalOutput07 Bit 6
1 Digital inputs I/II USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput08 Bit 7
3 Digital inputs II/II USINT ●
DigitalInput09 Bit 0
This module is equipped with 2 analog inputs. They can be connected individually or together via the same con-
nection on the module.
Name:
CfO_LedEnable_AI
The LedEnable register makes it possible to manually switch the LEDs on/off using connections 2 and 3.
Data type Value
USINT See bit structure
Bit structure:
Bit Name Value Information
0 Connection 2 - LED 1 0 LED inactive
1 LED active
1-2 Reserved -
3 Connection 2 - LED 2 0 LED inactive
1 LED active
4 Connection 3 - LED 1 0 LED inactive
1 LED active
5-6 Reserved -
7 Connection 3 - LED 2 0 LED inactive
1 LED active
Name:
ModuleStatus
This register is used to transfer general status messages for the module.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0-1 Reserved -
2 SensorSupplyX5Ok 0 Encoder power supply failure
1 Encoder power supply on connection 5 OK
3 SensorSupplyX1Ok 0 Encoder power supply failure
1 Encoder power supply on connection 1 OK
4 SensorSupplyX23Ok 0 Encoder power supply failure
1 Encoder power supply on connections 2 and 3 OK
5 SensorSupplyX48Ok 0 Encoder power supply failure
1 Encoder power supply on connections 4 and 8 OK
6 SupplyIoOk 0 I/O power supply outside the valid range
1 I/O power supply is OK
7 SupplyBusOk 0 Bus supply is outside the valid range
1 Bus supply is OK
Name:
DigitalStatus
This register is used to transfer general status messages for the digital channels.
Data type Values
UINT See bit structure.
Bit structure:
Bit Name Value Information
0-1 Reserved -
2 DigitalOutput3Overload 0 Channel OK
1 Channel overloaded
3 DigitalOutput4Overload 0 Channel OK
1 Channel overloaded
4-7 Reserved -
Name:
ReActionCycleTimeValue
ReActionCycleTimeMultiplier
The "TimeValue" and "Multiplier" registers are used to predefine the desired cycle time for the reACTION program.
The "TimeValue" register specifies the actual value, while the "Multiplier" register contains the associated unit of
measure.
The "Multiplier" register is currently permanently set to 1000 in order to predefine the cycle time exactly in the µs
range.
Data type Value
UDINT 1 to 10000
Name:
CfO_PARType01
CfO_PARType[02…04]
PAR data points can be defined for the reACTION program. To enable them, the desired data type must be made
known according to the configuration in Automation Studio.
Data type Value
UDINT See bit structure
Bit structure:
Bit Name Value Information
0-3 Type01 - PAR 1 0000 Inactive
Type02 - PAR 9
Type03 - PAR 17 0001 USINT, BOOL
Type04 - PAR 25
4-7 Type01 - PAR 2 0010 UINT
Type02 - PAR 10
Type03 - PAR 18 0011 UDINT
Type04 - PAR 26
8 - 11 Type01 - PAR 3 0100 Reserved
Type02 - PAR 11
Type03 - PAR 19 0101 SINT
Type04 - PAR 27
0110 INT
12 - 15 Type01 - PAR 4
Type02 - PAR 12
0111 DINT
Type03 - PAR 20
Type04 - PAR 28
1000
16 - 19 Type01 - PAR 5 … Reserved
Type02 - PAR 13 1111
Type03 - PAR 21
Type04 - PAR 29
20 - 23 Type01 - PAR 6
Type02 - PAR 14
Type03 - PAR 22
Type04 - PAR 30
24 - 27 Type01 - PAR 7
Type02 - PAR 15
Type03 - PAR 23
Type04 - PAR 31
28 - 31 Type01 - PAR 8
Type02 - PAR 16
Type03 - PAR 24
Type04 - PAR 32
The reACTION module program is controlled during runtime via the program sequence in the CPU. In the active
state, the reACTION program is then executed independently of the program sequence in the CPU.
Name:
RTEnable
RTHardwareWarningQuit
This register is used to control the reACTION program.
Data type Value
USINT See bit structure
Bit structure:
Bit Name Value Information
0 RTEnable 0 Stops the reACTION program
1 Starts the reACTION program
1 Reserved -
2 RTHardwareWarningQuit 0 No effect
1 Acknowledges warning messages for the inputs and outputs
3-7 Reserved -
Name:
RTEngineRun
RTCycleTimeOverrun
RTHardwareWarning
RTFileInvalid
RTFunctionInvalid
RTInstanceInvalid
RTFileNotLoaded
This register is used to output various status messages.
Data type Value
USINT See bit structure
Bit structure:
Bit Name Value Information
0 RTEngineRun 0 reACTION program inactive
1 reACTION program active
1 RTCycleTimeOverrun 0 Configured RT cycle time observed
1 RT cycle time configuration too short
2 RTHardwareWarning 0 No status messages
(group bit for acyclic status data points) 1 Warning messages for the inputs and outputs
3 Reserved -
4 RTFileInvalid 0 RT program in RAM is OK
(invalid RT program preloaded) 1 RT program invalid in RAM
5 RTFunctionInvalid 0 RT program is OK
(invalid software function) 1 RT program requesting invalid function block
6 RTInstanceInvalid 0 RT program is OK
(invalid hardware instance) 1 RT program requesting invalid I/O
7 RTFileNotLoaded 0 Valid RT program in RT engine
1 No RT program loaded
Name:
RTCycleCounter
The "CycleCounter" register can be used to determine how often the reACTION program has cycled.
Data type Value
UINT 0 to 65535
Name:
RTCycleTime
The "RTCycleTime" register can be used to determine how much time the reACTION module needs to cycle
through the loaded program once.
Data type Value
UINT 0 to 65535: Unit 10 ns
Once started, the reACTION program in the module runs independently. It reads the mappings of the required
inputs and manages the assigned outputs throughout the entire network. In addition, the reACTION program can
interact with the CPU. There are 3 different data point types available for this.
Name:
PAR[01...32]
PAR[01...32]_Bit1
PAR[01...32]_Bit2
PAR[01...32]_Bit3
PAR[01...32]_Bit4
PAR[01...32]_Bit5
PAR[01...32]_Bit6
PAR[01...32]_Bit7
PAR[01...32]_Bit8
Once enabled, the PAR data points are transported cyclically via X2X Link. They are used to transfer information
from the CPU to the reACTION program. They can be used to intervene in the execution of the reACTION program.
Information:
PAR data points DO NOT control the module's outputs directly!
Name:
RES[01...32]
RES[01...32]_Bit1
RES[01...32]_Bit2
RES[01...32]_Bit3
RES[01…32]_Bit4
RES[01...32]_Bit5
RES[01...32]_Bit6
RES[01...32]_Bit7
RES[01...32]_Bit8
Once enabled, the RES data points are transported cyclically via X2X Link. They are used to transfer information
from the reACTION program to the CPU.
Information:
RES data points DO NOT map the module's input directly!
Name:
PVAR[1...256]
RVAR[1...256]
In addition to PAR and RES data points, VAR data points can also be defined in the reACTION program. They are
a direct component of the reACTION program and can be accessed acyclically by the CPU. Like the PAR and RES
data points, the PVAR data points are used to transfer information from the CPU to the reACTION program. The
RVAR data points are used to transfer feedback from the reACTION program to the CPU.
Data type Value
DINT -2,147,483,648 to 2,147,483,647
Read Write
Register Name Data type
Cyclic Acyclic Cyclic Acyclic
6140 + PVAR1
DINT ●
Index*8 PVAR[2...256]
6140 + RVAR1
DINT ●
Index*8 RVAR[2...256]
The following tables provide an overview of I/O channel assignments to reACTION function blocks.
Digital inputs/outputs
Channel Function block
Mapping1) rtiDin rtiDout, rtiDoutTime
X1: DI 1 0x00 Channel 1
X1: DI 2 0x01 Channel 2
X5: DI 3 / DO 3 0x02 Channel 3 Channel 3
X5: DI 4 / DO 4 0x03 Channel 4 Channel 4
X8: DI 5 / DO 5 0x04 Channel 5 Channel 5
X8: DI 6 / DO 6 0x05 Channel 6 Channel 6
X8: DI 7 / DO 7 0x06 Channel 7 Channel 7
X8: DI 8 0x07 Channel 8
X8: DI 9 0x08 Channel 9
1) The "Mapping" specification is needed in the event that multiple physical inputs/outputs must be grouped together in order to be processed by a reACTION
function block (e.g. rtiABRPos) (see "reACTION function blocks - Configuration" on page 855).
Analog inputs
Channel Function block
Mapping1) rtiAin rtiAout
X2/X3: AI 1 0x00 Channel 1
X2/X3: AI 2 0x01 Channel 2
1) The "Mapping" specification is needed in the event that multiple physical inputs/outputs must be grouped together in order to be processed by a reACTION
function block (e.g. rtiABRPos) (see "reACTION function blocks - Configuration" on page 855).
Analog output
Channel Function block
Mapping1) rtiAin rtiAout
X4: AO 1 0x00 Channel 1
1) The "Mapping" specification is needed in the event that multiple physical inputs/outputs must be grouped together in order to be processed by a reACTION
function block (e.g. rtiABRPos) (see "reACTION function blocks - Configuration" on page 855).
Some function blocks in library AsIoRti must be configured before they can be used.
Function block Information
rtiABRPos The module offers the option of using function block rtiABRPos once in the reACTION program. To do so, 3 digital inputs that are
no longer available for rtiDin must be assigned to the function block.
rtiABCnt The module offers the option of using function block rtiABCnt up to 3 times in the reACTION program. To do so, 2 digital inputs
that are no longer available for rtiDin must be assigned to the function blocks as A or B track.
In addition, an external event can be defined for each rtiABCnt function block. The input used for this is also no longer available
for rtiDin.
Function blocks rtiABRPos and rtiABCnt can be used to process the position value of an ABR incremental encoder
in a reACTION task. These function blocks can be used separately or in combination.
rtiABRPos
A A DI 1 Channel 1
B B DI 2
R R DI 3
E1 E1 DI 4
rtiABCnt
A A DI 1 Channel 1
B B DI 2
E1 E1 DI 4
rtiABCnt
A DI 1 Channel 2
B DI 2
E2 E2 DI 5
rtiABCnt
A DI 1 Channel 3
B DI 2
E3 E3 DI 6
rtiABRPos
A A DI 1 Channel 1
B B DI 2
R R DI 3
E1 E1 DI 4
rtiABCnt
A DI 1 Channel 2
B DI 2
E2 E2 DI 5
rtiABCnt
A DI 1 Channel 3
B DI 2
E3 E3 DI 6
Figure 66: Schematic diagram of input signals when using rtiABRPos and rtiABCnt at the same time
Name:
CfO_Config_ABR1
This register specifies the technical characteristics of the connected ABR incremental encoder.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 15 Increments per revolution 0 to 65535 Reference pulse monitoring:
If the reference pulse is different than defined here, this is indi-
cated on the status output of function block rtiABRPos.
16 Inversion of the counting direction set by signals A and B 0 Positive counting direction
1 Negative counting direction
17 - 31 Reserved 0
Name:
CfO_ChannelMapping1_ABR1
CfO_ChannelMapping2_ABR1
Before function blocks rtiABRPos/rtiABCnt can be processed by the reACTION engine, the hardware inputs to be
used by the ABR incremental encoder must be defined on the module. The "ChannelMapping" registers specify
which inputs are interpreted as the A, B, R, E1, E2 and E3 signals.
Data type Value
UDINT See bit structure.
Information:
For information about the relationship between the input on the module and the channel name, see
section "reACTION function blocks - General".
Name:
CfO_ScalingUnits_ABR1
CfO_ScalingIncrements_ABR1
An optional gear ratio can be configured using registers "Units" and "Increments". To do so, the dividend for scaling
is defined in register "Units"; the divisor is defined in register "Increments".
Data type Value Information
UDINT 0 to 4,294,967,295 CfO_ScalingUnits_ABR1: Units per interval
CfO_ScalingIncrements_ABR1: Increments per interval
Example 1
ScalingUnits = 1
ScalingIncrements = 1
Position value (Pos) = ABR increments * ScalingUnits / ScalingIncrements
Position value (Pos) = ABR increments * 1/1
In this example, the ABR position value is output unchanged on output "Pos".
Example 2
ScalingUnits = 10
ScalingIncrements = 4
Position value (Pos) = ABR increments * ScalingUnits / ScalingIncrements
Position value (Pos) = ABR increments * 10/4
In this example, the ABR position value is multiplied by 2.5 and output on output "Pos".
Information:
The encoder values are calculated internally as INT64 values in 32.32 format. On output "Pos" of func-
tion block "rtiABRPos", only the whole number value (INT32) is output for the user. The fixed point
decimal places are used internally to calculate a higher resolution.
This module is equipped with 3 analog and 9 digital channels. When using the "Direct I/O" function model, these
channels can be adapted to the requirements of the specific application.
Name:
CfO_DigitalDirection
This register determines the signal direction of digital channels 3 to 7.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Name Value Information
0-1 Reserved 0
2 Direction - Digital channel 3 0 Input
1 Output
... ... ...
6 Direction - Digital channel 7 0 Input
1 Output
7 Reserved 0
Name:
CfO_DigitalFilter
This register defines the filter time of the digital channels. The filter value affects both the switching delay as well
as the immunity of the channels.
Data type Value
UDINT 0 to 500000: Unit 10 ns
Name:
CfO_AnalogFilter01 to CfO_AnalogFilter02
This register is used to define the filter level of the associated analog channel. The filter value affects both the ADC
conversion rate as well as the precision of the analog value being read.
Data type Value
UDINT 0 to 15
Name:
CfO_LowerLimit01, CfO_UpperLimit01
CfO_LowerLimit02, CfO_UpperLimit02
These register define the lower/upper limit value of the associated analog inputs. If the converted value violates
the user-defined limits, then a corresponding status message is output.
Data type Value
UDINT -32767 to 32767
Name:
AnalogOutput01
This register is used to predefine the value to be output by the analog output.
Data type Value
INT -32767 to 32767
Name:
AnalogInput01
AnalogInput02
This register is used to depict the value read from the respective analog input.
Data type Value
INT -32767 to 32767
Name:
StatusInput01 to StatusInput02
This register is used to depict the status feedback from the respective analog input.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 Broken wire 0 No error
1 Open circuit
1 Overflow 0 No error
1 Violation - Upper limit value
2 Underrun 0 No error
1 Violation - Lower limit value
3-7 Reserved 0
Name:
DigitalOutput03 to DigitalOutput07
This register is used to predefine the value that should be signaled on the digital output.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0-1 Reserved 0
2 DigitalOutput03 0 FALSE
1 TRUE
... ... ...
6 DigitalOutput07 0 FALSE
1 TRUE
7 Reserved 0
Bit structure 1:
Bit Name Value Information
0 DigitalInput01 0 FALSE
1 TRUE
... ... ...
7 DigitalInput08 0 FALSE
1 TRUE
Bit structure 2:
Bit Name Value Information
0 DigitalInput09 0 FALSE
1 TRUE
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
≥200 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
≥200 µs
8.14.1 Summary
Model number Short description Page
X67DS438A X67 digital signal module, 4x I/O-Link master V1.1, 4 digital channels configurable as inputs or outputs, 3-wire 865
connections
X67UM1352 X67 universal mixed module, 1 input for full-bridge strain gauge evaluation, 24-bit, 4 digital inputs, 24 VDC, sink, 910
1 digital output, 0.5 A, source, 1 digital output, 1 A, source
8.14.2 X67DS438A
The module is an IO-Link master that allows intelligent sensor and actuators to be connected in accordance to the
IO-Link standard. The module can be used to operate up to 4 IO-Link devices. All IO-Link channels can also be
operated in SIO mode if desired and thus used as digital inputs or outputs. The module also has 4 additional digital
inputs, which can be used independent of the IO-Link channel configuration.
• 4 IO-Link channels (Port Class A)
• Each IO-Link channel can be configured as a digital input or output (SIO mode)
• Additional digital input per IO-Link connection
• 24 VDC and GND for sensor/actuator supply
Red:
Overload of supply or C/Q line of channel
Blinking
Triple flash
Double flash
Single flash
LED on
LED off
Blink cycle
A B
Connector A: Connector B:
X2X Link interface X2X Link interface
Input Output
Connections 1 to 4:
4x IO-Link channels
4x digital inputs
Connector C: C D Connector D:
24 VDC I/O power supply 24 VDC I/O power supply
Supply Routing
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.14.2.8 Pinout
Shield
1 +24 VDC
X1 to X4 2 I/Q
M12 ① 3 GND
4 C/Q
5 NC
The IO-Link channels and digital inputs are connected using M12 circular connectors.
Connection Pinout
Connector 1/2 Pin Name
1 1 +24 VDC 24 VDC sensor supply
2 2 I/Q Additional digital input
5 3 GND GND for sensor supply
4 C/Q Communication connection (C) or digital input/output (Q)
4 5 NC -
3 Shield connection made via threaded insert in the module.
4
1
5
Connector 3/4
C/Q connector
The following connection options are available depending on the operating mode of an IO-Link channel.
Operating mode Connected element
IO-Link master mode IO-Link device
"Digital output" SIO mode Actuator
"Digital input" SIO mode Sensor
4 C/Q
IO-Link device
1 L+
Device
3 L-
1
5 2
4 C/Q
Actuator
4 +24 VDC
1 ... +24 VDC 1
3 2 ... I/Q
3 GND
5 3 ... GND
2 3 4 ... C/Q
5 ... NC 4 C/Q
Sensor
1 +24 VDC
1 4
3 GND
4 C/Q
1 +24 VDC
Sensor
I/Q connector
The sensors can be connected to the additional digital inputs as follows:
1
2 I/Q
5 2
Sensor
1 +24 VDC
4
1 ... +24 VDC
3 3 GND
2 ... I/Q
5 3 ... GND
5 ... NC
1 +24 VDC
1 4
24 V
Rshunt 24 V
RxD
SPI Connection for
IO-Link channel
System 1 2
SPI TxD
Control
Serial Peripheral Interface Gate driver C/Q 5
UART TxEN control 4 3
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
Read Write
Register Name1) Data type Cyclic Acyclic Cyclic Acyclic
General module properties
513 CfO_SupplyConfig USINT ●
515 CfO_InputFilter USINT ●
4097 + [CO1024] CfO_OperatingMode0[C] USINT ●
General module communication
1 Additional digital inputs USINT ●
DigitalInputPin2_01 Bit 4
... ...
DigitalInputPin2_04 Bit 7
IO-Link - configuration
4100 + [CO1024] CfO_ChannelMode0[C] UDINT ●
4126 + [CO1024] CfO_IdentificationVendorId0[C] UINT ●
4132 + [CO1024] CfO_IdentificationDeviceId0[C] UDINT ●
15372 CfO_TimerCycle UDINT ●
15366 CfO_TimerOffset INT ●
4110 + [CO1024] CfO_ReqCycleMultiple0[C] UINT ●
4114 + [CO1024] CfO_ReqCycleDivisor0[C] UINT ●
4118 + [CO1024] CfO_ReqCycleOffset0[C] UINT ●
4106 + [CO1024] CfO_ReqCycleTime0[C] UINT ●
IO-Link - General
7 SIO: Digital outputs USINT ●
DigitalOutput01 Bit 0
... ...
DigitalOutput04 Bit 3
DisablePowerSupply01 Bit 4
... ...
DisablePowerSupply04 Bit 7
1 SIO: Digital inputs USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput04 Bit 3
3 Sync (status byte) USINT ●
Synchronized01 Bit 0
... ...
Synchronized04 Bit 3
CycleEnd01 Bit 4
... ...
CycleEnd04 Bit 7
5 Overload (status byte) USINT ●
Overload01 Bit 0
... ...
Overload04 Bit 3
33 + [CO16] ChannelStatus0[C] USINT ●
38 + [CO16] FrameCount0[C] SINT ●
4610 + [CO1024] CycleStartNettime0[C] INT ●
4612 + [CO1024] CycleStartNettime0[C] DINT
4618 + [CO1024] CycleEndNettime0[C] INT ●
4620 + [CO1024] CycleEndNettime0[C] DINT
IO-Link - Parameter server for IO-Link device
35 + [CO16] DsControl0[C] USINT ● ●
4164 + [CO1024] CfO_DS_Config0[C] UDINT ●
4265 + [CO1024] DsProgress0[C] USINT ●
4172 + [CO1024] CfO_DS_SaveCtrl0[C] UDINT ●
4180 + [CO1024] CfO_DS_SaveData0[C] UDINT ●
IO-Link - timestamp
4634 + [CO1024] IoLinkTimestampIn0[C] INT ●
4636 + [CO1024] IoLinkTimestampIn0[C] DINT
4641 + [CO1024] IoLinkTimestampInStatusSeq0[C] USINT ●
4738 + [CO1024] IoLinkTimestampOut0[C] INT ●
4740 + [CO1024] IoLinkTimestampOut0[C] DINT
Read Write
Register Offset Name1) Data type Cyclic Acyclic Cyclic Acyclic
General module properties
513 - CfO_SupplyConfig USINT ●
515 - CfO_InputFilter USINT ●
4097 + [CO1024] - CfO_OperatingMode0[C] USINT ●
General module communication
1 20 Additional digital inputs USINT ●
DigitalInputPin2_01 Bit 4
... ...
DigitalInputPin2_04 Bit 7
IO-Link - configuration
4100 + [CO1024] - CfO_ChannelMode0[C] UDINT ●
4126 + [CO1024] - CfO_IdentificationVendorId0[C] UINT ●
4132 + [CO1024] - CfO_IdentificationDeviceId0[C] UDINT ●
15372 - CfO_TimerCycle UDINT ●
15366 - CfO_TimerOffset INT ●
4110 + [CO1024] - CfO_ReqCycleMultiple0[C] UINT ●
4114 + [CO1024] - CfO_ReqCycleDivisor0[C] UINT ●
4118 + [CO1024] - CfO_ReqCycleOffset0[C] UINT ●
4106 + [CO1024] - CfO_ReqCycleTime0[C] UINT ●
IO-Link - General
7 - SIO: Digital outputs USINT ●
DigitalOutput01 Bit 0
... ...
DigitalOutput04 Bit 3
DisablePowerSupply01 Bit 4
... ...
DisablePowerSupply04 Bit 7
1 20 SIO: Digital inputs USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput04 Bit 3
3 21 Sync (status byte) USINT ●
Synchronized01 Bit 0
... ...
Synchronized04 Bit 3
CycleEnd01 Bit 4
... ...
CycleEnd04 Bit 7
5 22 Overload (status byte) USINT ●
Overload01 Bit 0
... ...
Overload04 Bit 3
33 + [CO16] 16 + [CO1] ChannelStatus0[C] USINT ●
38 + [CO16] - FrameCount0[C] SINT ●
4610 + [CO1024] - CycleStartNettime0[C] INT ●
4612 + [CO1024] - CycleStartNettime0[C] DINT
4618 + [CO1024] - CycleEndNettime0[C] INT ●
4620 + [CO1024] - CycleEndNettime0[C] DINT
IO-Link - Parameter server for IO-Link device
35 + [CO16] - DsControl0[C] USINT ●
4164 + [CO1024] - CfO_DS_Config0[C] UDINT ●
4265 + [CO1024] - DsProgress0[C] USINT ●
4172 + [CO1024] - CfO_DS_SaveCtrl0[C] UDINT ●
4180 + [CO1024] - CfO_DS_SaveData0[C] UDINT ●
IO-Link - timestamp
4634 + [CO1024] - IoLinkTimestampIn0[C] INT ●
4636 + [CO1024] - IoLinkTimestampIn0[C] DINT
4641 + [CO1024] - IoLinkTimestampInStatusSeq0[C] USINT ●
4738 + [CO1024] - IoLinkTimestampOut0[C] INT ●
4740 + [CO1024] - IoLinkTimestampOut0[C] DINT
4745 + [CO1024] - IoLinkTimestampOutCtrlSeq0[C] USINT ●
4643 + [CO1024] - IoLinkTimestampOutStatus0[C] USINT ●
IO-Link - Process data
4140 + [CO1024] - CfO_PDO_TypeInfo0[C] UDINT ●
4481 + [CO1024] 0 + [CO4] OutputData0[C]_[N] (U)SINT ●
+ [N4×8] + [N4]
4148 + [CO1024] - CfO_PDI_TypeInfo0[C] UDINT ●
4353 + [CO1024] 0 + [CO4] InputData0[C]_[N] (U)SINT ●
+ [N4×8] + [N4]
Name:
CfO_SupplyConfig
This register can be used to define how the module supply behaves for all channels when an overload occurs.
The following rules apply:
• The overload duration (bits 6-7) corresponds to the time that the supply remains switched on after an
overload is detected. The supply is only cut off if the overcurrent occurs for the entire time configured.
• The switch-off duration (bits 4-5) corresponds to the time that the supply remains switched off after a
overload-related cutoff until it is switched back on.
For this reason, an overload that occurs over a longer period can cause the module supply to cyclically
switch on/off.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Reserved -
4-5 Switch-off duration after overload 00 5 ms
01 20 ms
10 50 ms
11 Forbidden
6-7 Overload duration until error detection 00 1 ms
01 4 ms
10 10 ms
11 Forbidden
Name:
CfO_InputFilter
The value of the input filter affects the response time of all additional digital inputs:
• Lower filter values reduce the input's dead time.
• Higher filter values are recommended for noisy signals.
The filter value can be configured in steps of 100 µs. It makes sense to enter values in appropriate steps, however,
since the input signals are sampled every half of the X2X Link cycle time.
Data type Value
USINT 0 No software filter
1 0.1 ms
... ...
255 25.5 ms
Information:
This register has no effect of the digital inputs of the IO-Link channels in SIO mode.
8.14.2.11.4.3 OperatingMode
Name:
CfO_OperatingMode01 to CfO_OperatingMode04
This register is the same as the first bytes of the "ChannelMode" on page 879 register in the IO-Link configuration.
It can be used to switch a channel's mode at runtime. The rest of the settings for the "ChannelMode" on page 879
register are unchanged and continue to be used in the selected mode.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Channel mode 00 Mode: Inactive
01 Mode: SIO output
The channel's C/Q connector is configured as a digital output.
10 Mode: SIO input
The channel's C/Q connector is configured as a digital input.
11 Mode: Operate
The channel's C/Q connector is configured for IO-Link data transfer.
2-7 Reserved -
An additional digital input is available on the module for each IO-Link channel. Each of these inputs can be used
regardless of how the individual IO-Link channels are configured.
Name:
DigitalInputPin2_01 to DigitalInputPin2_04
This register can be used to read the current state of the additional digital inputs.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Reserved -
4 DigitalInputPin2_01 0 or 1 Input state - Additional digital input 1
5 DigitalInputPin2_02 0 or 1 Input state - Additional digital input 2
6 DigitalInputPin2_03 0 or 1 Input state - Additional digital input 3
7 DigitalInputPin2_04 0 or 1 Input state - Additional digital input 4
In order to establish communication between the module and IO-Link device, the "ChannelMode" on page 879
register must be configured at least. Additional registers allow the data stream to be adjusted and the connected
devices to be checked. This way, the IO-Link communication can be better adjusted to the user's requirements.
8.14.2.11.6.1 ChannelMode
Name:
CfO_ChannelMode01 to CfO_ChannelMode04
The user has the option of setting all channel-specific settings via this register.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Channel mode 00 Mode: Inactive
01 Mode: SIO output
The channel's C/Q connector is configured as a digital output.
10 Mode: SIO input
The channel's C/Q connector is configured as a digital input.
11 Mode: Operate
The channel's C/Q connector is configured for IO-Link data
transfer.
2-7 Reserved -
8-9 Threshold value for overcurrent on the channel1) 00 250 mA
(OverCurrentThreshold in Automation Studio configuration) 01 125 mA
10 75 mA
11 50 mA
10 - 11 Reserved -
12 - 13 Switch-off duration after overload1) 00 20 ms
(OverloadOffTime in Automation Studio configuration) 01 12 ms
10 6.4 ms
11 32 ms
14 - 15 Reserved -
16 - 17 Synchronization mode 00 Free-wheeling (asynchronous)
01 Synchronous (manual)
10 Synchronous (automatic)
11 Forbidden
18 - 19 Reserved -
20 - 23 Inspection level 0 Tests disabled
1 Testing VendorID and DeviceID
24 - 25 IO-Link timestamp 00 No timestamp
01 Input timestamp
10 Output timestamp
11 Input and output timestamps
26 Format of the IO-Link output timestamp2) 0 32-bit (DINT)
1 16-bit (INT)
27 - 32 Reserved -
1) This is overload protection for the C/Q connector of the IO-Link channel (IO-Link data line or SIO output) as opposed to overload protection of the IO-Link
supply.
2) This bit informs the module of the format used for the IoLinkTimestampOut output timestamp. In Automation Studio, this setting is made implicitly in the I/O
configuration together with the selection of the data type for the IO-Link timestamp.
8.14.2.11.6.2 IdentificationVendorID
Name:
CfO_IdentificationVendorId01 to CfO_IdentificationVendorId04
If the Vendor ID is to be verified during startup, then the expected value must be specified in this register. The
verification can be enabled by setting the inspection level in the "ChannelMode" on page 879 register.
Information:
If the expected ID does not match the actual ID of the connected IO-Link device, communication will
not be started for this channel.
Data type Values
UINT 0 to 65,535
8.14.2.11.6.3 IdentificationDeviceID
Name:
CfO_IdentificationDeviceId01 to CfO_IdentificationDeviceId04
If the device ID should be verified during startup, then the expected ID of the IO-Link device must be specified in
this register. The verification can be enabled by setting the inspection level in the "ChannelMode" on page 879
register.
Information:
If the expected ID does not match the actual ID of the connected IO-Link device, communication will
not be started for this channel.
Data type Values
UDINT 0 to 4,294,967,295
At runtime, the module needs to manage data sets from 2 different communication standards. For efficient X2X Link
communication, it is important to make sure that the cycle time of all X2X modules is the same as the bus cycle time.
Cycle times specified in IO-Link
The IO-Link specification defines the timing cycle for polling an IO-Link device. This cycle is called the IO-Link cycle.
Valid IO-Link cycle times range from 0.4 ms to 132.8 ms. There are three ranges:
Area Increment Calculation Valid cycle times
0.4 to 6.3 ms 0.1 ms Cycle time = 0.1 ms * n + 0.4 ms 0.4, 0.5, 0.6 to 6.2, 6.3 ms
6.4 to 32.6 ms 0.4 ms Cycle time = 0.4 ms * n + 6.4 ms 6.4, 6.8, 7.2 to 32.2, 32.6 ms
32.0 to 132.8 ms 1.6 ms Cycle time = 1.6 ms * n + 32.0 ms 32.0, 33.6, 35.2 to 131.2, 132.8 ms
Module timer
An internal module timer that applies globally to all channels serves as the bases for synchronizing the individual
channels. Using this defined time basis, X2X and IO-Link communication can be synchronized with each other. The
period duration for the module timer can be defined in µs. To make communication as efficient and deterministic
as possible, the module timer is configured in automatic mode to match the X2X Link cycle time by default. If
necessary, the start of the module timer can be offset using the "TimerOffset" on page 883.
The module timer's cycle is synchronized automatically with the X2X cycle. Depending of the ratio between the
X2X and module timer cycle time, there may be different ratios between the cycles.
Examples
1 to 1 (X2X cycle 1000, cycle timer 1000) → Always exactly one timer cycle per X2X cycle
2 to 1 (X2X cycle 2000, cycle timer 1000) → Always exactly two timer cycles per X2X cycle
1 to 2 (X2X cycle 1000, cycle timer 2000) → Always exactly one timer cycle per 2 X2X cycles
3 to 5 (X2X cycle 1500, cycle timer 2500) → Always exactly 3 timer cycles per 5 X2X cycles
Synchronous operation
Unlike to free-running operation, synchronous mode and the synchronization cycle time in this operating mode can
be configured individually for each channel.
The SYNCHRONIZED operating mode optimizes the interaction between X2X and IO-Link communication. The
module's resources were designed for this mode, so this configuration should be used for the module's channels.
• In the mode SYNCHRONIZED (automatic), the module calculates the necessary timing parameters itself.
An IO-Link cycle is set that complies with the IO-Link specification. The selected IO-Link cycle time corre-
sponds to the lowest possible multiple of the module timer cycle time that meets the following conditions:
The synchronization ensures that synchronization cycles run parallel with the same synchronization cycle time and
are not offset by timer cycles.
IO-Link cycle time
IO-Link cycle time = Synchronization cycle time / CfO_ReqCycleDivisor0x
The IO-Link cycle is set individually for each channel. If necessary, the IO-Link cycle of a channel can be offset
using a channel-specific offset. This allows channels to be adjusted so that their queries end at the same time,
for example.
With very short cycle times (<1 ms) it is possible that the data cannot be processed fast enough. When this happens,
the subsequent cycles are delayed, which is indicated by the status bit for synchronization being reset.
Information:
If the IO-Link cycle is configured to be less than the device's minimum cycle time, then a cycle that
meets the following conditions is selected automatically:
• Multiple of the module timer cycle
• Valid IO-Link cycle time
• Greater than or equal to the minimum cycle time on the device
Example of a configuration
Channel 2: Multiple = 2
Divisor = 1
Offset = 0
Cycle time = 2 ms
CycleStartNettime02 CycleEndNettime02
Channel 3: Multiple = 3
Divisor = 1
Offset = 0
Cycle time = 3 ms Synchronization cycle 3 ms
Channel 4: Multiple = 3
Divisor = 1
Offset = 1
Cycle time = 3 ms 100 μs 3 ms Cycle offset
Synchronization time
TimerCycle
Name:
CfO_TimerCycle
This register can be used to configure synchronous IO-Link communication. If the module timer is not meant to be
operated with the same cycle, then it is possible to define the period length of the module timer in µs using this
register. This allows channels to be synchronized with one another even if using a very unusual X2X cycle time.
Data type Values
UDINT 0 to 4,294,967,295
TimerOffset
Name:
CfO_TimerOffset
This register can be used to configure synchronous IO-Link communication. If the module timer should run with
a timing offset to X2X Link, this register can be used to define how many microseconds in front of or behind the
module timer should be shifted.
Data type Values
INT -32768 to 32767
ReqCycleMultiple
Name:
CfO_ReqCycleMultiple01 to CfO_ReqCycleMultiple04
This register can be used to manually configure the synchronization cycle time. This cycle time can be used together
with the "ReqCycleDivisor" on page 883 register to define the IO-Link cycle time. See "Synchronous operation"
on page 881 for an example.
Information:
If this register is not defined for an IO-Link channel or predefined with zero, the values of the Cycle-
Multiple and CycleDivisor registers are calculated automatically when the module is started.
Data type Values
UINT 0 to 65,535
ReqCycleDivisor
Name:
CfO_ReqCycleDivisor01 to CfO_ReqCycleDivisor04
This register can be used together with "ReqCycleMultiple" on page 883 to define the IO-Link cycle time. See
"Synchronous operation" on page 881 for an example.
Information:
If this register is not defined for an IO-Link channel or predefined with zero, the values of the Cycle-
Multiple and CycleDivisor registers are calculated automatically when the module is started.
Data type Values
UINT 0 to 65,535
ReqCycleOffset
Name:
CfO_ReqCycleOffset01 to CfO_ReqCycleOffset04
This register can be used to offset the IO-Link cycle of a channel with the synchronization cycle.
This offset may be sensible if all channels are running with the same cycle time. In this case, all channels are
finished at the same time, which could result in the module not being able to process all data in time. Offsets can
be used to prevent these sorts of bottlenecks so that data traffic can be divided up more evenly.
Data type Value Information
UINT 0 to 65535 Configured in timer cycles
ReqCycleTime
Name:
CfO_ReqCycleTime01 to CfO_ReqCycleTime04
This register is used with free-running (asynchronous) IO-Link communication. It contains the explicitly defined
cycle time for the IO-Link query in µs.
Information:
• In free-running mode, no net time data points are permitted to be used except for "CycleEnd-
Nettime" on page 887.
• If the cycle time predefined for IO-Link communication falls below the device's minimum cycle
time, the IO-Link data is queried using the device's minimum cycle time.
• For efficient IO-Link communication, the configured query time should correspond to the spec-
ified IO-Link cycle times. If a value is unsuitable, the next suitable cycle time is used automat-
ically.
Data type Value Information
UINT 0 to 65535 In 100 μs steps
The following registers are used for general communication. They are mainly used for repair status and runtime
control.
Name:
DigitalOutput01 to DigitalOutput04
DisablePowerSupply01 to DisablePowerSupply04
If a channel is being operated in SIO mode (SIO output), this register can be used to control the SIO output of the
IO-Link channel. It is also possible switch on/off the supply for each IO-Link channel individually.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 DigitalOutput01 0 Reset digital SIO output 01
1 Set digital SIO output 01
... ...
3 DigitalOutput04 0 Reset digital SIO output 04
1 Set digital SIO output 04
4 DisablePowerSupply01 0 Switch on supply for IO-Link channel 01
1 Switch off supply for IO-Link channel 01
... ...
7 DisablePowerSupply04 0 Switch on supply for IO-Link channel 04
1 Switch off supply for IO-Link channel 04
Name:
DigitalInput01 to DigitalInput04
If a channel is being operated in SIO mode (SOI input), this register can be used to read the input status of the
channel.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 DigitalInput01 0 Reset digital SIO input 01
1 Set digital SIO input 01
... ...
3 DigitalInput04 0 Reset digital SIO input 04
1 Set digital SIO input 04
4-7 Reserved -
Name:
Synchronized01 to Synchronized04
CycleEnd01 to CycleEnd04
The module uses this status register to report whether error-free communication with the device was possible
during the last module cycle.
• The CycleEnd bits indicate whether the last data transmitted to the IO-Link device has been processed.
The CycleEnd bits are reset after each X2X cycle.
• The synchronized bits indicate that the channel is synchronized without errors.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Synchronized01 0 Synchronization for channel 1 not OK
1 Synchronization for channel 1 OK
... ...
3 Synchronized04 0 Synchronization for channel 4 not OK
1 Synchronization for channel 1 OK
4 CycleEnd01 0 I/O cycle end: No new IO-Link data
1 I/O cycle end: New data transmitted and received
... ...
7 CycleEnd04 0 I/O cycle end: No new IO-Link data
1 I/O cycle end: New data transmitted and received
Name:
Overload01 to Overload04
This status register is used by the module to report whether an overload in the form of overcurrent or overtemper-
ature occurred in the channel supply.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 Overload01 0 Channel 1: No overload
1 Channel 1: Overload
... ...
3 Overload04 0 Channel 4: No overload
1 Channel 4: Overload
4-7 Reserved -
8.14.2.11.7.5 ChannelStatus
Name:
ChannelStatus01 to ChannelStatus04
This register is used to show the current status of the IO-Link channel.
Data type Value Information Status
USINT 0 Channel inactive Disabled
1 Use as digital SIO output SIO mode
2 Use as digital SIO input
3 Startup of IO-Link device, PREOPERATIONAL mode Communication is running but
no process data is exchanged.
However, acyclic access is al-
so possible.
4 Operation, OPERATE mode Communication is running
5 Operation, parameter server data OK
6 Parameter server: Upload active Communication is running and
7 Parameter server: Download active process data is being returned.
8 Parameter server: Deleting active
9 IODD parameters are written
10 to 19 Reserved
21 General error in the parameter server. For example: Communication is running.
• However, an error has oc-
Parameter server not supported
curred on the parameter serv-
• Error accessing an object that is managed by the para- er.
meter server Parameter server errors can be
• Internal error acknowledged via the "DsCon-
22 Parameter server locked by IO-Link device trol" on page 888 register.
23 Parameter server empty:
Tried to load data to the IO-Link device even though no data is
saved in EEPROM
41 Reserved
42 The DeviceID and VendorID of the connected IO-Link device do Communication is running but
not match the predefined IDs. no process data is exchanged.
43 Reserved However, acyclic access is al-
44 Timestamp error so possible.
The IO-Link device does not support IO-Link timestamps.
45 Error starting up the device No communication
46 to 255 Reserved
8.14.2.11.7.6 FrameCount
Name:
FrameCount01 to FrameCount04
Received IO-Link frames are counted in this register. Unlike the sync bits, the FrameCount register ensures that
all frames are actually recognized. This is the case even if X2X cycles are lost or if the IO-Link cycle is faster than
the X2X cycle.
Data type Values
SINT -128 to 127
8.14.2.11.7.7 CycleStartNettime
Name:
CycleStartNettime01 to CycleStartNettime04
This register can be used to read out the value of the net time at the start of the last IO-Link cycle.
Data type Value
INT -32768 to 32767
DINT -2,147,483,648 to 2,147,483,647
8.14.2.11.7.8 CycleEndNettime
Name:
CycleEndNettime01 to CycleEndNettime04
This register can be used to read out the value of the net time at the end of the last IO-Link cycle.
Data type Value
INT -32768 to 32767
DINT -2,147,483,648 to 2,147,483,647
8.14.2.11.8.1 DsControl
Name:
DsControl01 to DsControl04
This register can be used to control the "parameter server" on page 887 manually. Each action is carried out
exactly once when the corresponding value is set. If the same action should be executed multiple times, then this
register must be set to the value 0 beforehand.
Data type Value Information
USINT 0 No action
1 Operating mode of the parameter server: Automatic upload and download
2 Upload if data storage parameters are available on the device
3 Download if data storage parameters are available in the CPU's memory and the device can
process them
4 Acknowledge error status from parameter server
(see "ChannelStatus" on page 886: error messages 21 to 28)
5 Delete data storage parameters on the CPU's memory
6 Start dummy upload. Starts an upload without saving the data. This can be used to acknowledge
an upload request.
7 to 255 Reserved
8.14.2.11.8.2 DsProgress
Name:
DsProgress01 to DsProgress04
The module uses this register to report the progress of the upload or download from the parameter server. The
values from 0 to 100 can be used for implementing a progress display.
Data type Value
USINT 0 to 100
8.14.2.11.8.3 CfO_DS_Config
Name:
CfO_DS_Config01 to CfO_DS_Config04
This register can be used to set the behavior of the parameter server module (when operating the parameter server
manually). By doing this, a corresponding reaction is assigned to every trigger event.
Data type Value
UDINT See bit structure.
Bit structure:
Bit Event Value Reaction
0-3 The device ID of the connected device no longer matches the 000 No response
device ID saved together with the parameters. 001 Cancel
010 User-defined reaction. See "ChannelStatus" on page 886: Sta-
tus message 25
011 Upload (default value)
4-7 The device transmitted an upload request. 000 No response
001 Cancel
010 User-defined reaction. See "ChannelStatus" on page 886: Sta-
tus message 26
011 Upload (default value)
8 - 11 A new parameter checksum was detected when starting the 000 No response
device. 001 Cancel
010 User-defined reaction. See "ChannelStatus" on page 886: Sta-
tus message 27
011 Upload
100 Download (default value)
12 - 15 The serial number of the connected device no longer matches 000 No response
the serial number saved together with the parameters. 001 Cancel
010 User-defined reaction. See "ChannelStatus" on page 886: Sta-
tus message 24
011 Upload
100 Download (default value)
16 - 23 Reserved -
24 - 26 Specifies the order that individual events are checked 000 DeviceID, serial number, upload request, parameter checksum
(default value)
001 DeviceID, serial number, parameter checksum, upload request
010 DeviceID, upload request, parameter checksum, serial number
011 DeviceID, upload request, serial number, parameter checksum
100 DeviceID, parameter checksum, upload request, serial number
101 DeviceID, parameter checksum, serial number, upload request
27 - 31 Reserved -
Some IO-Link devices must be instructed to save transferred data storage parameters in remanent memory after
a download. In order to apply data storage parameters with these devices to remanent memory, a specific save
command must be sent additionally (e.g. value 163 on index 2, subindex 0).
Because such a save command isn't provided in the specification, the option of configuring the device-specific save
command and the corresponding index/subindex has been implemented in the module. If a save command is con-
figured, then it is automatically sent after successfully downloading data storage parameters or offline configuration.
CfO_DS_SaveCtrl
Name:
CfO_DS_SaveCtrl01 to CfO_DS_SaveCtrl04
This register is used together with "CfO_DS_SaveData" on page 890.
Some IO-Link devices must be instructed to save transferred data storage parameters in remanent memory after
a download. In order for these parameters to be applied to remanent memory on these devices, the recorded
index and subindex in these registers must be sent together with the save command (e.g. value 163 on index 2,
subindex 0).
Data type Value
UDINT See bit structure.
Bit structure:
Bit Description Value Information
0 - 15 Index 0 to 255 Device-specific index for save command
16 - 24 Subindex 0 to 255 Device-specific subindex for save command
24 - 26 Data length 0 Save command disabled
1 to 4 The data length of the save command estimated by the device
in bytes
27 - 31 Reserved
CfO_DS_SaveData
Name:
CfO_DS_SaveData01 to CfO_DS_SaveData04
This register is used together with "CfO_DS_SaveCtrl" on page 890 and contains the value written to the index
configured in the CfO_DS_SaveCtrl register.
Data type Values
UDINT 0 to 4,294,967,295
The IO-Link timestamp register allows the relation of IO-Link timestamps to the net time of a controller, and vice
versa.
This makes it possible to relate the times of value changes of the IO-Link device exactly to the net time of the
controller, and vice versa. Events can be captured or triggered with a higher timing resolution than would be possible
with the IO-Link cycle. This allows a highly precise timed response from the controller to signals from the sensor,
and vice versa. The resolution depends on the devices being used.
Examples
• For an input device, the timestamp is saved directly by the device when a certain event occurs (e.g. photo-
electric sensor triggered) and then transferred via IO-Link. The IO-Link master converts this IO-Link-spe-
cific timestamp to a net time timestamp that can be used across the system.
• In the output direction, a converted timestamp is transferred to the device via IO-Link. The output device
responds at the corresponding instant and executes the intended event (e.g. closes a switch).
Information:
• The timestamp function is device-specific and not supported by every IO-Link device.
• This function cannot be used if the channel is being operated in free-running mode (asynchro-
nous).
8.14.2.11.9.1 IoLinkTimestampIn
Name:
IoLinkTimestampIn01 to IoLinkTimestampIn04
This register indicates the net time instant at which the application event occurred.
Data type Value
INT -32768 to 32767
DINT -2,147,483,648 to 2,147,483,647
8.14.2.11.9.2 IoLinkTimestampInStatusSeq
Name:
IoLinkTimestampInStatusSeq01 to IoLinkTimestampInStatusSeq04
This register indicates information about the timestamp input.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Sequence number 0 to 15 The sequence number is increased by 1 each time a valid time-
stamp is received. If the sequence number is increased by more
than 1, it means that the event was lost.
4 Event 1 triggered by application x Signal state when timestamp occurs
5 Event 2 triggered by application x Signal state when timestamp occurs
Example: Signal state when timestamp occurs
– Photoelectric sensor triggered → This bit = 0
– Photoelectric sensor not triggered → This bit = 1
6 Reserved -
7 Timestamp error 0 No error
1 An error occurred on the IO-Link device. Possible causes:
• More timestamps were generated than could be trans-
ferred.
• The value of the IO-Link timestamp exceeded the per-
mitted range of values.
In both cases, it may help to reduce the IO-Link cycle time.
8.14.2.11.9.3 IoLinkTimestampOut
Name:
IoLinkTimestampOut01 to IoLinkTimestampOut04
The user can write the net time for the output timestamp to this register.
The net time is automatically converted to an IO-Link timestamp. The event is triggered at the defined net time.
The "IoLinkTimestampOutStatus" on page 892 register is used for acknowledgment.
Information:
The net time must be at least three IO-Link cycles in the future; otherwise, a warning is set in IoLink-
TimestampOutStatus.
This register's data type must match the format configured in register "ChannelMode" on page 879,
bit 26.
Data type Value
INT -32768 to 32767
DINT -2,147,483,648 to 2,147,483,647
8.14.2.11.9.4 IoLinkTimestampOutCtrlSeq
Name:
IoLinkTimestampOutCtrlSeq01 to IoLinkTimestampOutCtrlSeq04
This register is used to control how the timestamp is applied.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Sequence number 0 to 15 Output timestamp and application event bits applied when the
sequence number is increased by 1
4 Application event 1 x Output state at the timestamp
5 Application event 2 x Output state at the timestamp
6 Acknowledge warning 0 Do not acknowledge
1 Acknowledge warning
7 Acknowledging errors 0 Do not acknowledge
1 Acknowledging errors
8.14.2.11.9.5 IoLinkTimestampOutStatus
Name:
IoLinkTimestampOutStatus01 to IoLinkTimestampOutStatus04
This register is used to show the status of the timestamp output.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Acknowledgment of sequence number 0 to 15 When an output timestamp has been successfully applied, then
the sequence number from "IoLinkTimestampOutCtrlSeq" on
page 891 is acknowledged here.
4-5 Reserved -
6 Warning 0 No warning
1 A timestamp was not at least 3 cycles in the future, so output
may be delayed.
7 Errors 0 No error
1 More timestamps were transferred to the module than could be
output.
The input or output data stream of IO-Link process data can be broken down into any structure. The structure is
configured as follows:
• The firmware provides 8 32-bit registers for each channel to allow the mapping of maximum 32 bytes of
IO-Link process data.
• The I/O configuration sets the type with which the register should be registered. So that the length is correct,
the "PDI_TypeInfo" on page 894 register (for input data) or "PDO_TypeInfo" on page 893 register (for
output data) is used to configure how many bytes of the IO-Link data stream should be copied to the
register, or vice versa.
Limitations:
8 registers with 32 bits are available per channel. This makes it possible to register any 8 data points in this way.
If this is not sufficient, it is also possible to use a byte array. The user then has to make sure that the bytes are
divided up into the necessary data types.
Information:
With a bit array, it is important that the byte arrangement is correct within the register. The module
DOES NOT make any necessary conversions from big-endian to little-endian or reverse.
Example
Dividing up elements from an IO-Link data stream into multiple 32-bit registers:
IO-Link frame SINT INT DINT
8.14.2.11.10.1 PDO_TypeInfo
Bit structure:
Bit Description Value Information
0 to 3 IO-Link information 1 0000 Array[4] of Bytes
0001 USINT
0010 SINT
0011 UINT
0100 INT
0101 UDINT
0110 DINT
0111 REAL
1000 - 1111 Reserved
4-7 IO-Link information 2 Possible values are identical with IO-Link information 1
8 - 11 IO-Link information 3
12 - 15 IO-Link information 4
16 - 19 IO-Link information 5
20 - 23 IO-Link information 6
24 - 27 IO-Link information 7
28 - 31 IO-Link information 8
Information:
With setting 0 (Array[4] of Bytes), the bytes are copied from the IO-Link data stream unchanged. In all
other modes, the byte order is changed (from big endian to little endian).
8.14.2.11.10.2 OutputData
Name:
OutputData01_1 to OutputData04_8
Output data from the IO-Link device in IO-Link communication mode. A byte array is also a possible alternative.
The user then has to make sure that the bytes are divided up into the necessary data types.
The "PDO_TypeInfo" on page 893 register can be used to configure how many bytes should be applied to the
IO-Link frame from the output registers.
Data type Value
USINT 0 to 255
SINT -128 to 127
UINT 0 to 65535
INT -32,768 to 32,767
UDINT 0 to 4,294,967,295
DINT -2,147,483,648 to 2,147,483,647
REAL -3.4E38 – 3.4E38
8.14.2.11.10.3 PDI_TypeInfo
Bit structure:
Bit Description Value Information
0 to 3 IO-Link information 1 0000 Array[4] of Bytes
0001 USINT
0010 SINT
0011 UINT
0100 INT
0101 UDINT
0110 DINT
0111 REAL
1000 - 1111 Reserved
4-7 IO-Link information 2 Possible values are identical with IO-Link information 1
8 - 11 IO-Link information 3
12 - 15 IO-Link information 4
16 - 19 IO-Link information 5
20 - 23 IO-Link information 6
24 - 27 IO-Link information 7
28 - 31 IO-Link information 8
Information:
With setting 0 (Array[4] of Bytes), the bytes are copied from the IO-Link data stream unchanged. In all
other modes, the byte order is changed (from big endian to little endian).
8.14.2.11.10.4 InputData
Name:
InputData01_1 to InputData04_8
Input data from the IO-Link device in IO-Link communication mode. A byte array is also a possible alternative. The
user then has to make sure that the bytes are divided up into the necessary data types.
Data type Value
USINT 0 to 255
SINT -128 to 127
UINT 0 to 65535
INT -32,768 to 32,767
UDINT 0 to 4,294,967,295
DINT -2,147,483,648 to 2,147,483,647
REAL -3.4E38 – 3.4E38
The IO-Link information data is used to read device-specific values as well as to check the IO-Link configuration.
It is only possible to read the following registers.
8.14.2.11.11.1 VendorId
Name:
VendorId01 to VendorId04
This register contains the unique vendor ID of the IO-Link device.
Data type Values
UINT 0 to 65,535
8.14.2.11.11.2 DeviceId
Name:
DeviceId01 to DeviceId04
This register contains the unique ID of the IO-Link device.
Data type Values
UDINT 0 to 4,294,967,295
8.14.2.11.11.3 FunctionId
Name:
FunctionId01 to FunctionId04
This register contains the device's function class provided by the vendor.
Data type Values
UINT 0 to 65,535
8.14.2.11.11.4 CycleTime
Name:
CycleTime01 to CycleTime04
Some IO-Link devices cannot handle high-speed cycles and require a higher cycle time. This register can be used
to read back the channel's IO-Link cycle time currently being used. The time used for communication is always a
multiple of 100 µs, e.g. 50 for 5 ms cycle time.
Data type Value Information
UINT 0 to 65535 Specified in 100 μs steps
8.14.2.11.11.5 CycleMultible
8.14.2.11.11.6 CycleDivisor
Name:
CycleDivisor01 to CycleDivisor04
This register can be used to read back the "divisor" on page 883 currently being used for the channel's IO-Link
cycles.
Data type Values
UINT 0 to 65,535
8.14.2.11.11.7 MinCycleTime
Name:
MinCycleTime01 to MinCycleTime04
This register can be used to read back the minimum IO-Link cycle time. The minimum IO-Link cycle time depends
on the IO-Link device and is read from the module after establishing communication with the IO-Link device.
Data type Values
UINT 0 to 65,535
8.14.2.11.11.8 PDI_Size
Name:
PDI_Size01 to PDI_Size04
This register can be used to read back the size of the input process data defined by the device. This value is read
when starting up the IO-Link device.
Data type Value
USINT 0 to 255
8.14.2.11.11.9 PDO_Size
Name:
PDO_Size01 to PDO_Size04
This register can be used to read back the size of the output process data defined by the device. This value is
read when starting up the IO-Link device.
Data type Value
USINT 0 to 255
Name:
Baudrate01 to Baudrate04
This register can be used to read back the baud rate defined by the IO-Link device. This value is read when starting
up the IO-Link device.
Data type Value Information
USINT 1 COM1 = 4.8 kbit/s
2 COM2 = 38.4 kbit/s
3 COM3 = 230.4 kbit/s
8.14.2.11.11.11 IoLinkVersionID
Name:
IoLinkVersionID01 to IoLinkVersionID04
This register can be used to read back the IO-Link version.
Data type Value Information
USINT 16 (= 0x10) V1.0
17 (= 0x11) V1.1
IO-Link devices are able to send events that can be retrieved using cyclic data points. The events are written to a
FIFO buffer that has space for up to 16 elements. If events are not retrieved or more than 16 events take place,
then the oldest event is automatically discarded.
Sequence for reading an event
• A new event was triggered by the device. This is indicated by an increase in "EventPortSeq" on page 896.
• Event data can be read using the "EventQualifier" on page 897 and "EventCode" on page 897 registers.
• The event must be acknowledged. To do so, the sequence number from "EventPortSeq" on page 896
must be copied to the sequence number from "EventQuit" on page 897.
• The next event is specified only after the event is acknowledged.
8.14.2.11.12.1 EventPortSeq
Name:
EventPortSeq
As soon as a new event is generated by an IO-Link device, the sequence number is increased in this register. The
affected channel number is also displayed.
Data type Value
USINT 0 to 255
Bit structure:
Bit Description Value Information
0-3 Sequence number 0 to 15
4-5 IO-Link channel number 00 IF1 (channel 1)
01 IF2 (channel 2)
10 IF3 (channel 3)
11 IF4 (channel 4)
6-7 Reserved 0
8.14.2.11.12.2 EventQualifier
Name:
EventQualifier
This register contains additional information about the event.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 Instance layer generated by the event 000 Unknown
001 Hardware
010 Data exchange layer of the IO-Link device
011 Application layer of the IO-Link device
100 Application
3 Cause of the event 0 Device
1 Master
4-5 Type of event 00 Reserved
01 Information
10 Warning
11 Errors
6-7 Mode of the event 00 Reserved
01 One-time event
10 Event no longer reported (e.g. voltage OK again)
11 Event reported (e.g. voltage too low)
8.14.2.11.12.3 EventCode
Name:
EventCode
The event code of the event being transferred is indicated in this register. The event codes may be vendor-specific
event codes or event codes defined in the IO-Link specification.
Data type Values
UINT 0 to 65,535
8.14.2.11.12.4 EventsLeft
Name:
EventsLeft
This register indicates the number of as yet unprocessed events in the FIFO buffer.
Data type Value
USINT 0 to 16
8.14.2.11.12.5 EventQuit
Name:
EventQuit
This register can be used to acknowledge errors. This is done by copying the sequence number of the event to
be acknowledged to this register.
Data type Value
USINT 0 to 15
8.14.2.11.12.6 EventQuitReadBack
Name:
EventQuitReadBack
This register contains the sequence number of the most recently acknowledged event.
Data type Value
USINT 0 to 15
Information:
Another way to configure an IO-Link device is to use library "AsIoLink". This library is not part of this
description.
Direct configuration takes place independently of the B&R hardware and software used. Parameters can be entered
via an additional configuration device, integrated display or other operating elements on the IO-Link device, for
example.
Firmware
External
Automation Studio PLC with resources for
Automation Studio project Automation Runtime IO-Link module IO-Link device configuration
Advantage
It is advantageous for individual devices because it is possible to start up the IO-Link device using resources from
the manufacturer.
If problems arise while configuring the IO-Link device, checking which software component is causing the error
is not necessary.
Disadvantage
Each individual IO-Link device must be manually preconfigured.
In some circumstances, the user must have several development environments on one computer.
Using the integrated FDT container, IO-Link devices can be configured using Automation Studio. IODD/DTM sup-
port for IO-Link devices is available online as well as offline.
Information:
In order to use the FDT container to configure IO-Link devices, a corresponding hardware description
file (IODD or DTM) must be downloaded and installed.
IODD/DTM (online)
During online configuration, the FDT container in Automation Studio communicates directly with the IO-Link device.
After the connection is established, the configuration parameters can be modified as needed.
FDT
container
and
IODD/DTM
Configuration
from IODD/DTM
Advantage
No additional devices are usually required to configure the IO-Link device. All settings can be modified by the user
in a single development environment.
Disadvantage
Each IO-Link device must be configured individually.
IODD/DTM (offline)
During offline configuration, the parameter set that can be entered via the IODD or DTM file is stored in the Au-
tomation Studio project. During the download, the parameter set for the IO-Link device is transferred to the con-
troller and then from there to the IO-Link device via the module.
Procedure
1 When the IO-Link module is started, the checksum (CRCFDT) for the current parameter set is calculated.
2 If the previously stored checksum deviates from the present calculated one, the parameter set is transferred
to the IO-Link device.
3 After the parameter set has been transferred, the associated checksum (CRCFDT) is saved on the IO-Link
module and can be used for future comparisons.
4 If the parameter set changes, a new checksum (CRCFDT) results from the succeeding reboot of the controller
and steps 2 and 3 are repeated.
Advantage
The configuration parameters of the IO-Link device are stored as part of the Automation Studio project. The user
can work within a development environment and define all settings.
For series-produced machine, the IO-Link devices used later do not have to be preconfigured individually.
Disadvantage
The configuration options for the IO-Link device depend on the extent of the IODD or DTM file.
Information:
Before the parameter set is transferred to the IO-Link device, the controller checks if the connected
device has the correct device ID. If the device ID is incorrect, the procedure is canceled. The parameter
set is not transferred, and the checksum is not saved.
The function "parameter server" is defined in IO-Link specification V1.1 and later. This function allows an IO-Link
device to be replaced without requiring any specialist knowledge on the part of maintenance personnel.
This is done by storing the configuration loaded on the IO-Link device on the IO-Link module. In addition, a check-
sum (CRCPServ) is calculated to allow a simple comparison of the parameter sets.
Procedure
1 If the IO-Link device supports the function "parameter server", on startup it calculates the checksum (CR-
CPServ) for its current parameter set.
2 If the currently calculated checksum (CRCPServ) deviates from the one previously stored on the IO-Link
module, then there is a difference between the parameter set of the IO-Link device and the one currently
stored on the module.
3 The device ID and serial number of the IO-Link device are evaluated in order to determine whether the
parameter set must be uploaded by the device or downloaded by the IO-Link module.
a) If the device ID has been changed, then a different device type was recognized. In this case, the
parameter set of the IO-Link device must be read out and saved on the IO-Link module. In addition,
the current checksum (CRCPServ) is stored on the IO-Link module.
b) If the device ID is unchanged but the serial number is different, it is assumed that the IO-Link device
was replaced by a device of the same type.
In this case, the parameter set stored on the IO-Link module is downloaded to the IO-Link device.
c) If the device ID and serial number remain unchanged, it is assumed that a new configuration has
been loaded on the IO-Link device. In this case, the new parameter set on the IO-Link device is
read out and saved on the IO-Link module. In addition, the current checksum (CRCPServ) is stored
on the IO-Link module.
Firmware
and
Configuration of the CRC (PServ)
parameter server calculation
and
CRC (PServ) External
Automation Studio PLC with resources for
Automation Studio project Automation Runtime IO-Link module IO-Link device configuration
IODD/DTM support and the parameter server can be used together. The two functions work independently of one
another, but they also affect each other.
If the IO-Link device is reconfigured using the FDT container (IODD/DTM), the IO-Link device then calculates
the new checksum (CRCPServ). Afterwards, the modified data is read back by the parameter server of the IO-Link
module.
If the IO-Link device is replaced, the system only checks the checksum (CRCPServ). The parameter set of the FDT
container goes unnoticed because the checksum (CRCFDT) in the project on the controller still matches the stored
checksum (CRCFDT) on the IO-Link module (for the sequence, see "Parameter server" on page 901).
The command interface offers the option of accessing the object dictionary of the IO-Link device using the index
and subindex. Access is also possible using the AsIOLink library or FlatStream.
Information:
With this interface, up to the first 4 bytes of an object can be read or written.
8.14.2.11.14.1 ParameterIndexOut
Name:
ParameterIndexOut
This register defines the index of the object in the object dictionary that should be accessed.
Data type Values
UINT 0 to 65,535
8.14.2.11.14.2 ParameterSubIndexOut
Name:
ParameterSubIndexOut
This register defines the subindex of the object in the object dictionary that should be accessed.
Data type Value
USINT 0 to 255
8.14.2.11.14.3 ParameterCtrlOut
Name:
ParameterCtrlOut
This register defines the type of access to be used.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Sequence number 0 to 3
2-3 IO-Link channel number 0 IF1 (channel 1)
1 IF2 (channel 2)
2 IF3 (channel 3)
3 IF4 (channel 4)
4-6 Data length 0 to 4
7 Read or write 0 Read
1 Write
8.14.2.11.14.4 ParameterDataOut
Name:
ParameterDataOut_0
This register contains the data that should be written.
Data type Values
UDINT 0 to 4,294,967,295
8.14.2.11.14.5 ParameterCtrlIn
Name:
ParameterCtrlIn
This register monitors the status of the access.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Sequence confirmation 0 to 3
2-3 IO-Link channel number 0 IF1 (channel 1)
1 IF2 (channel 2)
2 IF3 (channel 3)
3 IF4 (channel 4)
4-6 Data length 0 to 4
7 Error bit 0 No error
1 Error, the error code is indicated in "ParameterDataIn" on page
904.
8.14.2.11.14.6 ParameterDataIn
Name:
ParameterDataIn_0
After a successful read operation, this register contains the input data. In the event of an error, it contains the
error codes.
Data type Values
UDINT 0 to 4,294,967,295
Error display
• If the "error code" on page 908 does not equal 8 (e.g. error reported by device), then the LSB receives
the error code.
• If an error is reported by the device, then the error specified by the IO-Link device is also indicated.
UDINT
MSB LSB
Reserved IO-Link error code Additional IO-Link error code 8
With this module, the user has the option of communicating with the connected IO-Link device via FlatStream.
Communication takes place separately with respect to timing, i.e. output data is transferred completely from the
CPU to the module and checked. Only then does the module initiate the actual communication with the IO-Link
device.
The module acts the same way in the input direction. Messages from the IO-Link device must have been received
completely by the X2X module before the FlatStream message is generated and transmitted to the CPU.
To be able to use IO-Link communication via FlatStream, you must define an individual array in the application.
The following must be defined for the query in the direction CPU → Module → IO-Link device:
• Module's channel number
• Frame number for the query
• Type of query
• The corresponding IO-Link data must then be attached depending on the query.
The response consists of the following parts:
• The frame number, access type and type of query are repeated.
• The module generates the error bit and manages the confirmation bit.
• The successfully received IO-Link information or corresponding "error code" on page 908 is then ap-
pended.
Module-specific FlatStream array for IO-Link communication
Bytes Name Value Description
1 Channel number 1 to 4
2 Frame number 0 to 255 This number is repeated in the module's response. This allows
the later response from the module to be distinctly attributed to
the request.
3 See Byte 3 x
... IO-Link data or error code Depends on byte 3
Byte 3
Bit Description Value Information
0-2 Type of query 0 Access to object dictionary
1 Access to inputs' process data
2 Access to outputs' process data
3 Read individual event
4 Read multiple events
5 Enable event forwarding
6 Disable event forwarding
7 Announcement of automatically forwarded event
3-4 Reserved -
5 Confirm 0 Message without query
1 Response to query1)
6 Status bit (for response frame) 0 No error
1 Error
7 Access types 0 Read
1 Write
1) This confirmation bit is additionally set with the response to a query. The response for confirming a query frequently contains additional data that must be
processed.
Depending on the type of query, different IO-Link data results that must be appended to the FlatStream array.
Request
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
4 High index number 0 to 255 Index of the desired IO-Link parameter
5 Low index number 0 to 255
6 Subindex number 0 to 255 Subindex of the IO-Link parameter
7 to ... Data 0 to 255 Optional, for write operation
Response
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
4 to ... Data / "Error code" on page 908 0 to 255 Omitted if data has been written successfully
Request
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
4 Data 0 to 255 Optional, for write operation
Response
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
4 Data / "Error code" on page 908 0 to 255 Omitted if data has been written successfully
Request
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
Response
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
4 Event counter - Current Bit 0 to 3 Number of attached events
Event counter - Pending Bit 4 to 7 Number of pending events
5 Event 0 – Event qualifier 0 to 255 See "EventQualifier" on page 897.
6 Event 0 – High event data 0 to 255
7 Event 0 – Low event data 0 to 255
8 - 10 Event 1
x to (x + 2) Event n1)
1) Applies only if multiple events were queried with byte 3 (bits 0 to 2 = 4). Only 1 event comes with byte 3 (bits 0 to 2 = 3).
or
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
4 "Error code" on page 908 0 to 255
Request
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
Response
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
or
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
4 "Error code" on page 908 0 to 255
After enabling event forwarding, events no longer have to be queried cyclically. The module generates the event
as soon as the corresponding event occurs.
Message
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
4 Event counter - Current Bit 0 to 3 Number of attached events
Event counter - Pending Bit 4 to 7 Number of pending events
5 Event 0 – Event qualifier 0 to 255 See "EventQualifier" on page 897.
6 Event 0 – High event data 0 to 255
7 Event 0 – Low event data 0 to 255
8 - 10 Event 1
x to (x + 2) Event n1)
1) Applies only if multiple events were queried with byte 3 (bits 0 to 2 = 4). Only 1 event comes with byte 3 (bits 0 to 2 = 3).
or
Bytes Name Value Description
1 to 3 Module-specific FlatStream array for IO-Link communication
4 "Error code" on page 908 0 to 255
Queries can be made via registers or FlatStream. If a query fails, the error bit is set and an error code generated. In
addition to general error codes, vendor-specific error codes can also occur. Information about these can be found
in the operating instructions for the corresponding IO-Link device.
Error indicators in the registers
• The error bit is set in "ParameterCtrIn" on page 904, whereas the length of the error code is indicated in
the data length parameter.
• "ParameterDataIn" on page 904 contains the error code.
Error indicators in FlatStream
If the error bit is set, the FlatStream bytes are put together as follows:
• Bytes 1 to 3: Module-specific FlatStream array
• Byte 4: Error code; if 8 (error reported by device), bytes 5 and 6 will include additional information.
• Bytes 5 and 6: Error code from IO-Link device
• ...
Error codes
Code Function
1 No device on this channel
2 IO-Link disabled
3 Communication error with device
4 Query buffer full
5 Event queue empty
6 Query not supported
7 Object access failed
8 Object access, error reported by device
9 Incorrect channel number
10 Write operation not possible
11 No input data available
12 Frame too short
13 One or more events discarded
14 Device has no input data
15 Device has no output data
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
Without IO-Link (all channels in SIO-Modus) ≥200 µs
With IO-Link ≥400 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Without IO-Link (all channels in SIO-Modus) ≥200 µs
With IO-Link ≥400 µs (depends on the minimum IO-Link cycle time of the IO-Link device)
8.14.3 X67UM1352
This module enables the remote connection of a force gauge using a strain gauge with a converter resolution of
up to 24-bit. The data rate can be set from 0.26 ms to 100 ms. This module concept requires compensation in
the measurement system. This compensation eliminates the absolute uncertainty in the measurement circuit, such
as component tolerances, effective bridge voltage or zero point offset. The measurement precision refers to the
absolute (compensated) value, which will only change as a result of changes in the operating temperature. The
module is also equipped with 4 digital inputs and 2 digital outputs.
■ 1 strain gauge input with 24-bit resolution
■ High data output rate (10 to 3,750 Hz)
■ Adjustable gain
■ 1 high-side output 24 VDC, 0.5 A
■ 1 high-side output 24 VDC, 1.0 A
Digital input
Digital inputs/outputs 1 to 2
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.14.3.8 Pinout
Shield
1 +24 VDC
X1 to X2 2 DI
M12 ① 3 GND
4 DO
5 NC
Shield
1 +24 VDC
X3 2 DI-3
M12 ① 3 GND
4 DI-4
5 GND
Shield
1 SG VCC
X4 2 Input +
M12 ① 3 SG GND
4 Input -
5 Shield
8.14.3.8.1 Connections X1 to X2
8.14.3.8.2 Connections X3
Connection Pinout
Connection 4 Pin Connection 4
1 SG VCC Power supply for strain gauge ca. 4.4 V (min. resistance 75 Ω)
3
2 2 Input + Differential input +
3 SG GND
4 Input - Differential input -
5 Shield
4 Shielding also provided by threaded insert in the module
1
5
DI
Sensor
+24 VDC 1 2
5 Connection x
+24 VDC
Actuator
4 3
DO
GND
+24 VDC
Sensor 1
DI
GND 1 2
5 Connection X
+24 VDC
Sensor 2
4 3
DI
GND
+U
1 2
4 3
Digital inputs
DI1/2
DE3
VDR
1 4
VDR
C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
1
Input value Connection 4 5
2
A/D converter
4 3
Digital outputs
Connector 1/2
2 3
Output status Control logic,
5
temperature
cutoff
4
1
I/O status
LED (orange)
VDR
Filter (t IN)
Output monitoring
Status of the
actuator power supply
Monitoring of C D
output power supply +24 V
2 2
1 4 1
Transil diode 4
3 3
GND
VDR
Reverse polarity protection
>30 V
Output power supply
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
8.14.3.12.4 Configuration
Name:
ConfigOutput01
The gain and data rate of the A/D converter can be configured in this register.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Gain 00 1
01 2
10 4
11 8
2-4 Data rate (samples per second): 000 10
001 50
010 60
011 1001)
100 5001)
101 1000
111 2000
111 3750
5-7 Reserved -
8.14.3.12.5 Communication
Name:
DigitalInput01
DigitalInput01 to DigitalInput04
This register indicates the input state of digital inputs 1 to 4.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input status of digital input 1
... ...
3 DigitalInput04 0 or 1 Input status of digital input 4
Name:
DigitalOutput01
DigitalOutput01 to DigitalOutput02
This register is used to store the switching state of digital outputs 1 to 2.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
1 DigitalOutput02 0 Digital output 02 reset
1 Digital output 02 set
Name:
AnalogInput01
This register contains the raw value determined by the A/D converter for the full-bridge strain gauge with 24-bit
resolution.
Data type Value Information
DINT 0x7FFF FFFF to 0x8000 0001 Valid range of values. 1 LSB = 0x0000 0100.
0x7FFF FFFF Overflow
0x8000 0000 Underflow
0x8000 0000 Invalid value
Resolution in bits
Through the sigma-delta conversion of the analog signals on the module, there is, in principal, an effective resolution
of the displayed value. This means that even if the A/D converter on the module always outputs a 24-bit value,
then the attainable resolution according to calculations is always smaller than the 24-bit converter resolution (see
following example). The effective resolution depends on the data rate and measurement area (see section "A/D
converter configuration" on page 919).
Because of the conversion method, a data rate of 10 Hz and a specified measurement area of 15.625 mV/V result
in an effective resolution of 18.9 bits:
32-bit
24-bit
31 24 16 8 0
0 0 0 0 0 0 0 0
18.9-bit
The amount of information in the low-order bits (marked in gray) can only be used to a certain extent and is subject
to heavy disturbances.
The following table shows how the effective resolution (in bits), or the RMS value range of the strain gauge value
depend on the module configuration (data rate, measurement area).
Data rate (Hz) Gain / Resolution
1 2 4 8
±125 mV/V ±62.500 mV/V ±31.250 mV/V ±15.625 mV/V
Bits Range of Bits Range of Bits Range of Bits Range of values
values values values
10 21.0 ±1,000,000 20.4 ±691,800 19.9 ±490,000 18.9 ±244,000
50 19.9 ±490,000 19.4 ±346,000 18.8 ±230,000 17.9 ±122,000
60 19.8 ±450,000 19.3 ±320,000 18.8 ±230,000 17.8 ±114,000
100 19.6 ±297,000 19.1 ±280,000 18.5 ±185,000 17.4 ±86,000
500 18.6 ±200,000 18.0 ±130,000 17.3 ±80,000 16.3 ±40,000
1000 17.5 ±92,000 17.2 ±75,000 16.5 ±46,000 15.6 ±25,000
2000 17.0 ±65,500 16.6 ±49,600 16.1 ±35,000 15.3 ±20,000
3750 16.6 ±49,600 16.2 ±37,600 15.7 ±26,600 14.7 ±13,000
Name:
StatusInput01
This register is used to indicate the status of the A/D converter.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 OpenLine 01 0 No error
1 Open circuit of measuring bridge
Name:
OutputError01 to OutputError02
This register is used to indicate the status of digital outputs 1 to 2.
Data type Values
USINT See bit structure.
Bit structure:
Bit Name Value Information
0 OutputError01 0 Channel 01: No error
1 Channel 01: Error occurred
1 OutputError02 0 Channel 02: No error
1 Channel 02: Error occurred
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
250 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
250 µs
8.15.1 Summary
Model number Short description Page
X67PS1300 X67 system supply module 24 VDC, X2X Link power supply 15 W, reverse polarity protection, short circuit 923
protection, overload protection, parallel connection possible, redundancy operation possible
8.15.2 X67PS1300
This system supply module converts the 24 VDC I/O supply voltage into the electrically isolated X2X Link power
supply. The module provides 15 W of output power for additional X67 modules on the bus.
■ Electrical isolation of supply and X2X Link power supply
■ Protection with redundancy during parallel operation of multiple system supply modules
■ Short circuit protection
■ Overload protection
X2X Link
Connection A: Input
Connection B: Output
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
With a large number of modules connected, the following must be taken into account:
• The total power consumption of all modules is not permitted to exceed 15 W.
• In addition, the internal resistance of the connection cable between the individual modules must also be
taken into account.
Example
20 X67DM1321 modules should be connected to the system supply module.
This is possible according to the data sheet: 20 * 0.75 W power consumption = 15 W total power consumption.
The sum of the cable resistance values when using long connection cables between the modules, however, results
in an additional voltage drop. The supply voltage drops below 18 V, which results in a situation where the function-
ality of the modules can no longer be guaranteed.
Solution: Add more system supply modules
Information:
This module does not have to be integrated in the project in Automation Studio.
8.16.1 Summary
Model number Short description Page
X67AT1311 X67 temperature input module, 4 inputs for resistance measurement, 2-wire or 4-wire measurement, PT100, 927
resolution 0.01 K
X67AT1322 X67 temperature input module, 4 inputs for resistance measurement, 2-wire or 4-wire measurement, PT100, 937
PT1000, KTY10, KTY84, resolution 0.1 K
X67AT1402 X67 temperature input module, 4 thermocouple inputs, Type J, K, S, resolution 0.1 K 947
8.16.2 X67AT1311
The module is a temperature module for PT100 resistance temperature sensors. The sensors can be connected
using 2-wire or 4-wire connections.
■ 4 inputs for resistance temperature measurement with 3 different resolutions
■ Additional direct resistance measurement with 2 different resolutions
■ Configuration can be set for each channel
■ 2-wire and 4-wire measurement
X2X Link
Connection A: Input
Connection B: Output
Analog inputs 1 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.16.2.8 Pinout
Shield
1 Sensor +
X1 to X4 2 Sense +
M12 ① 3 Sensor -
4 Sense -
5 Shield
8.16.2.8.1 Connections X1 to X4
4
1
5
Connections 3/4
4-wire connections
Sensor +
+ 1 2
Sense +
Sensor
Sense -
5 Connection x
Sensor - 4 3
-
①
① Braided shield, twisted wires
2-wire connections
Sensor/Sense +
+ 1 2
Sensor
② 5 Connection x
Sensor/Sense - 4 3
-
①
① Braided shield, twisted wires
②
Pins 1 + 2 and 3 + 4 must be connected in the connector!
1.014 mA
Multiplexer
Channel 1
Channel 2 - 4
I/O status
+LB
LED
(green)
Channel 1
1...4
Channel 2 - 4
1 2
A/D converter
Channel
Multiplexer
Channel 2 - 4
-LB
Monitoring the
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
All pending signals from enabled inputs are converted to digital values in every conversion cycle.
Unnecessary inputs can be disabled to reduce the I/O update time. Inputs can also be disabled temporarily if they
are not needed for a certain amount of time.
The conversion time needed for an individual input is calculated using the following formula:
The time saved per disabled input depends on the selected filter:
Filter frequency Filter time Time saved per input Digital converter resolution
50 Hz 20 ms 75 ms 16-bit
60 Hz 16.67 ms 65 ms 16-bit
250 Hz 4 ms 27 ms 13-bit
500 Hz 2 ms 21 ms 10-bit
Example
Inputs are filtered using a 50 Hz filter.
Example 1 Example 2
Switched on inputs 1 to 4 1 and 3
Conversion time 300 ms 150 ms
8.16.2.11.5 Configuration
Name:
ConfigOutput01
Filtering for all analog inputs can be configured via this register.
Data type Value Filter frequency Filter time Digital converter resolution
USINT 0 50 Hz 20 ms 16-bit
1 60 Hz 16.67 ms 16-bit
2 250 Hz 4 ms 13-bit
3 500 Hz 2 ms 10-bit
≥4 Values ≥4 are not permitted.
Name:
ConfigOutput02
This register can be used to configure the sensor type for individual channels.
This module is designed for temperature and resistance measurement. The measurement range must be specified
because of the different calibration values for temperature and resistance.
The default setting for all channels is ON. To save time, individual channels can be switched off (see "conversion
cycle" on page 934).
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Analog input 1 Measurement range for PT100 temperature measurement
0000 -200 to 270°C, resolution 0.01 K/bit
0001 -200 to 645°C, resolution 0.02 K/bit
0010 -200 to 850°C, resolution 0.04 K/bit
0011 to 0100 Reserved
Measurement range for resistance measurement
0101 0.01 to 420 Ω, resolution 0.01 Ω/bit
0110 0.005 to 210 Ω, resolution 0.005 Ω/bit
Disable input
0111 Input switched off
1000 to 1111 Reserved
4-7 Analog input 2 x For possible values, see analog input 1
8 - 11 Analog input 3 x For possible values, see analog input 1
12 - 15 Analog input 4 x For possible values, see analog input 1
8.16.2.11.6 Communication
Name:
Temperature01 to Temperature04
Resistor01 to Resistor04
This register is used to indicate the analog input values depending on the configured operating mode.
Data type Value Input signal
INT -20000 to 27000 (for -200.0 to 270.0°C) Sensor type PT100, resolution 0.01 K/bit
-10000 to 32250 (for -200.0 to 645.0°C) Sensor type PT100, resolution 0.02 K/bit
-5000 to 21250 (for -200.0 to 850.0°C) Sensor type PT100, resolution 0.04 K/bit
UINT 1 to 42000 (for 0.01 to 420 Ω Resistance measurement
1 to 42000 (for 0.005 to 210 Ω Resistance measurement
In order for the user to always be supplied with a defined output value, the following must be taken into consid-
eration:
• Up to the first conversion, 0x8000 is output.
• After switching the mode until the first conversion:
Name:
StatusInput01
The module's inputs are monitored. A change in the monitoring status generates an error message.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Channel 1 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
... ...
6-7 Channel 4 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
8 - 15 Number of conversion cycles performed x
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
200 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Inputs
8.16.3 X67AT1322
The module is a temperature module for KTY10, KTY84, PT100 and PT1000 resistance temperature sensors. The
sensors can be connected using 2-wire or 4-wire connections. The sensor type can be configured for each input.
■ 4 inputs for resistance temperature measurement
■ PT100, PT1000 and other resistance temperature sensors
■ Direct resistance measurement
■ Configurable sensor type per channel
■ 2-wire and 4-wire measurement
X2X Link
Connection A: Input
Connection B: Output
Analog inputs 1 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.16.3.8 Pinout
Shield
1 Sensor +
X1 to X4 2 Sense +
M12 ① 3 Sensor -
4 Sense -
5 Shield
8.16.3.8.1 Connections X1 to X4
4
1
5
Connections 3/4
4-wire connections
Sensor +
+ 1 2
Sense +
Sensor
Sense -
5 Connection x
Sensor - 4 3
-
①
① Braided shield, twisted wires
2-wire connections
Sensor/Sense +
+ 1 2
Sensor
② 5 Connection x
Sensor/Sense - 4 3
-
①
① Braided shield, twisted wires
②
Pins 1 + 2 and 3 + 4 must be connected in the connector!
250 µA
Multiplexer
Channel 1
Channel 2 - 4
I/O status
+LB
LED
(green)
Channel 1
Channel 2 - 4
1...4
1 2
Multiplexer
Input value 5
A/D Channel
converter 4 3 2-4
Channel 1
Channel 1
Channel 2 - 4
-LB
Monitoring the
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
All pending signals from enabled inputs are converted to digital values in every conversion cycle.
Unnecessary inputs can be disabled to reduce the I/O update time. Inputs can also be disabled temporarily if they
are not needed for a certain amount of time.
The conversion time needed for an individual input is calculated using the following formula:
The time saved per disabled input depends on the selected filter:
Filter frequency Filter time Time saved per input Digital converter resolution
50 Hz 20 ms 75 ms 16-bit
60 Hz 16.67 ms 65 ms 16-bit
250 Hz 4 ms 27 ms 13-bit
500 Hz 2 ms 21 ms 10-bit
Example
Inputs are filtered using a 50 Hz filter.
Example 1 Example 2
Switched on inputs 1 to 4 1 and 3
Conversion time 300 ms 150 ms
8.16.3.11.5 Configuration
Name:
ConfigOutput01
Filtering for all analog inputs can be configured via this register.
Data type Value Filter frequency Filter time Digital converter resolution
USINT 0 50 Hz 20 ms 16-bit
1 60 Hz 16.67 ms 16-bit
2 250 Hz 4 ms 13-bit
3 500 Hz 2 ms 10-bit
≥4 Values ≥4 are not permitted.
Name:
ConfigOutput02
This register can be used to configure the sensor type for individual channels.
This module is designed for temperature and resistance measurement. The sensor type must be specified because
of the different calibration values for temperature and resistance.
The default setting for all channels is ON. To save time, individual channels can be switched off (see "conversion
cycle" on page 944).
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-3 Analog input 1 0000 Sensor type KTY10
0001 Sensor type KTY84
0010 PT100 sensor type
0011 PT1000 sensor type
0100 Reserved
0101 Resistance measurement 0.1 to 4500 Ω
0110 Resistance measurement 0.05 to 2250 Ω
0111 Input switched off
1000 to 1111 Reserved
4-7 Analog input 2 x For possible values, see analog input 1
8 - 11 Analog input 3 x For possible values, see analog input 1
12 - 15 Analog input 4 x For possible values, see analog input 1
8.16.3.11.6 Communication
Name:
Temperature01 to Temperature04
Resistor01 to Resistor04
This register is used to indicate the analog input values depending on the configured operating mode.
Data type Value Input signal
INT -500 to 1450 (for -50.0 to 145.0°C) Sensor type KTY10-6
-400 to 3000 (for -40.0 to 300.0°C) Sensor type KTY84-130
-2000 to 8500 (for -200.0 to 850.0°C) Sensor type PT100 and PT1000
UINT 1 to 45000 (for 0.1 to 4500 Ω or 0.05 to 2250 Ω) Resistance measurements
Name:
StatusInput01
The module's inputs are monitored. A change in the monitoring status generates an error message.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Channel 1 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
... ...
6-7 Channel 4 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
8 - 15 Number of conversion cycles performed x
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
200 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Inputs
8.16.4 X67AT1402
The module is a temperature module for type J, K and S thermocouple sensors. The selected sensor type is used
for all 4 inputs.
■ 4 inputs for thermocouple sensors
■ Sensor types J, K and S
■ Additional direct raw value measurement for other sensor types
■ Terminal temperature compensation
X2X Link
Connection A: Input
Connection B: Output
Analog inputs 1 to 4
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Name
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module
4
1
The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.
Information:
The maximum permissible current for the circular connector is 8 A (4 A per pin).
Connection Pinout
2 Pin Name
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connector (female) in module, routing of I/O power supply
1
8.16.4.8 Pinout
Shield
1 Compensation
X1 to X4 2 AI +
M12 ① 3 GND
4 AI -
5 Shield
8.16.4.8.1 Connections X1 to X4
4
1
5
Connections 3/4
1 2
TC 1
5 Connection x
4 3
1 2
TC 1
5 Connection x
4 3
PT1000 (integrated)
I/O status
+LB Uref
LED
(green)
Instrument 1...4
drive
1 2
Channel 1
5
Multiplexer
Input value
A/D 4 3
converter
Channel
2-4
-LB
Channel 1
Multiplexer
Channel
2-4
Monitoring the
I/O power supply C +24 V D
2 2
1 4 4 1
3 3
Reverse polarity protection
GND
VDR
>30 V
In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "General data points" on page 958.
1) The offset specifies the position of the register within the CAN object.
The module is equipped with integrated temperature compensation. The following applies:
• Possible for inputs 1 to 4.
• The sensor for measuring the terminal temperature is integrated in the plug housing (X67AC9A02).
• The module independently recognizes that a terminal temperature compensation is necessary using this
type of plug.
• At least one terminal temperature sensor is required to determine the temperature measured at the J, K
and S thermocouple sensors; otherwise, 0x7FFF is generally output.
Examples of possible configurations
Plug with sensor on the input Description
1 The terminal temperature compensation for all 4 inputs is performed using the temperature measured on input
1.
1 and 3 The terminal temperature compensation for inputs 1 and 2 is performed using the temperature measured on
input 1.
The terminal temperature compensation for inputs 3 and 4 is performed using the temperature measured on
input 3.
1 to 4 The terminal temperature compensation is performed using the temperature measured on the respective input.
Raw value measurement functions with and without terminal temperature measurement. If another sensor type is
used as J, K and S, then the terminal temperature must be measured on at least one input. Based on this value,
the user must then implement terminal temperature compensation.
All pending signals from enabled inputs are converted to digital values in every conversion cycle. A terminal tem-
perature measurement also takes place.
Unnecessary inputs can be disabled to reduce the I/O update time. Inputs can also be disabled temporarily if they
are not needed for a certain amount of time. The measurement of the terminal temperature cannot be switched off.
The conversion time needed for an individual input is calculated using the following formula:
The amount of time saved per channel depends on the filter time:
Filter Filter time Amount of time saved per input Digital converter resolution
50 Hz 20 ms 75 ms 16-bit
60 Hz 16.67 ms 65 ms 16-bit
250 Hz 4 ms 27 ms 13-bit
500 Hz 2 ms 21 ms 10-bit
Example
Inputs are filtered using a 50 Hz filter.
Example 1 Example 2
Switched on inputs 1 to 4 1, 3
Conversion time for inputs 248 ms 124 ms
Conversion time for terminal temperature 62 ms 62 ms
Conversion time total 310 ms 186 ms
8.16.4.11.5 Configuration
Name:
ConfigOutput01
Filtering for all analog inputs can be configured via this register.
Data type Value Filter frequency Filter time Digital converter resolution
USINT 0 50 Hz 20 ms 16-bit
1 60 Hz 16.67 ms 16-bit
2 250 Hz 4 ms 13-bit
3 500 Hz 2 ms 10-bit
≥4 Values ≥4 are not permitted.
Bit structure:
Bit Description Value Information
0-2 Defines sensor 000 Conversion switched off
001 Sensor type J
010 Sensor type K
011 Sensor type S
100 to 101 Conversion switched off
110 Raw value without linearization and terminal temperature com-
pensation; Resolution 1 µV for a measurement range of ±32.767
mV
111 Raw value without linearization and terminal temperature com-
pensation; Resolution 2 µV for a measurement range of ±65.534
mV
3 Reserved 0
4 Input 1 0 Input 1 switched off
1 Input 1 switched on
... ...
7 Input 4 0 Input 4 switched off
1 Input 4 switched on
8.16.4.11.6 Communication
Name:
Temperature01 to Temperature04
This register is used to indicate the analog input values depending on the configured operating mode.
Data type Value Input signal
INT -2100 to 12000 (for -210.0 to 1200.0°C) Sensor type J
-2700 to 13720 (for -270.0 to 1372.0°C) Sensor type K
-500 to 17680 (for -50.0 to 1768.0°C) Sensor type S
In order for the user to always be supplied with a defined output value, the following must be taken into consid-
eration:
• Up to the first conversion, 0x8000 is output.
• After switching the sensor type, 0x8000 is output until the first conversion.
• If the input is not switched on, 0x8000 is output.
• At least one terminal temperature sensor is required to determine the temperature measured at the J, K
and S thermocouple sensors. Otherwise, 0x7FFF is generally output.
Name:
TerminalTemperature01 to TerminalTemperature04
These registers output the terminal temperature in 0.1°C steps.
Data type Value Information
INT -250 to 850 for -25.0 to 85.0°C
In order for the user to always be supplied with a defined output value, the following must be taken into consid-
eration:
• Up to the first conversion, 0x000 is output.
• If some of the terminal temperature sensors are not installed, then the value 0x7FFF is output on the inputs
which are not installed.
• If there is no terminal temperature sensor installed at all, then the value 0x7FFF is generally output.
Name:
StatusInput01
The module's inputs are monitored. A change in the monitoring status generates an error message.
Data type Values
UINT See bit structure.
Bit structure:
Bit Description Value Information
0-1 Channel 1 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
... ...
6-7 Channel 4 00 No error
01 Below lower limit value
10 Above upper limit value
11 Open circuit
8 - 15 Number of conversion cycles performed x
Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID
Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0
Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V
The minimum cycle time defines how far the bus cycle can be reduced without communication errors occurring.
Note that very fast cycles decrease the idle time available for handling monitoring, diagnostics and acyclic com-
mands.
Minimum cycle time
200 µs
The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Inputs
9 Additional information
9.1.1 FirmwareVersion
Name:
FirmwareVersion
The firmware version of the module can be read using this data point.
The last two positions correspond to the number after the decimal point.
Example: 345 corresponds to 3.45.
Data type Values Information
UINT 1 to 99 Release version of older modules or developmental versions of new modules
100 to 29999 Release version
30000 to 59999 Test version
9.1.2 HardwareVariant
Name:
HardwareVariant
The hardware variant of the module can be read using this data point.
Data type Values
UINT 0 to 65,535
9.1.3 ModuleID
Name:
ModuleID
The module ID of the module can be read using this data point. The module hardware ID can be found in the
corresponding module documentation (B&R ID code in the technical data). In addition, a serial number is printed
on each electronics module; the module hardware ID corresponds to the first 4 positions of the serial number. (See
figure: Hardware ID is also colored black.)
Information:
IDs beginning from 9999 are printed as hexadecimal numbers and must be converted to their decimal
values for comparison!
9.1.4 SerialNumber
Name:
SerialNumber
The module's unique serial number can be read using this data point.
The complete serial number is made up of ModuleID and SerialNumber as follows: Serial number = (Hardware
ID * 1E+7) + SerialNumber
The serial number is printed in decimal form on the module's housing.
Example
Hardware ID = (decimal) 1213
Serial number = (decimal) 671339
Serial number = 1213 * 10000000 + 671339 = 12130671339
9.1.5 ModuleOK
Name:
ModuleOK
Whether the module is physically present in the slot or not can be read from this register.
Data type Value Information
BOOL 0 Module not ready for operation
1 Module connected and configured
9.1.6 StaleData
Name:
StaleData
Whether the transferred data originates from the current cycle or a previous cycle can be read using this data point.
This error can result from cycle times that are too short or disturbances in module communication, for example.
Information:
This data point is only valid if ModuleOK = 1.
Data type Value Information
BOOL 0 Data originates from the current cycle
1 Data does not originate from the current cycle
B&R offers an additional communication method for some modules. "Flatstream" was designed for X2X and
POWERLINK networks and allows data transmission to be adapted to individual demands. Although this method
is not 100% real-time capable, it still allows data transmission to be handled more efficiently than with standard
cyclic polling.
Field device
X2X Language
Cyclic call
mittels I/O Mapping
B&R CPU
Cyclic call B&R module Cyclic
PLC or B&R field device
von Cachewerten Cache values Communication
Bus controller
Acyclic call
mittels
Bibliotheksfunktionen
B&R CPU
Acyclic call B&R module Cyclic
PLC or B&R field device
von Cachewerten Cache values Communication
Bus controller
Flatstream
The physical properties of the bus system limit the amount of data that can be transmitted during one bus cycle.
With Flatstream communication, all messages are viewed as part of a continuous data stream. Long data streams
must be broken down into several fragments that are sent one after the other. To understand how the receiver puts
these fragments back together to get the original information, it is important to understand the difference between
a message, a segment, a sequence and an MTU.
Message
A message refers to information exchanged between 2 communicating partner stations. The length of a message
is not restricted by the Flatstream communication method. Nevertheless, module-specific limitations must be con-
sidered.
Segment (logical division of a message):
A segment has a finite size and can be understood as a section of a message. The number of segments per
message is arbitrary. So that the recipient can correctly reassemble the transmitted segments, each segment
is preceded by a byte with additional information. This control byte contains information such as the length of a
segment and whether the approaching segment completes the message. This makes it possible for the receiving
station to interpret the incoming data stream correctly.
Sequence (how a segment needs to be arranged physically):
The maximum size of a sequence corresponds to the number of enabled Rx or Tx bytes (later: "MTU"). The
transmitting station splits the transmit array into valid sequences. These sequences are then written successively
to the MTU and transmitted to the receiving station where they are put back together again. The receiver stores
the incoming sequences in a receive array, obtaining an image of the data stream in the process.
With Flatstream communication, the number of sequences sent are counted. Successfully transmitted sequences
must be acknowledged by the receiving station to ensure the integrity of the transmission.
MTU (Maximum Transmission Unit) - Physical transport:
MTU refers to the enabled USINT registers used with Flatstream. These registers can accept at least one sequence
and pass it on to the receiving station. A separate MTU is defined for each direction of communication. OutputMTU
defines the number of Flatstream Tx bytes, and InputMTU specifies the number of Flatstream Rx bytes. The MTUs
are transported cyclically via the X2X Link network, increasing the load with each additional enabled USINT register.
Properties
Flatstream messages are not transmitted cyclically or in 100% real time. Many bus cycles may be needed to trans-
mit a particular message. Although the Rx and Tx registers are exchanged between the transmitter and the receiver
cyclically, they are only processed further if explicitly accepted by register "InputSequence" or "OutputSequence".
Behavior in the event of an error (brief summary)
The protocol for X2X and POWERLINK networks specifies that the last valid values should be retained when
disturbances occur. With conventional communication (cyclic/acyclic data queries), this type of error can generally
be ignored.
In order for communication to also take place without errors using Flatstream, all of the sequences issued by the
receiver must be acknowledged. If Forward functionality is not used, then subsequent communication is delayed
for the length of the disturbance.
If Forward functionality is being used, the receiving station receives a transmission counter that is increment-
ed twice. The receiver stops, i.e. it no longer returns any acknowledgments. The transmitting station uses Se-
quenceAck to determine that the transmission was faulty and that all affected sequences will have to be repeated.
Requirements
Before Flatstream can be used, the respective communication direction must be synchronized, i.e. both commu-
nication partners cyclically query the sequence counter on the opposite station. This checks to see if there is new
data that should be accepted.
Communication
If a communication partner wants to transmit a message to its opposite station, it should first create a transmit
array that corresponds to Flatstream conventions. This allows the Flatstream data to be organized very efficiently
without having to block other important resources.
PLC / Bus controller Module
Module-internal Module-internal
Transmit array OutputMTU Receive buffer Receive array
Type: USINT Type: USINT Type: USINT Type: USINT
Module-internal Module-internal
Receive array InputMTU Transmit buffer Transmit array
Type: USINT Type: USINT Type: USINT Type: USINT
5 registers are available for configuring Flatstream. The default configuration can be used to transmit small amounts
of data relatively easily.
Information:
The CPU communicates directly with the field device via the "OutputSequence" and "InputSequence"
as well as the enabled Tx and Rx bytes. For this reason, the user needs to have sufficient knowledge
of the communication protocol being used on the field device.
To use Flatstream, the program sequence must first be expanded. The cycle time of the Flatstream routines must
be set to a multiple of the bus cycle. Other program routines should be implemented in Cyclic #1 to ensure data
consistency.
At the absolute minimum, registers "InputMTU" and "OutputMTU" must be configured. All other registers are filled in
with default values at the beginning and can be used immediately. These registers are used for additional options,
e.g. to transmit data in a more compact way or to increase the efficiency of the general procedure.
The Forward registers extend the functionality of the Flatstream protocol. This functionality is useful for substan-
tially increasing the Flatstream data rate, but it also requires quite a bit of extra work when creating the program
sequence.
Name:
OutputMTU
InputMTU
These registers define the number of enabled Tx or Rx bytes, i.e. the maximum size of a sequence. The user must
consider that the more bytes made available also means a higher load on the bus system.
Information:
In the rest of this documentation, the names "OutputMTU" and "InputMTU" do not refer to the registers
explained here. Instead, they are used as synonyms for the currently enabled Tx or Rx bytes.
Data type Values
USINT See the module-specific register overview (theoretically: 3 to 27).
When using Flatstream, the communication direction is very important. For transmitting data to a module (output
direction), Tx bytes are used. For receiving data from a module (input direction), Rx bytes are used.
Registers "OutputSequence" and "InputSequence" are used to control and ensure that communication is taking
place properly, i.e. the transmitter issues the directive that the data should be accepted and the receiver acknowl-
edges that a sequence has been transmitted successfully.
Name:
"Format of Flatstream" in Automation Studio
On some modules, this function sets how the Flatstream input and output bytes (Tx or Rx bytes) are transferred.
• Packed: Data is transferred as an array.
• Byte-by-byte: Data is transferred as individual bytes.
Name:
TxByte1 to TxByteN
RxByte1 to RxByteN
(The value the number N is different depending on the bus controller model used.)
The Tx and Rx bytes are cyclic registers used to transport the payload data and the necessary control bytes.
The number of active Tx and Rx bytes is taken from the configuration of registers "OutputMTU" and "InputMTU",
respectively.
In the user program, only the Tx and Rx bytes from the CPU can be used. The corresponding counterparts are
located in the module and are not accessible to the user. For this reason, the names were chosen from the point
of view of the CPU.
• "T" - "Transmit" →CPU transmits data to the module.
• "R" - "Receive" →CPU receives data from the module.
Data type Values
USINT 0 to 65535
In addition to the payload data, the Tx and Rx bytes also transmit the necessary control bytes. These control bytes
contain additional information about the data stream so that the receiver can reconstruct the original message from
the transmitted segments.
Bit structure of a control byte
Bit Description Value Information
0-5 SegmentLength 0 - 63 Size of the subsequent segment in bytes (default: Max. MTU size - 1)
6 nextCBPos 0 Next control byte at the beginning of the next MTU
1 Next control byte directly after the end of the current segment
7 MessageEndBit 0 Message continues after the subsequent segment
1 Message ended by the subsequent segment
SegmentLength
The segment length lets the receiver know the length of the coming segment. If the configured segment length
is insufficient for a message, then the information must be distributed over several segments. In these cases, the
actual end of the message is detected using bit 7 of the control byte.
Information:
The control byte is not included in the calculation to determine the segment length. The segment length
is only derived from the bytes of payload data.
nextCBPos
This bit indicates the position where the next control byte is to be expected. This information is especially important
when using option "MultiSegmentMTU".
When using Flatstream communication with multi-segment MTUs, the next control byte is no longer expected in
the first Rx byte of the subsequent MTU, but directly after the current segment.
964 X67 system User's Manual 3.20
Additional information
MessageEndBit
"MessageEndBit" is set if the subsequent segment completes a message. The message has then been completely
transmitted and is ready for further processing.
Information:
In the output direction, this bit must also be set if one individual segment is enough to hold the entire
message. The module will only process a message internally if this identifier is detected.
The size of the message being transmitted can be calculated by adding all of the message's segment
lengths together.
Flatstream formula for calculating message length:
Message [bytes] = SegmentLengths (all CBs without ME) + SegmentLength (of the first CB with CB Control byte
ME) ME MessageEndBit
Name:
OutputSequence
Register "OutputSequence" contains information about the communication status of the CPU. It is written by the
CPU and read by the module.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 OutputSequenceCounter 0-7 Counter for the sequences issued in the output direction
3 OutputSyncBit 0 Output direction disabled
1 Output direction enabled
4-6 InputSequenceAck 0-7 Mirrors InputSequenceCounter
7 InputSyncAck 0 Input direction not ready (disabled)
1 Input direction ready (enabled)
OutputSequenceCounter
The OutputSequenceCounter is a continuous counter of sequences that have been issued by the CPU. The CPU
uses OutputSequenceCounter to direct the module to accept a sequence (the output direction must be synchro-
nized when this happens).
OutputSyncBit
The CPU uses OutputSyncBit to attempt to synchronize the output channel.
InputSequenceAck
InputSequenceAck is used for acknowledgment. The value of InputSequenceCounter is mirrored if the CPU has
received a sequence successfully.
InputSyncAck
The InputSyncAck bit acknowledges the synchronization of the input channel for the module. This indicates that
the CPU is ready to receive data.
Name:
InputSequence
Register "InputSequence" contains information about the communication status of the module. It is written by the
module and should only be read by the CPU.
Data type Values
USINT See bit structure.
Bit structure:
Bit Description Value Information
0-2 InputSequenceCounter 0-7 Counter for sequences issued in the input direction
3 InputSyncBit 0 Not ready (disabled)
1 Ready (enabled)
4-6 OutputSequenceAck 0-7 Mirrors OutputSequenceCounter
7 OutputSyncAck 0 Not ready (disabled)
1 Ready (enabled)
InputSequenceCounter
The InputSequenceCounter is a continuous counter of sequences that have been issued by the module. The mod-
ule uses InputSequenceCounter to direct the CPU to accept a sequence (the input direction must be synchronized
when this happens).
InputSyncBit
The module uses InputSyncBit to attempt to synchronize the input channel.
OutputSequenceAck
OutputSequenceAck is used for acknowledgment. The value of OutputSequenceCounter is mirrored if the module
has received a sequence successfully.
OutputSyncAck
The OutputSyncAck bit acknowledges the synchronization of the output channel for the CPU. This indicates that
the module is ready to receive data.
7 InputSyncAck 7 OutputSyncAck
Information:
If communication is interrupted, segments from the unfinished message are discarded. All messages
that were transmitted completely are processed.
9.2.4.3 Synchronization
During synchronization, a communication channel is opened. It is important to make sure that a module is present
and that the current value of SequenceCounter is stored on the station receiving the message.
Flatstream can handle full-duplex communication. This means that both channels / communication directions can
be handled separately. They have to be synchronized independently so that simplex communication can theoret-
ically be carried out as well.
Note:
Data can be theoretically transferred from this point forward. However, it is still recommended to wait until the output direction is completely synchronized before
transmitting data.
The module sets OutputSyncAck.
The output direction is synchronized, and the CPU can transmit data to the module.
Note:
Theoretically, data could already be transferred in this cycle.
If InputSyncBit is set and InputSequenceCounter has been increased by 1, the values in the enabled Rx bytes have to be accepted and acknowledged (see al-
so "Communication in the input direction").
The input direction is synchronized, and the module can transmit data to the CPU.
If a channel is synchronized, then the opposite station is ready to receive messages from the transmitter. Before
the transmitter can send data, it needs to first create a transmit array in order to meet Flatstream requirements.
The transmitting station must also generate a control byte for each segment created. This control byte contains
information about how the subsequent part of the data being transmitted should be processed. The position of the
next control byte in the data stream can vary. For this reason, it must be clearly defined at all times when a new
control byte is being transmitted. The first control byte is always in the first byte of the first sequence. All subsequent
positions are determined recursively.
Flatstream formula for calculating the position of the next control byte:
Position (of the next control byte) = Current position + 1 + Segment length
Example
3 autonomous messages (7 bytes, 2 bytes and 9 bytes) are being transmitted using an MTU with a width of 7
bytes. The rest of the configuration corresponds to the default settings.
Standard
Message 2:
Message 3:
C3 B1 B2 - - - - Sequence for bus cycle 3
D1 D2 D3 D4 D5 D6 D7 D8 D9
C4 D1 D2 D3 D4 D5 D6 Sequence for bus cycle 4
First, the messages must be split into segments. In the default configuration, it is important to ensure that each
sequence can hold an entire segment, including the associated control byte. The sequence is limited to the size of
the enable MTU. In other words, a segment must be at least 1 byte smaller than the MTU.
MTU = 7 bytes → Max. segment length = 6 bytes
• Message 1 (7 bytes)
➯ C0 control byte
A unique control byte must be generated for each segment. In addition, the C0 control byte is generated to keep
communication on standby.
C0 (control byte 0) C1 (control byte 1) C2 (control byte 2)
- SegmentLength (0) = 0 - SegmentLength (6) = 6 - SegmentLength (1) = 1
- nextCBPos (0) = 0 - nextCBPos (0) = 0 - nextCBPos (0) = 0
- MessageEndBit (0) = 0 - MessageEndBit (0) = 0 - MessageEndBit (1) = 128
Control byte Σ 0 Control byte Σ 6 Control byte Σ 129
Table 170: Flatstream determination of the control bytes for the default configuration example (part 1)
C3 (control byte 3) C4 (control byte 4) C5 (control byte 5)
- SegmentLength (2) = 2 - SegmentLength (6) = 6 - SegmentLength (3) = 3
- nextCBPos (0) = 0 - nextCBPos (0) = 0 - nextCBPos (0) = 0
- MessageEndBit (1) = 128 - MessageEndBit (0) = 0 - MessageEndBit (1) = 128
Control byte Σ 130 Control byte Σ 6 Control byte Σ 131
Table 171: Flatstream determination of the control bytes for the default configuration example (part 2)
When transmitting data, the transmit array must be generated in the application program. Sequences are then
transmitted one by one using Flatstream and received by the module.
Information:
Although all B&R modules with Flatstream communication always support the most compact trans-
missions in the output direction, it is recommended to use the same design for the transfer arrays in
both communication directions.
Note:
To monitor communication times exactly, the task cycles that have passed since the last increase of OutputSequenceCounter should be counted. In this way,
the number of previous bus cycles necessary for the transmission can be measured. If the monitoring counter exceeds a predefined threshold, then the se-
quence can be considered lost.
(The relationship of bus to task cycle can be influenced by the user so that the threshold value needs to be determined individually.)
- Subsequent sequences are only permitted to be transmitted in the next bus cycle after the completion check has been carried out successfully.
Start
► diff = (OutputSequenceCounter -
OutputSequenceAck) AND 7
► limit = (OutputSequenceCounter -
LastValidAck) AND 7
(diff ≤ limit)
No OutputSequenceAck = No LastValidAck = Yes
AND (OutputSyncAck = 1)
AND (OutputSyncBit = 1)? OutputSequenceCounter? OutputSequenceCounter?
Yes Yes No
No LastValidAck =
diff = 0?
OutputSequenceAck
Yes
LastValidAck = No
OutputSequenceAck = 0?
OutputSequenceAck
Yes
No OutputSequenceCounter = 0
More sequences to be sent? OutputSequenceCounter = 1 OutputSyncBit = 1
LastValidAck = 0
Yes
When receiving data, the transmit array is generated by the module, transferred via Flatstream and must then
be reproduced in the receive array. The structure of the incoming data stream can be configured with the mode
register. The algorithm for receiving the data does not change in this regard.
PLC / Bus controller Module
Module-internal Module-internal
Receive array InputMTU Sendepuffer Transmit array
Type: USINT Type: USINT Type: USINT Type: USINT
Start
► InputSequenceAck = InputSequenceCounter
Synchronization
No
InputSyncBit = 1? ► RemainingSegmentSize = 0
► SegmentFlags = 0
Yes
No No
InputSyncAck = 1? InputSequenceAck > 0?
Yes Yes
MTU_Offset = 0 InputSyncAck = 1
(InputSequenceCounter – No
InputSequenceAck)
AND 0x07 = 1?
Yes
► RemainingSegmentSize =
Yes MTU_Data[MTU_Offset] AND 0b0011 1111
RemainingSegmentSize = 0? ► SegmentFlags =
MTU_Data[MTU_Offset] AND 0b1100 0000
No ► MTU_Offset = MTU_Offset + 1
No
No
Yes
► InputSequenceAck =
InputMTU_Size = MTU_Offset?
InputSequenceCounter
No
9.2.4.7 Details
Information:
When transmitting with MultiSegmentMTUs, it is possible for several small messages to be part of one
sequence. In the program, it is important to make sure that a sufficient number of receive arrays can
be managed. The acknowledge register is only permitted to be adjusted after the entire sequence has
been applied.
If SequenceCounter is incremented by more than one counter, an error is present.
Note: This situation is very unlikely when operating without "Forward" functionality.
In this case, the receiver stops. All additional incoming sequences are ignored until the transmission with the correct
SequenceCounter is retried. This response prevents the transmitter from receiving any more acknowledgments for
transmitted sequences. The transmitter can identify the last successfully transmitted sequence from the opposite
station's SequenceAck and continue the transmission from this point.
Acknowledgments must be checked for validity.
If the receiver has successfully accepted a sequence, it must be acknowledged. The receiver takes on the value
of SequenceCounter sent along with the transmission and matches SequenceAck to it. The transmitter reads
SequenceAck and registers the successful transmission. If the transmitter acknowledges a sequence that has
not yet been dispatched, then the transmission needs to be interrupted and the channel resynchronized. The
synchronization bits are reset and the current/incomplete message is discarded. It needs to be sent again once
the channel has been resynchronized.
Name:
FlatstreamMode
In the input direction, the transmit array is generated automatically. This register offers 2 options to the user that
allow an incoming data stream to have a more compact arrangement. Once enabled, the program code for eval-
uation must be adapted accordingly.
Information:
All B&R modules that offer Flatstream mode support options "Large segments" and "MultiSegmentM-
TUs" in the output direction. Compact transmission only needs to be explicitly allowed in the input
direction.
Bit structure:
Bit Description Value Information
0 MultiSegmentMTU 0 Not allowed (default)
1 Permitted
1 Large segments 0 Not allowed (default)
1 Permitted
2-7 Reserved
Standard
By default, both options relating to compact transmission in the input direction are disabled.
1. The module only forms segments that are at least one byte smaller than the enabled MTU. Each sequence
begins with a control byte so that the data stream is clearly structured and relatively easy to evaluate.
2. Since a Flatstream message is permitted to be any length, the last segment of the message frequently does
not fill up all of the MTU's space. By default, the remaining bytes during this type of transfer cycle are not used.
C C C
- - -
ME0 ME1 ME1
Message 1 Message 2
C
Control byte with MessageEndBit = 0
ME0
C
Control byte with MessageEndBit = 1
ME1
MultiSegmentMTUs allowed
With this option, InputMTU is completely filled (if enough data is pending). The previously unfilled Rx bytes transmit
the next control bytes and their segments. This allows the enabled Rx bytes to be used more efficiently.
Bus cycle 1 Bus cycle 2 Bus cycle 3
C C C C
- -
ME0 ME1 ME0 ME1
Message 1 Message 2
C
Control byte with MessageEndBit = 0
ME0
C
Control byte with MessageEndBit = 1
ME1
Information:
It is still possible to split up a message into several segments, however. If this option is used and
messages with more than 63 bytes occur, for example, then messages can still be split up among
several segments.
C C
- - - -
ME1 ME1
Message 1 Message 2
C
Control byte with MessageEndBit = 0
ME0
C
Control byte with MessageEndBit = 1
ME1
C C
- - - -
ME1 ME1
Message 1 Message 2
C
Control byte with MessageEndBit = 0
ME0
C
Control byte with MessageEndBit = 1
ME1
Figure 78: Arrangement of messages in the MTU (large segments and MultiSegmentMTUs)
If the way messages are structured is changed, then the way data in the transmit/receive array is arranged is also
different. The following changes apply to the example given earlier.
MultiSegmentMTU
If MultiSegmentMTUs are allowed, then "open positions" in an MTU can be used. These "open positions" occur if
the last segment in a message does not fully use the entire MTU. MultiSegmentMTUs allow these bits to be used to
transmit the subsequent control bytes and segments. In the program sequence, the "nextCBPos" bit in the control
byte is set so that the receiver can correctly identify the next control byte.
Example
3 autonomous messages (7 bytes, 2 bytes and 9 bytes) are being transmitted using an MTU with a width of 7 bytes.
The configuration allows transmission of MultiSegmentMTUs.
Message 1: Transmit/Receive array
Message 2: MultiSegmentMTU
Message 3:
C5 D2 D3 D4 D5 D6 D7 Sequence for bus cycle 3
D1 D2 D3 D4 D5 D6 D7 D8 D9
C6 D8 D9 C0 - - - Sequence for bus cycle 4
First, the messages must be split into segments. As in the default configuration, it is important for each sequence
to begin with a control byte. The free bits in the MTU at the end of a message are filled with data from the following
message, however. With this option, the "nextCBPos" bit is always set if payload data is sent after the control byte.
MTU = 7 bytes → Max. segment length = 6 bytes
• Message 1 (7 bytes)
➯ First segment = Control byte + 2 bytes of data (MTU still has 2 open bytes)
• Message 3 (9 bytes)
➯ C0 control byte
A unique control byte must be generated for each segment. In addition, the C0 control byte is generated to keep
communication on standby.
C1 (control byte 1) C2 (control byte 2) C3 (control byte 3)
- SegmentLength (6) = 6 - SegmentLength (1) = 1 - SegmentLength (2) = 2
- nextCBPos (1) = 64 - nextCBPos (1) = 64 - nextCBPos (1) = 64
- MessageEndBit (0) = 0 - MessageEndBit (1) = 128 - MessageEndBit (1) = 128
Control byte Σ 70 Control byte Σ 193 Control byte Σ 194
Table 172: Flatstream determination of the control bytes for the MultiSegmentMTU example (part 1)
Warning!
The second sequence is only permitted to be acknowledged via SequenceAck if it has been completely
processed. In this example, there are 3 different segments within the second sequence, i.e. the program
must include enough receive arrays to handle this situation.
C4 (control byte 4) C5 (control byte 5) C6 (control byte 6)
- SegmentLength (1) = 1 - SegmentLength (6) = 6 - SegmentLength (2) = 2
- nextCBPos (6) = 6 - nextCBPos (1) = 64 - nextCBPos (1) = 64
- MessageEndBit (0) = 0 - MessageEndBit (1) = 0 - MessageEndBit (1) = 128
Control byte Σ 7 Control byte Σ 70 Control byte Σ 194
Table 173: Flatstream determination of the control bytes for the MultiSegmentMTU example (part 2)
Large segments
Segments are limited to a maximum of 63 bytes. This means they can be larger than the active MTU. These large
segments are divided among several sequences when transmitted. It is possible for sequences to be completely
filled with payload data and not have a control byte.
Information:
It is still possible to subdivide a message into several segments so that the size of a data packet does
not also have to be limited to 63 bytes.
Example
3 autonomous messages (7 bytes, 2 bytes and 9 bytes) are being transmitted using an MTU with a width of 7 bytes.
The configuration allows the transmission of large segments.
Message 3:
C2 B1 B2 - - - - Sequence for bus cycle 3
D1 D2 D3 D4 D5 D6 D7 D8 D9
C3 D1 D2 D3 D4 D5 D6 Sequence for bus cycle 4
➯ C0 control byte
A unique control byte must be generated for each segment. In addition, the C0 control byte is generated to keep
communication on standby.
C1 (control byte 1) C2 (control byte 2) C3 (control byte 3)
- SegmentLength (7) = 7 - SegmentLength (2) = 2 - SegmentLength (9) = 9
- nextCBPos (0) = 0 - nextCBPos (0) = 0 - nextCBPos (0) = 0
- MessageEndBit (1) = 128 - MessageEndBit (1) = 128 - MessageEndBit (1) = 128
Control byte Σ 135 Control byte Σ 130 Control byte Σ 137
Table 174: Flatstream determination of the control bytes for the large segment example
Message 3:
D3 D4 D5 D6 D7 D8 D9 Sequence for bus cycle 3
D1 D2 D3 D4 D5 D6 D7 D8 D9
C0 - - - - - - Sequence for bus cycle 4
➯ C0 control byte
A unique control byte must be generated for each segment. In addition, the C0 control byte is generated to keep
communication on standby.
C1 (control byte 1) C2 (control byte 2) C3 (control byte 3)
- SegmentLength (7) = 7 - SegmentLength (2) = 2 - SegmentLength (9) = 9
- nextCBPos (0) = 0 - nextCBPos (0) = 0 - nextCBPos (0) = 0
- MessageEndBit (1) = 128 - MessageEndBit (1) = 128 - MessageEndBit (1) = 128
Control byte Σ 135 Control byte Σ 130 Control byte Σ 137
Table 175: Flatstream determination of the control bytes for the large segment and MultiSegmentMTU example
Forward functionality is a method that can be used to substantially increase the Flatstream data rate. The basic
principle is also used in other technical areas such as "pipelining" for microprocessors.
X2X Link communication cycles through 5 different steps to transmit a Flatstream sequence. At least 5 bus cycles
are therefore required to successfully transfer the sequence.
Step I Step II Step III Step IV Step V
Actions Transfer sequence from Cyclic matching of MTU and Append sequence to re- Cyclic matching of Check SequenceAck
transmit array, module buffer ceive array, MTU and module buffer
increase SequenceCounter adjust SequenceAck
Resource Transmitter Bus system Receiver Bus system Transmitter
(task for sending) (direction 1) (task for receiving) (direction 2) (task for Ack checking)
Sequence 3 ...
Bus cycle 1 Bus cycle 2 Bus cycle 3 Bus cycle 4 Bus cycle 5 Bus cycle 6 Bus cycle 7 Bus cycle 8 Bus cycle 9 Bus cycle 10
Time
Bus cycle 1 Bus cycle 2 Bus cycle 3 Bus cycle 4 Bus cycle 5 Bus cycle 6 Bus cycle 7 Bus cycle 8 Bus cycle 9 Bus cycle 10
Time
9.2.5.2 Configuration
The Forward function only has to be enabled for the input direction. 2 additional configuration registers are available
for doing so. Flatstream modules have been optimized in such a way that they support this function. In the output
direction, the Forward function can be used as soon as the size of OutputMTU is specified.
Name:
Forward
With register "Forward", the user specifies how many unacknowledged sequences the module is permitted to
transmit.
Recommendation:
X2X Link: Max. 5
POWERLINK: Max. 7
Data type Values
USINT 1 to 7
Default: 1
Name:
ForwardDelay
Register "ForwardDelay" is used to specify the delay time in µs. This is the amount of time the module has to
wait after sending a sequence until it is permitted to write new data to the MTU in the following bus cycle. The
program routine for receiving sequences from a module can therefore be run in a task class whose cycle time is
slower than the bus cycle.
Data type Values
UINT 0 to 65535 [µs]
Default: 0
Bus cycle 1 Bus cycle 2 Bus cycle 3 Bus cycle 4 Bus cycle 5 Bus cycle 6 Bus cycle 7 Bus cycle 8 Bus cycle 9 Bus cycle 10
Time
Bus cycle 1 Bus cycle 2 Bus cycle 3 Bus cycle 4 Bus cycle 5 Bus cycle 6 Bus cycle 7 Bus cycle 8 Bus cycle 9 Bus cycle 10
Time
Figure 83: Effect of ForwardDelay when using Flatstream communication with the Forward function
In the program, it is important to make sure that the CPU is processing all of the incoming InputSequences and In-
putMTUs. The ForwardDelay value causes delayed acknowledgment in the output direction and delayed reception
in the input direction. In this way, the CPU has more time to process the incoming InputSequence or InputMTU.
The basic algorithm for transmitting and receiving data remains the same. With the Forward function, up to 7
unacknowledged sequences can be transmitted. Sequences can be transmitted without having to wait for the
previous message to be acknowledged. Since the delay between writing and response is eliminated, a considerable
amount of additional data can be transferred in the same time window.
Algorithm for transmitting
Cyclic status query:
- The module monitors OutputSequenceCounter.
0) Cyclic checks:
- CPU must check OutputSyncAck.
→ If OutputSyncAck = 0: Reset OutputSyncBit and resynchronize the channel.
- CPU must check whether OutputMTU is enabled.
→ If OutputSequenceCounter > OutputSequenceAck + 7: In this case, not enabled because the last sequence has not yet been acknowledged.
1) Preparation (create transmit array):
- The CPU must split up the message into valid segments and create the corresponding control bytes.
- The CPU must assemble the segments and control bytes into the transmit array.
2) Transmit:
- The CPU must transfer the current part of the transmit array to OutputMTU.
- CPU must increase OutputSequenceCounter for the sequence to be accepted by the module
- The CPU is then permitted totransmit, in the next bus cycle if the MTU has been enabled.
The module responds since OutputSequenceCounter > OutputSequenceAck:
- The module accepts data from the internal receive buffer and appends it to the end of the internal receive array.
- The module is acknowledged and the currently received value of OutputSequenceCounter is transferred to OutputSequenceAck.
- The module queries the status cyclically again.
3) Completion (acknowledgment):
- The CPU must cyclically check OutputSequenceAck.
→ A sequence is only considered to have been transferred successfully if it has been acknowledged via OutputSequenceAck. In order to detect potential trans-
mission errors in the last sequence as well, it is important to make sure that the algorithm is run through long enough.
Note:
To monitor communication times exactly, the task cycles that have passed since the last increase of OutputSequenceCounter should be counted. In this way,
the number of previous bus cycles necessary for the transmission can be measured. If the monitoring counter exceeds a predefined threshold, then the se-
quence can be considered lost (the relationship of bus to task cycle can be influenced by the user so that the threshold value needs to be determined individual-
ly).
Details/Background
1. Illegal SequenceCounter size (counter offset)
Error situation: MTU not enabled
If the difference between SequenceCounter and SequenceAck during transmission is larger than permitted, a
transfer error occurs. In this case, all unacknowledged sequences must be repeated with the old Sequence-
Counter value.
2. Checking an acknowledgment
After an acknowledgment has been received, a check must verify whether the acknowledged sequence has
been transmitted and had not yet been unacknowledged. If a sequence is acknowledged multiple times, a
severe error occurs. The channel must be closed and resynchronized (same behavior as when not using
Forward).
Information:
In exceptional cases, the module can increment OutputSequenceAck by more than 1 when using
Forward.
An error does not occur in this case. The CPU is permitted to consider all sequences up to the
one being acknowledged as having been transmitted successfully.
In industrial environments, it is often the case that many different devices from various manufacturers are being
used side by side. The electrical and/or electromagnetic properties of these technical devices can sometimes cause
them to interfere with one another. These kinds of situations can be reproduced and protected against in laboratory
conditions only to a certain point.
Precautions have been taken for X2X Link transmissions if this type of interference occurs. For example, if an
invalid checksum occurs, the I/O system will ignore the data from this bus cycle and the receiver receives the last
valid data once more. With conventional (cyclic) data points, this error can often be ignored. In the following cycle,
the same data point is again retrieved, adjusted and transmitted.
Using Forward functionality with Flatstream communication makes this situation more complex. The receiver re-
ceives the old data again in this situation as well, i.e. the previous values for SequenceAck/SequenceCounter and
the old MTU.
Loss of acknowledgment (SequenceAck)
If a SequenceAck value is lost, then the MTU was already transmitted properly. For this reason, the receiver is per-
mitted to continue processing with the next sequence. The SequenceAck is aligned with the associated Sequence-
Counter and sent back to the transmitter. Checking the incoming acknowledgments shows that all sequences up
to the last one acknowledged have been transmitted successfully (see sequences 1 and 2 in the image).
Loss of transmission (SequenceCounter, MTU):
If a bus cycle drops out and causes the value of SequenceCounter and/or the filled MTU to be lost, then no data
reaches the receiver. At this point, the transmission routine is not yet affected by the error. The time-controlled
MTU is released again and can be rewritten to.
The receiver receives SequenceCounter values that have been incremented several times. For the receive array
to be put together correctly, the receiver is only permitted to process transmissions whose SequenceCounter has
been increased by one. The incoming sequences must be ignored, i.e. the receiver stops and no longer transmits
back any acknowledgments.
If the maximum number of unacknowledged sequences has been sent and no acknowledgments are returned, the
transmitter must repeat the affected SequenceCounter and associated MTUs (see sequence 3 and 4 in the image).
Bus cycle 1 Bus cycle 2 Bus cycle 3 Bus cycle 4 Bus cycle 5 Bus cycle 6 Bus cycle 7 Bus cycle 8 Bus cycle 9 Bus cycle 10
Time
Bus cycle 1 Bus cycle 2 Bus cycle 3 EMC Bus cycle 5 Bus cycle 6 Bus cycle 7 Bus cycle 8 Bus cycle 9 Bus cycle 10
Time