ECG With Protection PDF

Application Report
SPRAB36B – June 2010
ECG Implementation on the TMS320C5515 DSP Medical

Development Kit (MDK)
Vishal Markandey .............................................................................................................................
ABSTRACT
The medical development kit (MDK) provides a development platform to TI medical customers, third
parties, and other developers. This application report focuses on the C5515 MDK; however, the analog
front ends that are included can also be used with other platforms.
Please be aware that an important notice concerning availability, standard warranty, and use in critical
applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of
this document.
NOTE: Disclaimer Statement: Do not use this medical development kit for the purpose of
diagnosing patients.
This application report may not include all of the details necessary to completely develop the
design. It is provided as a reference and only intended to demonstrate the ECG application.
Contents
1 Introduction .................................................................................................................. 2
2 Front-End Architecture ..................................................................................................... 5
3 DSP Subsystem ........................................................................................................... 11
4 PC Application ............................................................................................................. 17
5 Installation .................................................................................................................. 17
6 Running the Demo Application .......................................................................................... 20
7 Options and Selections ................................................................................................... 21
8 References ................................................................................................................. 22
Appendix A Front-End Board Schematics ................................................................................... 23
Appendix B Front-End Board BOM ........................................................................................... 30
Appendix C Sensors and Accessories ....................................................................................... 33
Appendix D MEDICAL DEVELOPMENT KIT (MDK) WARNINGS, RESTRICTIONS AND DISCLAIMER .......... 34
List of Figures
1 MDK Hardware Overview .................................................................................................. 3
2 ECG Board ................................................................................................................... 4
3 ECG Front-End Block Diagram ........................................................................................... 6
4 De-Fibrillation Protection Circuit .......................................................................................... 7
5 Right-Leg-Drive Circuit ..................................................................................................... 7
6 Lead-Off Detection Circuit ................................................................................................. 8
7 Lead I Formation ............................................................................................................ 9
8 LPF for Lead II .............................................................................................................. 9
9 Block Diagram of ADS1258 .............................................................................................. 10
10 Interface Between ADS1258 and DSP ................................................................................. 10
11 DSP Software Architecture ............................................................................................... 12
12 DC Removal Filter Response ............................................................................................ 13
SPRAB36B – June 2010 ECG Implementation on the TMS320C5515 DSP Medical Development Kit 1
(MDK)
Copyright © 2010, Texas Instruments Incorporated
Introduction www.ti.com
13 Pole and Zero Location for IIR Filter .................................................................................... 13

14 1Hz Signal Response via DC Removal Filter .......................................................................... 14
15 MBF Frequency Response ............................................................................................... 15
16 Buffer-Shifting Convolution Algorithm ................................................................................... 15
17 ECG Front-End Mounted on the C5515 EVM ......................................................................... 18
18 Input Dialog Box ........................................................................................................... 20
19 Display on the EVM LCD Screen........................................................................................ 21
20 ECG_I_II .................................................................................................................... 23
21 ECG_LEAD_V1_V2_V3 .................................................................................................. 24
22 ECG_LEAD_V4_V5_V6 .................................................................................................. 25
23 ECG_ADC .................................................................................................................. 26
24 ECG_LEAD_OFF_DET ................................................................................................... 27
25 Right Leg Drive ............................................................................................................ 28
26 PWR_CONN_INTRFCE .................................................................................................. 29
27 ECG Cable Details ........................................................................................................ 33
List of Tables
1 J22 Connector Interface .................................................................................................. 11
2 Release CD Contents ..................................................................................................... 19
3 Bill of Material .............................................................................................................. 30
1 Introduction
A number of emerging medical applications such as electrocardiography (ECG), digital stethoscope,
and pulse oximeters require DSP processing performance at very low power. The TMS320C5515
digital signal processor (DSP) is ideally suited for such applications. The C5515 is a member of TI's
C5000™ fixed-point DSP platform. To enable the development of a broad range of medical
applications on the C5515, Texas Instruments has developed an MDK based on the C5515 DSP. A
typical medical application includes:
• An analog front end, including sensors to pick up signals of interest from the body
• Signal processing algorithms for signal conditioning, performing measurements and running analytics
on measurements to determine the health condition
• User control and interaction, including graphical display of the signal processing results and
connectivity to enable remote patient monitoring
1.1 Medical Development Kit (MDK) Overview

The MDK is designed to support complete medical applications development. It includes the following
elements:
• Analog front-end boards (FE boards) specific to the key target medical applications of the C5515
(ECG, digital stethoscope, pulse oximeter), highlighting the use of the TI analog components for
medical applications
• C5515 DSP evaluation module (EVM) main board
• Medical applications software including example demonstrations
C5000, Code Composer Studio are trademarks of Texas Instruments.

All other trademarks are the property of their respective owners.
2 ECG Implementation on the TMS320C5515 DSP Medical Development Kit SPRAB36B – June 2010
(MDK)
www.ti.com Introduction
Figure 1 shows an overview of the MDK hardware, consisting of individual analog front-end boards for
ECG, digital stethoscope, pulse oximeter, and the C5515 DSP EVM. Any of the analog front-end boards
can be connected, one of at a time, to the C5515 EVM using universal connectors on the front-end boards
and the EVM. The analog front-end boards connect to the appropriate sensors for the ECG, digital
stethoscope or the pulse oximeter, and perform analog signal conditioning and analog-to-digital (A/D)
conversion of the signals from the sensor. Then, the digital signal is sent to the C5515 EVM where the
C5515 DSP performs signal processing algorithms for the application. The DSP is also responsible for
managing user control and interaction including graphical display of the signal processing results. The
signal processing results can also be transferred from the C5515 EVM to a PC for further display,
analysis, and storage using the PC application software that is provided with the MDK.
Front-End
Daughterboards
Common Platform
Data process, memory, display, user input, etc.
Univ. FE Con
ECG
Front End
Color LCD Display

Univ. FE Con
Univ. FE Con
Digital
Stethoscope C5515 EVM
Front End
Univ. FE Con
Pulse Keypad
Oximeter
Front End
Figure 1. MDK Hardware Overview
1.2 MDK ECG System

An electrocardiogram (ECG/EKG) is the recording of the electrical activities of the heart and is used in the
investigation of heart disease. The electrical waves can be measured by selectively placed electrodes
(electrical contacts) on the skin.
1.2.1 Key Features

The key features of the MDK ECG system are:
• 12 lead ECG output using 10 electrode input
• Defibrillator protection circuitry
• Diagnostic quality ECG with bandwidth of 0.05 Hz to 150 Hz
• Heartbeat rate display
• Leads off detection
• Real-time 12 lead ECG waveform display on EVM LCD screen, one lead selectable at a time
• Zoom option for the Y-axis (amplitude) on EVM LCD screen
• Real-time 12 lead ECG waveform display on PC, three leads at a time
• Zoom function on X-axis (time) and Y-axis (amplitude) on PC application
• Freeze screen option on PC Application
• Recording of ECG data and offline view option of recorded ECG data on PC application
(MDK)
Introduction www.ti.com
1.2.2 MDK Hardware

Several elements of the MDK ECG system are:
• C5515 EVM
• ECG front-end board
• ECG cable
1.2.2.1 C5515 EVM

The EVM comes with a full compliment of on-board devices that suit a wide variety of application
environments.
For further details on the C5515 EVM, see the Medical Devlopment Kit provided with your EVM.
Key components and interfaces of the C5515 EVM used in the MDK ECG system include:
• Texas Instrument's TMS320C5515 operating at 100 MHz
• User universal serial bus (USB) port via the C5515
• Inter-integrated circuit (I2C) /serial peripheral interface (SPI) electrically erasable programmable
read-only memory (EEPROM)
• External memory interface (EMIF), I2C, universal asynchronous receiver/transmitter (UART), SPI
interfaces
• SAR
• External IEEE Standard 1149.1-1990, IEEE Standard Test Access Port and Boundary-Scan
Architecture (JTAG) emulation interface
• Embedded JTAG controller
• Color LCD display
• Keys (user switches)
The EVM operates from a + 5 V external power supply or battery and is designed to work with TI’s Code
Composer Studio™ integrated development environment (IDE). Code Composer Studio communicates
with the EVM board through the external emulator, or on-board emulator.
1.2.2.2 ECG Front-End Board

Figure 2 shows the ECG front-end board. The potentials captured by the electrodes are passed through
the defibrillator protection (DP) circuit in the ECG front-end board. Then, the front end board derives 8 out
of 12 ECG leads and provides the digital input to the DSP subsystem. The front-end board can be
interfaced with the EVM board through a universal front-end connector. The front-end board is interfaced
with and powered by the C5515 EVM board through the universal front-end connector by using I2C and
I2S interfaces.
The 16 channel analog-to-digital converter (ADC) (ADS1258) on the front-end board is configured for 500
Hz sampling with 24-bit data resolution. ADC is interfaced with the C5515 using the SPI bus.
DB-15 Conn.
for Electrode
Connection
Figure 2. ECG Board
(MDK)
www.ti.com Front-End Architecture
1.2.2.3 ECG Cable

The ECG cable consists of four limb and six chest electrodes. This cable is connected to the front-end
board through the DB15 connector. The ECG electrodes pick up ECG signals from the ECG
simulator/patient and send them to the ECG front-end board; an off-the-shelf ECG cable is used. For more
details regarding ECG cable, see Appendix C.
1.2.3 MDK Software

The software for the MDK application includes:
• C5515 software application
• PC application
1.2.3.1 C5515 Software Application

The hardware is initialized by the DSP on the EVM. The DSP reads the digitized signals from the ADC
through the SPI interface. The DSP subsystem conditions the ECG signals by removing DC offset and
noise using digital filters. Then, the DSP subsystem derives the remaining four ECG electrodes, lead off
status, and heart rate. The DSP subsystem also displays one channel ECG wave form, lead off
information and heart rate on the LCD screen and sends the the ECG data to the PC application through
the UART interface.
1.2.3.2 PC Application
The PC application, which has to be installed on the PC, can be used for viewing the ECG waveform,
heart rate, and lead off information. It also provides options to zoom, store and playback the signals
transmitted from the EVM. The PC application can operate in two modes: online and offline.
2 Front-End Architecture
The front-end board has a DB15 connector to allow connection for 10 electrode ECG cables; it can be
interfaced with the EVM board through the universal front-end connector. The C5515 EVM board supplies
power to the front-end board through the universal front-end connector.
(MDK)
Front-End Architecture www.ti.com
Figure 3 shows the ECG front-end board architecture.
Reference Voltage -5 V TPS60403

Instrumentation -2.5 V TPS72325
Crystal 32.768 KHz REF5025
Amp +2.5 V TPS73025
Low Pass Filter
150 Hz Power
supply
Defibrillator INA128
Protection
ADS1258
Analog
MUX SPI
DB15
ADC
INA128
Connectors
Defibrillator
Front End
Protection I2C
OPA335
Buffer
I/O Expander
Defibrillator OPA335
Protection
Averaging of
RLD
RA,LA,LL signals
PCA9535
Lead Off Detection

Current Injection TLV3404
Comparator
Figure 3. ECG Front-End Block Diagram
The front-end board contains the following stages:

• Defibrillator protection
• Right leg driving circuit
• Lead off detection
• Derives eight ECG leads using differential amplifier (instrumentation amplifier)
• Low-pass filtering (anti-aliasing)
• Analog-to-digital conversion (ADC)
2.1 Defibrillator Protection
WARNING
If defibrillator is used for development purposes, use of medical
grade EVM input power supply (Accessory Part Number: SL Power
AULT Model MW173KB0503F01) is strongly recommended. Use of
the Isolator (Accessory Part Number: MOXA Model Name: TCC-82)
that isolates the MDK from the PC is also strongly recommended.
These accessories provide additional supplemental protection to
development users from high voltages that may be present when
introducing defibrillator voltages during development simulation.
There may also be other voltage transients sourced from the
defibrillator to accompanying interface hardware such as a
personal computer when used in conjunction with the ECG/EVM
development hardware.
The defibrillator protection circuit protects the ECG system while the defibrillator is used on the patient.
(MDK)
The neon lamps and clamping diodes (zener diodes) are connected across the electrode input lines, to
provide protection from the defibrillator pulse. The neon lamps give the first level of protection and the
clamping diodes give the second level of protection. These shunting devices are used to bypass large
voltage applied during defibrillation. The neon lamp (NE2 series) shunts voltages above 70 V-80 V. Zener
diodes, with a breakdown voltage of 9.1 V, are used for shunting the voltage dropped across neon lamps
to a safe 11.6 V ( VCC + VZ = 2.5 + 9.1) before it appears across the instrumentation amplifiers. A current
limiting resistor (R1) of 20K with high energy withstanding capability (~ 2.5J) and power rating (> 1W) is
placed in the series on each input line, which limits the current flow. One more current limiting resistor
(R2) of 10K is put in between the neon lamp and the zener diodes to prevent high current from passing
through the zener diodes. Figure 4 depicts the protection circuitry.
-VCC
R1 R2 Vz
Electrode To Instrumentaion
Amplifier
Neon
Lamp
+VCC
Figure 4. De-Fibrillation Protection Circuit
2.2 Right Leg Drive Circuit

A right-leg-drive circuit (RLD) is used as an alternative to the grounding of a patient with the MDK ECG
system. In the RLD circuit, an electrode attached to the right leg is driven by the output of an auxiliary
operational amplifier, where the common-mode voltage is sensed and amplified. The negative feedback of
a common-mode signal in this circuit drives the common-mode voltage low. In turn, the body’s
displacement current flows to the op-amp output circuit, which reduces the pickup of the ECG system and
effectively grounds the patient. The averaging is done with the electrode signals RA, LA and LL. OPA335
is used as the inverting amplifier for the RLD circuit. The gain of the RLD circuit design is -39.
Figure 5. Right-Leg-Drive Circuit
2.3 Lead-Off Detection

The lead-off detection circuit detects the lead status for all the electrodes except RL.The lead-off detection
has pull up registers, comparator (TLV3404) and an I2C port expander (PCA9535) as shown in Figure 6.
The ECG electrode leads, except RL, are connected to a pull up resistor (10 M); when any one of the
leads is disconnected, the voltage for that lead is pulled up to VCC (+ 2.3 V).
(MDK)
The pull up circuit outputs are connected to the negative and positive terminals of the comparator, and set
to 500 mV (threshold voltage). When any lead gets disconnected, the output of the comparator for that
lead becomes 0 V. The output of the comparator is connected to the I2C port expander. The port
expander generates an interrupt to the DSP whenever there is any change in the input voltage. The
interrupt service routine at the DSP reads the output of the port expander using I2C lines and,
correspondingly, updates the lead-off status.
Figure 6. Lead-Off Detection Circuit
2.4 Lead Formation Using Instrumentation Amplifier

The following ECG leads are formed using instrumentation amplifier (INA128) and ECG electrode
combinations:
Lead I = LA – RA
Lead II = LL – RA
Lead V1 = V1 - (LA + RA + LL) / 3
Lead V2 = V2 - (LA + RA + LL) / 3
Lead V3 = V3 - (LA + RA + LL) / 3
Lead V4 = V4 - (LA + RA + LL) / 3
Lead V5 = V5 - (LA + RA + LL) / 3
Lead V6 = V6 - (LA + RA + LL) / 3
Where, RA, LL, LA and V1 to V6 are ECG electrodes.
Lead I is formed by connecting LA to the instrumentation amplifier’s non-inverting input, while RA is
connected to the inverting input. Lead II is formed by connecting LL to the instrumentation amplifier’s
non-inverting input, while RA is connected to the inverting input.
Uni-polar chest leads (Lead V1 to Lead V6) are formed by applying the corresponding electrodes to the
non-inverting input of the instrumentation amplifier, while the inverting input is connected with the average
of the RA, LA and LL signals. The average is calculated by addition using three equal value resistors.
(MDK)
Figure 7 shows the lead formation for Lead I.
Figure 7. Lead I Formation
The instrumentation amplifier also provides amplification of the weak input signal. The gain of the amplifier
is set to 8.35 by using a 6.8K (R4) nominal value precision resistor.
2.5 Low-Pass Filters (Anti-Aliasing)

An active first-order, low-pass filter (LPF) is used for anti-aliasing and for removing frequencies above 150
Hz from each of the ECG leads. The LPF has a cutoff at 150 Hz. The instrumentation amplifier output is
fed to the LPF filter input. Figure 8 shows the implementation for the LPF.
Figure 8. LPF for Lead II
2.6 Analog-to-Digital Conversion (ADC)

Analog signals are converted to digital before sending them to the DSP sub-system. LPF output is
connected as input to the ADC (ADS1258).
(MDK)
ADS1258 is a 16-channel, 24-bit delta-sigma ADC. Figure 9 shows the block diagram of ADS1258.
AVDD VREF DVDD GPIO[7:0]
Internal ADS1258
Monitoring GPIO
1 CS
DRDY
24-Bit Digital SPI
16:1 Filter SCLK
Analog ADC Interface
Analog DIN
Inputs Input DOUT
MUX
16 START
Oscillator Control RESET
AINCOM PWDN
AVSS MUX ADC Extclk DGND

OUT IN In/Out 32.768 kHz
Figure 9. Block Diagram of ADS1258
The following configuration is used for the ADS1258:
Host to ADC interface SPI

Sampling frequency 500 Hz
Data format 24-bit linear
ADC mode used Fixed channel mode
Reference voltage 2.5 V
The eight ECG lead outputs from the LPF are connected to eight channels of the ADS1258. Using SPI
interface, the ADC is connected to the C5515 for 500 sps/channels with 24-bit resolution.
The ADS1258 is interfaced to C5515 DSP as shown in Figure 10.
SPI_CLK
SPI_OUT
SPI_IN
C5505 DSP SPI_CS

ADS1258
SPI_START
SPI_DRDY
C5505 EVM ECG FE
Figure 10. Interface Between ADS1258 and DSP
2.7 Front-End Connector

The front-end board is connected to the EVM through the universal front-end connector, which consists of
three connector interfaces with legends on the EVM: J20, J21, and J22.
(MDK)
www.ti.com DSP Subsystem
2.7.1 J20 Connector Interface at C5515 EVM

The mating for this connector is maintained, but no signals are used by the ECG front-end board.

This connector carries the 5 V, 3.3 V and 1.8 V from the C5515 EVM. These voltages act as the primary
source for the ECG front-end board.

This connector carries GPIOs, I2C, SPI and interrupt (INT1) connections from the C5515 EVM to the
front-end board. Pin mapping for the used interfaces are shown in Table 1.
Table 1. J22 Connector Interface

Connector Pin Number Signal Assigned
1 SPI_START
3 SPI_CLK
7 SPI_CS
11 SPI_IN
12 SPI_DRDY
13 SPI_OUT
15 I2C_INT
16 I2C_SCL
20 I2C_SDA
3 DSP Subsystem
The DSP software, running on the C5515 EVM, takes the digitized signal from the front-end board and
processes it the same. The DSP receives eight ECG lead data from the ADC through the SPI interface.
Then, filters are applied to remove DC signal, 50/60 Hz power line noise, and unwanted signals. The
filtered signal is used to detect the heart rate and to obtain four ECG leads: Lead III, aVR, aVL and aVF.
The software is designed to handle the following activities:
• Data acquisition through ADC
• Lead-off detection
• DC signal removal
• Multi band-pass filtering
• ECG leads formation
• QRS (HR) detection
• Display of ECG data
• UART communication
(MDK)
DSP Subsystem www.ti.com
Figure 11 shows the high-level architecture of DSP subsystem.
IIR ECG Lead

8 Channel Data FIR
From Filter Computation
SPI Reader Filters
ADC (DC Removal) (Lead Info)
Data
Acquisition
Timer Based
Interrupt
4 ECG Leads
8 ECG Leads
QRS
Algorithm
(HR)
Lead Off Interrupt
HR
Lead Off
Detection Lead Off Status
I2C
From I2C UART Display
Expander
RS232
PC
Display
Figure 11. DSP Software Architecture
The various blocks of the DSP subsystem are described in the following sections.
3.1 Data Acquisition

Using the C5515 timer, an interrupt is generated every 250 ms to sequentially acquire 500 sps of eight
ECG leads. The interrupt service routine (ISR) issues a set channel number and (SOC) command to the
ADC to acquire 24-bits of ECG data for the selected channel. The acquired data is provided to the infinite
impulse response (IIR) filter module after downscaling to 20 bits; the data read for the same channel
happens after every 2 ms. The ADC is interfaced with the DSP through the SPI bus.
3.2 Lead-Off Detection

The lead status is read in the IIR for INTR1 of the C5515 (external interrupt 1). This interrupt is generated
in the front ECG board by the I2C port expander as and when the lead status is changed.
3.3 Interrupt Service Routine (IIR) Filter - DC Signal Removal

The DC signals from the eight ECG leads are removed by using the first-order IIR filter. The following
transfer function is used for the filter:
Y (z ) 1 - z -1
H (z ) = =
X (z ) 1 - a z -1'
To provide DC attenuation of 22 dB, the value of alpha is chosen as 0.992. The IIR filter output is
downscaled to 16 bits and then provided to the finite impulse response (FIR) filter.
(MDK)
Figure 12 shows the frequency response for the filter.
Figure 12. DC Removal Filter Response
Figure 13 shows the pole and zero location for the IIR filter. The pole is located at z = 0.992 and zero at 1
in the Z plane.
Figure 13. Pole and Zero Location for IIR Filter
(MDK)
Figure 14 shows 1 Hz signal response via the DC removal filter.
Figure 14. 1Hz Signal Response via DC Removal Filter
3.4 FIR Filter

The multi band-pass filter (MBF) is used for removing unwanted signals and power line noise from the DC
removed ECG lead data.
The MBF digital filter being used is the FIR hamming window with the order of 351, which provides cutoff
at 150 Hz and notch at 50/60 Hz; the notch frequency is compile-time programmable. This filter also
provides a very sharp cutoff at 150 Hz with attenuation of 60 dB at stop-band and notch at 8 dB
attenuation. The sampling frequency is 500 samples/second.
(MDK)
Figure 15 shows simulation results for the MBF.
Figure 15. MBF Frequency Response
Buffer-shifting convolution algorithm is used for the realization of the MBF filter. The filter window is shifted
for every filtered sample and to insert the new sample into the buffer as depicted in Figure 16.
x(n) x(n-1) x(n-2) ..... x(n-L+2) x(n-L+1)

New Data Current time, n
Discarded
x(n) x(n-1) x(n-2) ..... x(n-L+1)
Next time, n+1
Figure 16. Buffer-Shifting Convolution Algorithm
3.5 ECG Lead Computation

Eight ECG lead data from the MBF filter is fed to the ECG lead formation module. This module computes
the remaining four ECG lead data using the following formula:
Lead III = Lead II - Lead I
Lead aVR = - Lead II + 0.5 * Lead III
Lead aVL = Lead I - 0.5 * Lead II
Lead aVF = Lead III + 0.5 * Lead I
3.6 QRS (HR) Detection Algorithm

QRS detection is based on the first derivative of the Lead II ECG signal and threshold. Once five
consecutive QRS are detected, the heart rate is calculated by taking the average of the five RR intervals.
(MDK)
The following steps are involved for calculating heart rate:

1. Calculate the first derivative of the Lead II ECG signal samples. The first derivative for any sample is
calculated as:
y0(n) = |x(n + 1) – x(n - 1)|
Where, y0(n) is the first derivative.
x(n + 1) is the sample value for (n + 1)th sample
x(n – 1) is the sample value for (n – 1)th sample
The initial 2sec of the first derivatives in a buffer are stored and the maximum value (P) in this buffer
are obtained.
2. Calculate the threshold as 0.7 * P.
3. Compare each of the first derivative values calculated with the calculated threshold.
4. Mark the ECG sample index (S1) of that particular sample, whenever a derivative crosses the
threshold.
5. Detect the QRS peak by scanning the next 40 derivatives (MAXIMA_SEARCH_WINDOW = 40) and
obtaining the maxima (M1). This maxima (M1) value is stored in another buffer.
6. Skip the next 50 samples (SKIP_WINDOW = 50) to take care of the minimum RR interval that can
occur in case of maximum detectable heart rate (i.e., 240 BPM), after detecting a QRS peak.
7. Detect the next five QRS peaks by repeating steps 3 to 6.
8. Calculate the RR interval as the number of samples between two consecutive QRS peaks.
9. Calculate heart rate using the following formula:
HR per Minute = (60 * Sampling Rate)/(Average RR interval for five consecutive RR intervals)
10. Recalculate threshold from the QRS peak values detected.
3.7 LCD Display

The LCD display shows the ECG, heart rate, and lead-off status. The display is controlled using the SW7
and SW8 keys on the EVM as mentioned in Section 7.1.1. For each of these keys, an interrupt is
generated and communicated to the DSP through the SAR interrupt. The interrupt service routine for the
key that is pressed takes care of the corresponding action for the interrupt.
3.8 Universal Asynchronous Receiver/Transmitter (UART)

The data sent to the PC through UART has eight ECG lead data; these signals are sent at 250 sps/lead.
The PC application derives the remaining four ECG leads using the Lead I and Lead II data. A
synchronization frame (header) of 5 bytes is also sent to the UART interface every 1 s. The packet
number, heart rate, and lead status values are sent along with the ECG header. The header is followed by
interleaved samples of eight ECG leads. The interval between the two ECG data packets is 500 ms. The
packet number gets incremented for every new sample sent.
The UART configuration is set as 115200 bps, 8 bits data, 1 stop bit and no parity.
(MDK)
www.ti.com PC Application
ECG Header
Lead Lead
Packet
00 80 00 80 00 Heart Rate Status Status
Number
(Low) (High)
ECG Data
Current Channel Low 8 Bits Current Channel High 8 Bits
4 PC Application
The PC application is used for viewing the ECG waveform and ECG values. It also provides options to
zoom, store and playback the signals.
The PC application has two modes of operation: online and offline.
• Online mode: the ECG data is plotted in real-time as a scrolling display
• Offline mode: the recorded ECG data is displayed for analysis
Two timers run on the application for online mode: acquisition and display timer.
The acquisition timer is set for 100 ms intervals and reads the data from the serial port. After fetching the
data from serial port, it parses the stream of bytes to different variables like packet number, heart rate,
lead-off status and to the ECG data object containing the digital value of eight leads ECG samples. The
four non-acquired leads, Lead III, aVR, aVL and aVF data, are derived from Lead I and Lead II as follows:
Lead III = Lead II - Lead I
aVR = - Lead II + 0.5 * Lead III
aVL = Lead I - 0.5 * Lead II
aVF = Lead III + 0.5 * Lead I
The ECG data object for each sample is stored in a queue buffer.
The display timer is set to an interval of 60 ms and is used to plot the ECG wave forms, and update the
heart rate and lead-off status information on the screen. This timer is elapsed every 60 ms; in each
elapsed event 15 samples of the leads are plotted on the screen.
5 Installation
5.1 Components and Accessories Required

The following components and accessories are required for the MDK ECG installation.
• C5515 EVM with power supply
• ECG front-end board (ECG FE)
• Code Composer Studio v3.3
• RS232 cable
• USB cable
• 10 lead ECG patient cable
• C5515 DSP application software
• PC application software
(MDK)
Installation www.ti.com
5.2 Hardware Installation

1. Mount the ECG front-end board on top of the C5515 EVM at connectors J20, J21 and J22. Ensure that
there is a firm connection between the front-end board and the EVM.
JTAG Header J4 DB9 J14
DB15 P1
Power Jack J7 Power Switch SW4
Figure 17. ECG Front-End Mounted on the C5515 EVM
2. Connect the USB cable between the PC and the C5515 EVM for the debug mode of operation.
3. Connect the C5515 emulator JTAG cable to the C5515 EVM.
4. Connect the serial cable (UART) to the DB9 connector (J13) of the C5515 EVM and the other end to
the serial port of the PC, for viewing the signals on the PC application.
5. Connect the ECG cables to DB15 connector P1.
6. Connect the other end of the ECG cable (there are 10 leads) to an ECG simulator.
7. Power on the system using slide switch SW4 on the C5515 EVM.
NOTE: The ECG simulator has 10 connector points that are assigned to different electrodes, i.e.,
RA, RL, LA, etc. Ensure that the ECG leads are connected to the corresponding connectors
on the simulator.
5.3 Software Installation
5.3.1 System Requirements

The following installations are required to run the software provided with the MDK ECG kit.
• Code Composer Studio v3.3
• bios_5_32_01
• Spectrum Digital XDS510 USB driver for Code Composer Studio v_3.3
• .NET 2.0 frame work
(MDK)
www.ti.com Installation
Table 2 explains the content of the CD provided with the MDK ECG kit.
Table 2. Release CD Contents

S Number Directory/Filename Contains
1 ECGSystem_V_5_0 Project source code
2 Output Contains three files:
ECGSystem.out
c5505evm.gel and
C5515 XDS510USB Emulator.ccs
3 PCApplication Executable for PC application
4 BootImageCreation.zip Folder that contains the following files:
bootImage.exe
convertBind0.bat
convertEnc0.bat
convertInsecure.bat
programmer.out
readme.txt
5 Document Contains the following documents:
ReleaseNote.txt
Quick starter guide V6.0 doc
5.3.2 C5515 DSP Software (debug mode) Installation Steps

1. Copy the c5505evm.gel file from the CD to <CCS installation dir>/CC/GEL/.
2. Copy the ECGSystem directory from the CD to a local directory on the PC where Code Composer
Studio is installed.
5.3.3 C5515 DSP Software (standalone mode ) Installation Steps

1. Copy the BootImageCreation.zip file from the CD to a local directory on the PC where Code Composer
Studio is installed. This path needs to be used later for Flashing; ensure that there are no spaces in
the path name.
2. Copy the ECGSystem.out file from the CD to the < BootImageCreation> folder.
3. Execute convertInsecure.bat from the <BootImageCreation> folder to create the new
InsecureBootImage.bin file.
4. Open Code Composer Studio.
5. Power on the C5515 EVM.
6. Select Debug → Connect in Code Composer Studio to connect to the C5515 EVM.
7. Load programmer.out C5515 EVM from the < BootImageCreation> folder.
8. Select Debug → Run in Code Composer Studio.
(MDK)
Running the Demo Application www.ti.com
9. Enter 241:<BootImageCreation Folder>\InsecureBootImage.bin and press OK in the popup window

shown in Figure 18.
Figure 18. Input Dialog Box
10. Wait until Programming Complete.

11. Power off the C5515 EVM and disconnect.
5.3.4 PC Application Installation Steps

Prior to installing the PC application, ensure that .NET 2.0 framework is installed on the system. .NET 2.0
redistributable framework can be downloaded from the following URL:
http://www.microsoft.com/downloads/details.aspx?familyid=0856eacb-4362-4b0d-8edd-
aab15c5e04f5&displaylang=en.
1. Open the PCApplication folder on the CD and double click on C55x ECG Medical Development
Kit.msi.
2. Click Next on the welcome screen to continue the installation.
3. Browse to the folder where the application is installed. Select the installation mode for Everyone or Self
and click Next.
4. Click Next on the Confirmation screen. This installs the application into the specified folder.
5. Click Close to complete and exit the installation.
6 Running the Demo Application

The ECG application can be run in two modes: standalone and debug.
• Standalone mode, for running from Flash memory
• Debug mode, for loading and debugging using Code Composer Studio
6.1 Running in Standalone Mode

1. Complete the installation steps provided in Section 5.3.
2. Power on C5515 EVM using slide switch SW4.
3. Switch on the ECG simulator to view the ECG signal on the C5515 EVM.
6.2 Running in Debug Mode

2. Power on the C5515 EVM using slide switch SW4.
3. Open Code Composer Studio.
4. Click on Debug → Connect in Code Composer Studio to connect to the C5515 EVM.
5. Click on Project → Open in Code Composer Studio and select the ECGSystem.pjt file.
6. Click on File → Load .out file in Code Composer Studio.
7. Execute the application.
8. Switch on the ECG simulator to view the ECG signal on the C5515 EVM.
(MDK)
www.ti.com Options and Selections
6.3 Running the PC Application
6.3.1 Online Mode

The following steps are required to view signals in online mode using the PC application:
1. Connect the RS232 cable between the PC COM port and the C5515 EVM.
3. Open the PC application.
4. Select online mode and click OK.
5. Select the available COM port and click OK.
6. Signals transmitted from the C5515 EVM can be viewed on the PC application.
6.3.2 Offline Mode

The following steps are required to view signals in offline mode stored on the PC using the PC application:
1. Open the PC application.
2. Select offline mode and click OK.
3. Browse and select the previously saved .wav file and click OK.
4. View the static ECG waveforms along with the heart rate and lead-off status on the PC application.
7 Options and Selections
7.1 On the C5515 EVM
7.1.1 ECG Display on the C5515 EVM Side

The ECG display on the LCD screen starts by showing the ECG Monitor followed by lead and heart rate;
by default, ECG Lead II is displayed.
SW7 switch on the EVM can be pressed to view one channel after the other. Pressing the switch displays
the next ECG lead in a cyclic manner: II, I, III, aVR, aVL, aVF, V1, V2, V3, V4, V5 and V6.
The SW8 switch on the EVM can be used for the zoom in and zoom out feature for the ECG waveform.
Low, Medium (default) and High are the three levels of zooming provided.
If all 10 leads are connected, a green color dot is displayed at the lead status location on the EVM display.
In case any one lead fails, the failed lead name is displayed at the lead status location. If more than one
lead off is detected, a red color dot is displayed at the lead status location.
Displaying Lead
Lead Status
Figure 19. Display on the EVM LCD Screen
(MDK)
References www.ti.com
7.1.2 PC Application
By default, three leads are displayed simultaneously. The sequence of the leads are I, II, III, aVR, aVL,
aVF, V1, V2, V3, V4, V5 and V6. Lead-off status and heart rates are displayed on the screen and the
values are refreshed once every second. The serial port connection status (RS232) for the device is
displayed on the status bar.
The following features are available on the PC application.
• Next (up arrow) - This button can be used to view the next three lead wave forms.
• Previous (down arrow) - This button can be used to view the previous three lead wave forms.
• Scaling on Amplitude - This button can be used to vertically zoom in and zoom out of the ECG
waveform display on the PC application.
• Scaling on Time - This button can be used to horizontally zoom in and zoom out of the ECG
waveform display on the PC application.
• Start Recording - This can be used to start the recording of the ECG waveform. During recording, this
same button is used for the Stop Recording operation. Note that after the start recording option is
selected, the zoom options get disabled.
• Stop Recording - This can be used to stop recording and save the ECG waveform as an .ECG file. It
can be played back using the PC application in offline mode.
• Freeze - This button can be used to view a static waveform. Particular portions of the waveform can be
viewed by moving the Left and Right cursors during the Freeze option.
• Unfreeze - Pressing this button enables the waveform to be in continuous scrolling mode.
• Cancel: This can be used to close the form.
8 References
• TMS320VC5505 DSP Medical Development Kit (MDK) Quick Start Guide (SPRUGO1)
(MDK)
A.1
www.ti.com
INST RUMENTAT ION AMPLIFIER (IA1) +2.5_VCC

+2.5_VCC D NI
J1
-2.5_VCC +2.5_VCC C1 LOW PASS FILT ER (LPF1)
3 Fc=159Hz
DEFIBRILLATOR PROT ECT ION (DP1) 2 8 0.1uF

1 R1 C2
D1 TP16
0.1uF V+ U1A
7 2
9.1V CON3 -2.5_VCC 10M In-
TP8
RA V+
DB15_RA R2 22K R3 10K 2 U2 1 LPF_I
R4 6.8K Vin- GAIN 8.35 Out
1
Rg1
6 L EAD_I R5 10K R6 0E 3
D2 C98 Vo In+ OPA2335
DS1 8 C3 V-
MC08010000 9.1V 22nF LA 3 Rg2 R8
D NI Vin+ INA128 4
R9 V- Ref 0.1uF C4 0.1uF
+2.5_VCC 0E
J2 4 5
+2.5_VCC
3 10M -2.5_VCC
2 C5 0.1uF
1
-2.5_VCC
CON3 -2.5_VCC
Front-End Board Schematics
-2.5_VCC
DEFIBRILLATOR PROT ECT ION (DP2)
D3
Appendix A Front-End Board Schematics
9.1V
DB15_ LA R10 22K R11 10K LA LA

RA RA
D4 C99 LL LL
DS2
MC08010000 9.1V 22nF
D NI
+2.5_VCC
Figure 20. ECG_I_II

The schematics for the ECG front-end board are shown below:
INST RUMENTAT ION AMPLIFIER (IA2)

D NI
+2.5_VCC
LOW PASS FILT ER (LPF2)

Fc=159Hz
C6
U1B TP17
V+
7 0.1uF 6
-2.5_VCC In-
TP9
RA V+
DEFIBRILLATOR PROT ECT ION (DP3) 2 U3 7 L PF_II
1
D5 Rg1
6 L E AD_II R13 10K R14 0E 5 OPA2335
9.1V Vo In+
8 C7 V-
R16 22K R17 10K LL Rg2 R18
DB15_LL 3
Vin+ INA128 0.1uF
R19 V- Ref
+2.5_VCC 0E
J3 4 5
D6 C100
DS3 3 10M
MC08010000 9.1V 22nF 2 C8 0.1uF
D NI 1
-2.5_VCC
+2.5_VCC CON3 -2.5_VCC
(MDK)
ECG Implementation on the TMS320C5515 DSP Medical Development Kit
23
24
INST RUMENTAT ION AMPLIFIER (IA3) +2.5_VCC
(MDK)
V1 +2.5_VCC D NI
C9 LOW PASS FILT ER (LPF3)
8 Fc=159Hz
C10 0.1uF
TP18
V+
7 0.1uF 2 U4A
-2.5_VCC TP10 In-
AVG_LA_RA_LL V+
DEFIBRILLATOR PROT ECT ION (DP4) 2 U5 1 LPF_V1
1
D7 Rg1
6 LEAD_V1 R21 10K R22 0E 3
9.1V Vo In+ OPA2335
8 C11 V-
R24 22K R25 10K V1 Rg2 R26
DB15_V1 3
Vin+ INA128 0.1uF 4 C12 0.1uF
R27 V- Ref
+2.5_VCC 0E
J4 4 5
D8 C101
DS4 3 10M -2.5_VCC
MC08010000 9.1V 22nF 2
D NI 1 C13 0.1uF
+2.5_VCC CON3 -2.5_VCC -2.5_VCC
D NI
V2 +2.5_VCC

C14 Fc=159Hz
U4B TP19
V+
7 0.1uF 6
-2.5_VCC TP11 In-
AVG_LA_RA_LL V+
DEFIBRILLATOR PROT ECT ION (DP5) 2 U6 GAIN 8.35 7 LPF_V2
R28 6.8K Vin- Out
1
D9 Rg1
6 LEAD_V2 R29 10K R30 0E 5 OPA2335
9.1V Vo In+
8 C15 V-
R32 22K R33 10K V2 Rg2 R34
DB15_V2 3
Vin+ INA128 0.1uF
R35 V- Ref
+2.5_VCC 0E
J5 4 5
D10 C102
3 10M
DS5 9.1V 22nF 2
MC08010000 D NI 1 C16 0.1uF

+2.5_VCC CON3 -2.5_VCC -2.5_VCC
D N I +2.5_VCC

Figure 21. ECG_LEAD_V1_V2_V3
V3 +2.5_VCC
C17 LOW PASS FILT ER (LPF5)
8 Fc=159Hz
C18 0.1uF
TP20
V+
7 0.1uF 2 U7A
-2.5_VCC TP12 In-
AVG_LA_RA_LL V+
DEFIBRILLATOR PROT ECT ION (DP6) 2 U8 1 LPF_V3
1
D11 Rg1
6 LEAD_V3 R37 10K R38 0E 3
9.1V Vo In+ OPA2335
8 C19 V-
R40 22K R41 10K V3 Rg2 R42
DB15_V3 3
Vin+ INA128 0.1uF 4
R43 V- Ref C20 0.1uF
+2.5_VCC 0E
J6 4 5
D12 C103
3 10M -2.5_VCC
DS6 9.1V 22nF 2
MC08010000 D NI 1 C21 0.1uF
+2.5_VCC CON3 -2.5_VCC -2.5_VCC

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INST RUMENTAT ION AMPLIFIER (IA6) D NI

V4 +2.5_VCC
Fc=159Hz
C22
TP21
V+
7 0.1uF 6 U7B
-2.5_VCC TP13 In-

AVG_LA_RA_LL V+
R44 6.8K Vin- Out
1
D13 Rg1
6 LEAD_V4 R45 10K R46 0E 5
9.1V Vo In+ OPA2335
8 C23 V-
R48 22K R49 10K V4 Rg2 R50
DB15_V4 3
Vin+ INA128 0.1uF
R51 V- Ref
+2.5_VCC 0E
J7 4 5
D14 C104
3 10M
DS7 9.1V 22nF 2
MC08010000 D NI 1 C24 0.1uF

-2.5_VCC
+2.5_VCC
INST RUMENTAT ION AMPLIFIER (IA7) D NI LOW PASS FILT ER (LPF7)
V5 +2.5_VCC C25 Fc=159Hz
8 0.1uF
C26
U10A TP22
V+
7 0.1uF 2
-2.5_VCC TP14 In-
AVG_LA_RA_LL V+
R52 6.8K Vin- Out
1
D15 Rg1
6 LEAD_V5 R53 10K R54 0E 3 OPA2335
9.1V Vo In+
8 C27 V-
R56 22K R57 10K V5 Rg2 R58
DB15_V5 3
Vin+ INA128 0.1uF 4
R59 V- Ref C28 0.1uF
+2.5_VCC 0E
J8 4 5
D16 C105
DS8 3 10M -2.5_VCC
MC08010000 9.1V 22nF 2
D NI 1 C29 0.1uF
+2.5_VCC CON3 -2.5_VCC -2.5_VCC

Figure 22. ECG_LEAD_V4_V5_V6
INST RUMENTAT ION AMPLIFIER (IA8) D NI LOW PASS FILT ER (LPF8)
V6 +2.5_VCC Fc=159Hz
C30 TP23
V+
7 0.1uF 6 U10B
-2.5_VCC TP15 In-
AVG_LA_RA_LL V+
R60 6.8K Vin- Out
1
D17 Rg1
6 LEAD_V6 R61 10K R62 0E 5
9.1V Vo In+ OPA2335
8 C31 V-
R64 22K R65 10K V6 Rg2 R66
DB15_V6 3
Vin+ INA128 0.1uF
R67 V- Ref
+2.5_VCC 0E
J9 4 5
D18 C106
3 10M
DS9 9.1V 22nF 2
MC08010000 D NI 1 C32 0.1uF

-2.5_VCC
(MDK)
25
26
(MDK)
AD C
+2.5_VCC 3.3_VCC
C33 C34 C35 C107
0.1uF 10uF 0.1uF 10uF
6
28
U13
AVDD
DVDD
LPF_I 4 14 R110 10K
AIN0 GPIO0 R111 10K
L PF_II 3 15
AIN1 GPIO1 R112 10K
LPF_V1 2 16
AIN2 GPIO2 R113 10K
LPF_V2 1 17
AIN3 GPIO3 R114 10K
LPF_V3 48 18
AIN4 GPIO4 R115 10K TP31 TP32
LPF_V4 47 19
AIN5 GPIO5 R116 10K +2.5_VCC
LPF_V5 46 20
AIN6 GPIO6 R117 10K
LPF_V6 45 21
AIN7 GPIO7 C36
40
ADC VOLTAGE REFERE NCE +2.5_VCC R68 0E AIN8 R118 51E U14
39 24 SPI_OUT
R69 0E AIN9 DOUT R119 0E 0.1uF
38 25 S P I_DRDY 5
R70 0E AIN10 DRDY
37 13
R71 0E AIN11 CLKIO
36 V+
R73 R74 R72 0E AIN12 R76 47E
35 42 4
R75 0E AIN13 ADCINP In- TP24
34
+2.5_VCC 10K 10K R77 0E AIN14 C37 2.2nF
33 41
R78 0E AIN15 ADCINN
1
C38 Out
U15 10 43
PWDN MUXOUTN
11
0.1uF RESET
5 12 44 3
R122 0E CLKSEL MUXOUTP In+
SPI_CLK 22
R121 0E SCLK C39 22nF V- OPA335
V+ S P I_IN 23 7
R120 0E DIN PLLCAP
4 SPI_START 26
In- R79 0E START C40 4.7pF 2 C41 0.1uF
SPI_CS 27
+2.5_VCC R123 CS
U16 8
XTAL1 Y1
1 31
Out VREFP

2 6 R80 1K R81 100E 9 32.768KHz
VIN VOUT 0E XTAL2 C42 4.7pF -2.5_VCC
30
Figure 23. ECG_ADC

VREFN
3 1 3
AINCOM
AVSS
GND_PAD
DGND
TEMP DNC1 D NI In+ C43 C44

C45 C79 C46 C47 V- OPA335 TP28
5 8
5
TRIM DNC2 ADS1258

32
49
29
0.1uF
1uF 7 10uF 0.1uF 100uF 2 C48 0.1uF 10uF
GND NC TP29
REF5025
4

-2.5_VCC C49 C50
TP30
0.1uF 10uF -2.5_VCC
-2.5_VCC
Layout note: Move C44 as clos e to

U13.31 & U13.30 pins a s possible
and C33 close to U 13.6 pin

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LOW PASS FILT ERS Fc = 15.9Hz LEAD OFF DET ECT ION COMPARATORS
R124 0E
RA R A' 3.3_VCC

C89 TP33 C51
R82
0.1uF 0.1uF
U17 5 100K
R A' 4
R125 0E IN- VCC
LA L A' 1
OUT
C90 T HRSH_VOL 3
IN+ GND
0.1uF TLV3401
2
R126 0E
LL LL'
C91
3.3_VCC
0.1uF
TP41 TP35 3.3_VCC
I2C I/O EXPANDER
R127 0E C52 R84 R85 R86 R87 R88 R89 R90 R91
V1' TP34 TP36
V1 U18 0.1uF 100K100K100K100K100K100K100K100K
4
C92
L A' 2 3.3_VCC
0.1uF T HRSH_VOL IN1-
3 1
VCC
LL' IN1+ OUT1
6
T HRSH_VOL IN2- C53
5 7
R128 0E V1' IN2+ OUT2 R93 R94 R95
9
V2' T HRSH_VOL IN3- 0.1uF
V2 10 8
V2' IN3+ OUT3
13
C93 T HRSH_VOL IN4-
12 14
24
IN4+ OUT4 U19 10K 4.7K 4.7K
GND
0.1uF 21
TLV3404 A0
2
VCC
11
A1 TP25 TP26 TP27
3
R129 0E A2
4
V3' PA0
V3 5
PA1
6 1 I2C_INT
C94 PA2 INT
7
TP37 TP39 3.3_VCC PA3
8 22 I2C_SCL
0.1uF PA4 SCL
9
C56 PA5
10 23 I2C_SDA
TP38 TP40 PA6 SDA
11
R130 0E U20 0.1uF PA7
13
4
V4' PB0
V4 14
V3' PB1
2 15
C95 T HRSH_VOL IN1- PB2
3 1 16
VCC
V4' IN1+ OUT1 PB3
6 17
0.1uF T HRSH_VOL IN2- PB4
5 7 18
V5' IN2+ OUT2 PB5
9 19
T HRSH_VOL IN3- PB6
10 8 20
GND
R131 0E V6' IN3+ OUT3 PB7

13
IN4-
Figure 24. ECG_LEAD_OFF_DET

V5 V5' T HRSH_VOL 12 14 PCA9535
IN4+ OUT4
12
GND
C96
TLV3404
11
0.1uF
R132 0E +2.5_VCC
V6 V6'
C97 R83
0.1uF 100K_POT TP44
T HRSH_VOL
R92
Note: If LPF not required put a 0 ohm C54 C55
jumper on the resistor path and do not
populate capacitors 10nF 1uF
100K_POT
-2.5_VCC
(MDK)
27
28
(MDK)
+2.5_VCC
C57
5 0.1uF
U21
3
IN- V+
4
OUT
LA 1
IN+ V-
TLV2221
2
C58
0.1uF
-2.5_VCC GAIN -39
RL DRIVE CKT C59 47pF
+2.5_VCC R96 390K
+2.5_VCC
C60
RLD_VOL C61 -2.5_VCC
0.1uF U23
5
U22 TP42 0.1uF DEFIBRILLATOR PROT ECT ION (DP10)
5
3 B UFF_LA R97 10K
IN- V+ D19
B U FF_RA RLD_VOL V+
4 R98 10K R99 10K 4
OUT In- 9.1V
RA 1 BUFF_LL R100 10K
IN+ V- TP43 390K R101 10K R102 22K
1 R133 DB15_RL
TLV2221 Out
2 R103 10K
3
R104 10K In+ D20
AVG_LA_RA_LL V-
C62 OPA335 DS10
R105 10K 9.1V MC08010000
0.1uF 2
-2.5_VCC C63 0.1uF

+2.5_VCC
-2.5_VCC
+2.5_VCC WILSON T ERMINAL
Figure 25. Right Leg Drive

C64
5 0.1uF

U24
3
IN- V+
4
OUT
LL 1
IN+ V-
TLV2221
2
C65
0.1uF
-2.5_VCC
BUFFER FOR LA,RA&LL signals

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LDO +2.5V
CONNECTOR INT ERFACE +2.5_VCC
5_VCC U25
L4 3.3uH TP6
1 5
5_VCC J10 1.8_VCC 3.3_VCC IN OUT
C66
-5V INVERTER 3 4 C82 C83
C75 C76 TP2 C77 C78 C67 1uF 0.1uF EN NR C68
2 1
4 3 C69 10uF 10uF
GND
0.1uF 100uF 6 5 0.1uF 100uF 2.2uF
8 7 TP3 TPS73025 0.01uF
2
3 5
10 9 5_VCC U26 -5_VCC
CFLY- CFLY+
TP4 L2 3.3uH L3 3.3uH TP5
2 1
TP1 POWER_CONN IN OUT
C80 C86 C70 C71 C87 C81
J11 GND
10uF 10uF 1uF TPS60403 1uF 10uF 10uF LDO -2. 5V -2.5_VCC
4 -5_VCC U27
SPI_START 1 2 BRD_DET0 L5 3.3uH TP7

SPI_CLK 3 4 2 5
BRD_DET1 IN OUT
5 6
SPI_CS 7 8 C74 C72 C84 C85
9 10 3 4
2.2uF EN NR 2.2uF 10uF 10uF
S PI_IN 11 12 S P I_DRDY
SPI_OUT 13 14 C73
GND
I2C_INT 15 16 I2C_SCL
17 18 0.01uF
1
TPS72325
19 20 I2C_SDA
L1 BEAD
+2.5_VCC
DATA_CONN
C88
EVM GND- FE GND ISOLAT ION
J12 0.1uF
-2.5_VCC
2 1
4 3 J13
6 5 DECOUPLING +2.5V & -2.5V
8 7 3 RLD_VOL ECG ELECT RODE CO NNECTOR
10 9 2 P1
12 11 1
14 13 8
16 15 15
CON3
18 17 7
20 19 DB15_RL 14
6
13
DB15_V6 5
DUMMY_CONN DB15_V1 12
DB15_V5 4
3.3_VCC 3.3_VCC DB15_LL 11
DB15_V4 3
FRONT END BOARD DET ECT ION MEC HANISM DB15_LA 10
Figure 26. PWR_CONN_INTRFCE

DB15_ V3 2
R106 R108 DB15_RA 9
DB15_V2 1
10K 10K
BRD_DET0 BRD_DET1 CONNECTOR DB15
R107 D NI R109
BRD_DET1 BRD_DET0
0E 0E
ECG 1 1
STETH 0 1
SPO2 1 0
(MDK)
29
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Appendix B Front-End Board BOM
B.1 Front-End Board BOM

Table 3 provides the bill of material for the digital stethoscope front-end board.
Table 3. Bill of Material

Ite Quantit
m y Value Reference Description Part Number Manufacturer DNI
1 17 0.1 mF C1,C4,C9,C12,C17, CAP CERM 0.10 mF 50 V 5% 08055C104JAT2A AVX DNI
C20,C25,C28,C89, 0805 SMD Corporation
C90,C91,C92,C93,
C94,C95,C96,C97
2 49 0.1 mF C2,C3,C5,C6,C7, CAP CERM 0.10 mF 50 V 5% 08055C104JAT2A AVX
C8,C10,C11,C13, 0805 SMD Corporation
C14,C15,C16,C18,
C19,C21,C22,C23,
C24,C26,C35,C36,
C38,C41,C44,C46,
C27,C29,C30,C31,
C32,C33, 48,C49,
C51,C52,C53,C56,
C64,C65,C66,C75,
C77,C88 C57,C58,
C60,C61,C62,C63
3 5 10 mF C34,C43,C50,C79, C107 CAP TANT LOESR 10 mF 16 V TPSB106K016R080 AVX
10% SMD 0 Corporation
4 1 2.2 nF C37 CAP CERM 2200 pF 5% 50 V 08055A222JAT2A AVX
NPO 0805 Corporation
5 1 22 nF C39 CAP CER 22000 pF 50 V X7R 08055C223J4T2A AVX
0805 Corporation
6 2 4.7 nF C40,C42 CAP CER 4.7 pF 50 V NPO 0805 08055A4R7BAT2A AVX
Corporation
7 5 1 mF C45,C55,C67,C70, C71 CAP CERM 1.0 mF 10% 25 V 08053C105KAZ2A AVX
X7R 0805 Corporation
8 3 100 mF C47,C76,C78 CAP ELECT 100 mUF 16 V TK EEE-TK1C101P Panasonic-ECG
SMD
9 1 10 nF C54 CAP CER 10000 pF 16 V NPO 0805YA103JAT4A AVX
0805 Corporation
10 13 47 pF C59 CAP CERM 47 pF 5% 50 V NPO 08055A470JAT2A AVX
0805 Corporation
11 3 2.2 mF C68,C72,C74 CAP CER 2.2 mUF 25 V X7R 08053C225MAT2A AVX
0805 Corporation
12 2 0.01 mF C69,C73 CAP CERM 0.01 10% 50 V X7R 08055C103KAT2A AVX
0805 Corporation
13 8 10 mF C80,C81,C82,C83,C84, CAP CER 10 mF 16 V X5R 0805 EMK212BJ106KG-T Taiyo Yuden
C85, C86,C87
14 9 22 nF C98,C99,C100,C101,C1 CAP CER 22000 pF 50 V X7R 08055C223J4T2A AVX
02, 0805 Corporation
C103,C104,C105,C106
15 10 MC08010000 DS1,DS2,DS3,DS4,DS5, Neon lamp MC08010000 Multicomp
DS6,
DS7,DS8,DS9,DS10
16 20 9.1 V D1,D2,D3,D4,D5,D6,D7, DIODE ZENER 1W 9.1 V PTZTE259.1B ROHM
D8, SOD-106
D9,D10,D11,D12,D13,D
14,
D15,D16,D17,D18,D19,
D20
17 10 CON3 J1,J2,J3,J4,J5,J6,J7, J8, CONN HEADER 3POS .100 22-28-4030 Molex
J9,J13 VERT TIN
18 1 POWER_CONN J10 Elevated Female Header 5x2 BB02-KD102-T03- Gradconn
100000
19 1 DATA_CONN J11 Elevated Female Header 10x2 BB02-KD202-T03- Gradconn
100000
(MDK)
www.ti.com Front-End Board BOM
Table 3. Bill of Material (continued)

Ite Quantit
20 1 DUMMY_CONN J12 Elevated Female Header 10x2 BB02-KD202-T03- Gradconn
100000
21 1 BEAD L1 FERRITE BEAD 470 Ω 0805 BK2125HM471-T Taiyo Yuden
22 4 3.3 mH L2,L3,L4,L5 INDUCTOR POWER 3.3 mH 1.3A VLF4012AT- DK Corporation
SMD 3R3M1R3
23 1 CONNECTOR P1 CONN D-SUB RCPT R/A 15POS 745782-4 Tyco
DB15 PCB AU Electronics
24 9 10M R1,R9,R19,R27,R35,R4 RES 10.0MΩ 1/8W 1% 0805 CRCW080510M0FK Vishay
3, R51,R59,R67 SMD EA
25 10 22K R2,R10,R16,R24,R32,R RES 22KΩ 1W 5% 2512 SMD CRCW251222K0JN Vishay
40,R48,R56,R64,R102 EG
26 10 10K R3,R11,R17,R25, RES 10KΩ 1/2W 5% 2010 SMD CRCW201010K0JN Vishay
R33,R41, EF
R49,R57,R65,R101
27 8 6.8K R4,R12,R20,R28,R36, High Precision Chip Resistor Y162406K8000T9R Vishay
R44, R52,R60 6.8KΩ
28 15 10K R5,R13,R21,R29,R37, High Precision Chip Resistor Y162410K0000T9R Vishay
R45,R53,R61,R97, R98, 10KΩ
R99,R100,
R103,R104,R105
29 38 0E R6,R8,R14,R18,R22, RES 0.0 Ω 1/8W 5% 0805 SMD CRCW08050000Z0 Vishay
R26,R30,R34,R38, EA
R42,R46,R50,R54,
R58,R62,R66,R68,
R69,R70,R71,R72,
R75,R77,R78, R79,
R119,R120,R121,
R122,R124,R125,
R126,R127,R128,
R129,R130,R131, R132
30 11 10K R73,R74,R93,R110, RES 10.0KΩ 1/8W 1% 0805 SMD CRCW080510K0FK Vishay
R111,R112,R113, EA
R114,R115,R116, R117
31 1 47E R76 High Precision Chip Resistor 47 Y162447R0000T9R Vishay
Ω
32 1 1K R80 RES 1.00KΩ 1/8 W 1% 0805 CRCW08051K00FK Vishay
SMD EA
33 1 100E R81 High Precision Chip Resistor 100 Y1624100R000T9R Vishay
m
34 9 100K R82,R84,R85,R86, RES 100KΩ 1/8W 1% 0805 SMD CRCW0805100KFK Vishay
R87,R88,R89,R90, R91 EA
35 2 100K_POT R83,R92 POT 100KΩ 4MM SQ CERMET 3314G-1-104E Bourns Inc
SMD
36 2 4.7K R95,R94 RES 4.70KΩ 1/8W 1% 0805 SMD CRCW08054K70FK Vishay
EA
37 2 390K R96,R133 High Precision Chip Resistor TNPW0805390KBY Vishay
390KΩ TA
38 2 10K R108,R106 RES 10.0KΩ 1/8W 1% 0805 SMD CRCW080510K0FK Vishay DNI
EA
39 3 0E R107,R109,R123 RES 0.0 Ω 1/8W 5% 0805 SMD CRCW08050000Z0 Vishay DNI
EA
40 1 51E R118 RES 51 Ω 1/8W 5% 0805 SMD CRCW080551R0JN Vishay
EA
41 4 OPA2335 U1,U4,U7,U10 IC OP AMP CMOS SGL SPLY OPA2335AIDGKT TI DNI
8-MSOP
42 8 INA128 U2,U3,U5,U6,U8,U9,U11 IC LOW PWR INSTR AMP INA128UA TI
, U12 8-SOIC
43 1 ADS1258 U13 IC ADC 24 BIT 125 ksps 48-QFN ADS1258IRTCT TI
44 3 OPA335 U14,U15,U23 IC OP AMP CMOS SGL SPLY OPA335AIDBVT TI
SOT-23-5
45 1 REF5025 U16 IC PREC V-REF 2.5 V LN REF5025AID TI
8-SOIC
(MDK)
Front-End Board BOM www.ti.com
Table 3. Bill of Material (continued)

Ite Quantit
46 1 TLV3401 U17 IC OUT COMPARATOR TLV3401IDBVR TI
NANOPWR SOT23-5
47 2 TLV3404 U18,U20 COMPARATOR LW POWER R-R TLV3404IDR TI
14-SOIC
48 1 PCA9535 U19 IC REMOTE 16-BIT I/O EXP PCA9535PWR TI
24-TSSOP
49 3 TLV2221 U21,U22,U24 IC RAIL-TO-RAIL OP AMP TLV2221CDBVR TI
SOT-23-5
50 1 TPS73025 U25 IC LDO REG HI-PSRR 2.5 V TPS73025DBV TI
SOT23-5
51 1 TPS60403 U26 IC UNREG CHRG PUMP V INV TPS60403DBVT TI
SOT23-5
52 1 TPS72325 U27 IC LDO REG 200MA 2.5 V TPS72325DBVT TI
SOT23-5
53 1 32.768KHz Y1 CRYSTAL 32.7680 KHz 12.5 pF C-001R Epson
CYL 32.7680K- Toyocom
A:PBFREE Corporation
(MDK)
www.ti.com
Appendix C Sensors and Accessories
C.1 ECG Cable Details
Figure 27. ECG Cable Details
Cable details: 10 lead ECG cable for philips/hp -snap, button (Part No: 010302013)
http://www.biometriccables.com/index.php?productID=692
Cable details: 10 lead ECG cable for philips/hp -Clip-on type (P/n-010303013A)
http://www.biometriccables.com/index.php?productID=693
Other compatible cables for MDK: HP/Philips/Agilent Compatible 10 Lead ECG cable
C.2 ECG Sensor

Sensor details: Disposable Electrodes - Medico Lead - Lok
Vendor name: Medico Electrodes International Link : http://www.medicoleadlok.com/
Other compatible parts: Any Ag/AgCl solid gel ECG electrode on the market.
(MDK)
www.ti.com
Appendix D MEDICAL DEVELOPMENT KIT (MDK) WARNINGS, RESTRICTIONS AND

DISCLAIMER
Not for Diagnostic Use: For Feasibility Evaluation Only in Laboratory/Development Environments.
The MDK may not be used for diagnostic purposes.
This MDK is intended solely for evaluation and development purposes. It is not intended for diagnostic use
and may not be used as all or part of an end equipment product.
This MDK should be used solely by qualified engineers and technicians who are familiar with the risks
associated with handling electrical and mechanical components, systems and subsystems.
Your Obligations and Responsibilities.
Please consult the TMS320VC5505 DSP Medical Development Kit (MDK) Quick Start Guide (SPRUGO1)
prior to using the MDK. Any use of the MDK outside of the specified operating range may cause danger to
the users and/or produce unintended results, inaccurate operation, and permanent damage to the MDK
and associated electronics. You acknowledge and agree that:
• You are responsible for compliance with all applicable Federal, State and local regulatory requirements
(including but not limited to Food and Drug Administration regulations, UL, CSA, VDE, CE, RoHS and
WEEE,) that relate to your use (and that of your employees, contractors or designees) of the MDK for
evaluation, testing and other purposes.
• You are responsible for the safety of you and your employees and contractors when using or handling
the MDK. Further, you are responsible for ensuring that any contacts or interfaces between the MDK
and any human body are designed to be safe and to avoid the risk of electrical shock.
• You will defend, indemnify and hold TI, its licensors and their representatives harmless from and
against any and all claims, damages, losses, expenses, costs and liabilities (collectively, "Claims")
arising out of or in connection with any use of the MDK that is not in accordance with the terms of this
agreement. This obligation shall apply whether Claims arise under the law of tort or contract or any
other legal theory, and even if the MDK fails to perform as described or expected.
WARNING
If defibrillator is used for development purposes, use of medical
grade EVM input power supply (Accessory Part Number: SL Power
AULT Model MW173KB0503F01) is strongly recommended. Use of
the Isolator (Accessory Part Number: MOXA Model Name: TCC-82)
that isolates the MDK from the PC is also strongly recommended.
These accessories provide additional supplemental protection to
development users from high voltages that may be present when
introducing defibrillator voltages during development simulation.
There may also be other voltage transients sourced from the
defibrillator to accompanying interface hardware such as a
personal computer when used in conjunction with the ECG/EVM
development hardware.
WARNING
To minimize risk of electric shock hazard, use only the following
power supplies for the EVM module: Medical Development
Applications: SL Power AULT Model MW173KB0503F01.
(MDK)
IMPORTANT NOTICE
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and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
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Application Report

SPRAB36B – June 2010

ECG Implementation on the TMS320C5515 DSP Medical

13 Pole and Zero Location for IIR Filter .................................................................................... 13

1.1 Medical Development Kit (MDK) Overview

C5000, Code Composer Studio are trademarks of Texas Instruments.

Color LCD Display

Figure 1. MDK Hardware Overview

1.2 MDK ECG System

1.2.1 Key Features

1.2.2 MDK Hardware

1.2.2.1 C5515 EVM

1.2.2.2 ECG Front-End Board

Figure 2. ECG Board

1.2.2.3 ECG Cable

1.2.3 MDK Software

1.2.3.1 C5515 Software Application

Figure 3 shows the ECG front-end board architecture.

Reference Voltage -5 V TPS60403

Lead Off Detection

Figure 3. ECG Front-End Block Diagram

The front-end board contains the following stages:

2.1 Defibrillator Protection

Figure 4. De-Fibrillation Protection Circuit

2.2 Right Leg Drive Circuit

Figure 5. Right-Leg-Drive Circuit

2.3 Lead-Off Detection

Figure 6. Lead-Off Detection Circuit

2.4 Lead Formation Using Instrumentation Amplifier

Figure 7 shows the lead formation for Lead I.

Figure 7. Lead I Formation

2.5 Low-Pass Filters (Anti-Aliasing)

Figure 8. LPF for Lead II

2.6 Analog-to-Digital Conversion (ADC)

AVSS MUX ADC Extclk DGND

Figure 9. Block Diagram of ADS1258

The following configuration is used for the ADS1258:

Host to ADC interface SPI

C5505 DSP SPI_CS

C5505 EVM ECG FE

Figure 10. Interface Between ADS1258 and DSP

2.7 Front-End Connector

2.7.1 J20 Connector Interface at C5515 EVM

2.7.2 J21 Connector Interface at C5515 EVM

2.7.3 J22 Connector Interface at C5515 EVM

Table 1. J22 Connector Interface

Figure 11 shows the high-level architecture of DSP subsystem.

IIR ECG Lead

Lead Off Interrupt

Figure 11. DSP Software Architecture

3.1 Data Acquisition

3.2 Lead-Off Detection

3.3 Interrupt Service Routine (IIR) Filter - DC Signal Removal

Figure 12 shows the frequency response for the filter.

Figure 12. DC Removal Filter Response

Figure 13. Pole and Zero Location for IIR Filter

Figure 14 shows 1 Hz signal response via the DC removal filter.

Figure 14. 1Hz Signal Response via DC Removal Filter

3.4 FIR Filter

Figure 15 shows simulation results for the MBF.

Figure 15. MBF Frequency Response

x(n) x(n-1) x(n-2) ..... x(n-L+2) x(n-L+1)

Figure 16. Buffer-Shifting Convolution Algorithm