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Schematic Diagrams

Appendix B:Schematic Diagrams


This appendix has circuit diagrams of the D470V/D480V notebook’s PCB’s. The following table indicates where to find
the appropriate schematic diagram.

Diagram - Page Diagram - Page Diagram - Page


Table 1
System Block Diagram - Page B - 2 USB Port - Page B - 19 Mobility M10-P Power - Page B - 36
Schematic
Socket 478 1 of 2 - Page B - 3 PCMCIA ENE1410 - Page B - 20 VCORE - Page B - 37
Diagrams
Socket 478 & ITP 2 of 2 - Page B - 4 PCMCIA Power & MDC Interface - Page B - 21 +1.2V, +1.5V - Page B - 38

B.Schematic Diagrams
Clock Generator - Page B - 5 1394 PHY TSB41LV01 - Page B - 22 +2.5V, +1.25V - Page B - 39

M648FX-1 (Host/AGP) 1 of 4 - Page B - 6 LPC Super I/O - Page B - 23 +3V, +5V, +12V - Page B - 40

M648FX-2 (Memory for DDR) 2 of 4 - Page B - 7 LPT/COM Port - Page B - 24 Charger - Page B - 41

M648FX-3 & CRT Out 3 of 4 - Page B - 8 LPC H8 - Page B - 25 S/W Board & Hot Key - Page B - 42

M648FX-4 (Power) 4 of 4 - Page B - 9 LAN RTL8100S(B)-32/RTL8100C - Page B - 26 TouchPad & SwitchBoard - Page B - 43

DDR Memory DIMM - Page B - 10 Audio Codec ALC650 - Page B - 27

DDR SSTL-2 Termination - Page B - 11 Audio Out & Off Board Connectors - Page B - 28

LVDS Interface (SiS302LV) - Page B - 12 System Power Control - Page B - 29

Panel Con & LED Indicator - Page B - 13 Fan Control and SpeedStep - Page B - 30

963-1 (PCI/IDE/HyperZip) 1 of 4 - Page B - 14 Mobility M10-P - Page B - 31

963-2 (Misc Signals) 2 of 4 - Page B - 15 Mobility M10-P Mem A/B - Page B - 32

963-3 (USB I/F) 3 of 4 - Page B - 16 VGA DDR DRAM Channel A - Page B - 33

963-4 (Power & RTC) 4 of 4 - Page B - 17 VGA DDR DRAM Channel B - Page B - 34

HDD/Combo Connector - Page B - 18 VGA DDR DRAM Termination - Page B - 35

B - 1
Schematic Diagrams

System Block Diagram

TV-OUT VGA NORTHWOOD


CLOCK
ATI M10P &
GENERATOR
PRESCOTT

66MHz
AGP Bus
SOCKET - 478
PANEL B A
2/16/32 2/16/32
DDRAM DDRAM Host Bus

DDR INTERFACE
B.Schematic Diagrams

TV-OUT
( SiS 302LV )
PAGE 10 VB-LINK
SiS 648FX
839 mBGA

DIMM1

DIMM2
Sheet 1 of 42 PANEL
RGB Rtt
CRT PORT
System Block
Diagram
MuTIOL 1G

Ultra 66/100/133
HDD/CD-ROM CON M I II/F
USB 2.0 I/F
SiS 963
AC ' 97 I/F 371 mBGA
BLUE BOOTH PCI I/F

USB PORT 1394 PHY


Realtek CardBus
MDC AUDIOCODEC
ENE 1410 TSB41LV01
MODEM ALC650 RTL 8110S
Video Camera
LPC I/F
Wireless LAN

Card Reader INT.KB KBC H8 LPC Super I/O


H8S-2149 HM NS PC87393
EXT.KB
TV-Tuner
EXT.PS2 XBUS

TOUCH PAD FLASH ROM COM/PRT PORT IR FDD CON

B - 2 System Block Diagram (71-D40U0-D03)


Schematic Diagrams

Socket 478 1 of 2
HD#[0..63]
HD#[0..63] 5
VCC_CORE VIDPWRGD
VIDPWRGD38

T
T

T
AC10
AC12
AC14
AC16
AC18

AD11
AD13
AD15
AD17
AD19
AA10
AA12
AA14
AA16
AA18

AB11
AB13
AB15
AB17
AB19

AE10
AE12
AE14
AE16
AE18
AE20

AE21
AF11
AF13
AF15
AF17
AF19

AF21

AF24
AF25
AC8

AD7
AD9

AD2
AA8

AB7
AB9

AE6
AE8

AF2

AF5
AF7
AF9

C10
C12
C14
C16
C18
C20

D11
D13
D15
D17
D19
A10
A12
A14
A16
A18
A20

B11
B13
B15
B17
B19

E10
E12
E14
E16
E18
E20

A22

K26
K25
F11
F13
F15
F17
F19

L25

J26
C8

D7
D9
A8

B7
B9

E8

A7
F9
JCPU1A

DEP3
DEP2
DEP1
DEP0
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
NC
NC
NC
NC

NC
NC
AB1
HD#0 B21 A35 Y1 T HA#[3..31]
HD#1 B22 D0 A34 W2
HA#[3..31] 5
HD#2 A23 D1 A33 V3
HD#3 A25 D2 A32 U4 HA#31
HD#4 C21 D3 A31 T5 HA#30
HD#5 D22 D4 A30 W1 HA#29
HD#6 B24 D5 A29 R6 HA#28
HD#7 C23 D6 A28 V2 HA#27
HD#8 C24 D7 A27 T4 HA#26
HD#9 B25 D8 A26 U3 HA#25
HD#10 G22 D9 A25 P6 HA#24
HD#11 H21 D10 A24 U1 HA#23
HD#12 C26 D11 A23 T2 HA#22
HD#13 D23 D12 A22 R3 HA#21
HD#14 J21 D13 A21 P4 HA#20
D14 A20

B.Schematic Diagrams
HD#15 D25 P3 HA#19
HD#16 H22 D15 A19 R2 HA#18
HD#17 E24 D16 A18 T1 HA#17
HD#18 G23 D17 A17 N5 HA#16
HD#19 F23 D18 A16 N4 HA#15 +3VS
HD#20 F24 D19 A15 N2 HA#14
HD#21 E25 D20 A14 M1 HA#13
HD#22 F26 D21 A13 N1 HA#12
HD#23
HD#24
HD#25
D26
L21
G26
D22
D23
D24
D25
A12
A11
A10
A9
M4
M3
L2
HA#11
HA#10
HA#9
Sheet 2 of 42

8
7
6
5
HD#26 H24 M6 HA#8 R372 R387
HD#27
HD#28
HD#29
M21
L22
J24
D26
D27
D28
INTEL P4 CPU SOCKET 478 PART 1
A8
A7
A6
L3
K1
L6
HA#7
HA#6
HA#5
RP35
8P4R-10K
Socket 478 1 of 2
HD#30 K23 D29 A5 K4 HA#4 10K 10K
HD#31 H25 D30 A4 K2 HA#3

1
2
3
4
HD#32 M23 D31 A3
HD#33 N22 D32 AE5 VID0
HD#34 P21 D33 VID0 AE4 VID1 VID0 36
HD#35 M24 D34 VID1 AE3 VID2 VID1 15,36
HD#36 N23 D35 VID2 AE2 VID3 VID2 36
HD#37 M26 D36 VID3 AE1 VID4 VID3 36
HD#38 N26 D37 VID4 AD3 VID5 VID4 36
HD#39 N25 D38 VID5 H3 HREQ#4 VID5 36
HD#40 R21 D39 REQ4 J3 HREQ#3
HD#41 P24 D40 REQ3 J4 HREQ#2
HD#42 R25 D41 REQ2 K5 HREQ#1
HD#43 R24 D42 REQ1 J1 HREQ#0
HD#44 T26 D43 REQ0 HREQ#[0..4]
HD#45 T25 D44 AB4 HBPRM5# HREQ#[0..4]5
HD#46 T22 D45 BPM5 AA5 HBPRM4# HBPRM5# 3
HD#47 T23 D46 BPM4 Y6
HBPRM4# 3
HD#48 U26 D47 BPM3 AC4
HD#49 U24 D48 BPM2 AB5 HBPM1#
HD#50 U23 D49 BPM1 AC6 HBPM0# HBPM1# 3
HD#51 V25 D50 BPM0 H_DPSLP# HBPM0# 3
HD#52 U21 D51 PM_CPUPERF# H_DPSLP#29,36
HD#53 V22 D52 AD25 R291 51
PM_CPUPERF# 15
HD#54 V24 D53 DPSLP# A6 R369 51
HD#55 W26 D54 GHI# Y3 R406 51
HD#56 Y26 D55 TESTHI10 W4 R423 51
HD#57 W25 D56 TESTHI9 U6 R422 51
HD#58 Y23 D57 TESTHI8 AB22 R308 51
HD#59 Y24 D58 TESTHI7 AA20 R309 51
D59 TESTHI6

AF6 OPTIMIZED/COMPAT#
HD#60 Y21 AC23 R292 51
HD#61 AA25 D60 TESTHI5 AC24 R294 51
HD#62 AA22 D61 TESTHI4 AC20 R310 51
HD#63 AA24 D62 TESTHI3 AC21 R311 51
AD10 BOOTSELECT

D63 TESTHI2 AA2 R407 51


RS#0 F1 TESTHI1 AD24 R293 51
5 RS#0 RS#1 G5 RS0 TESTHI0 VCC_CORE
5 RS#1 RS#2 F4 RS1
5 RS#2
H4 VSS
H23 VSS
H26 VSS
A11 VSS
A13 VSS
A15 VSS
A17 VSS
A19 VSS
A21 VSS
A24 VSS
A26 VSS
A3 VSS
A9 VSS
AA1 VSS
AA11 VSS
AA13 VSS
AA15 VSS
AA17 VSS
AA19 VSS
AA23 VSS
AA26 VSS
AA4 VSS
AA7 VSS
AA9 VSS
AB10 VSS
AB12 VSS
AB14 VSS
AB16 VSS
AB18 VSS
AB20 VSS
AB21 VSS
AB24 VSS
AB3 VSS
AB6 VSS
AB8 VSS
AC11 VSS
AC13 VSS
AC15 VSS
AC17 VSS
AC19 VSS
AC2 VSS
AC22 VSS
AC25 VSS
AC5 VSS
AC7 VSS
AC9 VSS
AD1 VSS

AD12 VSS
AD14 VSS
AD16 VSS
AD18 VSS
AD21 VSS
AD23 VSS
AD4 VSS
AD8 VSS
AE11 VSS
AE13 VSS
AE15 VSS
AE17 VSS
AE19 VSS
AE22 VSS
AE24 VSS
AE26 VSS
AE7 VSS
AE9 VSS
AF1 VSS
AF10 VSS
AF12 VSS
AF14 VSS
AF16 VSS
AF18 VSS
AF20 VSS
AF26 VSS

AF8 VSS
B10 VSS
B12 VSS
B14 VSS
B16 VSS
B18 VSS
B20 VSS
B23 VSS
B26 VSS
B4 VSS
B8 VSS
C11 VSS
C13 VSS
C15 VSS
C17 VSS
C19 VSS
C2 VSS
VSS
RS2

NORTHWOOD478
H1

PRE/NOR#
VCC_CORE PRE/NOR# 36
C115

VCC_CORE +2.5V

0.1UF C335 C513 C497 C374 C372 C370 C367 C398 C400 C402 C404 C511 C413 C494 C99 C98 C97 C36 C37

10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805)
VCC_CORE

C369 C514 C515 C373 C496 C13 C401 C371 C375 C403 C396 C491 C368 C397 C414 C73 C471 C434 C96

0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF

Socket 478 1 of 2 (71-D40U0-D03) B - 3


Schematic Diagrams

Socket 478 & ITP 2 of 2


VCC_CORE
CPUGTLVREFA R324 49.9_1%
CPUGTLVREFB R400 49.9_1%

C338 C336 C415 R323 C399 C405 C492 R401

220P 220P 1UF 100_1% 220P 220P 1UF 100_1%


CPU SIGNAL TERMINALION

AA21
AA6
C25

D10
D12
D14
D16
D18
D20
D21
D24

C22

F20
VCC_CORE VCC_CORE

C5
C7
C9

D3
D6
D8
E1
CLOSE TO CPU

F6
L98 JCPU1B
4.7uH_SMD_30% FERR# R368 62_1%

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GTLREF0
GTLREF1
GTLREF2
GTLREF3
1 2 AE23 AC3 IERR
VCCIOPLL IERR V6 BREQ0# R93 51_1%
1 2 AD20 MCERR B6 FERR# T
VCCA FERR Y4 STPCLK# FERR# 15 PROCHOT# R73 62_1%
L99 C377 C376 AD22 STPCLK AA3 STPCLK# 15 VCC_CORE
VSSA BINIT T R305
4.7uH_SMD_30% W5 INIT# CPUPWRGD 51_1%
10U(0805) 10U(0805) INIT AB2 INIT# 15
RSP R72
H5 DBSY# T THERMTRIP# 62_1%
HCLK-CPU 4 1 HCLK-ITP0 AC26 DBSY H2 DRDY# DBSY# 5
HCLK-CPU# 3 2 HCLK-ITP0# AD26 ITP_CLK0 DRDY J6 HTRDY# DRDY# 5 C412 C74 A20M# R345 56_1%
RP34 4P2R-0(R) ITP_CLK1 TRDY G1 ADS# HTRDY# 5
DBI#3 V21 ADS G4 HLOCK# ADS# 5 0.1UF 0.1UF STPCLK# R424 56_1%
DBI#2 P26 DB#3 LOCK H6 BREQ0# HLOCK# 5
DBI#1 G25 DB#2 BR0 G2 BNR# BREQ0# 5 CPUSLP# R304 56_1%
B.Schematic Diagrams

DBI#0 E21 DB#1 BNR F3 HIT# BNR# 5


DBI#[0..3] DB#0 HIT E3 HITM# HIT# 5 SMI# R102 56_1%
5 DBI#[0..3] HASTB#1 R5 HITM D2 BPRI# HITM# 5
5 HASTB#1 HASTB#0 L5 ADSTB1 BPRI E2 DEFER# BPRI# 5 INIT# R425 56_1%
5 HASTB#0 DBRESET AE25 ADSTB0 DEFER D4 HTCK DEFER# 5
DBRESET TCK C1 HTDI VCC_CORE IGNNE# R71 56_1%
TDI F7 HTMS
NMI E5 TMS E6 HTRST# INTR R94 56_1%

Sheet 3 of 42 15
15
NMI
INTR
INTR D1 LINT1
LINT0
TRST
TDO
PROCHOT
D5
C3
B2
HTDO
PROCHOT#
IGNNE# C512 C339 C495 C337
NMI R95 56_1%

HCLK-CPU AF22 IGNNE B5 SMI# IGNNE# 15 CPURST# R307 51_1%


Socket 478 & ITP 4 HCLK-CPU
4 HCLK-CPU#
HCLK-CPU# AF23 BCLK0
BCLK1
SMI
A20M
SLP
C6
AB26
AB23
A20M#
CPUSLP#
CPUPWRGD
SMI#
A20M#
15
15
CPUSLP# 15
0.1UF 0.1UF 0.1UF 0.1UF
HTDO R103 75

PWRGOOD CPUPWRGD 5
2 of 2 R70
R13
51.1_1%
51.1_1%
P1
L24 COMP1
COMP0
RESET

THERMDA
AB25

B3
CPURST#
THERMDA
CPURST# 5
IERR
DBRESET
R371

R306
10K

150
C4 THERMDC
HDSTBP#3 W23 THERMDC A2 THERMTRIP# HTMS R83
5 HDSTBP#3 STBP3 THERMTRIP 39
HDSTBP#2 P23
5 HDSTBP#2 HDSTBP#1 J23 STBP2 AD6 HCLK-ITP0 R263 51_1%
5 HDSTBP#1 HDSTBP#0 F21 STBP1 BSEL0 AD5 BSEL0 4
5 HDSTBP#0 HDSTBN#3 W22 STBP0 BSEL1 BSEL1 4 HCLK-ITP0# R264 51_1%
5 HDSTBN#3 HDSTBN#2 R22 STBN3 AC1
5 HDSTBN#2 HDSTBN#1 K22 STBN2 AP0 V5 VCCVID
5 HDSTBN#1 HDSTBN#0 E22 STBN1 AP1 ITP_STPWR R290 1.5K
5 HDSTBN#0 STBN0 AF4 T
VCC_SENSE A5 VCCVID AF3 HBPM0# R349 51
36 VCC_SENSE VSS_SENSE A4 VCC_SENSE VCCVIDPRG 2 HBPM0#
36 VSS_SENSE VSS_SENSE HBPM1# R350 51
2 HBPM1#

1
E11
E13 VSS C775 HBPRM4# R348 51
E15 VSS Y5 2 HBPRM4#
E17 VSS VSS Y25 0.1UF HBPRM5# R370 51

2
E19 VSS VSS Y22 2 HBPRM5#
E23 VSS VSS Y2
E26 VSS VSS W6 HTCK R81 27
E4 VSS VSS W3
E7 VSS VSS W24
E9 VSS VSS W21
ITP/TAP TERMINATION
F10 VSS VSS V4
F12 VSS VSS V26
CLOSE TO ITP PORT
F14 VSS VSS V23
F16 VSS VSS V1
F18 VSS VSS U5 Q44
F2 VSS VSS U25 DTA114EUA(R)
ITP/TAP TERMINATION
F22 VSS VSS U22 E
F25 VSS VSS U2
CLOSE TO CPU VCC_CORE
F5 VSS VSS T6 B +3V VDD3
F8 VSS VSS T3 C

SENSE_VCC_REST
G21 VSS VSS T24 1 2 SENSE_VCC R405 200 HTDI R69 150
G24 VSS VSS T21 C493 0.1UF
G3 VSS VSS R4 HTRST# R82 680
VSS VSS R402 R404 R111 R110
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U20

mils
20
M22
M25

NORTHWOOD478 2 15
N21
N24

R23
R26
K21
K24

P22
P25
L23
L26
J22
J25

M2

M5
G6

N3
N6

R1
VCC STBY#
K3
K6

P2

P5
C75
L1

L4
J2

J5

4.7K 4.7K 2.2K 2.2K


12
2200P SMBDATA TMP_SMDATA24
THERMDA 3 14 NEAR U18
DXP SMBCLK TMP_SMCLK24
THERMDC 4
DXN 6
ALERT# 11 ADD1 10
27 ALERT# ALERT# ADD0
R403 10K
+3V
1
7 NC/CRIT1 5 T
8 GND NC/CRIT0 9 T
GND NC/OS# 13 T
24 SENSE_VCC_REST NC T
16
NC T
EN1617

B - 4 Socket 478 & ITP 2 of 2 (71-D40U0-D03)


Schematic Diagrams

Clock Generator

Damping Resistors
+3VS
Main Clock Generator Place near to the
Clock Outputs By-Pass Capacitors
U21 Place near to the Clock
L30 FCM2012V121 CLOCK GEN (660) Outputs
1 2 CLK_VCC3 1
11 VDDREF 40 CPU-1 RP37 1 4 HCLK-CPU HCLK-CPU R395 49.9_1%
C93 VDDZ CPUCLK0 HCLK-CPU 3
C81 C504 C505 C89 C107 C108 C555 C92 13 39 CPU-2 2 3 HCLK-CPU#
HCLK-CPU# 3
HCLK-CPU# R396 49.9_1%
19 VDDPCI CPUCLK#0 4P2R-33
0.1UF 0.1UF 0.1UF 0.1UF 28 VDDPCI 44 CPU-3 RP36 1 4 HCLK-661 HCLK-661 R393 49.9_1%
10UF/10V 0.1UF 0.1UF 0.1UF 0.1UF HCLK-661 5
29 VDD48 CPUCLK1 43 CPU-4 2 3 HCLK-661# HCLK-661# R394 49.9_1%
VDDAGP CPUCLK#1 HCLK-661# 5
42 4P2R-33
48 VDDCPU 47 SD-1 R411 22 SDCLK
VDDSD SDCLK T SDCLK C482 10PF(R)
12 31 AGP-1 R413 22 AGPCLK
PCI_STOP# AGPCLK0 AGPCLK 5
30 AGP-2 R414 22 AGPCLKATI
AGPCLKATI 30
5 AGPCLK1 AGPCLK C483 10PF(R)
8 VSSREF 9 ZIP-1 R451 22 ZCLK0
+3VS VSSZ ZCLK0 ZCLK0 9 10PF(R)
18 10 ZIP-2 R452 22 ZCLK1
ZCLK1 13
AGPCLKATI C506
24 VSSPCI ZCLK1
25 VSSPCI 14 FS3 R453 33 PCICLK963
+3VS +3VS VSS48 PCICLK_F0/FS3 PCICLK963 13
32 15 FS4 R454 33 PCICLK1394 ZCLK0 C600 10PF(R)
R92 41 VSSAGP PCICLK_F1/FS4 16 PCI-1 R455 33 PCICLKPCM T
VSSCPU PCICLK0 PCICLKPCM 19
46 17 PCI-2 R456 33 PCICLKLAN
PCICLKLAN 25
ZCLK1 C601 10PF(R)
10K VSSSD PCICLK1 20 PCI-3 R457 33 PCICLKIO
R436 PCICLK2 PCICLKIO 22
PCI-4

B.Schematic Diagrams
R101 D16 21 R458 33 PCICLKH8
PCICLK3 PCICLKH8 24 10PF(R)
22 PCI-5 R435 33 PCLK_80P
PCLK_80P 20
PCICLK963 C602
10K 10K C A 45 PCICLK4 23 PCI-6
15,29 CPUSTP# CPU_STOP# PCICLK5 T PCICLK1394 C603 10PF(R)
1SS355 2 FS0 R448 33 REFCLK0 14.381MHZ
VTT REF0/FS0 REFCLK0 9
33 3 FS1 R449 33 REFCLK1
REFCLK1 15
PCICLKPCM C122 10PF(R)
C C PD#/VTT_PWRGD REF1/FS1 4 FS2 R450 33 CLKAPIC
R437 CLKAPIC 15
B B Q36 REF2/FS2 PCICLKLAN C121 10PF(R)
R412

10K
E Q37
2N3904
E 2N3904
L29
475_1%
38
IREF 48M
24_48M/MULTISEL
27
26
USB-1
MULTISEL
R91
R415
22
22
UCLK48M
SIO48M
48 MHZ
UCLK48M 16
SIO48M 22
PCICLKIO C120 10PF(R) Sheet 4 of 42
1 2FCM1608K121 36 PCICLKH8 C119 10PF(R)
+3VS

C88 C90 C91


VDDA

SCLK
35
34
SMBCLK
SMBDAT SMBCLK 7,15,25 UCLK48M C87 10PF(R)
Clock Generator
SDATA SMBDAT 7,15,25
0.1UF 0.1UF 0.01UF

XOUT
37
VSSA

XIN
ICS 952011

7
+3VS
CY 28342 1
Y4
2

C84 C83 C82 MULTISEL R416 4.7K


14.318MHz

10UF/10V 0.01UF 0.1UF C554 C530


5PF 5PF

U24
+2.5VS
Clock Buffer (DDR) CLOCK BUFFER (DDR48)

L51
1 2 BUFFERVCC 3 2 RP64 3 2 4P2R-0 DDRCLK3
FCM2012V121 12 VDD CLK0 1 4 1 DDRCLK#3 DDRCLK37
C215 C708 C737 C210 23 VDD CLK#0 DDRCLK#37
C220 C755 C219 VDD 4 RP65 4 1 4P2R-0 DDRCLK0
10U(0805) 0.1UF 0.1UF 0.1UF CLK1 5 3 2 DDRCLK#0 DDRCLK07
10U(0805) 0.01UF 0.1UF CLK#1 DDRCLK#07
13 RP66 2 3 4P2R-0 DDRCLK2
+2.5VS L142 CLK2 14 1 4 DDRCLK#2 DDRCLK27
1 2 BUF_2.5VS 10 CLK#2 DDRCLK#27
AVDD 17 RP51 1 4 4P2R-0 DDRCLK4
FCM1608K121 CLK3 DDRCLK47
C753 C736 C750 16 2 3 DDRCLK#4
CLK#3 DDRCLK#47
10U(0805) 0.01UF 0.1UF 24 RP50 2 3 4P2R-0 DDRCLK1
CLK4 25 1 4 DDRCLK#1 DDRCLK17
+3VS Frequency SMBCLK 7
CLK#4
26 RP49 2 3 4P2R-0 DDRCLK5
DDRCLK#17

Selection SMBDAT 22
SCLK CLK5
CLK#5
27 1 4 DDRCLK#5 DDRCLK57
DDRCLK#57
R462 4.7K FS0 SDATA
R463 4.7K(R) FS1 19 FB_OUT R523 22 FB_IN
R464 4.7K(R) FS2 FWDSDCLKO 8 FB_OUT
R465 4.7K(R) FS3 6 FWDSDCLKO CLK_IN
R466 4.7K(R) FS4
+2.5V
FB_IN 20
FB_IN GND
28
15
NEAR DDR SODIMM
GND 11
+3VS 9 GND 6
T NC GND By-Pass Capacitors
C574 18 Place near to the Clock Buffer
T 21 NC
0.1UF T NC
FB_IN C709 10PF(R)

R347 R346
4.7K
+1.8VS ICS 93722
4.7K CY28352
BSEL0 3
BSEL1 3
PLEASE PLACE IN COMP SIDE
AND NEAR TOGETHER
FS4 FS3 FS2 FS1 FS0 CPU SDRAM ZCLK AGP PCI
BSEL1 BSEL0 Function
L L 0 0 0 1 1 100M 133M 66M 66M 33M
L H
H L 0 0 0 0 1 100M 100M 66M 66M 33M
H H

Clock Generator (71-D40U0-D03) B - 5


Schematic Diagrams

M648FX-1 (Host/AGP) 1 of 4

AAD18/AHSYNC R50 22(R) AAD30/BHSYNC R22 22(R)


30 AAD18/AHSYNC VAHSYNC 10 30 AAD30/BHSYNC VBHSYNC 10
AAD17/AVSYNC R63 22(R) AAD31/BVSYNC R41 22(R)
30 AAD17/AVSYNC VAVSYNC 10 30 AAD31/BVSYNC VBVSYNC 10 AAD16/VADE
VTT AAD16/VADE 10,30
AAD27/VBDE

AAD18/AHSYNC
AAD17/AVSYNC

AAD30/BHSYNC
AAD31/BVSYNC
AAD27/VBDE 10,30

AAD28/VBCTL0
AAD29/VBCTL1
R313 20_1% HNCOMP R23 22(R)
VBCLK 10

AAD16/VADE

AAD27/VBDE
AAD28/VBCTL0

C4XAVDD
C1XAVSS

HNCVREF
AAD28/VBCTL0 10,30

C4XAVSS
C1XAVDD

HNCOMP
HPCOMP
Rds-on(n) = 10 ohm

HVREF
HNCVERF = 1/3 VCCP C30 AAD29/VBCTL1
AAD29/VBCTL1 10,30

SBA7
SBA6
SBA5
SBA4
SBA3
SBA2
SBA1
SBA0
AAD10
AAD11
AAD12
AAD13
AAD14
AAD15

AAD19
AAD20
AAD21
AAD22
AAD23
AAD24
AAD25
AAD26
AAD5
ST0
ST1
ST2
AAD0
AAD1
AAD2
AAD3
AAD4
AAD6
AAD7
AAD8
AAD9
R312 112_1% HPCOMP 10PF(R) NEAR SISM661 ST[0..2]
ST[0..2] 30
Rds-on(p) = 56 ohm AAD[0..15]
HPCVERF = 2/3 VCCP AAD[0..15] 10,30
AAD[19..26]

AK34

AK35

AA26
AL36

AJ36

W26
U26
R26

D22
C22
B22
AAD[19..26] 10,30

L20

W4

W6

G3

G4

G6
U2

U4
R2

R3

R4
N2
R6

H4

H5

D2
B6

B5
Y5

V2

V4

V5

P2

K2

K4

E2

E3

E4
B2
E6
B3
F7

T4

T5

F2

F4

F5
L3
L4

L6
J2
J3

J4
J6
BGA1A SBA[0..7]
SBA[0..7] 30

SBA7
SBA6
SBA5
SBA4
SBA3
SBA2
SBA1
SBA0
C1XAVSS

C4XAVSS

ST0
ST1
ST2
AAD0
AAD1
AAD2
AAD3
AAD4
AAD5
AAD6
AAD7
AAD8
AAD9
AAD10
AAD11
AAD12
AAD13
AAD14
AAD15
AAD16
AAD17
AAD18
AAD19
AAD20
AAD21
AAD22
AAD23
AAD24
AAD25
AAD26
AAD27
AAD28
AAD29
AAD30
AAD31
C1XAVDD

C4XAVDD

HVREF0
HVREF1
HVREF2
HVREF3
HVREF4

HCOMP_P
HCOMP_N
HCOMPVREF_N
HCLK-661 AJ31 K5 AC/BE#3 AC/BE#[0..3]
4 HCLK-661 HCLK-661# AJ33 CPUCLK AC/BE3# M5 AC/BE#2 AC/BE#[0..3] 30
4 HCLK-661# CPUCLK# AC/BE2# P4 AC/BE#1
HLOCK# T33 AC/BE1# U6 AC/BE#0
3 HLOCK# DEFER# T35 HLOCK# AC/BE0#
3 DEFER# DEFER#
B.Schematic Diagrams

HTRDY# V32 C6 AREQ# R316 0(R) VBCAD


3 HTRDY# CPURST# B23 HTRDY# AREQ# E8 AGNT# VBCAD 10 AREQ#
3 CPURST# CPUPWRGD F22 CPURST# AGNT# N6 AFRAME# AGNT# 30 AREQ# 30
3 CPUPWRGD BPRI# R34 CPUPWRGD AFRAME# M4 AIRDY# AFRAME# 30 RBF#
3 BPRI# BREQ0# U31 BPRI# AIRDY# N4 ATRDY# AIRDY# 30 RBF# 30
3 BREQ0# BREQ0# ATRDY# ADEVSEL# ATRDY# 30

2
2
RS#2
RS#1
RS#2
RS#1
RS#0
R33
T32
U35
RS#2
RS#1 AGP ADEVSEL#
ASERR#
ASTOP#
L2
P5
M2
ASERR#
ASTOP#
ADEVSEL# 30

ASTOP# 30
WBF#
WBF# 30

Sheet 5 of 42 3
3
2
ADS#
HITM#
RS#0
ADS#
HITM#
V35
R35
RS#0

ADS#
HITM#
APAR

RBF#
N3

D7
APAR
RBF# R314
APAR
0(R)
30
R297

VBHCLK
4.7K(R)
+3VS

VBHCLK 10
HIT# U34 B4 WBF# R315 0(R)

M648FX-1 3
3
3
HIT#
DRDY#
DBSY#
DRDY#
DBSY#
BNR#
W34
U33
V33
HIT#
DRDY#
DBSY#
WBF#

C7 R723 1K AD_STB[0..1]
3 BNR# BNR# GC_DET# DBI_HI AD_STB[0..1] 30
(Host/AGP) 2
2
HREQ#4
HREQ#3
HREQ#4
HREQ#3
HREQ#2
W35
Y33
W31
HREQ4#
HREQ3#
ADBIH/PIPE#
ADBIL
C4
D6

C2
DBI_LOW
SB_STB
DBI_HI 30
DBI_LOW 30
AD_STB#[0..1]
AD_STB#[0..1] 30
2 HREQ#2 HREQ2# SB_STB SB_STB 30
1 of 4 2
2
HREQ#1
HREQ#0
HREQ#1
HREQ#0
W33
Y35 HREQ1#
HREQ0#
SB_STB#
D3

T2
SB_STB#
AD_STB0 R68
SB_STB#
22(R)
30 C480 0603(R)
VAGCLK VAGCLK 10

648FX-1
HASTB#1 AG31 AD_STB0 U3 AD_STB#0
3 HASTB#1 HASTB#0 AA33 HASTB1# AD_STB0# C439 0603(R)
3 HASTB#0 HASTB0# G2 AD_STB1 R373 22(R) VBGCLK
AD_STB1 H2 AD_STB#1 VBGCLK 10
R36 AD_STB1#
HA#[3..31] T DPWR# D8 AGPCLK AGP1.5/1.8
2 HA#[3..31] AGPCLK AGPCLK 4
HA#31 AH33 W2 AGPCOM_P R390 43.75_1%
HA#30 AG33 HA31# AGPCOMP_P Y2 AGPCOM_N R408 50_1%%
VTT HA#29 AJ35 HA30# AGPCOMP_N B8 A1XAVDD AGP1.5/1.8 R410
HA#28 AF32 HA29# A1XAVDD C8 A1XAVSS
HA#27 AJ34 HA28# A1XAVSS 300_1%
HA#26 AH32 HA27# A7 A4XAVDD
HA#25 AG35 HA26# A4XAVDD B7 A4XAVSS
C34 HA#24 AE31 HA25# A4XAVSS AGPREF
R326
HA#23 AH35 HA24# W3 AGPREF
150_1% HA23# AGPVREF
0.01UF HA#22 AF35
HA#21 AE35 HA22# Y4 C503 R409
HNCVREF HA#20 AE33 HA21# AGPVSSREF HDSTBN#[0..3]
HA#19 AE34 HA20# D24 HDSTBN#3 HDSTBN#[0..3] 3 95.3_1%
HA#18 AF33 HA19# HDSTBN3# F30 HDSTBN#2 0.1UF
C35 HA#17 AG34 HA18# HDSTBN2# G33 HDSTBN#1
R325
75_1% HA#16 AC33 HA17# HDSTBN1# N31 HDSTBN#0
0.01UF HA#15 AD32 HA16# HDSTBN0# HDSTBP#[0..3]
HA#14 AD33 HA15# E25 HDSTBP#3 HDSTBP#[0..3] 3
HA#13 AC35 HA14# HDSTBP3# D30 HDSTBP#2
HA#12 AD35 HA13# HDSTBP2# H32 HDSTBP#1
HA#11 AC31 HA12# HDSTBP1# M32 HDSTBP#0

VTT
HA#10
HA#9
HA#8
HA#7
HA#6
AC34
AB35
AB32
AB33
AA35
HA11#
HA10#
HA9#
HA8#
HA7#
HOST HDSTBP0#

AGP1.5/1.8
R378
R388
R379
8.2K
8.2K
8.2K
AFRAME#
ATRDY#
AIRDY#
HA#5 AA31 HA6# R380 8.2K ADEVSEL#
HA#4 Y32 HA5# R382 8.2K ASTOP#
HD63#
HD62#
HD61#
HD60#
HD59#
HD58#
HD57#
HD56#
HD55#
HD54#
HD53#
HD52#
HD51#
HD50#
HD49#
HD48#
HD47#
HD46#
HD45#
HD44#
HD43#
HD42#
HD41#
HD40#
HD39#
HD38#
HD37#
HD36#
HD35#
HD34#
HD33#
HD32#
HD31#
HD30#
HD29#
HD28#
HD27#
HD26#
HD25#
HD24#
HD23#
HD22#
HD21#
HD20#
HD19#
HD18#
HD17#
HD16#
HD15#
HD14#
HD13#
HD12#
HD11#
HD10#
HA4#

B32 DBI3#
E34 DBI2#
R31 DBI1#
DBI0#
HA#3 AA34 R389 8.2K ASERR#

HD9#
HD8#
HD7#
HD6#
HD5#
HD4#
HD3#
HD2#
HD1#
HD0#
place this HA3# R327 8.2K AGNT#
R295 C340 capacitor R328 8.2K RBF#
SB_STB

M35
M33
75_1% under 650 solder R330 8.2K

G31

G34

G35
C24

D23
D25

C26

D27
D26

D28
C28

C30

C32
D29
C33

D32

D31
D33
D35

C35

D34

H35

H33

N33

N34
N35
E23
B24

B25
B26

E27
B27

B28
E29

B29

B30
B31

B33
B35

B34
E31

E33

E35

K32

K33

K35

P32
P33

P35
F24

F28

F33

F32

F35

F26
L31
L33

L35

L34
J34

J33
J31

J35
0.01UF side R64 8.2K AD_STB0
648FX R352 8.2K AD_STB1
HVREF R351 8.2K AREQ#
WBF#
HD#37
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
HD#53
HD#52
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16
HD#15
HD#14
HD#13
HD#12
HD#11
HD#10
R329 8.2K

DBI#3
DBI#2
DBI#0
DBI#1
HD#9
HD#8
HD#7
HD#6
HD#5
HD#4
HD#3
HD#2
HD#1
HD#0
R381 8.2K APAR
R296 C341 C451
150_1% DBI#[0..3] R331 8.2K SB_STB#
0.01UF 0.1UF DBI#[0..3] 3 R391 8.2K AD_STB#0
HD#[0..63] R374 8.2K AD_STB#1
HD#[0..63] 2
Close M661

+3VS +3VS +3VS +3VS


L33 L125 L116 L117
9.06mA FCM1608K121 FCM1608K121 FCM1608K121 FCM1608K121
C1XAVDD 1 2 C4XAVDD 10mA 1 2 A1XAVDD 10mA 1 2 A4XAVDD 10mA 1 2

C111 C113 C542 C517 C516 C498 C407 C378 C342 C408 C379 C343

0.1UF 0.01UF 10/10V 0.1UF 0.01UF 10/10V 0.1UF 0.01UF 10/10V 0.1UF 0.01UF 10/10V
C1XAVSS N5 C4XAVSS N16 A1XAVSS N13 A4XAVSS N14

20MIL 20MIL 20MIL 20MIL

B - 6 M648FX-1 (Host/AGP) 1 of 4 (71-D40U0-D03)


Schematic Diagrams

M648FX-2 (Memory for DDR) 2 of 4

/RMD[0..63] /RMD[0..63] 7,8


/RDQM[0..7] /RDQM[0..7] 7,8
/RDQS[0..7] /RDQS[0..7] 7,8
/RMA[0..14] /RMA[0..14] 7,8
/RCS#[0..5] /RCS#[0..5] 7,8
CKE[0..5] CKE[0..5] 7

Rs place close to DIMM1 0402 Package BGA1B


+2.5V
MD4 RP38 8 1 /RMD4 MD0 AN35
MD5 8P4R-10 7 2 /RMD5 MD1 AP36 MD0
DQM0 6 3 /RDQM0 MD2 AK33 MD1
MD6 5 4 /RMD6 MD3 AM33 MD2
MD13 RP39 8 1 /RMD13 MD4 AN34 MD3 C593 R461

B.Schematic Diagrams
DQM1 8P4R-10 7 2 /RDQM1 MD5 AK32 MD4
MD5 Rs place close to DIMM1 150_1%
MD14 6 3 /RMD14 MD6 AR34 0402 Package 0.01UF
MD15 5 4 /RMD15 MD7 AN33 MD6 RP42 8P4R-0
MD8 RP14 8 1 /RMD8 DQM0 AR35 MD7 8 1 DDRVREFA
MD12 8P4R-10 7 2 /RMD12 DQS0 AP34 DQM0 AR23 MA0 MA13 T 7 2 T /RMA13
MD3 6 3 /RMD3 MD8 AM32 DQS0/CSB0# MA0 AN23 MA1 MA8 6 3 /RMA8
MD7 5 4 /RMD7 MD9 AL31 MD8 MA1 AN22 MA2 MA6 5 4 /RMA6 C614 R473
MD9 MA2
MD17
MD16
MD20
RP12
8P4R-10
8
7
6
1
2
3
/RMD17
/RMD16
/RMD20
MD10
MD11
MD12
AR31
AL30
AN32
MD10
MD11
MD12
MA3
MA4
MA5
AM23
AL23
AL26
MA3
MA4
MA5
MA4 RP43
MA2
MA0
8
7
6
1 8P4R-0
2
3
/RMA4
/RMA2
/RMA0
0.01UF 150_1%
Sheet 6 of 42
MD21 5 4 /RMD21 MD13 AR33 AN26 MA6 MA12 5 4 /RMA12
DQM2 RP40
MD22 8P4R-10
MD23
8
7
6
1
2
3
/RDQM2
/RMD22
/RMD23
MD14
MD15
DQM1
AN31
AM31
AR32
MD13
MD14
MD15
MA6
MA7
MA8
AN27
AR27
AR28
MA7
MA8
MA9
MA5
MA7
MA9
RP9 8
7
6
1 8P4R-0
2
3
/RMA5
/RMA7
/RMA9
M648FX-2
DQM1 MA9 MA14
MD29
DQM3
MD28
RP41
8P4R-10
5
8
7
4
1
2
/RMD29
/RDQM3
/RMD28 DQS1
MD16
MD17
AP32
AP30
AR30
DQS1/CSB1#
MD16
MD17
MA10
MA11
MA12
AP22
AN18
AR22
MA10
MA11
MA12
MA11
RP8
MA10
5
8
7
4
1 8P4R-0
2
/RMA14
/RMA11
/RMA10
(Memory for DDR)
MD30 6 3 /RMD30 MD18 AM29 AP28 MA13 MA1 6 3 /RMA1
MD31
MD36 RP44
MD37 8P4R-10
5
8
7
4
1
2
/RMD31
/RMD36
/RMD37
MD19
MD20
MD21
AL27
AN30
AN29
MD18
MD19
MD20
MA13
MA14
NC
AM27
AT14
MA14
T
MA3 5 4 /RMA3
+2.5V 2 of 4
DQM4 6 3 /RDQM4 MD22 AL28 MD21 AL17 SRAS# R488 0 /RSRAS#
MD22 SRAS# /RSRAS# 7,8
MD38 5 4 /RMD38 MD23 AN28 AR19 SCAS# R489 0 /RSCAS# /RSCAS# 7,8
MD39 RP45 8 1 /RMD39 DQM2 AL29 MD23 SCAS# AN19 SWE# R139 0 /RSWE#
DQM2 SWE# /RSWE# 7,8
MD44 8P4R-10 7 2 /RMD44 DQS2 AR29 C589 R460
MD45 6 3 /RMD45 MD24 AP26 DQS2/CSB2#
MD24 R136 150_1%
DQM5 5 4 /RDQM5 MD25 AN25 AM17 CS#0 0 /RCS#0 0.01UF
MD46 RP46 8 1 /RMD46 MD26 AR24 MD25 CS0# AL16 CS#1 R137 0 /RCS#1 SRAS# C591 10PF(R)
MD47 8P4R-10 7 2 /RMD47 MD27 AL24 MD26 CS1# AN17 CS#2 R491 0 /RCS#2 DDRVREFB
MD52 6 3 /RMD52 MD28 AL25 MD27 CS2# AR17 CS#3 R154 0 /RCS#3 SCAS# C592 10PF(R)
MD53 5 4 /RMD53 MD29 AR26 MD28 CS3# AP18 CS#4 R138 0 /RCS#4
DQM6 RP47 8 1 /RDQM6 MD30 AM25 MD29 CS4# AR18 CS#5 R490 0 /RCS#5 SWE# C613 10PF(R) C612 R472
MD54 8P4R-10 7 2 /RMD54 MD31 AN24 MD30 CS5#
MD31 150_1%
MD55 6 3 /RMD55 DQM3 AP24 Rs place close to DIMM1 0.01UF
MD60 5 4 /RMD60 DQS3 AR25 DQM3
MD61 RP48 8 1 /RMD61 MD32 AN21 DQS3/CSB3# AP4 R140 0 CKE0
DQM7 8P4R-10 7 2 /RDQM7 MD33 AP20 MD32 CKE0 AT3 R141 0 CKE1
MD62 6 3 /RMD62 MD34 AN20 MD33 CKE1 AR3 CKE2
MD63 5 4 /RMD63 MD35 AL18 MD34 CKE2 AP3 CKE3
MD0 RP15 5 4 /RMD0 MD36 AM21 MD35 CKE3 AR2 CKE4
MD1 8P4R-10 6 3 /RMD1 MD37 AR21 MD36 CKE4 AN4 CKE5
DQS0 7 2 /RDQS0 MD38 AL19 MD37 CKE5 AP2 S3AUXSW#
MD2 8 1 /RMD2 MD39 AM19 MD38 S3AUXSW# S3AUXSW# 28
MD10 RP13 8 1 /RMD10 DQM4 AL20 MD39 R427 10K
DQM4 +3V
MD11 8P4R-10 7 2 /RMD11 DQS4 AR20 +3VS
DQS1 6 3 /RDQS1 MD40 AL15 DQS4/CSB4# L37
MD9 5 4 /RMD9 MD41 AL14 MD40
MD41 5.69mA FCM1608K121
MD24 RP11 8 1 /RMD24 MD42 AN15 AL21 R426 22 FWDSDCLKO SDAVDD 1 2
MD19 8P4R-10 7 2 /RMD19 MD43 AR15 MD42 FWDSDCLKO FWDSDCLKO 4
MD18 6 3 /RMD18 MD44 AN16 MD43 AL22
DQS2 5 4 /RDQS2 MD45 AM15 MD44 DRAMTEST T C519 10PF(R) C112 C114 C611
MD27 RP10 8 1 /RMD27 MD46 AN14 MD45
MD26 8P4R-10 7 2 /RMD26 MD47 AL13 MD46 0.1UF 0.01UF 10U/10V
DQS3 6 3 /RDQS3 DQM5 AP16 MD47 AL35 SDAVDD
MD25 5 4 /RMD25 DQS5 AR16 DQM5 DLLAVDD SDAVSS N6
MD34 RP7 8 1 /RMD34 MD48 AM13 DQS5/CSB5# AL34 SDAVSS
DQS4 8P4R-10 7 2 /RDQS4 MD49 AL12 MD48 DLLAVSS
MD49 20MIL
MD33 6 3 /RMD33 MD50 AL11
MD32 5 4 /RMD32 MD51 AR12 MD50 AM35 DDRAVDD
DQS5 RP6 8 1 /RDQS5 MD52 AP14 MD51 DDRAVDD
MD41 8P4R-10 7 2 /RMD41 MD53 AR14 MD52 AN36 DDRAVSS
MD40 6 3 /RMD40 MD54 AN13 MD53 DDRAVSS
MD35 5 4 /RMD35 MD55 AP12 MD54
MD48 RP5 8 1 /RMD48 DQM6 AN12 MD55 +3VS
MD49 8P4R-10 7 2 /RMD49 DQS6 AR13 DQM6 AF16 DDRVREFA L130
MD43 6 3 /RMD43 MD56 AL10 DQS6/CSB6# DDRVREFA AF23 DDRVREFB
MD56 DDRVREFB FCM1608K121
MD42 5 4 /RMD42 MD57 AR11 DDRAVDD 8.76mA 1 2
MD56 RP4 8 1 /RMD56 MD58 AM9 MD57 AP1
MD51 8P4R-10 7 2 /RMD51 MD59 AR9 MD58 TRAP2 T
MD50 6 3 /RMD50 MD60 AM11 MD59 AR8 R445 40_1% C587 C586 C570
DQS6 5 4 /RDQS6 MD61 AN11 MD60 DDRCOMP_P AP8 R433 40_1%
MD61 DDRCOMP_N +2.5V 0.1UF 0.01UF 10U/10V
MD59 RP3 8 1 /RMD59 MD62 AP10
MD58 8P4R-10 7 2 /RMD58 MD63 AN9 MD62
DQS7 6 3 /RDQS7 DQM7 AN10 MD63 DDRAVSS N18
MD57 5 4 /RMD57 DQS7 AR10 DQM7
DQS7/CSB7#
20MIL

648FX

M648FX-2 (Memory for DDR) 2 of 4 (71-D40U0-D03) B - 7


Schematic Diagrams

M648FX-3 & CRT Out 3 of 4


BGA1C
NOTE: This page is for universal PCB design( suitable for both 645 or 650)
ZCLK0 AL6
4 ZCLK0 ZCLK A15 REFCLK0
ZUREQ AL4 VOSCI REFCLK0 4 NB Hardware Trap Table
13 ZUREQ ZUREQ
ZDREQ AK5
13 ZDREQ ZDREQ
embedded pull-low
ZSTB0 AJ2 B12 ROUT 0 1 Default (30~50K Ohm)
13 ZSTB0 ZSTB#0 AJ3 ZSTB0 ROUT B13 GOUT
13 ZSTB#0 ZSTB0# GOUT
DLLEN# enable PLL disable PLL 0 yes
A13 BOUT DRAM_SEL SDR DDR 1(DDR) yes
ZSTB1 AE3 BOUT
13 ZSTB1 ZSTB1 33(R)
TRAP0 normal NB debug mode 0 yes
ZSTB#1 AF2 A11 Z0801 R277 HSYNC
13 ZSTB#1 ZAD[0..16] ZSTB1# HSYNC B11 Z0802 R275 33(R) VSYNC
13 ZAD[0..16] VSYNC
TRAP1 TV selection, NTSC/PAL(0/1) 0
ZAD0 AH5 CSYNC enable VB 0
ZAD1 AK2 ZAD0 E13 R276 100(R) DDC1CLK
ZAD1 VGPIO0
RSYNC enable VGA interface 1
ZAD2 AJ4 C11 R274 100(R) DDC1DATA LSYNC enable panel link 0
ZAD3 AJ6 ZAD2 VGPIO1 D12 CSYNC
ZAD4 AH2 ZAD3 CSYNC E12 RSYNC T
ZAD5 AH4 ZAD4 RSYNC D11 LSYNC T
ZAD6 AG3 ZAD5 LSYNC T +3VS
ZAD7 AG6 ZAD6 C10 INTA#
ZAD8 AF4 ZAD7 INT#A AN2 PCIRST# INTA# 10,13,30
ZAD9 AG2 ZAD8 PCIRST# AM4 PWRGD PCIRST# 10,13,14,20,22,24,30 RSYNC R278 4.7K
+1.8VS ZAD10 AF5 ZAD9 PWROK AN3 AUXOK PWRGD 15,29
ZAD11 AG4 ZAD10 AUXOK AUXOK 15,24,27,28 ENTEST R279 4.7K
ZAD12 AD2 ZAD11
ZAD13 AE6 ZAD12 PWRGD C549 0.1UF
R446 ZAD14 AE2 ZAD13
C551 ZAD15 AE4 ZAD14 E15 VCOMP C23 0.1UF AUXOK C598 0.1UF
150 0.1UF ZAD16 AL3 ZAD15 VCOMP
ZAD16
ZVREF AK4 E14 VVBWN C24 0.1UF
ZVREF VVBWN
B.Schematic Diagrams

+1.8VS
R447 L10 84.8mA
C550 D13 DACAVDD 1 2
50 0.1UF DACAVDD1 D14
DACAVDD2
FCM1608K121
C22 C305
C21
+1.8VS L128 0.1UF 1UF N1 10U/10V
FCM1608K121 C12 DACAVSS
R434 56 ZCMP_N DACAVSS1
1 2 35.4mA AD5 C13 20MIL
Sheet 7 of 42 C552 C526 C528
ZCOMP_N DACAVSS2

VRSET
D15 VRSET R20 130_1%
+5VS +5VS

10U/10V 0.1UF 0.01UF

M648FX-3

1
R428 56 ZCMP_P +3VS
AD4
ZCOMP_P L13
N17
20MIL
DCLKAVDD 10MIL 1 7.57mA +3VS

& CRT Out


B15 2 D8 D10
DCLKAVDD FCM1608K121 DA221(R) DA221(R)
C25 C17

3
+3VS L36 C26 G Q24

3 of 4 FCM1608K121 0.1UF 1UF 10U/10V 2N7002


6.49mA Z1XAVDD AN1
1 2 R265 33 S D HSYNC
Z1XAVDD 30 HSY
C15
C123 C109 C110 DCLKAVSS
0.01UF R272 33 S D VSYNC
+3VS 30 VSY
10U/10V 0.1UF
Z1XAVSS AM2 L78 18.07mA G
Z1XAVSS B14 ECLKAVDD 1 2 Q23
10MIL ECLKAVDD
N4 FCM1608K121 2N7002
C313 C304
+3VS L31 C314 +3VS
FCM1608K121 0.1UF 1UF 10U/10V
1 2 7.92mA Z4XAVDD AL2 C14 ECLKAVSS
Z4XAVDD ECLKAVSS N10 +3VS +3VS +5VS
10MIL
C527 C94 C95 E10 DLLEN#
0.01UF DLLEN# B10 TMODE0 T +3VS
10U/10V 0.1UF TESTMODE0 B9 TMODE1 T
Z4XAVSS AL1 TESTMODE1 C9 TMODE2 T R271 R273 R257 R18
Z4XAVSS TESTMODE2 T 4.7K 4.7K 2.2K 2.2K
10MIL
N3 D10 TRAP0 G Q22
TRAP0 F9 TRAP1 T R270 2N7002
TRAP1 D9 ENTEST T S D DDC1DATA
30 VGADDCDATA 33
ENTEST T
R21
33 S D DDC1CLK
R 30 VGADDCCLK
R248 0
30 R 661 G
G R5 0 D2 F01J2E Q25
30 G C A +5VS 2N7002
B +5VS
R9 0 VJVGA1
30 B CEN/VGA DSUB +3VS
ROUT R249 0(R) R247 FCM1608K121 FRED_10 1
9
GOUT R4 0(R) R6 FCM1608K121 FGRN_10 2 R258 R256
10
BOUT R251 0(R) R3 FCM1608K121 FBLU_10 3
11 4.7K(R) 4.7K(R)
4 T FCM1608K121
C284 R253 C11 R11 C9 R250 T 12 MID1_10 L2 1 2 DDC1DATA
C267 C3 C10 5 FCM1608K121
13 HS_10 L67 1 2 HSYNC
22P 22P 22P 6 FCM1608K121
22P 75 22P 75 22P 75 14 VS_10 L65 1 2 VSYNC
7 FCM1608K121
15 MID3_10 L66 1 2 DDC1CLK
8
AC

AC

AC

C268 C6 C8 C7

17
16
D3 D4 D23 220P 220P 220P 220P
DA204U DA204U DA204U
C

C
A

+3VS

B - 8 M648FX-3 & CRT Out 3 of 4 (71-D40U0-D03)


Schematic Diagrams

M648FX-4 (Power) 4 of 4
L124 FH50ACB321611T(R) IVDD C479 0.1UF
VTT +1.5VS 80 mil +1.8VS +3VS +1.8VS
L123 FH50ACB321611T
+1.8VS +3V C529 0.1UF

T
T
T
AUX_IVDD +1.8VS +1.8VS
VTT

AC24
AD13
AD15
AD17
AD19
AD21
AD23
AD24
AA24
AB13

AA13

AA12
SUPPORT M660

W13
W24

AM3
W11
W12

AM5
AG1
AH3

AD3

M17
AK3

AE1
AF3
C17
C18
C19
C20
C21
D17
D18
D19
D20
D21

N13
N14
N16
N18
N19
N20
N21
N22
N23
N24

R24

U24

N15
R13
U13

N17
A17
A18
A19
A20
A21
B17
B18
B19
B20
B21

E17
E18
E19
E20
E21

P13
P24

V13
V24

Y13
Y24

Y11
Y12
F17
F18
F19
F20
F21

T13
T24

AJ1

L17
D4
D5
BGA1D C31 C32
L126 0(R)
+1.5V
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

PVDD

PVDD

PVDD
PVDD

PVDD
PVDD

PVDD
PVDD

PVDD

NC
NC
NC
IVDD
IVDD
IVDD
IVDD
IVDD

IVDD

IVDD
IVDD
IVDD
IVDD

IVDD

IVDD
IVDD

IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD

IVDD
IVDD
IVDD

VDD3.3
VDD3.3
VDD3.3
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
L25 AB12 L127 0 10U(0805) 0.1UF
VTT AUX_IVDD +1.8V +1.8VS
L26 AC12 C33 C456
VTT AUX3.3 +3V IVDD
M18
M19 VTT AA1 VTT C525
M20 VTT VDDQ AA2 AGP1.5/1.8 1UF 0.1UF
M21 VTT VDDQ AA3 C437 C446
M22 VTT VDDQ AA4 0.1UF
M23 VTT VDDQ AA5 C478
M24 VTT VDDQ AA6 C447
0.1UF 1UF
M25 VTT VDDQ AB1 +3V C436 C435
M26 VTT VDDQ AB2 L25 0.1UF
N25 VTT VDDQ AB3 10U(0805) C481
C453
P25 VTT VDDQ AB4 +1.5VS AUX_IVDD 0.1UF C406 1UF
R25 VTT VDDQ AB5 FH50ACB321611T C524 C518 C445
T25 VTT VDDQ AB6 10U(0805)
1UF
U25 VTT VDDQ AC1 10U(0805)
C455
V25 VTT VDDQ AC2 C449
0.1UF 1UF 1UF
W25 VTT VDDQ AC3 L23 C450 C452
Y25 VTT VDDQ AC4 0.1UF
AA25 VTT VDDQ AC5 +1.8VS 10U(0805)
VTT VDDQ AC6 FH50ACB321611T(R) C418
0.1UF 1UF
AL7 VDDQ
+2.5V VDDM
AL8 L11
AL9 VDDM VDDQ L12 10U(0805)
AM6 VDDM VDDQ L13
AM7 VDDM VDDQ M11
AM8 VDDM VDDQ M12
AN5 VDDM VDDQ M13
AN6 VDDM VDDQ M14
AN7 VDDM VDDQ M15
AN8 VDDM VDDQ M16
AP5 VDDM VDDQ N11 AGP1.5/1.8 +2.5V
AP6 VDDM VDDQ N12
VDDM VDDQ

B.Schematic Diagrams
AP7 P12 C459
AR4 VDDM VDDQ R12 C735 220U(D)

+
AR5 VDDM VDDQ T12
AR6 VDDM VDDQ U12 C595
C438 0.1UF C590 C594
AR7 VDDM VDDQ V12 C502
AT4 VDDM VDDQ
AT5 VDDM B16 10U(0805)
IVDD 0.1UF 1UF 1UF
AT6 VDDM IVDD C16 C522
C29 0.1UF C572 C573
AT7 VDDM IVDD D16 C457
VDDM IVDD E16
AB25 IVDD F15 10U(0805)
0.1UF 1UF 1UF
AC25 VDDM IVDD C597
C458 10U(0805) C571 C543

Sheet 8 of 42
AD12 VDDM E11
AD25 VDDM NC F11 T
AE11 VDDM NC F13 T 10U(0805)
10U(0805) 10U(0805) 0.1UF
AE12 VDDM NC AL33 T C521
C477 C545 C548
AE13 VDDM NC AM34 T
VDDM NC T

M648FX-4 (Power)
AE14 A9
AE15 VDDM NC A3 T 10U(0805)
10U(0805) 0.1UF 0.1UF
AE16 VDDM VSS A5
AE17 VDDM VSS C1
AE18 VDDM VSS C3
AE19 VDDM VSS C5

4 of 4
AE20 VDDM VSS E1
AE21 VDDM VSS E5 +3V
AE22 VDDM VSS E7 Place these capacitors under 650 solder +1.8VS
AE23 VDDM VSS E9 side C523
AE24 VDDM VSS F3 IVDD C473
AE25 VDDM VSS G1
AE26 VDDM VSS G5 VTT +2.5V
C476 0.1UF
AF11 VDDM VSS H3 10U(0805) C454
AF12 VDDM VSS J1 C472 C547
AF25 VDDM VSS J5 0.1UF
AF26 VDDM VSS K3 C520 0.1UF
VDDM VSS L1 0.1UF 0.1UF
AB24 VSS L5 C500 C544
AC13 PVDDM VSS M3 0.1UF
AD14 PVDDM VSS N1 C475
AD16 PVDDM VSS N5 AGP1.5/1.8 AGP1.5/1.8
0.1UF 0.1UF
AD18 PVDDM VSS P3 C448 C596
AD20 PVDDM VSS R1 0.1UF C419 C421
AD22 PVDDM VSS R5 C474
PVDDM VSS T3 0.1UF 0.1UF
P14 VSS U1 C416 C546 0.1UF 0.1UF
P15 VSS VSS U5 0.1UF C28 C420
P16 VSS VSS V3 C501
P17 VSS VSS W1 0.1UF 0.1UF
P18 VSS VSS W5 0.1UF 0.1UF
P19 VSS VSS Y3 0.1UF
P20 VSS VSS
P21 VSS AE5
P22 VSS VSS AG5
P23 VSS VSS AJ5
R14 VSS VSS AL5
R15 VSS VSS LEDVDD
R16 VSS A22
R17 VSS VSS A24
R18 VSS VSS A26 R283 R281
R19 VSS VSS A28 C316
R20 VSS VSS A30 10K 10K
VSS VSS 0.1UF
R21 A32 D26

14
R22 VSS VSS A34 LEDDATA/WDC A U3
R23 VSS VSS C23 24,27 LEDDATA/WD 1 3 SCROLLOCK

VCC
T14 VSS VSS C25 F01J2E 2 A QA 4 CAPSLOCK
T15 VSS VSS C27 D35 B QB 5 NUMLOCK
T16 VSS VSS C29 LEDCLK C A QC 6 BAT_FULL
T17 VSS VSS C31 24 LEDCLK QD 10 CHA/BATLOW BAT_FULL 11
T18 VSS VSS C34 F01J2E 8 QE 11 WL_LED CHA/BATLOW 11
T19 VSS VSS C36 CLK QF 12 PWR/SUS_LED WL_LED 11

GND
T20 VSS VSS E22 164_RESET# 9 QG 13 E-MAIL PWR/SUS_LED 11
T21 VSS VSS E24 24 164_RESET# CLR QH E-MAIL 11
T22 VSS VSS E26 R282 100K
VSS VSS LEDVDD
T23 E28 74HCT164

7
U14 VSS VSS E30 C19
U15 VSS VSS E32
VSS VSS 4.7U(0805)
U16 E36
U17 VSS VSS F34
U18 VSS VSS G32
U19 VSS VSS G36
U20 VSS VSS H34 D9
U21 VSS VSS J32 C A R17 220(0805) SCROLLOCK
U22 VSS VSS J36
U23 VSS VSS K34 SML_010MT_G
V14 VSS VSS L32 D7
V15 VSS VSS L36 C A R16 220(0805) CAPSLOCK
V16 VSS VSS M34
V17 VSS VSS N32 SML_010MT_G
V18 VSS VSS N36 D6
V19 VSS VSS P34 C A R15 220(0805) NUMLOCK
V20 VSS VSS R32
V21 VSS VSS SML_010MT_G
V22 VSS T34 D5
V23 VSS VSS U32 R14 220(0805) A C
VSS VSS +5VS
W14 U36
W15 VSS VSS V34 Q26 SML_010MT_G
W16 VSS VSS W32 2N3906
W17 VSS VSS W36 IDE_LED# R266 4.7K Z511
W18 VSS VSS Y34 14 IDE_LED#
W19 VSS VSS AA32
W20 VSS VSS AA36
W21 VSS VSS AB34
W22 VSS VSS
W23 VSS
VSS
Y15 VSS
Y16 VSS
Y17 VSS
Y18 VSS
Y19 VSS
Y20 VSS
Y21 VSS
Y22 VSS
Y23 VSS
AA14 VSS
AA15 VSS
AA16 VSS
AA17 VSS
AA18 VSS
AA19 VSS
AA20 VSS
AA21 VSS
AA22 VSS
AA23 VSS
AB14 VSS
AB15 VSS
AB16 VSS
AB17 VSS
AB18 VSS
AB19 VSS
AB20 VSS
AB21 VSS
AB22 VSS
AB23 VSS
AC14 VSS
AC15 VSS
AC16 VSS
AC17 VSS
AC18 VSS
AC19 VSS
AC20 VSS
AC21 VSS
AC22 VSS
AC23 VSS
VSS

AC36 VSS
AD34 VSS
AE32 VSS
AE36 VSS
AF34 VSS
AG32 VSS
AG36 VSS
AH34 VSS
AJ32 VSS
VSS

AM12VSS
AM14VSS
AM16VSS
AM18VSS
AM20VSS
AM22VSS
AM24VSS
AM26VSS
AM28VSS
AM30VSS
AP9 VSS
AP11 VSS
AP13 VSS
AP15 VSS
AP17 VSS
AP19 VSS
AP21 VSS
AP23 VSS
AP25 VSS
AP27 VSS
AP29 VSS
AP31 VSS
AP33 VSS
AP35 VSS
AT8 VSS
AT10 VSS
AT12 VSS
VSS

AT18 VSS
AT20 VSS
AT22 VSS
AT24 VSS
AT26 VSS
AT28 VSS
AT30 VSS
AT32 VSS
AT34 VSS
AL32 VSS
VSS
AM10
AC32

AT16

661
Y14

M648FX-4 (Power) 4 of 4 (71-D40U0-D03) B - 9


Schematic Diagrams

DDR Memory DIMM


+2.5V

CN4

113
114
131
132
143
144
155
156
157
167
168
179
180
191
192

192
191
180
179
168
167
157
156
155
144
143
132
131
114
113
10
21
22
33
34
36
45
46
57
58
69
70
81
82
92
93
94

94
93
92
82
81
70
69
58
57
46
45
36
34
33
22
21
10
9

9
CN3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
/RMA0 112 5 /RMD0 5 112 /RMA0 +2.5V
/RMA1 111 A0 DQ0 7 /RMD1 7 DQ0 A0 111 /RMA1
/RMA2 110 A1 DQ1 13 /RMD2 13 DQ1 A1 110 /RMA2 RP18
/RMA3 109 A2 DQ2 17 /RMD3 17 DQ2 A2 109 /RMA3 CKE4 1 8
/RMA4 108 A3 DQ3 6 /RMD4 6 DQ3 A3 108 /RMA4 CKE2 2 7
/RMA5 107 A4 DQ4 8 /RMD5 8 DQ4 A4 107 /RMA5 CKE3 3 6
/RMA6 106 A5 DQ5 14 /RMD6 14 DQ5 A5 106 /RMA6 CKE5 4 5
/RMA7 105 A6 DQ6 18 /RMD7 18 DQ6 A6 105 /RMA7
/RMA8 102 A7 DQ7 19 /RMD8 19 DQ7 A7 102 /RMA8 8P4R-470(0402)
/RMA9 101 A8 DQ8 23 /RMD9 23 DQ8 A8 101 /RMA9
/RMA10 115 A9 DQ9 29 /RMD10 29 DQ9 A9 115 /RMA10 CKE0 R157 470
/RMA13 100 A10/AP DQ10 31 /RMD11 31 DQ10 A10/AP 100 /RMA13 CKE1 R158 470
/RMA14 99 A11 DQ11 20 /RMD12 20 DQ11 A11 99 /RMA14
A12 DQ12 24 /RMD13 24 DQ12 A12
/RMA11 117 DQ13 30 /RMD14 30 DQ13 117 /RMA11
/RMA12 116 BA0 DQ14 32 /RMD15 32 DQ14 BA0 116 /RMA12
BA1 DQ15 41 /RMD16 41 DQ15 BA1
DQ16 43 /RMD17 43 DQ16
/RDQM0 12 DQ17 49 /RMD18 49 DQ17 12 /RDQM0
/RDQM1 26 DM0 DQ18 53 /RMD19 53 DQ18 DM0 26 /RDQM1
/RDQM2 48 DM1 DQ19 42 /RMD20 42 DQ19 DM1 48 /RDQM2
B.Schematic Diagrams

/RDQM3 62 DM2 DQ20 44 /RMD21 44 DQ20 DM2 62 /RDQM3


/RDQM4 134 DM3 DQ21 50 /RMD22 50 DQ21 DM3 134 /RDQM4 +2.5V
/RDQM5 148 DM4 DQ22 54 /RMD23 54 DQ22 DM4 148 /RDQM5
+2.5V /RDQM6 170 DM5 DQ23 55 /RMD24 55 DQ23 DM5 170 /RDQM6
/RDQM7 184 DM6 DQ24 59 /RMD25 59 DQ24 DM6 184 /RDQM7
R487 8.2K 78 DM7 DQ25 65 /RMD26 65 DQ25 DM7 78 R180 8.2K
DM8 DQ26 67 /RMD27 67 DQ26 DM8
DQ27 56 /RMD28 56 DQ27
DQ28 DQ28
Sheet 9 of 42 /RDQS0
/RDQS1
/RDQS2
11
25
47
DQS0
DQS1
DQS2
DQ29
DQ30
DQ31
60
66
68
/RMD29
/RMD30
/RMD31
60
66
68
DQ29
DQ30
DQ31
DQS0
DQS1
DQS2
11
25
47
/RDQS0
/RDQS1
/RDQS2 DDRVREF GEN. & DECOUPLING
/RDQS3 61 127 /RMD32 127 61 /RDQS3
DDR Memory DIMM /RDQS4
/RDQS5
/RDQS6
133
147
169
DQS3
DQS4
DQS5
DQS6
DQ32
DQ33
DQ34
DQ35
129
135
139
/RMD33
/RMD34
/RMD35
129
135
139
DQ32
DQ33
DQ34
DQ35
DQS3
DQS4
DQS5
DQS6
133
147
169
/RDQS4
/RDQS5
/RDQS6
+2.5V

/RDQS7 183 128 /RMD36 128 183 /RDQS7


77 DQS7 DQ36 130 /RMD37 130 DQ36 DQS7 77
DQS8 DQ37 136 /RMD38 136 DQ37 DQS8 C161 C162 C189
DQ38 140 /RMD39 140 DQ38 R142
/RSRAS# 118 DQ39 141 /RMD40 141 DQ39 118 /RSRAS# 75_1%
6,8 /RSRAS# /RSWE# 119 RAS# DQ40 145 /RMD41 145 DQ40 RAS# 119 /RSWE# 0.1UF 0.01UF 0.01UF
6,8 /RSWE# /RSCAS# 120 WE# DQ41 151 /RMD42 151 DQ41 WE# 120 /RSCAS#
6,8 /RSCAS# CAS# DQ42 153 /RMD43 153 DQ42 CAS# DDRVREF
DQ43 142 /RMD44 142 DQ43
/RCS#0 121 DQ44 146 /RMD45 146 DQ44 121 /RCS#2 C182 C164 C183
/RCS#1 122 S0# DQ45 152 /RMD46 152 DQ45 S0# 122 /RCS#3 R159
S1# DQ46 154 /RMD47 154 DQ46 S1# 75_1%
DQ47 163 /RMD48 163 DQ47 0.1UF 0.01UF 0.01UF
CKE0 96 DQ48 165 /RMD49 165 DQ48 96 CKE2
CKE1 95 CKE0 DQ49 171 /RMD50 171 DQ49 CKE0 95 CKE3 NEAR DIMM0 NEAR DIMM1
CKE1 DQ50 175 /RMD51 175 DQ50 CKE1
DQ51 164 /RMD52 164 DQ51
DDRCLK0 35 DQ52 166 /RMD53 166 DQ52 35 DDRCLK3
DDRCLK#0 37 CK0 DQ53 172 /RMD54 172 DQ53 CK0 37 DDRCLK#3
DDRCLK1 160 CK0# DQ54 176 /RMD55 176 DQ54 CK0# 160 DDRCLK4
DDRCLK#1 158 CK1 DQ55 177 /RMD56 177 DQ55 CK1 158 DDRCLK#4
DDRCLK2 89 CK1# DQ56 181 /RMD57 181 DQ56 CK1# 89 DDRCLK5
DDRCLK#2 91 CK2 DQ57 187 /RMD58 187 DQ57 CK2 91 DDRCLK#5
CK2# DQ58 189 /RMD59 189 DQ58 CK2#
SMBDAT 193 DQ59 178 /RMD60 178 DQ59 193 SMBDAT
SMBCLK 195 SDA DQ60 182 /RMD61 182 DQ60 SDA 195 SMBCLK DIMM
SCL DQ61 DQ61 SCL
DQ62
188 /RMD62 188
DQ62
DECOUPLING +2.5V
190 /RMD63 190
71 DQ63 DQ63 71
73 CB0 CB0 73
79 CB1 85 85 CB1 79 C642 C186 C643 C171 C172 C159
+3VS 83 CB2 DU 123 T T 123 DU CB2 83
72 CB3 DU 124 T T 124 DU CB3 72 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
74 CB4 DU 200 T T 200 DU CB4 74
CB5 DU TDDRSTT DU addr =1010001b CB5
80 86 86 80
84 CB6 DU/RESET# 97 97 DU/RESET# CB6 84
CB7 addr =1010000b DU/A13 DU/A13 CB7
R172 98 98
DU/BA2 DU/BA2
0 DDRVREF 1 1 DDRVREF
2 VREF 194 194 VREF 2 +2.5V
VDDSPD 197 VREF SA0 196 196 SA0 VREF 197
VDDSPD SA1 SA1 VDDSPD VDDSPD
199 198 198 199
VDDID SA2 SA2 VDDID
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R188 C185 C158 C196 C188 C184 C194
C165 R171
10K 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
103
104
125
126
137
138
149
150
159
161
162
173
174
185
186

186
185
174
173
162
161
159
150
149
138
137
126
125
104
103
15
16
27
28
38
39
40
51
52
63
64
75
76
87
88
90

90
88
87
76
75
64
63
52
51
40
39
38
28
27
16
15
0.1UF 10K R179
3
4

4
3
DDR SO-DIMM VDDSPD DDR SO-DIMM_H
1K +2.5V

C177 C195 C187 C193 C160 C713

+2.5V 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF

/RMA[0..14] DDRCLK[0..5]
SMBCLK 6,8 /RMA[0..14] 4 DDRCLK[0..5]
4,15,25 SMBCLK C644 + C157 C192 C588 C712
SMBDAT /RDQM[0..7] DDRCLK#[0..5]
4,15,25 SMBDAT 6,8 /RDQM[0..7] 4 DDRCLK#[0..5] 220U(D) 10U(0805) 10U(0805) 10U(0805) 10U(0805)

/RCS#[0..5] /RMD[0..63]
6,8 /RCS#[0..5] 6,8 /RMD[0..63]

/RDQS[0..7] CKE[0..5]
6,8 /RDQS[0..7] 6 CKE[0..5]

B - 10 DDR Memory DIMM (71-D40U0-D03)


Schematic Diagrams

DDR SSTL-2 Termination


SSTL-2 Termination Resistors

DDR
Rs Rtt
MD/DQM(/DQS) SSTL-2 10 33
MA/Control SSTL-2 0 33
CS SSTL-2 0 47
CKE OD 2.5V

/RMD[0..63]
/RMD[0..63]6,7
/RDQM[0..7]
/RDQM[0..7]6,7
+1.25VS +1.25VS /RDQS[0..7]
0402 Package /RDQS[0..7]6,7
0402 Package /RMA[0..14]
/RMA[0..14] 6,7
/RCS#[0..5]
/RMD0 8 1 /RMA2 5 4 /RCS#[0..5] 6,7
/RMD1 7 2 /RMA0 6 3

B.Schematic Diagrams
/RDQS0 6 3 /RMA12 7 2
/RMD2 5 4 /RSRAS# 8 1
RP52 8P4R-33 6,7 /RSRAS# RP31 8P4R-33
/RMD3 8 1 /RMD6 1 8
/RMD8 7 2 /RDQM0 2 7
/RMD9 6 3 /RMD5 3 6
/RDQS1 5 4 /RMD4 4 5

/RMD10
/RMD11
RP53
8
7
8P4R-33
1
2
/RDQM1
/RMD13
RP24
1
2
8P4R-33
8
7
Sheet 10 of 42
/RMD16
/RMD17
6
5
RP54
3
4
8P4R-33
/RMD12
/RMD7
3
4
RP23
6
5
8P4R-33
+1.25VS DECOUPLING CAPACITOR FOR SSTL-2 END TERMIANTION VTT ISLAND
0603 Package placed within 200mils of VTT Termination R-packs
DDR SSTL-2
/RDQS2 /RMD20
/RMD18
/RMD19
8
7
6
1
2
3
/RMD21
/RMD15
1
2
3
8
7
6
Termination
/RMD24 5 4 /RMD14 4 5
RP55 8P4R-33 RP22 8P4R-33
/RMD25 8 1 /RDQM2 4 5
/RDQS3 7 2 /RMD22 3 6 C167 0.1UF C169 0.1UF C199 0.1UF C202 0.1UF
/RMD26 6 3 /RMD23 2 7
/RMD27 5 4 /RMD28 1 8
RP56 8P4R-33 RP21 8P4R-33
/RMA14 8 1 /RMD29 4 5
/RMA9 7 2 /RDQM3 3 6 C203 0.1UF C715 0.1UF C207 0.1UF C175 0.1UF
/RMA7 6 3 /RMD30 2 7
/RMA5 5 4 /RMD31 1 8
RP57 8P4R-33 RP20 8P4R-33
/RMA3 8 1 /RMA8 4 5
/RMA1 7 2 /RMA13 3 6 C176 0.1UF C173 0.1UF C181 0.1UF C180 0.1UF
/RMA10 6 3 /RMA4 2 7
/RMA11 5 4 /RMA6 1 8
RP58 8P4R-33 RP17 8P4R-33
/RMD32 8 1 /RMD37 5 4
/RMD33 7 2 /RMD36 6 3 C714 0.1UF C179 0.1UF C170 0.1UF C178 0.1UF
/RDQS4 6 3 /RDQM4 7 2
/RMD34 5 4 /RMD38 8 1
RP59 8P4R-33 RP30 8P4R-33
/RMD35 8 1 /RMD44 1 8
/RMD40 7 2 /RMD45 2 7
/RMD41 6 3 /RDQM5 3 6
/RDQS5 5 4 /RMD39 4 5 +1.25VS
RP60 8P4R-33 RP29 8P4R-33
/RMD42 8 1 /RMD47 4 5
/RMD43 7 2 /RMD46 3 6
/RMD48 6 3 /RMD52 2 7
/RMD49 5 4 /RMD53 1 8
RP61 8P4R-33 RP28 8P4R-33
/RDQS6 8 1 /RDQM6 4 5
/RMD50 7 2 /RMD54 3 6 C174 0.1UF C206 0.1UF C205 0.1UF C204 0.1UF
/RMD51 6 3 /RMD55 2 7
/RMD56 5 4 /RMD60 1 8
RP62 8P4R-33 RP27 8P4R-33
/RMD57 8 1 /RMD61 4 5
/RDQS7 7 2 /RDQM7 3 6 C201 0.1UF C200 0.1UF C166 0.1UF C168 0.1UF
/RMD58 6 3 /RMD62 2 7
/RMD59 5 4 /RMD63 1 8
RP63 8P4R-33 RP26 8P4R-33
+1.25VS
C716 0.1UF C726 0.1UF C724 0.1UF C728 0.1UF
/RSCAS# R189 33
6,7 /RSCAS# /RCS#1 1 8
/RSWE# R526 33 /RCS#0 2 7
6,7 /RSWE# /RCS#3 3 6
/RCS#2 4 5 C722 0.1UF C727 0.1UF C721 0.1UF C725 0.1UF
RP19 8P4R-47(0402)

/RCS#4 R156 47
/RCS#5 R155 47

DDR SSTL-2 Termination (71-D40U0-D03) B - 11


Schematic Diagrams

LVDS Interface (SiS302LV)


C272 33PF(R)
+3VS
L19
LVDD1
L68 FCM1608K121(R)
Y R259 0 1 2 C52 C386 C385
30 Y FCM1608K-121T07
L69 JTV2 10U/10V(R) 0.1UF 0.1UF
C 1 2 4 3 LGND
30 C 2.7UH

AC

AC
D24 D25 2 1
DA204U(R) DA204U(R) R260 C275 33PF(R) R252 C297 C273
75
C300 C276 75 330PF 330PF
+3VS
330PF 330PF L100

C
A

6
5
SVIDEO CON LVDD2
PIN(GND1,GND2)=GND FCM1608K121(R)
+3VS
C348 C384 C383

10U/10V(R) 0.1UF 0.1UF


LGND

VAGCLK VBGCLK
5 VAGCLK VBGCLK 5

T
5 VAHSYNC AAD28/VBCTL0 5,30
B.Schematic Diagrams

+3VS
5 VAVSYNC VBHSYNC 5 R54 2.2K LDDCDATA L15
VBVSYNC 5 +3VS VDDV
R55 2.2K LDDCCLK FCM1608K121(R)

AAD28/VBCTL0
C56 C55

VAHSYNC

VBVSYNC
VAVSYNC
10U/10V(R) 0.1UF

VBHSYNC
AAD[0..15]
5,30 AAD[0..15]

AAD19
AAD20
AAD22
AAD21
AAD15
AAD14
AAD13
AAD12
AAD11

AAD10
AAD26
AAD25
AAD23
AAD24
DGND

DGND
DVDD

DGND
DVDD
AAD0
AAD1

AAD2
AAD3
AAD4
AAD5
AAD6
AAD7
AAD8

AAD9
Sheet 11 of 42 5,30 AAD[19..26]
AAD[19..26]

LVDS interface

102
101
100
+3VS

99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
U19
L121
DVDD

XCLK2/VAGCLK

XCLK1/VBGCLK
V2/VAVSYNC

V1/VBVSYNC
DGND/OVSS
D2[11]/VAD11
D2[10]/VAD10

D1[11]/VBD11
D1[10]/VBD10
D2[9]/VAD9
D2[8]/VAD8
D2[7]/VAD7
D2[6]/VAD6

D2[5]/VAD5
D2[4]/VAD4
D2[3]/VAD3
D2[2]/VAD2
D2[1]/VAD1
D2[0]/VAD0

D1[9]/VBD9
D1[8]/VBD8
D1[7]/VBD7
D1[6]/VBD6

D1[5]/VBD5
D1[4]/VBD4
D1[3]/VBD3
D1[2]/VBD2
D1[1]/VBD1
D1[0]/VBD0
H2/VAHSYNC

H1/VBHSYNC
DGND/DVSS3

DGND/DVSS2
XCLK2*/DVDD3

XCLK1*/DVDD2

DGND/VBCTL0
DVDD/RESERVED
DVDD/RESERVED
(SiS302LV) +3VS
FCM1608K121(R)

N15
C461

10U/10V(R)
C51

0.1UF
C44

0.1UF
DGND

VBCAD R332 4.7K(R)

DVDD 103 64 DVDD C409


AAD16/VADE 104 DVDD/DVDD4 DVDD1/DVDD 63 AAD27/VBDE +3VS V2COMP
5,30 AAD16/VADE DGND 105 DE2/VADE VBDE/DE1 62 AAD29/VBCTL1 AAD27/VBDE 5,30
AAD29/VBCTL1 5,30 L93
106 FLD/STL2/DVSS4 VBCTL1/FLD/STL1 61 DGND NC/0.1uF DAC_VDD
T VBCAD 107 AS/RESERVED DVSS1/VREF1 60 VDDV FCM1608K121(R)
5 VBCAD VBHCLK 108 SPD/VBCAD OVDD/VDDV 59 VBCLK C318 C382 C422
5 VBHCLK DGND 109 SPC/VBHCLK VBCLK/P-OUT 58 DGND VBCLK 5
DVDD 110 HIN/DVSS5 DVSS0/RESET* 57 N11 10U/10V(R) 0.1UF 0.1UF
VREF2 111 VIN/DVDD5 TVCLKO/GPIO[5] 56 T DAC_GND
112 VREF2/OVDD TSCLKI/GPIO4 55 DVDD
T 113 SDD/GPIOA(GPI) DVDD0/TVPLL_VDD 54 TVPLLVDD
114 SDC/GPIOB(GPI) PLL1VDD/TVPLL_V 53 VBOSCO
T 115 DD1/GPIOC(GPI) VBOSCO/XO 52 VBRCLK
LDDCDATA R385 100 116 DC1/GPIOD(GPI) VBRCLK(XIN)/XIN 51 TVPLLGND
T LDDCCLK R386 100 117 DD2/LDDCDATA PLL1GND/TVPLL_G 50 +5VS +3VS
V5V 118 DC2/LDDCCLK RESERVED/BOC/VS 49 L111
119 V5V/V5V IOCS/C/HSYNC 48 DAC_GND V5V LPLLVDD
120 HOUT/V2HSYNC DAC_GND/DAC_GND 47 DAC_VDD FCM1608K121(R)
121 VOUT/V2VSYNC DAC_VDD/DACA3 46 C424 C49 C507 C389 C388
INTA# 122 HPD/LCDSENSE RESERVED/DACB3 45 C T
9,13,30 INTA# PCIRST# 123 HPINT*/INTA# IOC/DACA2 44 10U/10V(R) 0.1UF 0.1UF N12 10U/10V(R) 0.1UF
9,13,14,20,22,24,30 PCIRST# 124 GPIO[0]/EXTRSTN RESERVED/DACB2 43 Y T LPLLGND
+3VS 125 GPIO[1]/PFTEST1 IOY/DACA1 42
T R719 4.7K 126 GPIO[2]/PFTEST2 RESERVED/DACB1 41 COMPOSITE T
ENAVDD 127 GPIO[3]/PFTESTO IOCOMP/DACA0 40 V2COMP T
11,30 ENAVDD ENABKL 128 ENAVDD/GPIOG(GP V2COMP/DACB0 39 DAC_GND
11,30 ENABKL ENABKL/GPIOH(GP DAC_GND/DAC_GND
+3VS +3VS
L22 L20
VREF2 TVPLLVDD
FCM1608K121(R)
FCM1608K121(R) C67 C308 C53 C54
N2

EXTSWING/VSWING
RESERVED/LPLLCA

LVDSPLLVSS/LGND

LVDSPLLVDD/LVDD
0.1UF 0.1UF 10U/10V(R) 0.1UF
LVDSPLLVDD/LPLL

LVDSPLLVSS/LPLL

RESERVED?LDC7*

RESERVED/LDC6*

RESERVED/LDC5*

RESERVED/LDC4*

DACVDD/DACVDD
RESERVED/LL2C*

RESERVED/LDC7

RESERVED/LDC6

RESERVED/LDC5

RESERVED/LDC4
TVPLLGND
RESERVED/LL2C

V2RSET/ISET
LXC1N/LL1C*
LAVSS/LGND

LAVDD/LVDD

LAVSS/LGND

LAVDD/LVDD

LAVDD/LVDD

LAVSS/LGND

LAVDD/LVDD

LAVSS/LGND

LAVDD/LVDD

LAVSS/LGND
LDC0-

LXC1P/LL1C
LX3N/LDC3*

LX2N/LDC2*

LX1N/LDC1*

LX0N/LDC0*
11,30 LDC0-

LX3P/LDC3

LX2P/LDC2

LX1P/LDC1

LX0P/LDC0
LDC0+
11,30 LDC0+ LDC1- Choose clock source:main board/crystal
11,30 LDC1- LDC1+ R1 :NC/22 +3VS
11,30 LDC1+ LDC2- Spread range:R120:+-1.5%/+-2.5% L18
11,30 LDC2- LDC2+ DVDD
11,30 LDC2+ Y2
LDC3- SIS302LV(R) VBOSCO VBRCLK FCM1608K121(R)
11,30 LDC3-
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
LDC3+ R353 10 C462 C50 C463
1
2
3
4
5
6
7
8
9

11,30 LDC3+ LL1C- C440 14.318MHZ(R) C423

ISET
11,30 LL1C- LL1C+ 10U/10V(R) 0.1UF 0.1UF

DAC_VDD
LPLLVDD
LPLLGND

11,30 LL1C+
LPLLCAP

DGND

VSWING
R299 147 22P 22P
LVDD1

LVDD1

LVDD2

LVDD2

LVDD2
LL2C+

LDC4+

LDC3+

LL1C+

LDC4-
LDC7+

LDC6+

LDC5+

LDC2+

LDC1+

LDC0+
LDC7-

LDC6-

LDC5-

LDC4-

LDC3-

LDC2-

LDC1-

LDC0-
LL2C-

LL1C-
LGND

LGND

LGND

LGND

LGND

LGND
11,30 LDC4- LDC4+
11,30 LDC4+ LDC5-
11,30 LDC5- LDC5+
11,30 LDC5+ LDC6-
11,30 LDC6- LDC6+ C387 R300 6K
11,30 LDC6+ LDC7-
11,30 LDC7- LDC7+ NC LPLLVDD R48 NC R301 2K C349 1UF
11,30 LDC7+ LL2C+
11,30 LL2C+ LL2C- LVDD1 R47 0
11,30 LL2C-
301LV/302LV:R894/R895

B - 12 LVDS Interface (SiS302LV) (71-D40U0-D03)


Schematic Diagrams

Panel Con & LED Indicator


L97 L96
LCDVCC LCDVCC
FCM2012V-121 FCM2012V-121
+3VS Q29 C350 C311
12V
60 mil8 4800 LCDVCC
0.1UF 1
JLCD1
2 0.1UF
7 3 1 2 4
+3VS C352 C351 6 3 TXOUT-LN0 5 3 4 6 TXOUT-UN0
R288 5 2 TXOUT-LP0 7 5 6 8 TXOUT-UP0
4.7U(0805) 0.1UF 1 9 7 8 10
47K C330 C331 TXOUT-LN1 11 9 10 12 TXOUT-UN1
TXOUT-LP1 13 11 12 14 TXOUT-UP1
R287 0.1UF 4.7U(0805) 15 13 14 16

4
Z245 TXOUT-LN2 17 15 16 18 TXOUT-UN2
10K TXOUT-LP2 19 17 18 20 TXOUT-UP2
21 19 20 22
D Q28 TXOUT-LN3 23 21 22 24 TXOUT-UN3
C332 TXOUT-LP3 25 23 24 26 TXOUT-UP3
G S 27 25 26 28
D Q30 2N7002 0.1UF TXCLK-LN 29 27 28 30 TXCLK-UN
TXCLK-LP 31 29 30 32 TXCLK-UP
ENAVDD G S 33 31 32 34
10,30 ENAVDD 2N7002 LCDID0 35 33 34 36
15,30 LCDID0 LCDID1 37 35 36 38 L95 FCM2012V-121
15,30 LCDID1 LCDID2 39 37 38 40 BAT_FULL SYS5V
12V VDD5 15,27,30 LCDID2 E-MAIL 41 39 40 42 PWR/SUS_LED BAT_FULL 12
12 E-MAIL CHA/BATLOW 43 41 42 44 INTMIC PWR/SUS_LED 12
R317
12 CHA/BATLOW PANEL 45 43 44 46 BRIGADJ INTMIC 27
WL_LED 45 46 ACIN_LED BRIGADJ 24

B.Schematic Diagrams
R38 47 48
100K D Q32
12 WL_LED L94 49 47 48 50 ACIN_LED24
VIN 49 50
100K BK3216HS800 C309
G S C319 CON50 C310
D Q34 2N7002
+5VS 0.1UF 0.1UF(R) 0.1UF(R)
G S
D Q35 2N7002

R61 24 LEDPWR
LEDPWR G S
2N7002
LEDVDD
Sheet 12 of 42
R59 10K 10K

15 GATE_LID_SW
GATE_LID_SW C
D15
A
R39

10K
Panel Con & LED
27 LID_SW#
LID_SW# C
F01J2E
D14
A 5
Indicator
2
F01J2E 4 R383 10K PANEL
ENABKL 1 TXOUT-LN0 L110 0 LDC0-
10,30 ENABKL 3
LDC0- 10,30
C460 R384 TXOUT-LP0 L109 0 LDC0+
R60
U6 LDC0+ 10,30
0.1UF TC7SZ08 10K(R) TXOUT-LN1 L108 0 LDC1-
10K(R)
LDC1- 10,30
TXOUT-LP1 L107 0 LDC1+
LDC1+ 10,30
TXOUT-LN2 L106 0 LDC2-
LDC2- 10,30
TXOUT-LP2 L105 0 LDC2+
LDC2+ 10,30
TXOUT-LN3 L104 0 LDC3-
LDC3- 10,30
TXOUT-LP3 L103 0 LDC3+
LDC3+ 10,30
TXCLK-LN L102 0 LL1C-
LL1C- 10,30
TXCLK-LP L101 0 LL1C+
LL1C+ 10,30
TXOUT-UN0 L90 0 LDC4-
LDC4- 10,30
TXOUT-UP0 L89 0 LDC4+
LDC4+ 10,30
TXOUT-UN1 L88 0 LDC5-
LDC5- 10,30
TXOUT-UP1 L87 0 LDC5+
LDC5+ 10,30
TXOUT-UN2 L86 0 LDC6-
LDC6- 10,30
TXOUT-UP2 L85 0 LDC6+
LDC6+ 10,30
TXOUT-UN3 L84 0 LDC7-
LDC7- 10,30
TXOUT-UP3 L83 0 LDC7+
LDC7+ 10,30
TXCLK-UN L82 0 LL2C-
LL2C- 10,30
TXCLK-UP L81 0 LL2C+
LL2C+ 10,30

C286 C288 C290 C292 C294 C320 C322 C324 C326 C328

10PF 10PF 10PF 10PF 10PF 10PF 10PF 10PF 10PF 10PF

C287 C289 C291 C293 C295 C321 C323 C325 C327 C329

10PF 10PF 10PF 10PF 10PF 10PF 10PF 10PF 10PF 10PF

Panel Con & LED Indicator (71-D40U0-D03) B - 13


Schematic Diagrams

963-1 (PCI/IDE/HyperZip) 1 of 4
AD[0..31] IDESAA[0..2]
19,20,25 AD[0..31] IDESAA[0..2] 14
IDECS#A[0..1]
IDECS#A[0..1] 14

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
IDESAB[0..2]
IDESAB[0..2] 14 +1.8VS
IDECS#B[0..1]
IDECS#B[0..1] 14 R519 0

H2
H1

N5

R2
R3
R1

U1
U2

R5
U3
K4

K5
K2

K1

P2
P3
P4

P5

V1
T1

T2

T3
L3

L1
L4
L5
L2
J5
J4

J3

J2
J1
BGA5A C699
+3VS C191

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Y3 0.01UF 0.1UF
REQ4# F1 IDEAVDD Y4
REQ3# F2 PREQ4# IDEAVSS
RP32 REQ2# E1 PREQ3# W10 ICHRDYA
FRAME# 1 10
25 REQ2# REQ1# H5 PREQ2# ICHRDYA V10 IDEREQA ICHRDYA 14
REQ2# 2 1 10 9 TRDY# REQ0# F3 PREQ1# IDREQA Y11 IDEIRQA IDEREQA 14
SERR# 3 2 9 8 IRDY# 19 REQ0# PREQ0# IIRQA U12 CBLIDA IDEIRQA 14
CBLIDA 14
STOP# 4
5
3
4
5
8
7
6
7
6
PLOCK#
DEVSEL#
25 GNT2#
GNT4#
GNT3#
GNT2#
H3
G1
G2
PGNT4#
PGNT3#
PGNT2#
PCI CBLIDA

IIORA#
IIOWA#
V11
Y9
IDEIOR#A
IDEIOW#A IDEIOR#A 14
IDEIOW#A 14
10P8R-2.7K GNT1# G3 Y10 IDACK#A
GNT0# H4 PGNT1# IDACKA# IDACK#A 14
19 GNT0# PGNT0# T11 IDESAA2
+3VS C/BE#3 K3 IDSAA2 U11 IDESAA1
B.Schematic Diagrams

19,20,25 C/BE#3 C/BE#2 M4 C/BE3# IDSAA1 W11 IDESAA0


RN43 19,20,25 C/BE#2 C/BE#1 P1 C/BE2# IDSAA0
INTD# 8 1
19,20,25 C/BE#1 C/BE#0 R4 C/BE1# T12 IDECS#A1
INTA# 7 2
19,20,25 C/BE#0 C/BE0# IDECSA1# V12 IDECS#A0
INTB# 6 3 INTA# E3 IDECSA0#
INTC# 5 4
9,10,30 INTA# INTB# F4 INTA#
8P4R-2.2K INTC# E2 INTB# W17 ICHRDYB
RN44 19 INTC# INTD# G4 INTC# ICHRDYB Y17 IDEREQB ICHRDYB 14

Sheet 13 of 42 REQ0#
REQ3#
REQ4#
8
7
6
1
2
3
25,30
19,20,25 FRAME#
INTD#
FRAME#
IRDY#
M3
M1
INTD#

FRAME#
IDREQB
IIRQB
CBLIDB
T16
U17
IDEIRQB
CBLIDB
IDEREQB 14
IDEIRQB 14
CBLIDB 14
REQ1# 19,20,25 IRDY# TRDY# IRDY# IDEIOR#B
963-1 (PCI/IDE/ 8P4R-4.7K
5

4/28 Modify
4
19,20,25 TRDY#
19,25 STOP#
STOP#
M2
N4 TRDY#
STOP# IDE IIORB#
IIOWB#
IDACKB#
T14
W16
V16
IDEIOW#B
IDACK#B
IDEIOR#B 14
IDEIOW#B 14
IDACK#B 14
GNT1# R533 4.7K SERR# M5

HyperZip) GNT3#
GNT4#
R539
R540
4.7K
4.7K
19,25 SERR#
19,25 PAR
19,25 DEVSEL#
PAR
DEVSEL#
PLOCK#
N3
N1
N2
SERR#
PAR
DEVSEL#
IDSAB2
IDSAB1
Y18
T15
V17
IDESAB2
IDESAB1
IDESAB0
PLOCK# IDSAB0

1 of 4 4 PCICLK963
9,10,14,20,22,24,30 PCIRST#
PCICLK963
PCIRST# R191 33
Y2
C3 PCICLK
PCIRST#
IDECSB1#
IDECSB0#
U16
W18
IDECS#B1
IDECS#B0
U10 IDEDA0
IDA0 V9 IDEDA1
IDA1 W8 IDEDA2
+1.8VS
4
9
ZCLK1
ZSTB0
ZCLK1
ZSTB0 M19
ZSTB#0 N20
V20
ZCLK

ZSTB0
963-1 IDA2
IDA3
IDA4
IDA5
IDA6
T9
Y7
V7
Y6
Y5
IDEDA3
IDEDA4
IDEDA5
IDEDA6
IDEDA7
9 ZSTB#0 ZSTB0# IDA7 W6 IDEDA8
R476 IDA8
ZSTB1 J20 U8 IDEDA9
C625
9 ZSTB1 ZSTB#1 K20 ZSTB1 IDA9 W7 IDEDA10
0.1UF 9 ZSTB#1 ZSTB1# IDA10 V8 IDEDA11
150_1% IDA11 U9 IDEDA12
SZVREF ZUREQ N16 IDA12 Y8 IDEDA13
9 ZUREQ ZDREQ N17 ZUREQ IDA13 T10 IDEDA14
9 ZDREQ ZDREQ IDA14 W9 IDEDA15
R475 IDA15
50_1% C624 SVDDZCMP R19 Y16 IDEDB0
0.1UF SZCMP_N N18 VDDZCMP IDB0 V15 IDEDB1 IDEDA[0..15] 14
N19 ZCMP_N IDB1 U14 IDEDB2
SZCMP_P R18 IDB2 W14 IDEDB3
SVSSZCMP P18 ZCMP_P IDB3 V13 IDEDB4
10MIL VSSZCMP IDB4 T13 IDEDB5
IDB5 Y13 IDEDB6
SZ1XAVDD U20 IDB6 Y12 IDEDB7
SZ1XAVSS U19 Z1XAVDD IDB7 W12 IDEDB8
Z1XAVSS IDB8 W13 IDEDB9
SZ4XAVDD T20 IDB9 U13 IDEDB10
+3V SZ4XAVSS
SZVREF
T19

R20
Z4XAVDD
Z4XAVSS

ZVREF
HyperZip 1G IDB10
IDB11
IDB12
IDB13
Y14
V14
W15
IDEDB11
IDEDB12
IDEDB13
Y15 IDEDB14
IDB14 U15 IDEDB15

ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
IDB15

ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
R547 R548 +3V
330K 10K IDEDB[0..15] 14

M18

M17
M16
M20
C744 963

N19

H20

H19
H18
K18
K19
K17
K16

P20
L16
L20
L18

J18
L40
U28 +1.8VS
0.1UF FCM1608K121

ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
SUSB# 1 14

ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
24,28 SUSB# 2 CLR1# VCC 5 1 2 35.64mA SVDDZCMP
3 D1 Q1 6 T
T CLK1 Q1# T R477 56
4 SZCMP_N
PR1# C617 C133 C147
9 ZAD[0..16]
R478 56 SZCMP_P
C743 0.1UF 13 9 PRST# 10UF/10V 0.1UF 0.01UF
12 CLR2# Q2 8 PRST# 19,24,25
PCIRST# 11 D2 Q2# 7 T SVSSZCMP
10 CLK2 GND Analog Power supplies of Transzip N7 10MIL
PR2#
C742
function for 96X Chip.
0.1UF(R) 74LVC74 +3VS L42 L41
FCM1608K121 +3VS FCM1608K121
6.49mA
1 2 SZ1XAVDD 7.92mA
1 2 SZ4XAVDD
C615 C149
C135 C616 C148 C134
10UF/10V 0.1UF 0.01UF
SZ1XAVSS 10UF/10V 0.1UF 0.01UF
N9 10MIL SZ4XAVSS
N8 10MIL

B - 14 963-1 (PCI/IDE/HyperZip) 1 of 4 (71-D40U0-D03)


Schematic Diagrams

963-2 (Misc Signals) 2 of 4

Programable on-die pull-high strength for CPU_S: BGA5B


( Infinite, 150, 110, 56 Ohm)
A8 R166 4.7K
OSC25MHI NEED NOT to place
INIT# T18 A9 close to 96X +3VS
3 INIT# INIT# OSC25MHO
A20M# P16
3 A20M# A20M# RN97
SMI# R17 A6
3 SMI# SMI# TXCLK
3 INTR
INTR R16 LPC_AD3 8 1
INTR LPC_AD0
3
3
NMI
IGNNE#
NMI
IGNNE#
FERR#
Y20
U18
T17
NMI
IGNNE#
CPU_S TXEN
B6 LPC_AD2
LPC_AD1
7
6
5
2
3
4
3 FERR# FERR#
STPCLK# W20
3 STPCLK# STPCLK#
CPUSLP# V19 E8 8P4R-4.7K
3 CPUSLP# CPUSLP# TXD0 R504 4.7K(R)
LPC_DRQ#
CLKAPIC Y19
4 CLKAPIC APICCK/LDTREQ# R510 4.7K(R)
SERIRQ
V18
W19 APICD0/THERM2#
APICD1/GPIOFF#
APIC TXD1
D7
1
2
RP16
1 10
10
9 SENTEST R532 0
C6 3 2 9 8
TXD2 4 3 8 7
LPC_AD0 V5 5 4 7 6
22,24 LPC_AD0 LPC_AD1 T7 LAD0 B4 5 6
22,24 LPC_AD1 LPC_AD2 U6 LAD1 TXD3
10P8R-10K
22,24 LPC_AD2 LPC_AD3 LAD2
22,24 LPC_AD3
LPC_FRAME#