945M03 Schematic Foxconn Precision Co. Inc.: Fab.B Data: 2006/07/13 Page Index

5 4 3 2 1
Foxconn Precision Co. Inc.

D
945M03 Schematic D
Fab.B
Data: 2006/07/13
Page Index
01. Index Page 25. PCI Slots 1, 2
02. Topology 26. PCI Express X 1
03. Rest Map 27. LAN POWER
04. Clock Distribution 28. LAN RTL8100C&RTL8110S
C 05. Power Delivery Map 29. LAN CONNECTOR C
06. Power Sequence 30. USB

07. CK410 ClockGen 31. FWH
08. VRD11 ISL6312 32. AUDIO
10. DDR2 1.8V/0.9V 5V_DUAL 33. AUDIO
11. Power 1.5V 1.2V 2.5V 1.05V 34. Super I/O IT8718F/BX
12. LGA775-1 35. Keyboard/Mouse/FAN
13. LGA775-2 36. Serial/Print
14. LAKEPORT-GMCH-1 38. VID CONTROLLER
B
15. LAKEPORT-GMCH-2 39.GPIO / IRQ / IDSEL Map B
16. LAKEPORT-GMCH-3 40. Modify List

17. DIMM D DDRⅡ-A1,A2
18. DIMM D DDRⅡ-B1,B2
19. DDRⅡA&B Term
20. PCI Express x16 Gfx Slot
21. VGA Connector
22. ICH7-1
23. ICH7-2
24. ICH7-3
A A
FOXCONN PCEG
Title
Page Map
Size Document Number Rev
C 945M03 A
Date: Thursday, August 17, 2006 Sheet 1 of 40

5 4 3 2 1
5 4 3 2 1
Prescott, Smithfield &

Cedar Mill
VRD 11 LGA775 Processor
4 Phase PWM
D Socket T D
1066/800/533 FSB
Intel ADD2/+ Card CK-410 Clock
or
PCI Express x 16 Channel A DDR2
PCI Express x16 Port DDR2 533/667
External Graphics
DIMM1
Card
DIMM2
GMCH DDR2 533/667 Channel B DDR2

VGA Connector
Lakeport DIMM1
DIMM2
C C
Back Panel 5788

USB2.0 Port 1 PCI Express x1 Interface LAN
4 Lanes
USB2.0 Port 2 5788/4401
Direct Media Interface (DMI)
USB2.0 Port 3
USB2.0 Port 4
uBTX Form Factor
PT firmware
SPI Flash 4Mb PCI Slot 1
PCI Slot 2
Front Panel ICH7R/
USB2.0 Port 5 ICH7 PCI Express x1 port
PCI Express x1 Slot
USB2.0 Port 6
SPI (Optional)
PCI I/F
B
Header Serial ATA B
SATA Connector 1
USB2.0 Port 7 ITE 8212 IDE AHCI, RAID0,1,5,10
CONTROLLER
USB2.0 Port 8 SATA Connector 2
LPC I/F
ATA133
IDE CONN 2 BIOS SATA Connector 3
SPI Flash 4Mb SATA Connector 4
ATA100
IDE CONN 1
LPC I/F
Super I/O
IT8718F
Firmware HUB Intel HD Audio
Realtek ALC861
4Mb or 8Mb 8 Channels W/ SPDIF I/O
PS2 Parallel Floppy TPM HEADER
Keyboard / Mouse Serial Drive Connector
A A
FOXCONN PCEG
Title
Topology
C 945M03 A
Date: Thursday, August 17, 2006 Sheet 2 of 40

5 4 3 2 1
5 4 3 2 1
CPU (Tejas / Prescott)
CPU_PWRGD
CPURST#
D
LGA775 processor D
ATX
Power
Translation PWRGD_3V
PWRGD_PS PWROK CPURST#
Circuitry PCI Express x16
PS_ON#
GMCH
Lakeport
C
RSTIN# PCI Express x1 C
LRESET# TPM
ICH7RW
ICH_PWRGD
PCIRST# Buffer
RST# Express Card
PLTRST# Buffer Buffer
Front Panel PWROK AC_RST#

uATX Form Factor
RST#
FR_RST SYS_RESET# RST# LAN_RST# PCI Slot 1
82570 EI
B
SW_ON PWRBTN# 82562 EX PCI Slot 2 B
RSMRST#
RCIN#
SLP_S3#
RST# ATA100
IDE CONN 1
FWH
RST# RST# Audio

Power on/off KBRST
circuit RSMRST#
Super IO
SLP_S3#
PSIN
A A
PSOUT#
LAN RESET
RSMRST circuit FOXCONN PCEG
circuit
Title
Reset Map
C 945M03 A
Date: Thursday, July 13, 2006 Sheet 3 of 40

5 4 3 2 1
5 4 3 2 1
14.318MHz
CPU
D
CPU 133/200/266 MHz Diff Pair D
MCH 133/200 MHz Diff Pair
DDR2 4 Slots 12 Diff CLKs

PCI Express 100 MHz Diff Pair
PCI Express x16 Gfx Channel A DDR2
GMCH DIMM1
DOT 96 MHz Diff Pair Lakeport DIMM2
Channel B DDR2
DIMM1
PCI Express/DMI 100 MHz Diff Pair
C C
CK-410
PCI Express/DMI 100 MHz Diff Pair
USB/SIO 48 MHz
ICH 33 MHz
REF 14 MHz
33 MHz LAN
BCM5788 ICH7R
FWH 33 MHz FWH
Azalia Bit Clock
B
PCI 33 MHz PCI Slot 1 B
PCI 33 MHz PCI Slot 2

PCI 33 MHz
32.768KHz
PCI 33 MHz
HD Audio
PCI Express 100 Mhz Diff Pair PCI Express x1 Slot
SIO 33 MHz Super I/O
SATA 100 MHz Diff Pair
A A
FOXCONN PCEG
Title
CLOCK Distribution
C 945M03 A

5 4 3 2 1
5 4 3 2 1
Super I/O
3.3V
Icc(Max)=50mA
Proceessor
Vccp (CPU Vcore) 3.3SBV
VRD 10.1
Voltage=0.8375~1.6V Icc(Max)=50mA(S0)
Switching
Icc(Max)=119A
Four Phase 3.3SBV
D
4-Phases Swithing D
Icc(Max)=38mA(S3)
1.2V FSB
Vtt-tbdA
ATX P/S USB 8 Ports
+5V DUAL=4A(S0, S1)
12V +5V DUAL=20mA(S3)
Lakeport GMCH
5VSB
FSB_Vtt PS2
Linear 1.5V
3.3V 1.2V FSB Vtt +5V DUAL=345mA(S0, S1)
to 1.2V
CK410 5A
Icc(Max)=tbdA +5V DUAL=2mA(S3)
5V
Vdd (Core)
3.3V -12V FWH
Ivdd(Max)=560mA 1.8V DDR2 I/O=4.6A(S0,S1)
3.3V=107mA(S0, S1)
1.8V DDR2 I/O=250mA(S3)
Vcore (Core Logic) PCI Express

1.5V X16 slot (1)
Icc(Max)=9.6A(Integrated) +12V=5.5A
DDR2 Channel A Icc(Max)=7.5A(Discrete)
5VDUAL 3.3VSB
Vdd (Core)=1.8V Icc(Max)= *1.5V
C Icc(Max)=0.375A(wake) C
Ivdd(Max)=4.7A(per channel) 4.345A(S0,S1) PCIexpress(X16)=1A
Icc(Max)=0.02A(no wake)
22mA(S3) *1.5V
Vtt (Core) PCIexpress(X1)=0.06A
0.9V +3.3V=3A
*1.5V SDVO=tbdA
Ivterm(Max)=200mA *1.5V DMI=0.25A
(per channel)
2.5V DAC PCI Express
*2.5V DAC=0.07A
Single Phase Switch regulator
2.5V HV=tbdA
X1 slot (1)
5V to 1.8V V_2p5_DAC +12V=0.5A
DDR2 Channel B Ivdd(Max)=14A 100mA
Ivdd(Max)=650mA(S3) 3.3VSB
Vdd (Core)=1.8V
LDO Icc(Max)=0.375A(wake)
Ivdd(Max)=4.7A(per channel)
1.8V to 0.9V Icc(Max)=0.02A(no wake)
Ivterm(Max)=1.2A
Vtt (Core)
0.9V +3.3V=3A
Ivterm(Max)=200mA ICH7RW
(per channel) Vin=12V
V_1p5_core 1.2V VCC_CPU-tbdmA
1.5V PCI Per Slot (2)
Switching=14A -12V
B 1.05V Core=tbdA Icc(Max)=0.1A B
1.5V PCI Express=tbdmA

1.5V DMI=tbdmA 5V
HDA Codec 1.5V SATA=tbdmA Icc(Max)=5A
Vcc LDO 1.5V USB=tbdmA -12V
5V 12V 3.3V
Icc(Max)=tbdA to 5V Icc(Max)=7.6A
3.3V=180mA
Vcc 12V
3.3V VccSus
3.3V Icc(Max)=0.5A
Icc(Max)=330mA
Icc(Max)=tbdA
3.3VSB
5VRef=tbduA Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(no wake)
5VrefSus=tbduA
1.0V
LDO Lan Core Tekoa GbE Lan
5V_dual to 3.3SB RTC=5uA V_1p2_ctrl BJT
Icc(Max)=1.5A +1.2V=tbdA
1.8V +2.5V=tbdA BJT

Lan Phy
A V_2p5_ctrl A
RTC
Battery
*Power derived through filter FOXCONN PCEG

Title
Power Delivery Map
C 945M03 A

5 4 3 2 1
5 4 3 2 1
S0->S5
+12V_SYS +12V_SYS
S5->S0
D D
+5V_DUAL +5V_SYS +5V_SYS +5V_DUAL
+3D3V_DUAL +3D3V_SYS +3D3V_SYS +3D3V_DUAL

+1D8V_STR +1D8V_STR
VTT_DDR
VTT_DDR
VTT_VR VTT_VR
Vcc Vcc
1ms to 10ms
Vcc_PWRGD
Vcc_PWRGD
VRM_OUTEN
VRM_OUTEN
VIDPWRGD VIDPWRGD PS_ONJ
C
PS_ONJ C
S0->S3 S3->S0
+12V_SYS +12V_SYS
+5V_SYS +5V_DUAL +5V_DUAL +5V_SYS
+3D3V_SYS +3D3V_DUAL +3D3V_DUAL +3D3V_SYS

B B
+1D8V_STR +1D8V_STR +1D8V_STR +1D8V_STR
VTT_DDR
VTT_DDR
VTT_VR VTT_VR
Vcc Vcc
1ms to 10ms
Vcc_PWRGD
Vcc_PWRGD
VRM_OUTEN
VRM_OUTEN
VIDPWRGD PS_ONJ VIDPWRGD
PS_ONJ
A A
FOXCONN PCEG
Title
Power Sequence
C 945M03 A

5 4 3 2 1
5 4 3 2 1
PCI/REF/USB Power Filter 3D3V_SYS 3D3V_SYS

3D3V_SYS Analog/SRC/CPU Power Filter
3D3V_SYS 3D3V_SYS
1
L2
*
L1 FB L0805 300 Ohm
R1 C1 +/-25%
1
4.7K FB L0805 300 Ohm
* 0.1uF 0805
2
+/-5% 25V, Y5V, +80%/-20%
R0603 C2 C0603
2
1
D D
TURBOJ * 0.1uF
3D3V_CLK_PCI_REF_USB
25V, Y5V, +80%/-20% 3D3V_CLK_A_SRC_CPU
C0603
2
Real time input pin to change frequency
to a pre_programmed under or over clock C448 C4 C5 C6
1
entries located in the ROM table
* 10uF
* 0.1uF
* 0.1uF
* 0.1uF C7 C8 C9 C10 C11 C12 C13
1
C1206h18 25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
* 10uF
* 0.1uF
* 0.1uF
* 0.1uF
* 0.1uF
* 10uF
* 0.1uF
+-10%
+-10% C0603 C0603 C0603 C1206h18 25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% C1206h18 25V, Y5V, +80%/-20%
2
+-10% C0603 C0603 C0603 C0603 C0603
2
3D3V_SYS 3D3V_CLK_PCI_REF_USB
place near pin 5, 56 place near pin 48
C14 C15
1
place near pin 19, 28, 34 place near pin 43 place near pin 37
* 10uF
* 10nF
+-10%
R2 C1206h18 25V, X7R, +/-10%
4.7K XDP/PCI-E selection C0603
2
+/-5% High=XDP enable
R0603 Low=PCI-E enable place near pin 10
R3
B
20pf
4.7K
+/-5% X1
R0603 U1 XTAL-14.318MHz
Dummy +/-20PPM
1 56 3D3V_CLK_PCI_REF_USB X2O
R11 33 33M_ICH GND VDDPCI 33M_FWH R13 33 +/-5%
24 CK_33M_ICH 2 PCICLK2 PCICLK1 55 CK_33M_FWH 31 1 2
R12 33 33M_PCI1 3 54 33M_PCI2 R5 33 +/-5%
25 CK_33M_PCI1 PCICLK3 PCICLK0 CK_33M_PCI2 25
4 53 C16 C17
GND Reset# ICH_SYS_RSTJ 12,22,37
1
3D3V_CLK_PCI_REF_USB 14M_ICH
34 TURBOJ
TURBOJ R15 0
5
6
VDDPCI
*Turbo#
REF0/FS_C
GND
52
51 ICS_FSBSEL2
R14 33
CK_14M_ICH 22 * 33pF
50V, NPO, +/-5% * 33pF
50V, NPO, +/-5%
C ICS_FSBSEL0 7 50 C0603 C0603 C
2
R17 33 33M_SIO ITP_EN/PCICLK_F0 X1
34 CK_33M_SIO 8 FS_A/PCICLK_F1 X2 49
R6 33 33M_LAN 9 48 3D3V_CLK_PCI_REF_USB
28 CK_33M_LAN ICS_FSBSEL1 FS_B/PCICLK_F2 VDDREF
10 VDD48 SCLK 47 SMB_CLK_MAIN 17,18,35
R18 33 48M_SIO 11 46 R19
34 CK_48M_SIO **SEL24_48#/24_48MHz SDATA SMB_DATA_MAIN 17,18,35
R7 33 48M_ICH 12 45 200M_P_GMCH R9
33
22 CK_48M_ICH USB_48MHz CPUCLKT0 CK_200M_P_GMCH 14
13 44 200M_N_GMCH 33
+/-5%
GND CPUCLKC0 CK_200M_N_GMCH 14
R8 33 96M_DOT_P 14 43 3D3V_CLK_A_SRC_CPU +/-5%
R0603
R20
14 CK_96M_P_GMCH DOTT_96MHz VDDCPU
R10 33 96M_DOT_N 15 42 200M_P_CPU R0603
33
R21
14 CK_96M_N_GMCH DOTC_96MHz CPUCLKT1 CK_200M_P_CPU 12
CLK_VTT_PWRGDJ 16 41 200M_N_CPU +/-5%
33
Vtt_PwrGd#_PD CPUCLKC1 CK_200M_N_CPU 12
17 40 R0603
+/-5%
PCIEXT0 GND CLK_IREF R22 R0603
470
18 PCIEXC0 IREF 39
3D3V_CLK_A_SRC_CPU 19 38 +/-1%
VDDPCIEX GNDA 3D3V_CLK_A_SRC_CPUR0603 making the IREF 2.32 mA
20 GND VDDA 37
R256 33 +/-5% 21 36
26 CK_PE_100M_P_1PORT R209 33 +/-5% PCIEXT1 CPUCLK_ITP/PCIEXT5
26 CK_PE_100M_N_1PORT 22 PCIEXC1 CPUCLK_ITP/PCIEXC5 35
R23 33 +/-5% PE_100M_P_16PORT 23 34 3D3V_CLK_A_SRC_CPU R25
20 CK_PE_100M_P_16PORT PCIEXT2 VDDPCIEX
R24 33 +/-5% PE_100M_N_16PORT 24 33 PE_100M_P_ICH R27
33
20 CK_PE_100M_N_16PORT PCIEXC2 PCIEXT4 CK_PE_100M_P_ICH 22
25 32 PE_100M_N_ICH 33
R29
+/-5%
GND PCIEXC4 CK_PE_100M_N_ICH 22
R26 33 +/-5% SATA_100M_P_ICH 26 31 PE_100M_N_GMCH R0603
+/-5%
33
R30
23 CK_SATA_100M_P_ICH SRCCLKT_SATA PCIEXT3 CK_PE_100M_P_GMCH 14
R28 33 +/-5% SATA_100M_N_ICH 27 30 PE_100M_P_GMCH R0603
+/-5%
33
23 CK_SATA_100M_N_ICH SRCCLKC_SATA PCIEXC3 CK_PE_100M_N_GMCH 14
3D3V_CLK_A_SRC_CPU 28 29 R0603
+/-5%
VDDSRC GND R0603
R31 R32 R257 R261 R33 R34 R35 R36 ICS954128AFLF R37 R38 R39 R40 R41 R42 R43 R44
49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9
+/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1%
R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603
SMBus Address :1101-0010
100 MHz(PCIEX)
VCCP 3D3V_CLK_A_SRC_CPU FSB_VTT
3D3V_CLK_PCI_REF_USB
PCIEX1 R47
2.2K R0603
B B
ICS_FSBSEL0 R48
FSBSEL0 12,14
R45 R46 PCIEX2 X16 connector +/-5% 2.2K
4.7K 10K +/-5% @945GZ@945PL
+/-5% +/-5% r0603h6 R50
R49 R0603 R0603 PCIEX3 GMCH ICS_FSBSEL1 8.2K BSEL1
R52 BSEL1 14
4.7K 2.2K R0603 +/-5% +/-5%
+/-5% R51 ICS_FSBSEL1 R0603@945GZ@945PL
FSBSEL1 12,14
R0603 4.7K CLK_VTT_PWRGDJ PCIEX4 ICH7
C
Dummy +/-5% @945G@945P
48M_SIO R0603 FSBSEL0 R615 4.7K B Q1
C
PMBT3904
R53
B Q2 @945GZ@945PL @945GZ@945PL
E
PMBT3904 ICS_FSBSEL2
FSBSEL2 12,14
C18
100 MHz(SRC SATA)
E
1
latched select input for 24 or 48 MHz output

1: 24MHz * 0.22uF
10V, X7R, +/-10% 2.2K
0: 48MHz C0603 SRCCLK_SATA ICH7 R0603
2
+/-5%
CK_48M_SIO FSB_VTT
CK_48M_ICH
CK_33M_ICH TBD
CK_33M_PCI1
CK_33M_SIO R54 470 FSBSEL0
FSBSEL0 12,14
CK_33M_PCI2 R0603 +/-5%
Add EMI caps. for cross planes after layout
CK_33M_FWH R55 470 FSBSEL1
FSBSEL1 12,14
CK_33M_LAN R0603 +/-5%
CK_14M_ICH
R56 470 FSBSEL2
FSBSEL2 12,14
R0603 +/-5%
3D3V_SYS
5V_SYS
C19 C20 C21 C22 C23 C24 C26 C27 C28 BSEL TABLE
1
A
* 10pF
*+/-5%10pF
50V, NPO,Dummy
Dummy 50V, NPO,* 50V, NPO,*
10pF
+/-5%
Dummy 50V, NPO,*
10pF
+/-5%
Dummy
10pF
+/-5%
Dummy *+/-5%10pF
50V, NPO,Dummy 50V, NPO, +/-5% * 10pF *+/-5%10pF
50V, NPO,Dummy
Dummy *
50V, NPO, +/-5%
Dummy
10pF
50V, NPO, +/-5%
A
C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 FS_C FS_B FS_A FSB Frequency C30 C31 C32 C33 C34
2
1
0 0 1 133MHz(533) * 0.1uF
* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% *0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603 C0603 C0603 C0603 C0603
2
2
0 1 0 200MHz(800)
0 0 0 266MHz(1066)
EMI CAPS. FOXCONN PCEG
Title
CK410 ClockGen
C 945M03 A

5 4 3 2 1
5 4 3 2 1
FAB.B
R57 change from 1.74K to 2.43K
C35
1
C0603 R57
4.7nF* 2.43K
1
50V, X7R, +/-10% C36 +/-1%
*
2
680pF R0603
50V, X7R, +/-10%
2
C0603 R60 R58
120pF
0 0
* RT1
1
+/-5% +/-5% +/-5%
D * C37 R0603 R0603 T 10K VIN
D
R59 C0603 R0603
2
15K50V, NPO, +/-5% R61 Dummy
+/-1% 0 C38
14
15
16
1
R0603 U2 +/-5% Q4 Q3 4.7uF
*
D
R0603 AOD452 AOD452 25V, Y5V, +80%/-20% R68
FB
IDROOP
VDIFF
13 COMP Dummy C1206 7.5K PHASE1
2
R62 R69 +/-1%
VCCP 100 31 0 C41 1 225V, X7R, +/-10% G G R0603
*
BOOT1
1
+/-1% Dummy +/-5% C0805 0.22uF R63 R70 25V, X7R, +/-10%
12 VCC_SENSE R0603 18 VSEN 32 R0603 2.2 10K * C43
S
UGATE1
1
C42 C0603 +/-5% +/-5% L3 0.1uF

*
2
10nF 50V, X7R, +/-10% 33 R0805 R0603 C0603
PHASE1 Choke 0.6uH
12 VSS_SENSE Dummy 17 RGND
D
2
1
R64 C39
100
LGATE1 30 Q5 Q6 * 1nF
+/-1% Dummy 50V, X7R, +/-10%
2
R0603
5V_SYS C44 10 VCC G G C0603
1
0.1uF PHASE1 AOD472 AOD472 R72

*
C0603 ISEN1- 34
R71 2.2
S
R66 25V, X7R, +/-10% 35 100 VCCP +/-5%
2
ISEN1+
1
45.3K +/-1% C40 R0805
5V_SYS
+/-1%
12 OFS
R0603 * 0.1uF 12V_VRM
R0603 R74 C0603 25V, Y5V, +80%/-20% VIN
2
R73 100K 45 FS 29 25V, X7R, +/-10% C47
PVCC1_2
1
30K +/-1% 1uF
C +/-1% C45 1 2 10nF 11 REF
R0603 * C0805 Q7 Q8 C48 C
D
*
1
R0603C0603 25V, X7R, +/-10% R75 AOD452 AOD452 4.7uF R77
*
2
Dummy 27 0 C46 1 225V, X7R, +/-10% 25V, Y5V, +80%/-20% 7.5K PHASE2
*
FAB.B BOOT2 +/-5% C0805 0.22uF R76 C1206 +/-1% VCCP
2
R66 change from 56K to 45.3K R67 26 R0603 2.2 G G R0603
UGATE2
1
100K +/-5% R78 25V, X7R, +/-10%
+/-1%
9 SS
25 R0805 10K * C49
S
R0603 PHASE2 +/-5% L4 0.1uF
2
R79 R0603 C0603
5V_SYS 0 8 28 Choke 0.6uH
D
OVPSEL LGATE2
1
+/-5% C50
R0603 Q9 Q10 * 1nF
50V, X7R, +/-10%
2
46 G G C0603
34 PVID7 VID7
34 PVID6 47 20 R81 PHASE2 AOD472 AOD472 R82
VID6 ISEN2- 100 2.2
34,38 PVID5 48 19 VCCP
S
VID5 ISEN2+ +/-1%
1
C51 +/-5%
34,38
34,38
PVID4
PVID3
1
2
VID4
VID3
R0603 * 0.1uF 12V_VRM R0805
34,38 PVID2 3 C0603 VIN
2
VID2 25V, X7R, +/-10% C53

34,38 PVID1 4 VID1 PVCC3 42
1
1uF Q11 Q12
5
*
D
34,38 PVID0 VID0 R83 C0805 AOD452 AOD452 C54 R85
1
0 C52 1 225V, X7R, +/-10% 25V, Y5V, +80%/-20% 4.7uF 7.5K PHASE3
40
*
2
*
BOOT3 +/-5% C0805 0.22uF R84 25V, Y5V, +80%/-20% +/-1%

VID_SELECT:VR10.1<0.6V; 0.6<VR11<3.0V
12,34 VID_SELECT 6 39 R0603 2.2 G G C1206 R0603
2
VRSEL UGATE3
1
+/-5% R86 25V, X7R, +/-10%
PGOOD is Open-Drain 38 R0805 10K *
C55
S
PHASE3 +/-5% L5 0.1uF
37
*
B B
2
22 VRM_PWRGD PGOOD R0603 C0603
12V_VRM Choke 0.6uH
1
C56
R88 LGATE3 41
Q13 Q14 * 1nF
9.1K 50V, X7R, +/-10%
2
+/-5% 43 R89 PHASE3 G G C0603
R0603 ISEN3- 100 AOD472 AOD472 R91
ISEN3+ 44 VCCP
1
+/-1% C57 2.2

9 VRM_EN Dummy 36
*
S
EN R0603 0.1uF +/-5%
EN voltage must R90 C0603 R0805
2
higher than 0.850V 1K 25V, X7R, +/-10%

+/-5%
R0603 23 5V_SYS
EN_PH4
Dummy
7 DRSEL PWM4 24
ISEN4- 22
49 GND
ISEN4+ 21
ISL6312CRZ
A A
FOXCONN PCEG
Title VR11 ISL6312

Custom 945M03 A

5 4 3 2 1
5 4 3 2 1
12V_VRM
PWR2
1 5
Output Ecap
2 6
Input LC circuit
3 7
VCCP
D 4 8 VIN D
L6 EC5 EC6
*
3300uF 3300uF
Hearer_2X4 C58 1.2uH@100KHz EC1 EC2 EC3 EC4 * * 6.3V, +/-20% * * 6.3V, +/-20%
1
* 0.1uF
25V, Y5V, +80%/-20%
Dummy
* 1500uF
16V, +/-20%
* 1500uF
16V, +/-20%
* 1500uF
16V, +/-20%
* 1500uF
16V, +/-20%
CE35_50D100H300 CE35_50D100H300
C0603 CE50D100H300 CE50D100H300 CE50D100H300 CE50D100H300
2
EC7 EC8
* *3300uF
6.3V, +/-20% * *3300uF
6.3V, +/-20%
CE35_50D100H300 CE35_50D100H300
FAB.B
Change EC12, EC13, EC16, EC17 560uf to EC11,EC12,EC13,EC15,EC,16,EC17 680uF
VCCP
FOR EMI
EC9 EC10 EC11 EC12 EC13
* 560uF
4V, +/-20%
* 560uF
4V, +/-20%
* 680uF
4V,+/-20%
* 680uF
4V,+/-20%
* 680uF
4V,+/-20%
C60 C61 C62 C63 C64 CE35D80H90 CE35D80H90 ce35d80h90 ce35d80h90 ce35d80h90
1
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

* * * * *
C0603 C0603 C0603 C0603 C0603
2
C EC14 EC15 EC16 EC17 EC18 C

* 560uF
4V, +/-20%
* 680uF
4V,+/-20%
* 680uF
4V,+/-20%
* 680uF
4V,+/-20%
* 560uF
4V, +/-20%
CE35D80H90 ce35d80h90 ce35d80h90 ce35d80h90 CE35D80H90
VTT_OUT_RIGHT
R92 TC1 TC2
VTT_OUT_RIGHT 5V_DUAL
680
+/-5%
Put TC1 and TC2 in LGA socket * 100uF
2V,+30/-20%
* 100uF
2V,+30/-20%
R0603 Bottom side cavity ctxh15 ctxh15
VTT_PWRGD 12 Dummy Dummy
R94
D
20K
R93 +/-1% Q15
4.7K R0603
+/-5% G
BOM need update R0603 2N7002
C
R95
Dummy 100K B Q16 BC1 BC2 BC3 BC4 BC5 BC6
+/-1% PMBT3904 22uF 22uF 22uF 22uF 22uF 22uF
B
R0603 12V_VRM VTT_OUT_RIGHT * *
6.3V,X5R,+/-10% *
6.3V,X5R,+/-10% *
6.3V,X5R,+/-10% 6.3V,X5R,+/-10% * 6.3V,X5R,+/-10% * 6.3V,X5R,+/-10%
B
E
c1206h6 c1206h6 c1206h6 c1206h6 c1206h6 c1206h6

FAB.B Dummy Dummy Dummy Dummy Dummy Dummy
R96 R112
C69
10K 680 Put all MLCC in
1 2 +/-5% +/-5%
LGA socket Top
*
R0603 R0603 BC7 BC8 BC9 BC10 BC11 BC12

2.2uF
BOM need update Dummy VRM_EN 8 side cavity * 22uF
* 22uF
* 22uF
* 22uF
* 22uF
* 22uF
6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10%
C0805 c1206h6 c1206h6 c1206h6 c1206h6 c1206h6 c1206h6
D
16V, Y5V, +80%/-20% Dummy Dummy Dummy Dummy Dummy Dummy

Q17 C70
1
0.1uF R97
G
* 4.7K
2N7002 C0603 +/-5% BC13 BC14 BC15 BC16 BC17 BC18
2
R0603 22uF 22uF 22uF 22uF 22uF 22uF

* * * * * *
S
Dummy 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10%

c1206h6 c1206h6 c1206h6 c1206h6 c1206h6 c1206h6
Dummy Dummy Dummy Dummy Dummy Dummy
A A
FOXCONN PCEG
Title
VRD11 Input and Output
Custom 945M03 A

5 4 3 2 1
5 4 3 2 1
5V_SYS 5V_SB_SYS
12V_SYS
L
R695
4.7K H
Del Q18
A
+/-5%
R0603 G AP9916H D28
D
B120-13-F
Q19 1D8V_STR
C
2N7002
11 VCC_DUAL_SW G
D
Q67
BOM need update 1.8V Power requires
DDR_VTT
S
17A maximum current
D D29 D
VCC_DUAL
12V_SYS A C VCC_DUAL
D30 C71
B120-13-F
D31 A C 1 2 18V_PHASE * L7
*
*
A C R98 10R0805 ? 900nH@1KHz
5V_SB_SYS B120-13-F 0.1uF 1D8V_STR
+/-5% 3D3V_SYS
C0603
B120-13-F C72 25V, X7R, +/-10%
1uF close to Q61 Drain
5V_SB_SYS EC21
*
R100
C0805
25V, Y5V, +80%/-20% C73 EC20 EC19
* 1000uF
6.3V, +/-20% U3
1
R99 Open 14.3K
* 0.1uF * 1500uF * 1500uF CE35D80H200 1 8 VTT_DDR
D
VIN VCNTL4
5
4.7K +/-1% U4 25V, Y5V, +80%/-20% 16V, +/-20% 16V, +/-20% 7
+/-5% L R0603 Q21 C0603 CE50D100H300 CE50D100H300 VCNTL3
1 Dummy 6
VCC
2
L R0603 Rocset BOOT R102 VCNTL2
VCNTL1 5
Open 7 2 R101 0 R0805 +/-5% G 100K
H COMP/OCSET UGATE AOD452 1D8V_STR +/-1% 4
C
Open L8 VOUT
*
S
L B Q20 6 8 18V_PHASE 3 2
PMBT3904 FB PHASE REFEN GND
GND
L 4 RT9173 C77 EC22 C81
E
LGATE R105 3.3uH@100KHz
1
R106 C80
* 0.1uF * 1000uF
* 4.7uF
C
D
First R103
1
H RT9214PS 2.2 100K
* 0.1uF 6.3V, +/-20%
3
B Q22 Q23 +/-5% C79 EC23 EC27 EC24 EC25 EC26 CE35D80H200 C0805
22 SLP_S4J
2
1
PMBT3904 R0805
* 0.1uF * 1000uF * 1000uF * 1000uF * 220uF * 220uF +/-1%
2
S5 L G C78 6.3V, +/-20% 6.3V, +/-20% 6.3V, +/-20% 6.3V, +/-20% 6.3V, +/-20%
E
1K
1
1
* AOD472
* 2.2nF C0603 CE35D80H200 CE35D80H200 CE35D80H200 CE20D50H110 CE20D50H110
2
S0 R0603 H C82 50V, X7R, +/-10%
S
+/-5% 2.2uF Near MOSFET C0603
2
2
S3 H
C0603
6.3V, Y5V, +80%/-20%
VOUT= 0.8V(1+R638 / R658)
Dummy R638,R658 must less than 1k Between CHA dimm and CHB dimm
Pull FB trace out after Cout
*
C R107 115 C
R108
1K
+/-1% R110 220 R0603 +/-1%
C83 1 2 18nF C0603 50V, Y5V, +80%/-20%
*
R0603 Dummy Dummy
For DDRII 800
C
R111
1K B Q24 R113 C75 C76
22 DDR_VOL_1.9V *
1
PMBT3904
+/-5%
R0603 SOT23_BEC
91
+/-1% * 10uF
+-10% * 10uF
+-10%
E
R0603 C1206h18 C1206h18
2
5V_DUAL
B B
5V_DUAL 3D3V_DUAL 12V_SYS 5V_SB_SYS
U5 AIC1084CE 5V_SYS 5V_SB_SYS

3 2 Max. output current = 3A R116 5V_SYS
VIN VOUT 1K
Q27 +/-5%
ADJ
8 1 R0603 5V_DUAL
S
R117
D2
S2
301 7 2 PWOK+ R118 G
35 PWOK+
1
+/-1% 1K
D2
G2
D
R0603 6 3 +/-5%
3D3VADJ Q28 R0603 AP15N03H
D1
S1
C84 EC28 5 4 Q29
D
* 1uF * 1000uF 915 series failure issue G PWOKJ
D1
G1
10V, X5R, +/-10% R119 6.3V, +/-20% 2N7002
C0603 499 CE35D80H200 AO4600 SOP8JA
S
+/-1% N 50m Ohm@Vgs=2.5V, P 120m Ohm@Vgs=-2.5V
D
R0603 EC29 Id(N MOS) max= 6.9A
* 1000uF
6.3V, +/-20%
Id(P MOS) max= -5A Q30
CE35D80H200 G PWRG_ATX 5V level

PWRG_ATX 34,37
2N7002
S
Vout=Vref(1+R2/R1)+IadjR2
R1 is Up Resistor.
Iadj=50uA
Vref=1.25V
A A
3D3V_DUAL 5V_DUAL
FOXCONN PCEG
Title
DDR2 1.8V/0.9V 5VDUAL
C 945M03 A
Date: Monday, July 31, 2006 Sheet 10 of 40

5 4 3 2 1
5 4 3 2 1
5V_SYS VCC_DUAL_SW 10
5V_SB_SYS 12V_SYS
R16 3D3V_DUAL 1D8V_STR
4.7K FAB.B
+/-5%
R656 R0603 U31C 1D5V_CORE
4
470
+/-5% 10 5V_SB_SYS R650
+
8 1.8K
R0603 +/-1%
9 -
R0603 12V_SYS C453
1
LM324
* 10uF
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

11
D 5V_SYS D
C92
C93
C94
C88
C95
+-10%
1
R4 C1206h18
* * * * * * * *
2
R653 C683 4.7K U31B C89 C90 C91
1
C0603 1uF
C0603 1uF
C0603 1uF
C0805 10uF
C0805 10uF
4.12K
* 0.1uF +/-5% Q58 Q57 2.2uF 2.2uF 2.2uF
2
+/-1% 25V, Y5V, +80%/-20% R0603 5 C0603 C0603 C0603
+
R0603 C0603 7 G G
D
2
BOM need update R87 R696 6 AOD452 AOD452

-
4.7K 4.7K
Dummy
S
+/-5% +/-5% R657 C691 LM324
11
2N7002
1
R0603 R0603 G
C684 Q59
1.5K
+/-1% * 0.1uF
25V, Y5V, +80%/-20%
R651
1K 1D5V_CORE
1
* 0.1uF R0603 C0603
2
B Q66 25V, Y5V, +80%/-20%
D
PMBT3904 C0603
2
R692 C697 Dummy R658 100
E
1
34,37 PS_ONJ G
2N7002
Dummy *
2.2K 0.1uF
+/-5% 25V, Y5V, +80%/-20% R659
Q68 R0603 C0603 1.5K
Dummy
2
R662
S
R0603 +/-1% C97 EC32 EC33 C87
1
750
* 0.1uF * 1000uF * 1000uF
* 10uF
C
BOM need update Dummy +/-1% 25V, Y5V, +80%/-20% 6.3V, +/-20% 6.3V, +/-20% +-10%
R660 1K
Dummy Q61
B Dummy R0603 C0603 CE35D80H200 CE35D80H200 C1206h18
22 SYS_VOL_1.6V
2
PMBT3904
BOM need update
C
FAB.B 1D5V power sequence R661 1K
Dummy Q60
B Dummy
22 SYS_VOL_1.7V
1, Dummy R656, R653,C683, R652 PMBT3904
2, Add R87 4.7K ohm, C697 0.1uF, R4 4.7K, Q66 PMBT3904, C691 0.1uF 1D5V FOR CHIP
E
3D3V_DUAL
C 1D05V FOR ICH7 C
1D5V_CORE
R128 12V_SYS
470
+/-1%
R0603
D
U31D
4
1.2V 1D05V_REF 12 Q33 1D05V_ICH
+ AP15N03H
14 G
13 TO252_GDS
FSB_VTT -
R130
S
1.0524V
R129
* C103 LM324 1K
11
220 0.1uF +/-5%
+/-5% C0603 R0603
R0603 Dummy
25V, Y5V, +80%/-20% C104 C105 C106 EC34
1
3D3V_DUAL 12V_SYS 3D3V_SYS
* 0.1uF
* 0.1uF
25V, Y5V, 25V, *
+80%/-20%
0.1uF
Y5V, 25V,
*
+80%/-20%
100uF
Y5V, 16V,
+80%/-20%
+/-20%
C0603 C0603 C0603 CE20D50H110
2
R132
D
1K EC35 place close to ICH7

8
+/-1%
R0603 3
U9A Q35 * 1000uF
6.3V, +/-20%
+ AP15N03H
1 G CE35D80H200
2 TO252_GDS
-
* C108 R139
S
0.1uF LM358 1K
4
C0603 SOP8JA +/-5%

25V, Y5V, +80%/-20% R0603
R667 -12V_SYS
2D5V FOR GMCH
1K
+/-1%
3D3V_DUAL R0603 12V_SYS 3D3V_SYS
B 12V_SYS B
EC36
* 1000uF
6.3V, +/-20% -12V_SYS placed near the LM358M pin 8
R670 CE35D80H200 C107
D
1K 3D3V_DUAL
* 0.1uF
8
U9B Q36 25V, Y5V, +80%/-20%

1D2V_REF 5 C0603
1D5V_CORE + AP15N03H
7 G
* C113
C
6 TO252_GDS 0.1uF R134

-
B Q64 R668 R138 C0603 324
D
S
PMBT2222A 1.13K
* C109 LM358 1K +/-1% U31A
C
4
+/-1% 0.1uF SOP8JA +/-5% R0603 Q62
E
R669 1K B Q63 R0603 C0603 R0603 3 +

1
PMBT2222A
* C74
Dummy
25V, Y5V, +80%/-20%
FSB_VTT R262 2
1 G
2N7002
E
-
2.2uF -12V_SYS 1K
S
2
C0603 +/-1% LM324 R136
11
2D5V_MCH
C0805
C111
R0603 1K
6.3V, Y5V, +80%/-20% +/-5%
C112 EC37 R0603
E
R140
* * 0.1uF
* * 1000uF
10V, Y5V, +80%/-20%
1K B Q37 25V, Y5V, +80%/-20% 6.3V, +/-20%

4.7uF
+/-5% MMBT2907A C0603 CE35_50D100H300

2
R0603 SOT23_BECH14
C
FAB.B * C110
FAB.B 4.7uF
EC37 change PCBfootprint to CE35_50D100H300 C0805
2.5V for GMCH VGA function.
D7
1N4148W
A SOD123 A
1 2
1D5V_CORE 2D5V_MCH
1 2
D8 1N4148W SOD123
FOXCONN PCEG
Title
Power 1.5V 1.2V 1.05V
C 945M03 A

5 4 3 2 1
5 4 3 2 1
HAJ[31..3]
14 HAJ[31..3]
HDJ[63..0]
HDJ[63..0] 14 U10A
HAJ3 L5 D2 3 OF 7
HAJ4 A03# ADS# HADSJ 14 U10C
P6 A04# BNR# C2 HBNRJ 14
2 OF 7 HAJ5 M5 D4 P2 F26 TESTHI_0
U10B A05# HIT# HITJ 14 23 SMIJ SMI# TESTHI00
HAJ6 L4 H4 TP_RSPJ K3 W3 TESTHI_1
A06# RSP# TP1 23 A20MJ A20M# TESTHI01
HAJ7 M4 G8 R3 P1 TESTHI_11
A07# BPRI# HBPRIJ 14 23 FERRJ FERR#/PBE# TESTHI11
HDJ0 B4 G16 HDJ32 HAJ8 R4 B2 K1 W2 TESTHI_12
D00# D32# A08# DBSY# HDBSYJ 14 23 INTR LINT0 TESTHI12
HDJ1 C5 E15 HDJ33 HAJ9 T5 C1 L1 F25
D01# D33# A09# DRDY# HDRDYJ 14 23 NMI LINT1 TESTHI02
HDJ2 A4 E16 HDJ34 HAJ10 U6 E4 N2 G25
D02# D34# A10# HITM# HITMJ 14 23 IGNNEJ IGNNE# TESTHI03
HDJ3 C6 G18 HDJ35 HAJ11 T4 AB2 HIERRJ M3 G27
D03# D35# A11# IERR# 23 STPCLKJ STPCLK# TESTHI04
HDJ4 A5 G17 HDJ36 HAJ12 U5 P3 G26
HDJ5 D04# D36# HDJ37 HAJ13 A12# INIT# INITJ 23 TESTHI05
D
B6 D05# D37# F17 U4 A13# LOCK# C3 HLOCKJ 14 13 HVCCA A23 VCCA TESTHI06 G24 D
HDJ6 B7 F18 HDJ38 HAJ14 V5 E3 B23 F24 TESTHI_2_7
D06# D38# A14# TRDY# HTRDYJ 14 13 HVSSA VSSA TESTHI07
HDJ7 A7 E18 HDJ39 HAJ15 V4 AD3 TP_BINITJ 1D5V_CORE VCCPLL D23 AK6
D07# D39# A15# BINIT# TP2 RSVD5 FORCEPH
HDJ8 A10 E19 HDJ40 HAJ16 W5 G7 C23 G6 RSVD_G6
D08# D40# A16# DEFER# HDEFERJ 14 13 HVCCIOPLL VCCIOPLL RSVD11
HDJ9 A11 F20 HDJ41 N4 F2 HGTLREF_2 Change: Eric
HDJ10 D09# D41# HDJ42 RSVD1 EDRDY# TP_MCERRJ TP_CPUSLPJ
B10 D10# D42# E21 14 HREQJ[4..0] P5 RSVD2 MCERR# AB3 TP6 TESTHI13 L2
HDJ11 C11 F21 HDJ43 HREQJ0 K4 VID0 AM2 AH2
D11# D43# REQ0# 38 VID0 VID0 RSVD12
HDJ12 D8 G21 HDJ44 HREQJ1 J5 U2 TP_APJ0 VID1 AL5 N1
D12# D44# REQ1# AP0# TP7 38 VID1 VID1 PWRGOOD CPU_PWRG 22
HDJ13 B12 E22 HDJ45 HREQJ2 M6 U3 TP_APJ1 VID2 AM3 AL2 PROCHOTJ
D13# D45# REQ2# AP1# TP3 38 VID2 VID2 PROCHOT#
HDJ14 C12 D22 HDJ46 HREQJ3 K6 VID3 AL6 M2
D14# D46# REQ3# 38 VID3 VID3 THERMTRIP# THERMTRIPJ 23
HDJ15 D11 G22 HDJ47 HREQJ4 J6 F3 HBR0J VID4 AK4
D15# D47# HAJ[31..3] 5/10 REQ4# BR0# HBR0J 14 38 VID4 VID4
HDBIJ0 A8 D19 HDBIJ2 R6 G3 TESTHI_8 VID5 AL4
14 HDBIJ0 DBI0# DBI2# HDBIJ2 14 14 HAJ[31..3] 14 HADSTBJ0 ADSTB0# TESTHI08 38 VID5 VID5
C8 G20 G5 G4 TESTHI_9 VID6 AM5 A13 HCOMP0
14 HDSTBNJ0 DSTBN0# DSTBN2# HDSTBNJ2 14 34 PECI PCREQ# TESTHI09 By Eric 04/18/05 34 VID6 FC11 COMP0
B9 G19 H5 TESTHI_10 VID7 AM7 T1 HCOMP1
14 HDSTBPJ0 DSTBP0# DSTBP2# HDSTBPJ2 14 TESTHI10 ----intel 20574 34 VID7 FC12 COMP1
HAJ17 AB6 VID_SELECT AN7 G2 HCOMP2
A17# 8,34 VID_SELECT FC16 COMP2
HDJ16 G9 D20 HDJ48 HAJ18 W6 J16 TP_DPJ0 F28 R1 HCOMP3
D16# D48# A18# DP0# TP8 7 CK_200M_P_CPU BCLK0 COMP3
HDJ17 F8 D17 HDJ49 HAJ19 Y6 H15 TP_DPJ1 G28 J2 HCOMP4
D17# D49# A19# DP1# TP4 7 CK_200M_N_CPU BCLK1 COMP4
HDJ18 F9 A14 HDJ50 HAJ20 Y4 H16 TP_DPJ2 T2 HCOMP5
D18# D50# A20# DP2# TP5 COMP5
HDJ19 E9 C15 HDJ51 HAJ21 AA4 J17 TP_DPJ3 AE8
D19# D51# A21# DP3# TP9 SKTOCC#
HDJ20 D7 C14 HDJ52 HAJ22 AD6 N5 TP_RSVD_CPU_N5
D20# D52# A22# 34 THERMDA RSVD13 TP10
HDJ21 E10 B15 HDJ53 HAJ23 AA5 H2 HGTLREF_1 AE6 TP_RSVD_CPU_AE6
D21# D53# A23# GTLREF1 34 THERMDC RSVD14 TP12
HDJ22 D10 C18 HDJ54 HAJ24 AB5 H1 HGTLREF_0 AL1 C9 TP_RSVD_CPU_C9
D22# D54# A24# GTLREF0 THERMDA RSVD15 TP11
HDJ23 F11 B16 HDJ55 HAJ25 AC5 E24 CPU_MCH_GTLREF AK1 G10 HGTLREF_3
HDJ24 D23# D55# HDJ56 HAJ26 A25# CS_GTLREF MCH_GTLREF_CPU 14 THERMDC RSVD16 TP_RSVD_CPU_D16
F12 D24# D56# A17 AB4 A26#
Dummy RSVD17 D16 TP13
HDJ25 D13 B18 HDJ57 HAJ27 AF5 R141 0 R0603 +/-5% AN3 A20
D25# D57# A27# 8 VCC_SENSE VCCSENSE RSVD18
HDJ26 E13 C21 HDJ58 HAJ28 AF4 G23 R142 0 R0603 +/-5% AN4 E23 TP_RSVD_CPU_E23
D26# D58# A28# RESET# HCPURSTJ 14 8 VSS_SENSE VSSSENSE RSVD19 TP14
HDJ27 G13 B21 HDJ59 HAJ29 AG6 Dummy AN5 F23 TP_RSVD_CPU_F23
D27# D59# A29# VCC_MB_REG RSVD21 TP15
HDJ28 F14 B19 HDJ60 HAJ30 AG4 B3 AN6 J3 TP_RSVD_CPU_J3
D28# D60# A30# RS0# HRSJ0 14 VSS_MB_REG RSVD24 TP16
HDJ29 G14 A19 HDJ61 HAJ31 AG5 F5
HDJ30 D29# D61# HDJ62 TP_LAG775_PIN_AH4 A31# RS1# HRSJ1 14 Changed pin name MS_ID1
F15 D30# D62# A22 TP17 AH4 A32# RS2# A3 HRSJ2 14 MSID1 V1
HDJ31 G15 D31# D63# B22 HDJ63
TP18
TP_LAG775_PIN_AH5 AH5 A33# F29 from RSV
RSVD9 MSID0 W1 MS_ID0
HDBIJ1 G11 C20 HDBIJ3 TP_LAG775_PIN_AJ5 AJ5 Two Feedback Network:
14 HDBIJ1 DBI1# DBI3# HDBIJ3 14 TP20 A34# 1. socket feedback
G12 A16 TP_LAG775_PIN_AJ6 AJ6
14 HDSTBNJ1 DSTBN1# DSTBN3# HDSTBNJ3 14 TP19 A35# 2. die feedback
E12 C17 AC4 Y1 CPU_BOOT
14 HDSTBPJ1 DSTBP1# DSTBP3# HDSTBPJ3 14 RSVD3 THERMDA/THERMDC BOOTSELECT TP21
AE4 RSVD4 LL_ID0 V2
1. width=10 mils, spacing=10 mils. LL_ID1
14 HADSTBJ1 AD5 ADSTB1# 2. route the lines in parallel LL_ID1 AA2
CPU_Prescott_Rev1.0_LGA775
CPU_Prescott_Rev1.0_LGA775
C CPU_LGA775 1 OF 7 C
CPU_LGA775 CPU_Prescott_Rev1.0_LGA775
check Intel final recommendation
3H055321-3041-0DF CPU_LGA775 LL_ID1
R143
0
FSB routing guidelines: If under 5" OK (pin to pin) +/-5%
R0603
check DG 1.0 Dummy
Loadline ID for Cedar Mill support

VTT_OUT_LEFT
VTT_OUT_LEFT VTT_OUT_RIGHT VTT_OUT_RIGHT
VTT_OUT_LEFT place TDO termination near XDP connector
R144 62 HIERRJ place TCK/TDI/TMS terminations near CPU within 1.5 inch
Place at CPU end of route Place at CPU end of+/-5%
R0603 route place TRSTJ termination anywhere on route FSB_VTT
R145 62 HBR0J R150 62 HCPURSTJ C114 C115 U10D 4 OF 7
1
R0603 +/-5%
Place at CPU end of route
R0603
VTT_OUT_RIGHT
+/-5% 0.1uF
C0603 * * 1uF
10V, X5R, +/-10%
R146 49.9
+/-1%
R0603
Dummy HTDO HTCK
HTDI
AE1
AD1
TCK
TDI
VTT1
VTT2
A29
B25
R148 100 CPU_PWRG 25V, Y5V, +80%/-20% C0603 R149 49.9 R0603
Dummy HTDI HTDO AF1 B29
2
R0603 +/-5% Dummy +/-1% HTMS TDO VTT3
AC1 TMS VTT4 B30
R151 49.9 R0603
Dummy HTMS HTRSTJ AG1 C29
FAB.B +/-1% TRST# VTT5
VTT6 A26
Dummy R147 62 TESTHI_8 R152 49.9 R0603
Dummy HTCK B27
R0603 +/-5% +/-1% HBPM0J VTT7
AJ2 BPM0# VTT8 C28
R153 62 TESTHI_9 R154 130 PROCHOTJ R155 49.9 R0603 HTRSTJ HBPM1J AJ1 A25
R0603 +/-5% R0603 +/-5% VTT_OUT_RIGHT +/-1% HBPM2J BPM1# VTT9
AD2 BPM2# VTT10 A28
R156 62 TESTHI_10 C116 C117 HBPM3J AG2 A27
BPM3# VTT11
1
R0603
R157
+/-5%
62 TESTHI_11 * 1uF
* 0.1uF
10V, X5R, +/-10%
C0603 C118 C119
HBPM4J
HBPM5J
AF2
AG3
BPM4#
BPM5#
VTT12
VTT13
C30
A30
R0603 +/-5% C0603 25V, Y5V, +80%/-20% 0.1uF
* * 0.1uF C25
2
R158 62 TESTHI_12 25V, X7R, +/-10% 25V, X7R, +/-10% VTT_OUT_RIGHT ICH_SYS_RSTJ VTT14
7,22,37 ICH_SYS_RSTJ AC2 DBR# VTT15 C26
R0603 +/-5% C0603 C0603 C27
R159 62 TP_CPUSLPJ VTT16
AK3 ITPCLKOUT0 VTT17 B26
R0603 +/-5% AJ3 D27
VTT_OUT_LEFT R161 ITPCLKOUT1 VTT18
VTT19 D28
R160 60.4 HCOMP4 62 HBPM5J FSBSEL0 G29 D25
B
R0603 +/-1% R163
+/-5% 7,14 FSBSEL0 FSBSEL1 BSEL0 VTT20 B
7,14 FSBSEL1 H30 BSEL1 VTT21 D26
R162 60.4 HCOMP5 62
R0603 HBPM4J FSBSEL2 G30 B28 VTT_OUT_RIGHT
R0603 +/-1% 1D5V_CORE R165
+/-5% 7,14 FSBSEL2 BSEL2 VTT22 TPEV_VCCFUSEPRG
VTT23 D29
design guide 1.0 62
R0603 HBPM3J D30 TPEV_VIDFUSEPRG VTT_OUT_LEFT
10 mils width R164 62 RSVD_G6 R166
+/-5% VTT24
VTTPWRGD AM6 VTT_PWRGD 9
7 mils spacing R0603 +/-5% Dummy 62
R0603 HBPM2J
max. 1200mils +/-5%
R167 AA1 VTT_OUT_RIGHT
C120 C121 R0603
62 HBPM1J VTT_OUT1 VTT_OUT_LEFT
VTT_OUT2 J1
1
FSB_VTT
R168 60.4
update in WW32 MOW
HCOMP2
10uF
C0805 * * 10nF
25V, X7R, +/-10%
R170
+/-5%
62
R0603 HBPM0J VTT_SEL F27 TP22
R0603 +/-1% R169 62
Dummy TESTHI_0 C0603 +/-5% CPU_Prescott_Rev1.0_LGA775
?
2
R171 60.4 HCOMP3 R0603 +/-5% R0603

R0603 +/-1% R172 62 TESTHI_2_7 Place BPM termination near CPU CPU_LGA775 VTT_OUT_LEFT
R0603 +/-5% VTT_OUT_RIGHT
VTT_OUT_LEFT
R173 60.4 HCOMP0 R176 1K VID_SELECT R177
R0603 +/-1% R175 62 TESTHI_1 +/-5% 62 check boardfile for easy routing
R174 60.4 HCOMP1 R0603 +/-5% By Eric 04/18/05----intel
R0603 20574
R0603
R0603 +/-1% Value 680?
+/-5%
Dummy
Intel reply 60.4 Ohm is corrected TESTHI_0
13 TESTHI_0
MS_ID0 R178 62
VCCP R0603 +/-5%
MS_ID1 R179 62
R180 R0603 +/-5%
? 619 Ohm VTT_OUT_RIGHT VTT_OUT_RIGHT VTT_OUT_RIGHT VTT_OUT_RIGHT
+/-1%
r0603h6 GTLREF voltage should be 0.63*VTT MSID0: VTT = 2005 Mainstream FMB
D
R18112 mils width, 15 mils spacing R182 R183 R184 Vss = 2005 Performance FMB
Q39 124 divider should be within 1.5" of the GTLREF pin 124 124 124 MSID1: NC = PSC only
+/-1%0.22nF caps should be placed near CPU pin +/-1% +/-1% +/-1% Vss = Cedar Mill
R0603place series resistor as close to divider R0603 R0603 R0603
13,14 GTLREF_SEL G
2N7002 Intel recommend pull down to VSS
S
A R254 10 HGTLREF_0 R255 10 HGTLREF_1 R185 10 HGTLREF_2 R186 10 HGTLREF_3 A

r0603h6 +/-5% r0603h6 +/-5% r0603h6 +/-5% r0603h6 +/-5%
C122 C124 C126 C128
* 1uF
10V, X5R, +/-10%
R187
210 * C123 * 1uF
10V, X5R, +/-10%
R188
210 * C125
R189
210 * 1uF
10V, X5R, +/-10% * C127
R190
210 * 1uF
10V, X5R, +/-10% * C129
C0603 +/-1% 220pF C0603 +/-1% 220pF +/-1% C0603 220pF +/-1% C0603 220pF
R0603 50V, NPO, +/-5% R0603 50V, NPO, +/-5% R0603 50V, NPO, +/-5% R0603 50V, NPO, +/-5%
C0603 C0603 C0603 C0603
FOXCONN PCEG
Title
P4EE GTLREF0 of 0.0986Vcc+0.6106Vtt is based on Vtt of 1.2V Vcc of 1.575V

LGA775 -1
C 945M03 A

5 4 3 2 1
5 4 3 2 1
FSB_VTT PLL Supply Filter
VCCP VCCP VCCP

U10G 7 OF 7
U10E 5 OF 7 U10F 6 OF 7
AG22 VCCP1 VCCP93 AK12 AF9 VCCP185 VSS41 AL23 H22 VSS126 VSS211 D5
K29 VCCP2 VCCP94 AH22 AF22 VCCP186 VSS42 A12 H21 VSS127 VSS212 A9
1
AM26 VCCP3 VCCP95 T29 AH11 VCCP187 VSS43 L25 H20 VSS128 VSS213 D3
AL8 AM14 AJ14 J7 H19 B1 L11 L12
VCCP4 VCCP96 VCCP188 VSS44 VSS129 VSS214
AE12 VCCP5 VCCP97 AM25 AH19 VCCP189 VSS45 AE28 H18 VSS130 VSS215 B5 L0805 10uH L0805 10uH
AE11 AE9 AH29 AE29 AB7 B8 SRF: >=30MHz
2
D VCCP6 VCCP98 VCCP190 VSS46 VSS131 VSS216 Rated I: >=120mA SRF: >=30MHz D
W23 VCCP7 VCCP99 Y29 AH27 VCCP191 VSS47 K5 H17 VSS132 VSS217 AJ4
W24 AK25 AG28 J4 AJ24 AE26 DCR: <=0.36 ohm Rated I: >=120mA
VCCP8 VCCP100 VCCP192 VSS48 VSS133 VSS218 DCR: <=0.36 ohm
W25 VCCP9 VCCP101 AK19 AL26 VCCP193 VSS49 AE30 AM17 VSS134 VSS219 AH1
T25 AG15 AM12 AN20 AC3 E29 HVCCIOPLL
VCCP10 VCCP102 VCCP194 VSS50 VSS135 VSS220 12 HVCCIOPLL
Y28 VCCP11 VCCP103 J22 J24 VCCP195 VSS51 AF10 H14 VSS136 VSS221 V7
AL18 VCCP12 VCCP104 T24 J13 VCCP196 VSS52 AE24 P28 VSS137 VSS222 C13
AC25 AG21 T28 AM24 V6 AK24 HVCCA
VCCP13 VCCP105 VCCP197 VSS53 VSS138 VSS223 12 HVCCA
W30 VCCP14 VCCP106 AM21 W28 VCCP198 VSS54 AN23 AK2 VSS139 VSS224 AB30
Y30 VCCP15 VCCP107 J25 J12 VCCP199 VSS55 H9 P27 VSS140 VSS225 L6
AN14 U30 J27 H8 P26 L7 BC20 EC46
AD28
Y26
VCCP17 VCCP109 AL21
AG25
AG19
AL9
VCCP201 VSS57 H13
AC6
AM28
AJ13
VSS142 VSS227 AB29
M1
* 22uF
6.3V,X5R,+/-10%
* 100uF
16V, +/-20%
VCCP18 VCCP110 VCCP202 VSS58 VSS143 VSS228 c1206h6 CE20D50H110
AC29 VCCP19 VCCP111 AJ18 AD30 VCCP203 VSS59 AC7 W4 VSS144 VSS229 AB28
M29 J19 AF21 AH6 P25 E8 Dummy ESL <= 9 nH, ESR < 0.3 ohm
U24 VCCP21 VCCP113 AH30 Y24 VCCP205 VSS61 C16 AJ20 VSS146 VSS231 AG20
J23 VCCP22 VCCP114 J15 AK14 VCCP206 VSS62 AM16 W7 VSS147 VSS232 AN17
AC27 AG12 J9 AE25 P23 AB27 HVSSA check component requirements
VCCP23 VCCP115 VCCP207 VSS63 VSS148 VSS233 12 HVSSA Notes:
AM18 VCCP24 VCCP116 AJ22 M27 VCCP208 VSS64 AE27 AG13 VSS149 VSS234 AB26
AM19 J20 AF14 AJ28 AG16 AN16 1. Cap. should be within 1.5" mils of the VCCA and VSSA pins
VCCP25 VCCP117 VCCP209 VSS65 VSS150 VSS235 2. VCCA route should be parallel and next to VSSA route to minimize loop area
AB8 VCCP26 VCCP118 AH18 J30 VCCP210 VSS66 AJ7 AG17 VSS151 VSS236 M7
AC26 AH26 AG18 F19 C7 AB25 3. VCCIOPLL route should be parallel and next to VSSA route to minimize loop area
VCCP27 VCCP119 VCCP211 VSS67 VSS152 VSS237 3. Min. 12 mils trace from the filter to the processor pins
J8 VCCP28 VCCP120 W27 AA8 VCCP212 VSS68 AH13 Y2 VSS153 VSS238 AB24
4. The inductors should be close to the cap.
J28 VCCP29 VCCP121 AL25 AG8 VCCP213 VSS69 AD7 L30 VSS154 VSS239 AB23
T30 VCCP30 VCCP122 AN8 AL29 VCCP214 VSS70 AH16 L29 VSS155 VSS240 N3
AM9 VCCP31 VCCP123 AH14 AD29 VCCP215 VSS71 AK17 D15 VSS156 VSS241 AA30
AF15 VCCP32 VCCP124 U27 W8 VCCP216 VSS72 E17 AL27 VSS157 VSS242 F4
AC8 VCCP33 VCCP125 T23 AH8 VCCP217 VSS73 AH17 Y7 VSS158 VSS243 AG10
AE14 VCCP34 VCCP126 R8 N24 VCCP218 VSS74 AH20 L27 VSS159 VSS244 AE13
N23 VCCP35 VCCP127 AK22 AN22 VCCP219 VSS75 AE5 AA29 VSS160 VSS245 AF30
W29 VCCP36 VCCP128 AN29 J14 VCCP220 VSS76 AH23 N6 VSS161 VSS246 H28
U29 VCCP37 VCCP129 AG11 K26 VCCP221 VSS77 AE7 N7 VSS162 VSS247 F7
AC24 VCCP38 VCCP130 AK26 AF19 VCCP222 VSS78 AM13 AA28 VSS163 VSS248 AF29
AC23 VCCP39 VCCP131 J10 N8 VCCP223 VSS79 AH24 AN13 VSS164 VSS249 AF28
Y23 VCCP40 VCCP132 AJ15 AF12 VCCP224 VSS80 AJ30 AA27 VSS165 VSS250 G1
AN26 AG26 M28 AJ10 AA26 AF27 VTT_OUT_RIGHT
AN25 VCCP42 VCCP134 AN9 AK9 VCCP226 VSS82 AF3 P4 VSS167 VSS252 AF26
AN11 VCCP43 VCCP135 AH15 VSS83 AK5 AA25 VSS168 VSS253 AF25
C AN18 AF18 AJ16 AA24 AN28 10 mils width C
VCCP44 VCCP136 VSS84 VSS169 VSS254 7 mils spacing
Y27 VCCP45 VCCP137 AL15 C10 VSS1 VSS85 AF6 P7 VSS170 VSS255 AN27
Y25 J26 D12 AK29 E26 AF24 max. 1200mils
VCCP46 VCCP138 VSS2 VSS86 VSS171 VSS256
AD24 VCCP47 VCCP139 J18 VSS87 AJ17 V30 VSS172 VSS257 AF23
AE23 J21 C24 F22 R2 AG24 R191 60.4 HCOMP6
VCCP48 VCCP140 VSS4 VSS88 VSS173 VSS258 R0603 +/-1%
AE22 VCCP49 VCCP141 AG27 K2 VSS5 VSS89 AH3 V29 VSS174 VSS259 AF17
AN19 AK15 C22 AK10 V28 AN24 R192 60.4 HCOMP7
V8 VCCP51 VCCP143 AF11 AN1 VSS7 VSS91 AM10 R5 VSS176 VSS261 H3
K8 VCCP52 VCCP144 AD23 B14 VSS8 VSS92 F16 V27 VSS177
AE21 AM15 K7 AJ23 R7 P24 R193 30 HCOMP8
AM30 VCCP54 VCCP146 AF8 AE16 VSS10 VSS94 F13 E20 VSS179 VSS264 AE20
AE19 AK21 B11 AG7 AN10 AE17 By Eric 04/18/05----intel 20574 Value 24.9?
AC30 VCCP56 VCCP148 AG30 AL10 VSS12 VSS96 F10 V25 VSS181 VSS266 E27
AE15 AJ21 AK23 L26 T3 T7 15 mils width
VCCP57 VCCP149 VSS13 VSS97 VSS182 VSS267 7 mils spacing
M30 VCCP58 VCCP150 AM11 H12 VSS14 VSS98 AD4 V24 VSS183 VSS268 R30
K27 AL11 AF7 H11 V23 AJ27 max. 1200mils
M24 VCCP60 VCCP152 AJ11 AK7 VSS16 VSS100 L24 T6 VSS185 VSS270 AB1
AN21 VCCP61 VCCP153 K30 H7 VSS17 VSS101 L23 AL7 VSS186 VSS271 AM4
T8 VCCP62 VCCP154 AL14 E14 VSS18 VSS102 AM23 E25 VSS187 VSS272 V26
AC28 VCCP63 VCCP155 AN30 L28 VSS19 VSS103 A15 U1 VSS188 VSS273 AA23
N25 VCCP64 VCCP156 AH25 Y5 VSS20 VSS104 AH10 R29 VSS189 VSS274 AL28
AE18 AL12 E11 H29 GTLREF_SEL R28 AF20
W26 VCCP66 VCCP158 AJ9 AL16 VSS22 VSS106 B24 R27 VSS191 VSS276 AG23
AD25 VCCP67 VCCP159 AK11 AL24 VSS23 VSS107 L3 R26 VSS192
M8 VCCP68 VCCP160 AG14 AK13 VSS24 VSS108 H27 R25 VSS193
N30 VCCP69 VCCP161 N29 TP23 AL3 VSS25 VSS109 A21 U7 VSS194
AD26 VCCP70 VCCP162 AL30 D21 VSS26 VSS110 AE2 R24 VSS195
AJ26 VCCP71 VCCP163 AJ25 AL20 VSS27 VSS111 AJ29 R23 VSS196
AM29 AH9 FAB.B D18 A24 P30
VCCP72 VCCP164 CPU PIN.AL3 floating. VSS28 VSS112 VSS197
M25 VCCP73 VCCP165 J29 AN2 VSS29 VSS113 AK27 V3 VSS198
M26 VCCP74 VCCP166 J11 AK16 VSS30 VSS114 AK28 P29 VSS199
L8 K25 AK20 B20 AF16 F6 3D3V_SYS
VCCP75 VCCP167 VSS31 VSS115 VSS200 RSVD26
U25 VCCP76 VCCP168 P8 AM27 VSS32 VSS116 AM20 AE10 VSS201
Y8 K23 AM1 H26 AF13 Y3 HCOMP6
VCCP77 VCCP169 VSS33 VSS117 VSS202 RSVD28 HCOMP7
AJ12 VCCP78 VCCP170 AL19 AL13 VSS34 VSS118 B17 H6 VSS203 RSVD29 AE3 NOTE: For NW EE CPU
AD27 VCCP79 VCCP171 AM8 AL17 VSS35 VSS119 H25 A18 VSS204
U23 VCCP80 VCCP172 T26 C19 VSS36 VSS120 H24 A2 VSS205 RSVD31 E7
M23 N28 E28 AA3 E2 B13 HCOMP8 R265
B VCCP81 VCCP173 VSS37 VSS121 VSS206 RSVD32 249 R269 B
AG29 VCCP82 VCCP174 AH12 AH7 VSS38 VSS122 AA7 D9 VSS207 RSVD33 D14
N27 AL22 AK30 H23 C4 E6 +/-1% 110
VCCP83 VCCP175 VSS39 VSS123 VSS208 RSVD34 R0603 +/-1%
AM22 VCCP84 VCCP176 AN15 D24 VSS40 VSS124 AA6 A6 VSS209 RSVD35 D1
U28 AJ8 H10 D6 E5 R0603
D
VCCP85 VCCP177 VSS125 VSS210 RSVD36
K28 VCCP86 VCCP178 U26
U8 AJ19 CPU_Prescott_Rev1.0_LGA775 CPU_Prescott_Rev1.0_LGA775 Q50
VCCP87 VCCP179
AK18 VCCP88 VCCP180 T27
AD8 AK8 CPU_LGA775 CPU_LGA775 G TESTHI_0
VCCP89 VCCP181 12V_SYS 12,14 GTLREF_SEL TESTHI_0 12
K24 AN12 2N7002
VCCP90 VCCP182
AH28 AG9
S
VCCP91 VCCP183
AH21 VCCP92 VCCP184 N26
CPU_Prescott_Rev1.0_LGA775 R271 C449
1
CPU_LGA775
R194
4.7K
61.9
+/-1% * 0.1uF
25V, Y5V, +80%/-20%
+/-5% R0603 C0603
2
R0603
GTLREF_SEL
GTLREF_SEL 12,14
A A
FOXCONN PCEG
Title
LGA775 -2
C 945M03 A

5 4 3 2 1
5 4 3 2 1
BSEL1
7 BSEL1
U12A HDJ[63..0]
12 HAJ[31..3] HDJ[63..0] 12
HAJ3 J39 HA3* 1.0 HD0* P41 HDJ0 U12D Place close to GMCH
HAJ4 K38 HA4* HD1* M39 HDJ1 @945G@945P Within 500 mils
HAJ5
HAJ6
J42 HA5*
HA6*
HD2*
HD3*
P42 HDJ2
HDJ3
U12G FSBSEL0
R202 10K BSEL0 1.0 HSYNC_P R204 39
@945G@945GZ
+/-1% R0603
K35 M42 F21 HSYNC D17 HSYNC 21
HAJ7 J37 HA7* HD4* N41 HDJ4 FSBSEL1
R203 10K BSEL1H21 BSEL1 VSYNC C17 VSYNC_P R206 39 +/-1% R0603
HAJ8
HAJ9
M34
N35
HA8*
HA9* FSB HD5*
HD6*
M40
L40
HDJ5
HDJ6 20,22
20,22
EXP_RXP0
EXP_RXN0
R196
R198
0 @945PL@945G@945P
G12
0 @945PL@945G@945P
F12
EXP_RX0
EXP_RX0*
1.0 EXP_TX0
EXP_TX0*
D14
C13
EXP_TXP0
EXP_TXN0
EXP_TXP0
EXP_TXN0
FSBSEL2
20
20
R205 10K
TP_ALLZTEST
L20
K18
BSEL2
ALLZTEST RED F17 RED
RED
VSYNC
@945G@945GZ
21
21
HAJ10 R33 HA10* HD7* M41 HDJ7 R197 0 @945PL@945G@945P

D11 EXP_RX1 EXP_TX1 A13 EXP_TXP1
EXP_TXP1 20
TP_XORTEST H20 XORTEST GREEN K17 GREEN
GREEN 21
VGA
20,22 EXP_RXP1
HAJ11 N32 HA11* HD8* K42 HDJ8
20,22 EXP_RXN1
R195 0 @945PL@945G@945P
D12 EXP_RX1* EXP_TX1* B12 EXP_TXN1
EXP_TXN1 20
TP_RSV_TP5 L18 RSV_TP5 BLUE H18 BLUE
BLUE 21
HAJ12 N34 HA12* HD9* G39 HDJ9
20,22 EXP_RXP2
R199 0 @945PL@945G@945P
J13 EXP_RX2 EXP_TX2 A11 EXP_TXP2
EXP_TXP2 20
GMCH_EXP_SLR K21 EXP_SLR RED* G17 REDJ
HAJ13 M38 HA13* HD10* J41 HDJ10
20,22 EXP_RXN2
R200 0 @945PL@945G@945P
H13 EXP_RX2* EXP_TX2* B10 EXP_TXN2
EXP_TXN2 20
TP_RSV_TP4 L21 RSV_TP4 GREEN* J17 GREENJ
D
HAJ14 N42 HA14* HD11* G42 HDJ11
20,22 EXP_RXP3
R207 0 @945PL@945G@945P
E10 EXP_RX3 EXP_TX3 C10 EXP_TXP3
EXP_TXP3 20
GMCH_EXP_EN F20 EXP_EN BLUE* J18 BLUEJ
D
HAJ15 HA15* HD12* HDJ12 R201 0 @945PL@945G@945P EXP_RX3* EXP_TXN3 TP_RSV_TP6 RSV_TP6
PCIE
N37 G40 20,22 EXP_RXN3 F10 EXP_TX3* C9 EXP_TXN3 20 N21
HAJ16 N38 HA16* HD13* G41 HDJ13 EXP_RXP4 J9 EXP_RX4 EXP_TX4 A9 EXP_TXP4
EXP_TXP4 20
1D5V_CORE DDC_DATA N18 DDCA_DATA DDCA_DATA 21
20 EXP_RXP4
HAJ17 R32 HA17* HD14* F40 HDJ14
20 EXP_RXN4
EXP_RXN4 H10 EXP_RX4* EXP_TX4* B7 EXP_TXN4
EXP_TXN4 20 DDC_CLK N20 DDCA_CLK DDCA_CLK 21
Place close to
HAJ18 R36 HA18* HD15* F43 HDJ15
20 EXP_RXP5
EXP_RXP5 F7 EXP_RX5 EXP_TX5 D7 EXP_TXP5
EXP_TXP5 20 M17 RESERVED GMCH
HAJ19 HA19* HD16* HDJ16 EXP_RXN5 EXP_RX5* EXP_TXN5 REFSET A20 REFSET Within 500 mils
U37 F37 20 EXP_RXN5 F9 EXP_TX5* D6 EXP_TXN5 20 L17 RESERVED
HAJ20 R35 HA20* HD17* E37 HDJ17
20 EXP_RXP6
EXP_RXP6 C4 EXP_RX6 EXP_TX6 A6 EXP_TXP6
EXP_TXP6 20 DREFCLKP J15 CK_96M_P_GMCH 7
HAJ21 R38 HA21* HD18* J35 HDJ18
20 EXP_RXN6
EXP_RXN6 D3 EXP_RX6* EXP_TX6* B5 EXP_TXN6
EXP_TXN6 20 R27 RESERVED DREFCLKN H15 2D5V_MCH
CK_96M_N_GMCH 7
HAJ22 V33 HA22* HD19* D39 HDJ19
20 EXP_RXP7
EXP_RXP7 G6 EXP_RX7 EXP_TX7 E2 EXP_TXP7
EXP_TXP7 20 U27 RESERVED
HAJ23 U34 HA23* HD20* C41 HDJ20 EXP_RXN7 J6 EXP_RX7* EXP_TX7* F1 EXP_TXN7
EXP_TXN7 20 Intel M15 RESERVED EXTTS* J20 EXTTSJ R208 10K
20 EXP_RXN7 Symbol 1.0 update
HAJ24 U32 HA24* HD21* B39 HDJ21
20 EXP_RXP8
EXP_RXP8 K9 EXP_RX8 EXP_TX8 G2 EXP_TXP8
EXP_TXP8 20 L15 RESERVED RESERVED M11
HAJ25 V42 HA25* HD22* B40 HDJ22
20 EXP_RXN8
EXP_RXN8 K8 EXP_RX8* EXP_TX8* J1 EXP_TXN8
EXP_TXN8 20 RESERVED V30
HAJ26 HA26* HDJ23 EXP_RXP9 EXP_TXP9 NC PLTRSTJ
HAJ27
U35
Y36 HA27*
HD23*
HD24*
H34
C37 HDJ24 20
20
EXP_RXP9
EXP_RXN9
EXP_RXN9
F4
G4
EXP_RX9
EXP_RX9*
EXP_TX9
EXP_TX9*
J3
K4 EXP_TXN9
EXP_TXP9
EXP_TXN9
20
20
BB2
BA2 NC MISC RSTIN*
PWROK
AJ12
AJ9 PWRGD_3V
PLTRSTJ 22,31,34
HAJ28 Y38 HA28* HD25* J32 HDJ25 EXP_RXP10 M6 EXP_RX10 EXP_TX10 L4 EXP_TXP10
EXP_TXP10 20 AW26 NC ICH_SYNC* M18 ICH_SYNCJ
ICH_SYNCJ 22
20 EXP_RXP10 NC
HAJ29 AA37 HA29* HD26* B35 HDJ26
20 EXP_RXN10
EXP_RXN10 M7 EXP_RX10* EXP_TX10* M4 EXP_TXN10
EXP_TXN10 20 AW2
HAJ30 V32 HA30* HD27* J34 HDJ27
20 EXP_RXP11
EXP_RXP11 K2 EXP_RX11 EXP_TX11 M2 EXP_TXP11
EXP_TXP11 20 AV27 NC RESERVED A43
HAJ31 Y34 HA31* HD28* B34 HDJ28 EXP_RXN11 L1 EXP_RX11* EXP_TX11* N1 EXP_TXN11
EXP_TXN11 20 AV26 NC
20 EXP_RXN11 NC
AA35 RSVD HD29* F32 HDJ29
20 EXP_RXP12
EXP_RXP12 U11 EXP_RX12 EXP_TX12 P2 EXP_TXP12
EXP_TXP12 20 E35 NC BC43
AA42 RSVD HD30* L32 HDJ30 EXP_RXN12 U10 EXP_RX12* EXP_TX12* T1 EXP_TXN12
EXP_TXN12 20 C42 NC NC BC42
20 EXP_RXN12 NC
AA34 RSVD HD31* J31 HDJ31
20 EXP_RXP13
EXP_RXP13 R8 EXP_RX13 EXP_TX13 T4 EXP_TXP13
EXP_TXP13 20 B42 NC BC2
AA38 RSVD HD32* H31 HDJ32 EXP_RXN13 R7 EXP_RX13* EXP_TX13* U4 EXP_TXN13
EXP_TXN13 20 B41 NC NC BC1
20 EXP_RXN13
HD33* M33 HDJ33
20 EXP_RXP14
EXP_RXP14 P4 EXP_RX14 EXP_TX14 U2 EXP_TXP14
EXP_TXP14 20 NC BB43
HD34* K31 HDJ34 EXP_RXN14 N3 EXP_RX14* EXP_TX14* V1 EXP_TXN14
EXP_TXN14 20 AJ27 RESERVED NC BB1
12 HREQJ[4..0] HREQJ0 HD35* HDJ35 20 EXP_RXN14 EXP_RXP15 EXP_TXP15 RESERVED
E41 HREQ0* M27 20 EXP_RXP15 Y10 EXP_RX15 EXP_TX15 V3 EXP_TXP15 20 AG27 NC C2
HREQJ1 D41 HREQ1* HD36* K29 HDJ36 EXP_RXN15 Y11 EXP_RX15* EXP_TX15* W4 EXP_TXN15
EXP_TXN15 20 AG26 RESERVED NC B43
HD37* 20 EXP_RXN15 RESERVED
HREQJ2 K36 HREQ2* F31 HDJ37 AG25 NC B3
HREQJ3 G37 HREQ3* HD38* H29 HDJ38 DMI_RXP0 Y7 DMI_RX0 AJ24 RESERVED NC B2 BLUE
22 DMI_RXP0 DMI_TX0
HREQJ4 E42 HREQ4* HD39* F29 HDJ39
22 DMI_RXN0
DMI_RXN0 Y8 DMI_RX0* W2 DMI_TXP0
DMI_TXP0 22 NC A42 GREEN
HD40* L27 HDJ40 DMI_RXP1 AA9 DMI_RX1 DMI_TX0* Y1 DMI_TXN0
DMI_TXN0 22 AD30 RESERVED RED
22 DMI_RXP1
12
12
HADSTBJ0
HADSTBJ1
M36
V35
HADSTB0*
HADSTB1*
HD41*
HD42*
M24
J26
HDJ41
HDJ42 22
22
DMI_RXN1
DMI_RXP2
DMI_RXN1
DMI_RXP2
AA10
AA6
DMI_RX1*
DMI_RX2 DMI DMI_TX1
DMI_TX1*
AA2
AB1
DMI_TXP1
DMI_TXN1
DMI_TXP1
DMI_TXN1
22
22
AC34
Y30
RESERVED
RESERVED
RESERVED
RESERVED
AK21
AJ23 R210 R211 R212
HD43* K26 HDJ43
22 DMI_RXN2
DMI_RXN2 AA7 DMI_RX2* DMI_TX2 Y4 DMI_TXP2
DMI_TXP2 22 Y33 RESERVED RESERVED AJ26 150 150 150
K41 HDSTBP0 HD44* G26 HDJ44 DMI_RXP3 AC9 DMI_RX3 DMI_TX2* AA4 DMI_TXN2
DMI_TXN2 22 AF31 RESERVED RESERVED AL29 +/-1% +/-1% +/-1%
12 HDSTBPJ0 22 DMI_RXP3 RESERVED RESERVED
12 HDSTBNJ0 L43 HDSTBN0* HD45* H24 HDJ45
22 DMI_RXN3
DMI_RXN3 AC8 DMI_RX3* DMI_TX3 AB3 DMI_TXP3
DMI_TXP3 22 1D5V_PE_GMCH AD31 AL20 R0603 R0603 R0603
12 HDBIJ0
HDBIJ0 K40 HDINV_0* HD46* K24 HDJ46 DMI_TX3* AC4 DMI_TXN3
DMI_TXN3 22 U30 RESERVED RESERVED AJ21 @945G@945GZ
@945G@945GZ
12 HDSTBPJ1 F35 HDSTBP1 HD47* F24 HDJ47
7 CK_PE_100M_P_GMCH
CK_PE_100M_P_GMCH B14 GCLKP V31 RESERVED RESERVED AL26 @945G@945GZ
G34 HDSTBN1* HD48* E31 HDJ48
7 CK_PE_100M_N_GMCH
CK_PE_100M_N_GMCH B16 GCLKN EXP_COMPO AC12 GMCH_EXP_COMP AA30 RESERVED RESERVED AK27
C
12
12
HDSTBNJ1
HDBIJ1
HDBIJ1 A38 HDINV_1* HD49* A33 HDJ49 EXP_COMPI AC11 AC30 RESERVED 5 OF 7 RESERVED AJ29 C
J27 HDSTBP2 HD50* E40 HDJ50 R215 0 +/-5% Dummy F15 SDVO_CTRLDATA R214 RESERVED AG29
12 HDSTBPJ2 20 SDVO_CTRLDATA
12 HDSTBNJ2 M26 HDSTBN2* HD51* D37 HDJ51
20 SDVO_CTRLCLK
R213 0 +/-5% Dummy E15 SDVO_CTRLCLK 24.9
12 HDBIJ2
HDBIJ2 E29 HDINV_2* HD52* C39 HDJ52 width 10 mils, spacing 7 mils R0603 lakeport1202_wshs
12 HDSTBPJ3 E34 HDSTBP3 HD53* D38 HDJ53
2 OF 7 +/-1%
B37 HDSTBN3* HD54* D33 HDJ54 FAB.B 2D5V_DAC
12 HDSTBNJ3 HDBIJ3 HDJ55 1, Dummy R215, R213
12 HDBIJ3 B32 HDINV_3* HD55* C35 unstuff lakeport1202_wshs
when no internal 5V_SYS
HD56* D34 HDJ56 FSBSEL0 2D5V_DAC
W42 HADS* HD57* C34 HDJ57 graphics connection 7,12 FSBSEL0 R217
12 HADSJ
12 HTRDYJ W40 HTRDY* HD58* B31 HDJ58 R216 0
12 HDRDYJ V41 HDRDY* HD59* C31 HDJ59 2D5V_MCH
7,12 FSBSEL1
FSBSEL1 2.7K +/-5%
12 HDEFERJ P40 HDEFER* HD60* C32 HDJ60 +/-5% R0603
12 HITMJ W41 HHITM* HD61* D32 HDJ61 R0603 R218 R219 R220 REFSET @945P@945PL
12 HITJ U41 HHIT* HD62* B30 HDJ62 CRB 1.03 pull-up to 2.5V 3D3V_SYS
7,12 FSBSEL2
FSBSEL2 DDCA_DATA 0 0 0 R223
12 HLOCKJ U40 HLOCK* HD63* D30 HDJ63 +/-5% +/-5% +/-5% 255
12 HBR0J AA41 HBREQ0* R221 R224 R222 R0603 R0603 R0603 R0603
12 HBNRJ U39 HBNR* HSWING B27 HSWING 4.7K 4.7K 2.7K RED @945P@945PL@945P@945PL
@945P@945PL
+/-1%
12 HBPRIJ D42 HBPRI* HSCOMP C27 HSCOMP +/-5% +/-5% +/-5% GREEN
HDBSY* HRCOMP R0603 R0603 R0603 BLUE @945G@945GZ
12 HDBSYJ U42 HRCOMP A28
T40 HRS0* Dummy Dummy
12 HRSJ0
12 HRSJ1 Y43 HRS1* HDVREF D27 MCH_GTLREF
T43 HRS2* HACCVREF D28 R225 1D5V_CORE
12 HRSJ2 5V_SYS
12 HCPURSTJ C30 HCPURST* 1K
F38 HPCREQ* HCLKP M31 CK_200M_P_GMCH 7 +/-5%
Y40 HEDRDY* HCLKN M29 R227
CK_200M_N_GMCH 7 R0603 R226 HSYNC_P 0
1 OF 7 Dummy 2.7K VSYNC_P +/-5%
+/-5% R228 R229
lakeport1202_wshs GMCH_EXP_EN_HDR GMCH_EXP_EN R0603 10K 10K CK_96M_P_GMCH R0603
@945P@945PL
20 GMCH_EXP_EN_HDR DDCA_CLK +/-5% +/-5%
R0603 R0603 CK_96M_N_GMCH
R230 @945P@945PL
@945P@945PL
Signal termination (follow Intel reference 0p7) 2.7K R231
FSB_VTT COMP SIGNAL TERMINATION +/-5% 0
FSB_VTT Intel confirm R0603 +/-5%
R0603
@945P@945PL
R232
B B
301 R233
+/-1% 60.4 HSCOMP
R0603 +/-1%
R0603 C130
place near GMCH
R691 62 HSWING * 2.2pF
50V, NPO, +/-0.25pF 15 mils width
22,34 PWRGD_3V
PWRGD_3V
R0603 +/-5% C0603 20 mils spacing
Dummy
R234 C131 Please check
1
84.5
+/-1% * 10nF
25V, X7R, +/-10% * C132
1uF
R235 1K R0603
Dummy
+/-5% GMCH_EXP_SLR R236
10K
r0603h6 C0603 10V, X5R, +/-10% 5 mils width, 5 mils spacing in the breakout ATX dummy important +/-5%
2
C0603 5 mils width, 8 mils spacing after the breakout BTX pop R0603
max. 750 mils Dummy
VCCP
HSWING voltage should be 0.22*FSB_VTT

12 mils width, 10 mils spacing R237
max. 3 inches long 619 Ohm FSB_VTT
caps should be placed near GMCH pin. +/-1%
r0603h6
D
HRCOMP R238 R0603

16.9 +/-1% Q40
R239
G 124
10 mils width, 7 mils spacing 12,13 GTLREF_SEL
2N7002 +/-1%
max. 500 mils R0603
HS1 MCH_GTLREF_CPU 12
S
1 1 8 D8
2 A2 R690 10 MCH_GTLREF
7 7 r0603h6 +/-5%
FOXCONN R
3 3 6C 6
R240
210
*
C133
0.1uF * C134
4 B4 5 5
+/-1% 25V, Y5V, +80%/-20% 220pF
R0603 C0603 50V, NPO, +/-5%
Heatsink CLIP1 CLIP3
C0603
A A
Clip_2P Clip_2P GTLREF voltage should be 0.63*VTT = 0.75V

hb9603eh80 hb9603eh80 12 mils width, 15 mils spacing
Need to apply Heatsink for Lakeport chipset. divider should be within 1.5" of the GTLREF pin
For GMCH heatsink hook 0.22nF caps should be placed near MCH pin
place series resistor as close to divider
FOXCONN PCEG
Title
Grantsdale GMCH -1
C 945M03 A
Date: Friday, August 04, 2006 Sheet 14 of 40

5 4 3 2 1
5 4 3 2 1
U12B U12C
18,19 M_MA_B[13..0] M_DQS_P_B[7..0] 18
17,19 M_MA_A[13..0] M_MA_A0 SMA_A0 1.0 SDQS_A0 M_DQS_P_A0
M_DQS_P_A[7..0] 17
M_MA_B0
M_MA_B1
BB22 SMA_B0 1.0 SDQS_B0 AM8 M_DQS_P_B0
M_DQS_N_B0
M_DQS_N_B[7..0] 18
BA32 AU4 M_DQS_N_A[7..0] 17 BB21 SMA_B1 SDQS_B0* AM6 M_DQM_B[7..0] 18
M_MA_A1 AW32 SMA_A1 SDQS_A0* AR2 M_DQS_N_A0
M_DQM_A[7..0] 17
M_MA_B2 BA21 SMA_B2 SDM_B0 AL11 M_DQM_B0
M_MD_B[63..0] 18
M_MA_A2 BB30 SMA_A2 SDM_A0 AR3 M_DQM_A0
M_MD_A[63..0] 17
M_MA_B3 AY21 SMA_B3
M_MA_A3 BA30 SMA_A3 M_MA_B4 BC20 SMA_B4 SDQ_B0 AL6 M_MD_B0
M_MA_A4 AY30 SMA_A4 SDQ_A0 AP3 M_MD_A0 M_MA_B5 AY19 SMA_B5 SDQ_B1 AL8 M_MD_B1
M_MA_A5 BA27 SMA_A5 SDQ_A1 AP2 M_MD_A1 M_MA_B6 AY20 SMA_B6 SDQ_B2 AP8 M_MD_B2
M_MA_A6 BC28 SMA_A6 SDQ_A2 AU3 M_MD_A2 M_MA_B7 BA18 SMA_B7 SDQ_B3 AP9 M_MD_B3
M_MA_A7 AY27 SMA_A7 SDQ_A3 AV4 M_MD_A3 M_MA_B8 BA19 SMA_B8 SDQ_B4 AJ11 M_MD_B4
M_MA_A8 AY28 SMA_A8 SDQ_A4 AN1 M_MD_A4 M_MA_B9 BB18 SMA_B9 SDQ_B5 AL9 M_MD_B5
M_MA_A9 BB27 SMA_A9 SDQ_A5 AP4 M_MD_A5 M_MA_B10 BA22 SMA_B10 SDQ_B6 AM10 M_MD_B6
M_MA_A10 AY33 SMA_A10 SDQ_A6 AU5 M_MD_A6 M_MA_B11 BB17 SMA_B11 SDQ_B7 AP6 M_MD_B7
D
M_MA_A11 AW27 SMA_A11 SDQ_A7 AU2 M_MD_A7 M_MA_B12 BA17 SMA_B12 M_DQS_P_B[7..0] 18 D
M_MA_A12 BB26 SMA_A12 M_DQS_P_A[7..0] 17
M_MA_B13 AW42 SMA_B13 SDQS_B1 AV7 M_DQS_P_B1
M_DQS_N_B[7..0] 18
M_MA_A13 BC38 SMA_A13 SDQS_A1 BA3 M_DQS_P_A1
M_DQS_N_A[7..0] 17 SDQS_B1* AR9 M_DQS_N_B1
M_DQM_B[7..0] 18
SDQS_A1* BB4 M_DQS_N_A1 BB23 SWE_B* SDM_B1 AW7 M_DQM_B1
M_DQM_A[7..0] 17 18,19 M_WEJ_B M_MD_B[63..0] 18
BB35 SWE_A* SDM_A1 AY2 M_DQM_A1 AY24 SCAS_B*
17,19 M_WEJ_A M_MD_A[63..0] 17 18,19 M_CASJ_B
BA37 SCAS_A* BA23 SRAS_B* SDQ_B8 AU7 M_MD_B8
17,19 M_CASJ_A 18,19 M_RASJ_B M_MD_B9
17,19 M_RASJ_A BA34 SRAS_A* 18,19 M_BS_B[2..0] SDQ_B9 AV6
SDQ_A8 AW3 M_MD_A8 M_BS_B0 AW23 SBS_B0 SDQ_B10 AV12 M_MD_B10
M_BS_A0 BC33 SBS_A0 SDQ_A9 AY3 M_MD_A9 M_BS_B1 AY23 SBS_B1 SDQ_B11 AM11 M_MD_B11
M_BS_A1 AY34 SBS_A1 SDQ_A10 BA7 M_MD_A10 M_BS_B2 AY17 SBS_B2 SDQ_B12 AR5 M_MD_B12
M_BS_A2 BA26 SBS_A2 SDQ_A11 BB7 M_MD_A11 18,19 M_CSJ_B[1..0] SDQ_B13 AR7 M_MD_B13
17,19 M_BS_A[2..0]
SDQ_A12 AV1 M_MD_A12 M_CSJ_B0 BA40 SCS_B0* SDQ_B14 AR12 M_MD_B14
M_CSJ_A0 BB37 SCSB_A0* SDQ_A13 AW4 M_MD_A13 M_CSJ_B1 AW41 SCS_B1* SDQ_B15 AR10 M_MD_B15
17,19 M_CSJ_A0 M_CSJ_A1 SDQ_A14 M_MD_A14
17,19 M_CSJ_A1 BA39 SCSB_A1* BC6 BA41 SCS_B2* M_DQS_P_B[7..0] 18
BA35 SCSB_A2* SDQ_A15 AY7 M_MD_A15 AW40 SCS_B3* SDQS_B2 AV13 M_DQS_P_B2
M_DQS_N_B[7..0] 18
AY38 SCSB_A3* M_DQS_P_A[7..0] 17 18,19 M_CKE_B[1..0] SDQS_B2* AT13 M_DQS_N_B2
M_DQM_B[7..0] 18
SDQS_A2 AY11 M_DQS_P_A2
M_DQS_N_A[7..0] 17
M_CKE_B0 BA14 SCKE_B0 SDM_B2 AP13 M_DQM_B2
M_MD_B[63..0] 18
17,19 M_CKE_A[1..0] SCKE_A0
M_CKE_A0 BB25 SDQS_A2* BA10 M_DQS_N_A2
M_DQM_A[7..0] 17
M_CKE_B1 AY16 SCKE_B1
M_CKE_A1 AY25 SCKE_A1 SDM_A2 BB10 M_DQM_A2
M_MD_A[63..0] 17 BA13 SCKE_B2 SDQ_B16 AM15 M_MD_B16
BC24 SCKE_A2 BB13 SCKE_B3 SDQ_B17 AM13 M_MD_B17
BA25 SCKE_A3 SDQ_A16 AW12 M_MD_A16 SDQ_B18 AV15 M_MD_B18
SDQ_A17 AY10 M_MD_A17 18,19 M_ODT_B[1..0] M_ODT_B0 AY42 SODT_B0 SDQ_B19 AM17 M_MD_B19
17,19 M_ODT_A[1..0] M_ODT_A0 SODT_A0 SDQ_A18 M_MD_A18 M_ODT_B1 SDQ_B20 M_MD_B20
AW37 BA12 AV40 SODT_B1 AN12
M_ODT_A1 AY39 SODT_A1 SDQ_A19 BB12 M_MD_A19 AV43 SODT_B2 SDQ_B21 AR13 M_MD_B21
AY37 SODT_A2 SDQ_A20 BA9 M_MD_A20 AU40 SDQ_B22 AP15 M_MD_B22
BB40 SODT_A3 SDQ_A21 BB9 M_MD_A21 ? SODT_B3
SDQ_B23 AT15 M_MD_B23
SDQ_A22 BC11 M_MD_A22
M_DQS_P_B[7..0] 18
SDQ_A23 AY12 M_MD_A23 SDQS_B3 AU23 M_DQS_P_B3
SCLK_A0 M_DQS_N_B[7..0] 18
M_CK_P_A0 BB32 M_DQS_P_A[7..0] 17 18 M_CK_P_B0 AM29 SCLK_B0 SDQS_B3* AR23 M_DQS_N_B3
M_DQM_B[7..0] 18
17 M_CK_P_A0 M_CK_N_A0 SCLK_A0* SDQS_A3 M_DQS_P_A3 SCLK_B0* M_DQM_B3
17 M_CK_N_A0 AY32 AU18 M_DQS_N_A[7..0] 17 18 M_CK_N_B0 AM27 SDM_B3 AP23 M_MD_B[63..0] 18
17 M_CK_P_A1
M_CK_P_A1 AY5 SCLK_A1 SDQS_A3* AR18 M_DQS_N_A3
M_DQM_A[7..0] 17 18 M_CK_P_B1 AV9 SCLK_B1
17 M_CK_N_A1
M_CK_N_A1 BB5 SCLK_A1* SDM_A3 AP18 M_DQM_A3
M_MD_A[63..0] 17 18 M_CK_N_B1 AW9 SCLK_B1* SDQ_B24 AM24 M_MD_B24
17 M_CK_P_A2
M_CK_P_A2 AK42 SCLK_A2 18 M_CK_P_B2 AL38 SCLK_B2 SDQ_B25 AM23 M_MD_B25
M_CK_N_A2 AK41 SCLK_A2* SDQ_A24 AM20 M_MD_A24
18 M_CK_N_B2 AL36 SCLK_B2* SDQ_B26 AV24 M_MD_B26
17 M_CK_N_A2
BA31 SCLK_A3 SDQ_A25 AM18 M_MD_A25 AP26 SCLK_B3 SDQ_B27 AM26 M_MD_B27
BB31 SCLK_A3* SDQ_A26 AV20 M_MD_A26 AR26 SCLK_B3* SDQ_B28 AP21 M_MD_B28
AY6 SCLK_A4 SDQ_A27 AM21 M_MD_A27 AU10 SCLK_B4 SDQ_B29 AR21 M_MD_B29
BA5 SCLK_A4* SDQ_A28 AP17 M_MD_A28 AT10 SCLK_B4* SDQ_B30 AP24 M_MD_B30
C AH40 SCLK_A5 SDQ_A29 AR17 M_MD_A29 AJ38 SCLK_B5 SDQ_B31 AT24 M_MD_B31 C
AH43 SCLK_A5* SDQ_A30 AP20 M_MD_A30 AJ36 SCLK_B5* M_DQS_P_B[7..0] 18
SDQ_A31 AT20 M_MD_A31 SDQS_B4 AT29 M_DQS_P_B4
M_DQS_N_B[7..0] 18
BC16 RSVD M_DQS_P_A[7..0] 17 SDQS_B4* AV29 M_DQS_N_B4
M_DQM_B[7..0] 18
AY14 RSVD SDQS_A4 AU35 M_DQS_P_A4
M_DQS_N_A[7..0] 17 SDM_B4 AR29 M_DQM_B4
M_MD_B[63..0] 18
AW17 RSVD SDQS_A4* AV35 M_DQS_N_A4
M_DQM_A[7..0] 17
AW18 RSVD SDM_A4 AT34 M_DQM_A4
M_MD_A[63..0] 17 SDQ_B32 AU27 M_MD_B32
AL39 RSVD SDQ_B33 AN29 M_MD_B33
SDQ_A32 AP32 M_MD_A32 SDQ_B34 AR31 M_MD_B34
SDQ_A33 AV34 M_MD_A33 SDQ_B35 AM31 M_MD_B35
SDQ_A34 AV38 M_MD_A34 SDQ_B36 AP27 M_MD_B36
SDQ_A35 AU39 M_MD_A35 SDQ_B37 AR27 M_MD_B37
SDQ_A36 AV32 M_MD_A36 SDQ_B38 AP31 M_MD_B38
AK40 RSVD SDQ_A37 AT32 M_MD_A37 DDR_GMCH_VREF_B AM2 SVREF1 SDQ_B39 AU31 M_MD_B39
SDQ_A38 AR34 M_MD_A38
M_DQS_P_B[7..0] 18
SDQ_A39 AU37 M_MD_A39 SDQS_B5 AP36 M_DQS_P_B5
M_DQS_N_B[7..0] 18
SDQS_B5* AM35 M_DQS_N_B5
M_DQS_P_A[7..0] 17 M_DQM_B[7..0] 18
SDQS_A5 M_DQS_P_A5 M_DQM_B5
DDR_GMCH_VREF_A AM4 SVREF0 SDQS_A5*
SDM_A5
AP42
AP40
AP39
M_DQS_N_A5
M_DQM_A5
M_DQS_N_A[7..0] 17
M_DQM_A[7..0] 17
M_MD_A[63..0] 17
DDR_B SDM_B5
SDQ_B40
AR38
AP35 M_MD_B40
M_MD_B[63..0] 18
SDQ_B41 AP37 M_MD_B41

SDQ_A40 AR41 M_MD_A40 AK18 RSV_TP3 SDQ_B42 AN32 M_MD_B42
DDR_A SDQ_A41
SDQ_A42
SDQ_A43
AR42
AN43
AM40
M_MD_A41
M_MD_A42
M_MD_A43
1D8V_STR
WW39 MOW/CRB1.01 update
AK23 RSV_TP2 SDQ_B43
SDQ_B44
SDQ_B45
AL35
AR35
AU38
M_MD_B43
M_MD_B44
M_MD_B45
SDQ_A44 AU41 M_MD_A44 (must remove pull-down resistor) SDQ_B46 AM38 M_MD_B46
M_MD_A45 Double check in DG1.0 TP_SMOCDCOMP1 SOCOMP1 SDQ_B47 M_MD_B47
SDQ_A45 AU42 AM3 AM34
AL17 RSV_TP1 SDQ_A46 AP41 M_MD_A46 TP_SMOCDCOMP0 AJ8 SOCOMP0 M_DQS_P_B[7..0] 18
AK17 RSV_TP0 SDQ_A47 AN40 M_MD_A47 SRCOMP1 AJ6 SRCOMP1 SDQS_B6 AG34 M_DQS_P_B6
M_DQS_N_B[7..0] 18
R241 80.6 SRCOMP0 AL5 SRCOMP0 SDQS_B6* AG32 M_DQS_N_B6
M_DQS_P_A[7..0] 17 M_DQM_B[7..0] 18
SDQS_A6 AG42 M_DQS_P_A6
M_DQS_N_A[7..0] 17
R0603 +/-1% SDM_B6 AJ39 M_DQM_B6
M_MD_B[63..0] 18
SDQS_A6* AG41 M_DQS_N_A6
M_DQM_A[7..0] 17
SDM_A6 AG40 M_DQM_A6
M_MD_A[63..0] 17
C135 SDQ_B48 AL34 M_MD_B48
SDQ_B49
SDQ_A48 AL41 M_MD_A48 * 0.1uF
25V, Y5V, +80%/-20%
R242
40.2
R243
40.2
R244
80.6 SDQ_B50
AJ34
AF32
M_MD_B49
M_MD_B50
SDQ_A49 AL42 M_MD_A49 C0603 +/-1% +/-1% +/-1% SDQ_B51 AF34 M_MD_B51
SDQ_A50 AF39 M_MD_A50 R0603 R0603 R0603 SDQ_B52 AL31 M_MD_B52
SDQ_A51 AE40 M_MD_A51 SDQ_B53 AJ32 M_MD_B53
B B
SDQ_A52 AM41 M_MD_A52 SDQ_B54 AG35 M_MD_B54
SDQ_A53 AM42 M_MD_A53 SDQ_B55 AD32 M_MD_B55
SDQ_A54 AF41 M_MD_A54
M_DQS_P_B[7..0] 18
SDQ_A55 AF42 M_MD_A55 SDQS_B7 AD36 M_DQS_P_B7
M_DQS_N_B[7..0] 18
SDQS_B7* AD38 M_DQS_N_B7
M_DQS_P_A[7..0] 17 M_DQM_B[7..0] 18
SDQS_A7 AC42 M_DQS_P_A7
M_DQS_N_A[7..0] 17 SDM_B7 AD39 M_DQM_B7
M_MD_B[63..0] 18
SDQS_A7* AC41 M_DQS_N_A7
M_DQM_A[7..0] 17
SDM_A7 AC40 M_DQM_A7
M_MD_A[63..0] 17 SDQ_B56 AC32 M_MD_B56
SDQ_B57 AD34 M_MD_B57
SDQ_A56 AD40 M_MD_A56 SDQ_B58 Y32 M_MD_B58
SDQ_A57 AD43 M_MD_A57 SDQ_B59 AA32 M_MD_B59
SDQ_A58 AA39 M_MD_A58 SDQ_B60 AF35 M_MD_B60
SDQ_A59 AA40 M_MD_A59 SRCOMP[1:0] SDQ_B61 AF37 M_MD_B61
SDQ_A60 AE42 M_MD_A60 10 mils width, 10 mils spacing, max 1.5" length SDQ_B62 AC33 M_MD_B62
SDQ_A61 M_MD_A61 place cap/res within 1" of GMCH package SDQ_B63 M_MD_B63
SDQ_A62
AE41
AB41 M_MD_A62 4 OF 7 AC35
3 OF 7 SDQ_A63 AB42 M_MD_A63 lakeport1202_wshs
lakeport1202_wshs
1D8V_STR
DDR_GMCH_VREF_A
C136
* 0.1uF
25V, Y5V, +80%/-20%
R245 C0603
1K
+/-1%
R0603
DDR_GMCH_VREF_B
C137
A
R246
1K * 0.1uF
25V, Y5V, +80%/-20% A
+/-1% C0603
R0603
FOXCONN PCEG
width 12 mils, spacing 12 mils
5 mils width/spacing minimum for a max. of 300 mils Title
in the GMCH break-out area
place each cap to Vref pin
Grantsdale GMCH -2
C 945M03 A

5 4 3 2 1
5 4 3 2 1
U12E 1D8V_STR
1D5V_CORE
VCCSM BC18
N17 VCC 1.0 VCCSM BC22
P17 VCC VCCSM BC26
AH4 VCC VCCSM BC31 1D5V_CORE 1D5V_CORE
AJ5 VCC VCCSM BC35 U12F U12I
VCC VCCSM U12H
AK4 BC13
AF30 VCC VCCSM BB42 A16 VSS VSS AL2 BB39 VSS VSS M10
AK20 VCC VCCSM BB38 AJ15 VCC 1.0 VCC AC15 A22 VSS VSS AL21 BB41 VSS VSS M13
AK3 VCC VCCSM BB33 AG23 VCC VCC AC17 A26 VSS VSS AL23 BB6 VSS VSS M20
AK2 VCC VCCSM BB28 AG22 VCC VCC AC18 A31 VSS VSS AL24 BC4 VSS VSS M21
AJ14 VCC VCCSM BB24 AG21 VCC VCC AC20 A35 VSS VSS AL27 BC9 VSS VSS M3
AK14 VCC VCCSM BB20 AG20 VCC VCC AC24 A4 VSS VSS AL3 C12 VSS VSS M35
AK15 VCC VCCSM BB16 AG19 VCC VCC AC26 A40 VSS VSS AL32 C14 VSS VSS M37
AJ13 VCC VCCSM AY41 AG18 VCC VCC AC27 AA11 VSS VSS AL33 C22 VSS VSS M5
D
AH2 VCC VCCSM AW21 AG17 VCC VCC AD15 AA12 VSS VSS AL37 C3 VSS VSS M8 D
AH1 VCC VCCSM AW13 AG15 VCC VCC AD17 AA14 VSS VSS AL43 C40 VSS VSS M9
AG14 VCC VCCSM AV31 AB18 VCC VCC AJ17 AA21 VSS VSS AL7 C5 VSS VSS N13
AG13 VCC VCCSM AV21 Y27 VCC VCC AD19 AA23 AM33 C7 N15
VCC VSS VSS VSS VSS
AG12 VCC VCCSM AW35 Y25 VCC AD21 AA25 VSS VSS AM36 D1 VSS VSS N2
AG11 VCC VCCSM AW34 Y19 VCC VCC AD23 AA27 AM37 D10 N24
VSS VSS VSS VSS
AG10 VCC VCCSM AW31 Y18 VCC VCC AD25 AA29 VSS VSS AM39 D16 VSS VSS N26
AG9 VCC VCCSM AW29 W27 VCC VCC AD26 AA3 VSS VSS AM5 D2 VSS VSS N27
AG8 VCC VCCSM AW24 W26 VCC VCC AE17 AA31 AM7 D20 N29
VCC VSS VSS VSS VSS
AG7 VCCSM AW20 W20 VCC VCC AE18 AA33 VSS VSS AM9 D21 VSS VSS N31
AG6 VCC VCCSM AW15 U19 VCC VCC AE20 AA36 VSS VSS AN13 D43 VSS VSS N33
AG5 VCC VCCSM AV42 U18 VCC VCC AE22 AA8 VSS VSS AN15 D5 VSS VSS N36
AG4 VCC VCCSM AV23 U17 VCC VCC AE24 AB2 VSS VSS AN17 E12 VSS VSS N39
AG3 VCC VCCSM AV18 U15 VCC VCC AJ18 AB43 VSS VSS AN18 E13 VSS VSS N43
AG2 VCC R24 VCC VCC AE26 AC10 VSS VSS AN2 E17 VSS VSS N6
AF14 VCC 1D5V_PE_GMCH R23 VCC VCC AE27 AC14 VSS VSS AN20 E18 VSS VSS N8
AF13 VCC R21 VCC VCC AF15 AC19 VSS VSS AN21 E20 VSS VSS P14
AF12 VCC VCC_EXP AD4 R20 VCC VCC AF17 AC2 AN23 E21 P15
POWER
VCC VSS VSS VSS VSS
AF11 VCC VCC_EXP AD5 R18 VCC AF19 AC21 AN24 E3 P24
POWER
VSS VSS VSS VSS
AF10 VCC VCC_EXP AD6 AF29 VCC VCC AF21 AC23 VSS VSS AN26 E32 VSS VSS P26
AF9 VCC VCC_EXP AD8 R17 VCC VCC AF23 1D8V_STR AC25 VSS VSS AN27 E4 VSS VSS P27
AF8 VCC VCC_EXP AD10 R15 VCC VCC AJ20 AC29 VSS VSS AN31 E7 VSS VSS P29
AF7 VCC VCC_EXP AD12 U20 VCC AC3 VSS VSS AN4 E9 VSS VSS P3
AF6 VCC VCC_EXP N5 U21 VCC VCCSM BC40 AC31 VSS VSS AN42 F13 VSS VSS P30
AD14 VCC VCC_EXP N7 U22 VCC VCCSM AY43 AC36 VSS VSS AP10 F18 VSS VSS R12
AC22 VCC VCC_EXP N9 U23 VCC AC37 VSS VSS AP12 F2 VSS VSS R14
AB23 VCC VCC_EXP N10 U24 VCC AC38 VSS VSS AP29 F26 VSS VSS R26
AB22 VCC VCC_EXP N12 U25 VCC AC39 AP34 F34 R29
VSS VSS VSS VSS
AB21 VCC VCC_EXP R5 U26 VCC AC7 VSS VSS AP38 F42 VSS VSS R30
AA22 VCC VCC_EXP R10 V15 VCC AD11 VSS VSS AP5 F6 VSS VSS R31
P21 VCC VCC_EXP AE2 V17 VCC AD13 VSS VSS AP7 G10 VSS VSS R34
P20 VCC VCC_EXP R11 V18 VCC AD18 VSS VSS AR1 G13 VSS VSS R37
FSB_VTT P18 VCC VCC_EXP R13 AF25 VCC AD20 VSS VSS AR15 G15 VSS VSS R39
VCC_EXP U6 AF26 VCC AD22 VSS VSS AR20 G18 VSS VSS R6
F27 VTT VCC_EXP U7 AF27 VCC AD24 AR24 G20 R9
VCC_EXP VSS VSS VSS VSS
G23 VTT U8 AG24 VCC AD27 VSS VSS AR32 G21 VSS VSS T2
H23 VTT VCC_EXP U13 V19 VCC AD29 AR37 G24 T42
VSS VSS VSS VSS
J23 VTT VCC_EXP V5 V20 VCC AD33 VSS VSS AR39 G27 VSS VSS U12
C K23 VTT VCC_EXP V6 V21 VCC AD35 VSS VSS AR43 G29 VSS VSS U14 C
L23 VTT VCC_EXP V7 V22 VCC AD37 VSS VSS AR6 G3 VSS VSS U29
M23 VTT VCC_EXP V9 V23 VCC AD42 VSS VSS AT12 G31 VSS VSS U3
A24 VTT VCC_EXP AE3 V25 VCC AD7 VSS VSS AT17 G32 VSS VSS U31
N23 VTT VCC_EXP V10 V27 VCC AD9 VSS VSS AT18 G35 VSS VSS U33
C26 VTT VCC_EXP V13 W17 VCC AE19 VSS VSS AT21 G38 VSS VSS U36
D23 VTT VCC_EXP Y13 W18 VCC AE21 VSS VSS AT23 G5 VSS VSS U38
D24 VTT VCC_EXP AA5 W19 VCC AE23 VSS VSS AT26 G7 VSS VSS U5
D25 VTT VCC_EXP AA13 W22 VCC AE25 VSS VSS AT27 G9 VSS VSS U9
P23 VTT VCC_EXP AC5 W24 VCC AF1 VSS VSS AT31 H12 VSS VSS V11
F23 VTT VCC_EXP AC6 Y15 VCC AF18 VSS VSS AU12 H17 VSS VSS V12
E27 VTT VCC_EXP AC13 Y17 VCC AF2 VSS VSS AU13 H26 VSS VSS V14
E26 VTT VCC_EXP AD1 Y21 VCC AF20 VSS VSS AU15 H27 VSS VSS V2
E24 VTT VCC_EXP AD2 Y23 VCC AF22 VSS VSS AU17 H32 VSS VSS V24
E23 VTT VCC_EXP AE4 AA15 VCC AF24 VSS VSS AU20 J10 VSS VSS V26
C25 VTT VCC_EXP N11 AA17 VCC AF3 VSS VSS AU21 J12 VSS VSS V29
C23 VTT AA18 VCC AF33 VSS VSS AU24 J2 VSS VSS V34
2D5V_DAC B26 VTT AA19 VCC AF36 VSS VSS AU26 J21 VSS VSS V36
B25 VTT AA20 VCC AF38 VSS VSS AU29 J24 VSS VSS V37
AB17 VCC AG30 VSS VSS AU6 J43 VSS VSS V43
VCCA_DPLLB B19 VCCA_DPLLB AB19 VCC AG31 AU9 J5 V8
VCCA_SMPLL VSS VSS VSS VSS
VCCA_SMPLL B20 AB20 VCC AG33 VSS VSS AV10 J7 VSS VSS W21
VCCA_HPLL C21 VCCA_HPLL AB24 VCC AG36 VSS VSS AV17 K10 VSS VSS W23
VCCA_DPLLA C19 VCCA_DPLLA AB25 VCC AG37 AV2 K12 W25
VSS VSS VSS VSS
2D5V_MCH C18 VCCA_DAC AB26 VCC AG38 VSS VSS AV37 K13 VSS VSS W3
B18 VCCA_DAC AB27 VCC AG39 VSS VSS AW10 K15 VSS VSS Y12
D19 VCC2 7 OF 7 AH42 VSS VSS AY1 K20 VSS VSS Y14
AJ10 VSS VSS B11 K27 VSS VSS Y2
lakeport1202_wshs AJ30 B13 K3 Y20
VSS VSS VSS VSS
VCCA_EXPPLL B17 VCCA_EXPPLL AJ31 VSS VSS B21 K32 VSS VSS Y22
A18 VSSA_DAC 6 OF 7 AJ33 VSS VSS B22 K34 VSS VSS Y24
lakeport1202_wshs AJ7 B38 K5 Y31
1D5V_CORE 1D5V_CORE 1D5V_CORE VSS VSS VSS VSS
AK24 VSS VSS B4 K6 VSS VSS Y35
B
AK26 VSS VSS B6 K7 VSS VSS Y37 B
page. 265 AK29 B9 L12 Y39
VSS VSS VSS VSS
AK30 BA4 L13 Y42
*
L13 L0805 1uH R247 0.5 VCCA_EXPPLL C140 C141 VSS VSS VSS VSS
AL1 VSS VSS BA42 L2 VSS VSS Y5
1
from GMCH to 1st cap must be less than 1 inch
0805 +/-20% R0603 +/-1%
C138 C139
2D5V_MCH 2D5V_DAC
* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
AL10
AL12
VSS
VSS
VSS
VSS
BB11
BB14
L24
L26
VSS
VSS
VSS
VSS
Y6
Y9
* 10uF
* 0.1uF FB1 2 1+/-25% 2D5V_DAC C0603 C0603 AL13 BB19 L29
2
+-10% 25V, X7R, +/-10% VSS VSS VSS
Dummy Dummy AL15 VSS VSS BB3 L31 VSS
C1206h18 C0603 FB L0805 180 Ohm EC38 C142 C143 C144 AL18 BB34 L42
VSS VSS VSS
1
0805
* 100uF
16V, +/-20% * 0.1uF
25V, X7R, +/-10% * 10nF
* 0.1uF
25V, X7R, +/-10%25V, Y5V, +80%/-20% LP_DDR2_PAE LP_DDR2_PAE
CE20D50H110 C0603 C0603 C0603 lakeport1202_wshs
2
double check in new CRB or DG Dummy Double check high-frequency requirements for GMCH in new DG or CRB lakeport1202_wshs
*
C0603
C145
L14 VCCA_HPLL
1206 L1206 10uH Dummy 1D5V_CORE 1D5V_CORE
+/-20% C146 2D5V_DAC Filter
1
FB15 FB L0805 600 Ohm * * 0.1uF

25V, X7R, +/-10%
*
10V, X5R, +/-10%
C0603 C147 C148

2
1
1uF
Dummy * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
C0603 C0603
2
2
*
L15 1206+/-20% VCCA_DPLLA Dummy Dummy

L1206 10uH Dummy 1D5V_CORE from GMCH to 1st cap must be less than 1 inch 1D5V_PE_GMCH
EC39 C149
*
L33 1 2 * 220uF
6.3V, +/-20% * 0.1uF
25V, X7R, +/-10%
L16Dummy
1206 L1206 0.1uH
1D5V_PE_GMCH
place GMCH backside
1D5V_CORE
Place in 1D5V_CORE plane as close to the GMCH as possible
CE20D50H110 C0603 CP5 EC40 C150 C151 C152
L0805 10uH
1
2 1 * 220uF
6.3V, +/-20% * 10uF
10V, Y5V, +80%/-20% * 10uF
* 0.1uF
10V, Y5V, +80%/-20%
25V, X7R, +/-10%
X_COPPER CE20D50H110 C0805 C0805 C0603 EC41 C153 C155 C156 C157
2
*
1
L17 Dummy VCCA_DPLLB FB2 Dummy * 1000uF
* 10uF
* 10uF
* 0.1uF
* 0.1uF
*
L1206 10uH 1206+/-20% L0805 0.1uH 1D8V_STR Connect ground sides of caps with traces to GND balls 6.3V, +/-20% 10V, Y5V, +80%/-20% 10V, Y5V, +80%/-20% 25V, X7R, +/-10% 25V, X7R, +/-10%
EC42 C159 co-layout with inductor (less than 100 mils from the package) CE35D80H200 C0805 C0805 C0603 C0603
2
L34 1 2 L0805 10uH * 220uF
6.3V, +/-20% * 0.1uF
25V, X7R, +/-10%
0805 +/-20% Dummy
PCI Express Filter
Dummy
CE20D50H110 C0603
C160 C161 C162 EC43 1D5V_CORE Decoupling
1
A
FSB_VTT
Place in FSB_VTT plane as close to the GMCH as possible
(less than 100 mils from the package) * 0.1uF
25V, X7R, +/-10% * 2.2uF
C0603 * 0.1uF *
25V, X7R, +/-10%
1000uF
6.3V, +/-20%
A
C0603 C0603 CE35D80H200

2
*
C0603
C163
L18 L1206 10uH VCCA_SMPLL

+/-20% Dummy
C164
1
FB16
* FB L0805 600 Ohm
* * 0.1uF EC44 C169 C165 C166 C167 C168 C170
1
25V, Y5V, +80%/-20% * 100uF

* 10uF
* 10uF
* 10uF
* 0.1uF
* 0.1uF
* 0.1uF C171 C172 C173
1
1
10V, X5R, +/-10%
C0603 16V, +/-20%

Dummy 10V, Y5V, +80%/-20% 10V, Y5V, +80%/-20% 10V, Y5V, +80%/-20%
25V, X7R, +/-10%
25V, X7R, +/-10%25V, X7R, +/-10%
* 2.2uF
* 2.2uF
* 0.1uF
2
2
1uF
Dummy CE20D50H110 C0805 C0805 C0805 C0603 C0603 C0603 C0603 C0603 25V, X7R, +/-10%
FOXCONN PCEG
2
Dummy Dummy C0603

2
FSB_VTT Decoupling Title
from GMCH to 1st cap must be less than 1 inch. GMCH Memory Decoupling
Grantsdale GMCH -3
If 0.5 Ohm, +/- 1%, R0603 is not easy get, you could replace by 0 Ohm, +/- 1%, R0603. Size Document Number Rev
C 945M03 A

5 4 3 2 1
5 4 3 2 1
1D8V_STR
3D3V_SYS
191
194
181
175
170
197
172
187
184
178
189
238
51
56
62
72
75
78
53
59
64
69
67
DIMM1
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
15 M_DQS_P_A[7..0] 2 7 M_DQS_P_A0
VSS DQS<0> M_DQS_P_A1
5 VSS DQS<1> 16
15 M_DQM_A[7..0] 8 28 M_DQS_P_A2
D VSS DQS<2> M_DQS_P_A3 D
11 VSS DQS<3> 37
15 M_DQS_N_A[7..0] 14 84 M_DQS_P_A4
17 VSS DQS<5> 93
15 M_MD_A[63..0] 20 105 M_DQS_P_A6
23 VSS DQS<7> 114
15,19 M_CKE_A[1..0] 26 VSS DQS<8> 46
29 VSS
15 M_CK_P_A[2..0] 32 125 M_DQM_A0
VSS DM0/DQS9 M_DQM_A1
35 VSS DM1/DQS10 134
15 M_CK_N_A[2..0] 38 146 M_DQM_A2
15,19 M_CSJ_A[1..0] 44 202 M_DQM_A4
15,19 M_BS_A[2..0] 50 223 M_DQM_A6
15,19 M_MA_A[13..0] 66 VSS DM8/DQS17 164
79 VSS
15,19 M_ODT_A[1..0] 82 6 M_DQS_N_A0
VSS DQS#<0> M_DQS_N_A1
85 VSS DQS#<1> 15
88 27 M_DQS_N_A2
91 VSS DQS#<3> 36
94 83 M_DQS_N_A4
97 VSS DQS#<5> 92
100 104 M_DQS_N_A6
103 VSS DQS#<7> 113
106 VSS DQS#<8> 45
109 VSS
112 VSS NC/DQS9# 126
115 VSS NC/DQS10# 135
1D8V_STR 118 147
VSS NC/DQS11#
121 VSS NC/DQS12# 156
124 VSS NC/DQS13# 203
127 VSS NC/DQS14# 212
130 VSS NC/DQS15# 224
133 VSS NC/DQS16# 233
136 VSS NC/DQS17# 165
R248 C175 139 VSS
1
C 1K
+/-1% * 0.1uF 142
145
VSS
VSS
DQ<0>
DQ<1>
3
4
M_MD_A0
M_MD_A1
C
R0603 C0603 148 9 M_MD_A2

2
VSS DQ<2> M_MD_A3

C0603 151 VSS DQ<3> 10
DDRVREFA 154 122 M_MD_A4
VSS DQ<4> M_MD_A5
157 VSS DQ<5> 123
160 128 M_MD_A6
R249 C174 VSS DQ<6> M_MD_A7
163 VSS DQ<7> 129
1
1K
+/-1% * 0.1uF 166
169
VSS
VSS
DQ<8>
DQ<9>
12
13
M_MD_A8
M_MD_A9
R0603 C0603 198 21 M_MD_A10
2
VSS DQ<10> M_MD_A11

C0603 201 VSS DQ<11> 22
204 131 M_MD_A12
VSS DQ<12> M_MD_A13
207 VSS DQ<13> 132
210 140 M_MD_A14
VSS DQ<14> M_MD_A15
213 VSS DQ<15> 141
216 24 M_MD_A16
VSS DQ<16> M_MD_A17
219 VSS DQ<17> 25
222 30 M_MD_A18
VSS DQ<18> M_MD_A19
18 DDRVREFA 225 VSS DQ<19> 31
228 143 M_MD_A20
VSS DQ<20> M_MD_A21
231 VSS DQ<21> 144
234 149 M_MD_A22
VSS DQ<22> M_MD_A23
237 VSS DQ<23> 150
33 M_MD_A24
DQ<24> M_MD_A25
18 RC1 DQ<25> 34
55 39 M_MD_A26
DDRVREFA RC0 DQ<26> M_MD_A27
1 VREF DQ<27> 40
SMB_CLK_MAIN 120 152 M_MD_A28
7,18,35 SMB_CLK_MAIN SCL DQ<28>
SMB_DATA_MAIN 119 153 M_MD_A29
7,18,35 SMB_DATA_MAIN SDA DQ<29>
101 158 M_MD_A30
SA2 DQ<30> M_MD_A31
240 SA1 DQ<31> 159
239 80 M_MD_A32
SA0 DQ<32> M_MD_A33
DQ<33> 81
M_CSJ_A0 193 86 M_MD_A34
M_CSJ_A1 S0# DQ<34> M_MD_A35
76 S1# DQ<35> 87
199 M_MD_A36
M_BS_A0 DQ<36> M_MD_A37
B
71 BA0 DQ<37> 200 B
M_BS_A1 190 205 M_MD_A38
M_BS_A2 BA1 DQ<38> M_MD_A39
54 A16/BA2 DQ<39> 206
M_MA_A0 188 89 M_MD_A40
M_MA_A1 A0 DQ<40> M_MD_A41
183 A1 DQ<41> 90
M_MA_A2 63 95 M_MD_A42
182 A3 DQ<43> 96
M_MA_A4 61 208 M_MD_A44
60 A5 DQ<45> 209
M_MA_A6 180 214 M_MD_A46
58 A7 DQ<47> 215
M_MA_A8 179 98 M_MD_A48
177 A9 DQ<49> 99
M_MA_A10 70 107 M_MD_A50
M_MA_A11 A10/AP DQ<50> M_MD_A51
57 A11 DQ<51> 108
M_MA_A12 176 217 M_MD_A52
M_MA_A13 A12 DQ<52> M_MD_A53
196 A13 DQ<53> 218
174 226 M_MD_A54
A14 DQ<54> M_MD_A55
173 A15 DQ<55> 227
110 M_MD_A56
M_CASJ_A DQ<56> M_MD_A57
15,19 M_CASJ_A 74 CAS# DQ<57> 111
M_RASJ_A 192 116 M_MD_A58
15,19 M_RASJ_A RAS# DQ<58>
M_WEJ_A 73 117 M_MD_A59
15,19 M_WEJ_A WE# DQ<59>
68 229 M_MD_A60
NC1 DQ<60> M_MD_A61
102 NC/TEST DQ<61> 230
19 235 M_MD_A62
M_ODT_A0 NC2 DQ<62> M_MD_A63
195 ODT0 DQ<63> 236
M_ODT_A1 77 ODT1 M_CKE_A0
42 CB<0> CKE0 52
43 171 M_CKE_A1
CB<1> CKE1 M_CK_P_A0
48 CB<2> CK0 185
49 186 M_CK_N_A0
CB<3> CK0# M_CK_P_A1
161 CB<4> CK1/RFU 137
162 138 M_CK_N_A1
CB<5> CK1#/RFU M_CK_P_A2
167 CB<6> CK2/RFU 220
168 221 M_CK_N_A2
CB<7> CK2#/RFU
A DDR II A
FOXCONN PCEG
Title
DIMM D DDRII-A1,A2
C 945M03 A

5 4 3 2 1
5 4 3 2 1
1D8V_STR
3D3V_SYS
191
194
181
175
170
197
172
187
184
178
189
238
51
56
62
72
75
78
53
59
64
69
67
DIMM2
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
15 M_DQS_P_B[7..0] 2 7 M_DQS_P_B0
VSS DQS<0> M_DQS_P_B1
5 VSS DQS<1> 16
15 M_DQM_B[7..0] 8 28 M_DQS_P_B2
D VSS DQS<2> M_DQS_P_B3 D
11 VSS DQS<3> 37
15 M_DQS_N_B[7..0] 14 84 M_DQS_P_B4
17 VSS DQS<5> 93
15 M_MD_B[63..0] 20 105 M_DQS_P_B6
23 VSS DQS<7> 114
15,19 M_CKE_B[1..0] 26 VSS DQS<8> 46
29 VSS
32 125 M_DQM_B0
VSS DM0/DQS9 M_DQM_B1
15,19 M_CSJ_B[1..0] 35 VSS DM1/DQS10 134
38 146 M_DQM_B2
15,19 M_BS_B[2..0] 41 VSS DM3/DQS12 155
44 202 M_DQM_B4
15,19 M_MA_B[13..0] 47 VSS DM5/DQS14 211
50 223 M_DQM_B6
15,19 M_ODT_B[1..0] 65 VSS DM7/DQS16 232
79 VSS
15 M_CK_P_B[2..0] 82 6 M_DQS_N_B0
VSS DQS#<0> M_DQS_N_B1
85 VSS DQS#<1> 15
15 M_CK_N_B[2..0] 88 27 M_DQS_N_B2
91 VSS DQS#<3> 36
94 83 M_DQS_N_B4
97 VSS DQS#<5> 92
100 104 M_DQS_N_B6
103 VSS DQS#<7> 113
106 VSS DQS#<8> 45
109 VSS
112 VSS NC/DQS9# 126
115 VSS NC/DQS10# 135
118 VSS NC/DQS11# 147
121 VSS NC/DQS12# 156
124 VSS NC/DQS13# 203
127 VSS NC/DQS14# 212
130 VSS NC/DQS15# 224
133 VSS NC/DQS16# 233
136 VSS NC/DQS17# 165
139 VSS
C 142 3 M_MD_B0 C
VSS DQ<0> M_MD_B1
145 VSS DQ<1> 4
148 9 M_MD_B2
VSS DQ<2> M_MD_B3
151 VSS DQ<3> 10
DDRVREFA 154 122 M_MD_B4
VSS DQ<4> M_MD_B5
157 VSS DQ<5> 123
160 128 M_MD_B6
VSS DQ<6> M_MD_B7
163 VSS DQ<7> 129
2
* C176
0.1uF * C177
0.1uF
166
169
VSS
VSS
DQ<8>
DQ<9>
12
13
M_MD_B8
M_MD_B9
198 21 M_MD_B10
1
VSS DQ<10> M_MD_B11

201 VSS DQ<11> 22
204 131 M_MD_B12
VSS DQ<12> M_MD_B13
207 VSS DQ<13> 132
210 140 M_MD_B14
VSS DQ<14> M_MD_B15
213 VSS DQ<15> 141
216 24 M_MD_B16
VSS DQ<16> M_MD_B17
219 VSS DQ<17> 25
222 30 M_MD_B18
VSS DQ<18> M_MD_B19
225 VSS DQ<19> 31
228 143 M_MD_B20
VSS DQ<20> M_MD_B21
231 VSS DQ<21> 144
234 149 M_MD_B22
VSS DQ<22> M_MD_B23
237 VSS DQ<23> 150
33 M_MD_B24
DQ<24> M_MD_B25
18 RC1 DQ<25> 34
55 39 M_MD_B26
DDRVREFA RC0 DQ<26> M_MD_B27
17 DDRVREFA 1 VREF DQ<27> 40
SMB_CLK_MAIN 120 152 M_MD_B28
7,17,35 SMB_CLK_MAIN SCL DQ<28>
SMB_DATA_MAIN 119 153 M_MD_B29
7,17,35 SMB_DATA_MAIN SDA DQ<29>
101 158 M_MD_B30
SA2 DQ<30> M_MD_B31
240 SA1 DQ<31> 159
3D3V_SYS 239 80 M_MD_B32
SA0 DQ<32> M_MD_B33
DQ<33> 81
M_CSJ_B0 193 86 M_MD_B34
M_CSJ_B1 S0# DQ<34> M_MD_B35
76 S1# DQ<35> 87
199 M_MD_B36
M_BS_B0 DQ<36> M_MD_B37
B
71 BA0 DQ<37> 200 B
M_BS_B1 190 205 M_MD_B38
M_BS_B2 BA1 DQ<38> M_MD_B39
54 A16/BA2 DQ<39> 206
M_MA_B0 188 89 M_MD_B40
M_MA_B1 A0 DQ<40> M_MD_B41
183 A1 DQ<41> 90
M_MA_B2 63 95 M_MD_B42
182 A3 DQ<43> 96
M_MA_B4 61 208 M_MD_B44
60 A5 DQ<45> 209
M_MA_B6 180 214 M_MD_B46
58 A7 DQ<47> 215
M_MA_B8 179 98 M_MD_B48
177 A9 DQ<49> 99
M_MA_B10 70 107 M_MD_B50
M_MA_B11 A10/AP DQ<50> M_MD_B51
57 A11 DQ<51> 108
M_MA_B12 176 217 M_MD_B52
M_MA_B13 A12 DQ<52> M_MD_B53
196 A13 DQ<53> 218
174 226 M_MD_B54
A14 DQ<54> M_MD_B55
173 A15 DQ<55> 227
110 M_MD_B56
M_CASJ_B DQ<56> M_MD_B57
15,19 M_CASJ_B 74 CAS# DQ<57> 111
M_RASJ_B 192 116 M_MD_B58
15,19 M_RASJ_B RAS# DQ<58>
M_WEJ_B 73 117 M_MD_B59
15,19 M_WEJ_B WE# DQ<59>
68 229 M_MD_B60
NC1 DQ<60> M_MD_B61
102 NC/TEST DQ<61> 230
19 235 M_MD_B62
M_ODT_B0 NC2 DQ<62> M_MD_B63
195 ODT0 DQ<63> 236
M_ODT_B1 77 ODT1
42 CB<0> CKE0 52 M_CKE_B0 15,19
43 CB<1> CKE1 171 M_CKE_B1 15,19
48 CB<2> CK0 185 M_CK_P_B0 15
49 CB<3> CK0# 186 M_CK_N_B0 15
161 CB<4> CK1/RFU 137 M_CK_P_B1 15
162 CB<5> CK1#/RFU 138 M_CK_N_B1 15
167 CB<6> CK2/RFU 220 M_CK_P_B2 15
168 CB<7> CK2#/RFU 221 M_CK_N_B2 15
A DDR II A
FOXCONN PCEG
Title
DIMM D DDRII-B1,B2
C 945M03 A
Date: Thursday, July 13, 2006 Sheet of 40

5 4 3 2 1
5 4 3 2 1
channel A channel B
D D
15,17 M_CKE_A[1..0]
15,18 M_CKE_B[1..0]
15,17 M_CSJ_A[1..0]
15,18 M_CSJ_B[1..0]
15,17 M_BS_A[2..0]
15,18 M_BS_B[2..0]
15,17 M_MA_A[13..0]
15,18 M_MA_B[13..0]
15,17 M_ODT_A[1..0]
15,18 M_ODT_B[1..0]
VTT_DDR
VTT_DDR
Pls change the value to 47ohm
if used in sis project
Pls change the value to 47ohm
if used in sis project R250 39 +/-5% R0402 M_ODT_B0
R252 39 +/-5% R0402 M_ODT_B1
R251 39 +/-5% R0402 M_ODT_A0
R253 39 +/-5% R0402 M_ODT_A1
R260 39 +/-5% R0402 M_CSJ_B0

R259 39 +/-5% R0402 M_CSJ_B1
R258 39 +/-5% R0402 M_CSJ_A0
R263 39 +/-5% R0402 M_CSJ_A1
R266 39 +/-5% R0402 M_CKE_B0

R270 39 +/-5% R0402 M_CKE_B1
R268 39 +/-5% R0402 M_CKE_A0
R267 39 +/-5% R0402 M_CKE_A1
R274 33 +/-5% R0402 M_BS_B2

C R276 33 +/-5% R0402 M_BS_B1 C
R275 33 +/-5% R0402 M_BS_A2 R278 33 +/-5% R0402 M_BS_B0
R277 33 +/-5% R0402 M_BS_A1 R282 33 +/-5% R0402 M_CASJ_B
M_CASJ_B 15,18
R279 33 +/-5% R0402 M_BS_A0 R281 33 +/-5% R0402 M_WEJ_B
M_WEJ_B 15,18
R280 33 +/-5% R0402 M_CASJ_A R283 33 +/-5% R0402 M_RASJ_B
M_CASJ_A 15,17 M_RASJ_B 15,18
R285 33 +/-5% R0402 M_WEJ_A R288 33 +/-5% R0402 M_MA_B10
M_WEJ_A 15,17
R284 33 +/-5% R0402 M_RASJ_A R287 33 +/-5% R0402 M_MA_B13
M_RASJ_A 15,17
R286 33 +/-5% R0402 M_MA_A10
R289 33 +/-5% R0402 M_MA_A13 RN2
*1 2 33
M_MA_B3
M_MA_B2
3 4
RN1
*1 2 33
M_MA_A3
M_MA_A2 5 6
+/-5%
8P4R0402
M_MA_B1
M_MA_B0
3 4 +/-5% M_MA_A1 7 8
5 6 8P4R0402
7 8
8P4R0402
8P4R0402
M_MA_A0 RN4
*1 2 33
M_MA_B5
M_MA_B8
3 4
RN3
*1 2 33
M_MA_A5
M_MA_A8 5 6
+/-5%
8P4R0402
M_MA_B6
M_MA_B4
3 4 +/-5% M_MA_A6 7 8
5 6 8P4R0402
7 8
8P4R0402
8P4R0402
M_MA_A4 RN6
*1 2 33
M_MA_B12
M_MA_B11
3 4
RN5
*1 2 33
M_MA_A12
M_MA_A11 5 6
+/-5%
8P4R0402
M_MA_B7
M_MA_B9
3 4 +/-5% M_MA_A7 7 8
5 6 8P4R0402
8P4R0402 M_MA_A9
7 8
8P4R0402
VTT_DDR VTT_DDR
VTT_DDR VTT_DDR
B B
C0805
C186
C0805
C187
C178 0.1uF C0603
C179 0.1uF C0603
C180 0.1uF C0603
C181 0.1uF C0603
C182 0.1uF C0603
C183 0.1uF C0603
C184 0.1uF C0603
C185 0.1uF C0603
C0805
C196
C0805
C197
C188 0.1uF C0603
C189 0.1uF C0603
C190 0.1uF C0603
C191 0.1uF C0603
C192 0.1uF C0603
C193 0.1uF C0603
C194 0.1uF C0603
C195 0.1uF C0603

1
* * * * * * * * * *
1
* * * * * * * * * *
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

2
2
4.7uF
4.7uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

2
2
C0603
C0603
C0603
C0603
C0603
C0603
C0603
C0603
4.7uF
4.7uF
C0603
C0603
C0603
C0603
C0603
C0603
C0603
C0603
Dummy
Dummy
Dummy
Dummy
1D8V_STR
1D8V_STR
C0603
C198
C0603
C199
C0603
C200
C0603
C201
C0603
C202
C0603
C203
C0603
C204
C0603
C205
C0603
C206
C0603
C207
C0603
C208
C0603
C209
C0603
C210
C0603
C211
C0603
C212
C0603
C213
1
* * * * * * * *
1
1
* * * * * * * *
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%

2
2
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%
10V, X5R, +/-10%

A A
2
2
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
FOXCONN PCEG
Title
DDRII A & B Term
C 945M03 A

5 4 3 2 1
5 4 3 2 1
12V_SYS 3D3V_SYS 3D3V_DUAL
C214 C215 C216

* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
C0603 C0603 C0603
3D3V_DUAL3D3V_SYS 12V_SYS 12V_SYS 3D3V_SYS
PCI-E1-16X1
D D
12V_SYS 3D3V_SYS
B1 12V PRSNT1# A1
B2 12V 12V A2
EC47 EC45 B3 A3
RSVD1 12V
* 470uF
16V, +/-20% ? * 1000uF
6.3V, +/-20%
B4
B5
GND GND A4
A5
CE35D80H200 CE35D80H200 22,25,26,28,35 SMB_CLK_RESUME SMCLK JTAG2
22,25,26,28,35 SMB_DATA_RESUME B6 SMDAT JTAG3 A6
B7 GND JTAG4 A7
B8 3.3V JTAG5 A8
B9 JTAG1 3.3V A9
B10 3.3VAUX 3.3V A10
WAKEJ B11 A11 ICH_G_PLTRSTJ
22,26 WAKEJ WAKE# PWRGD ICH_G_PLTRSTJ 26,34
All AC Coupling caps. should be placed within 250 mils of the connector KEY
B12 RSVD2 GND A12
B13 A13 CK_PE_100M_P_16PORT
GND REFCLK+ CK_PE_100M_P_16PORT 7
C0603 EXP_TXP0_C B14 A14 CK_PE_100M_N_16PORT
14 EXP_TXP0 CK_PE_100M_N_16PORT 7
*
C217 0.1uF 25V, Y5V, +80%/-20% C0603 EXP_TXN0_C HSOP0 REFCLK-
14 EXP_TXN0 B15 A15
*
C218 0.1uF 25V, Y5V, +80%/-20% HSON0 GND
@945G @945P @945PL B16 GND HSIP0 A16 EXP_RXP0 14,22
SDVO_CTRLCLK @945G @945P @945PL B17 A17
14 SDVO_CTRLCLK PRSNT2_B17# HSIN0 EXP_RXN0 14,22
B18 GND GND A18
C0603 EXP_TXP1_C B19 A19

14 EXP_TXP1
*
C219 0.1uF 25V, Y5V, +80%/-20% C0603 EXP_TXN1_C HSOP1 RSVD5

14 EXP_TXN1 B20 A20
*
C220 0.1uF 25V, Y5V, +80%/-20% HSON1 GND
@945G @945P @945PL B22 GND HSIN1 A22 EXP_RXN1 14,22
14 EXP_TXP2
*
C221 0.1uF 25V, Y5V, +80%/-20% C0603 EXP_TXN2_C HSOP2 GND

14 EXP_TXN2 B24 A24
*
C230 0.1uF 25V, Y5V, +80%/-20% HSON2 GND
@945G @945P @945PL B26 GND HSIN2 A26 EXP_RXN2 14,22
14 EXP_TXP3
*
C222 0.1uF 25V, Y5V, +80%/-20% C0603 EXP_TXN3_C HSOP3 GND

14 EXP_TXN3 B28 A28
*
C223 0.1uF 25V, Y5V, +80%/-20% HSON3 GND
@945G @945P @945PL B30 RSVD3 HSIN3 A30 EXP_RXN3 14,22
SDVO_CTRLDATA B31 A31
14 SDVO_CTRLDATA PRSNT2_B31# GND
C B32 GND RSVD6 A32 C
C0603 B33 A33

14 EXP_TXP4
*
C224 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP4 RSVD

14 EXP_TXN4 B34 A34
*
C225 0.1uF 25V, Y5V, +80%/-20% HSON4 GND
@945G @945P @945PL B35 GND HSIP4 A35 EXP_RXP4 14
@945G @945P @945PL B36 GND HSIN4 A36 EXP_RXN4 14
C0603 B37 A37
14 EXP_TXP5
*
C226 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP5 GND

14 EXP_TXN5 B38 A38
*
C227 0.1uF 25V, Y5V, +80%/-20% HSON5 GND
C0603 B41 A41
14 EXP_TXP6
*
C228 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP6 GND

14 EXP_TXN6 B42 A42
*
C229 0.1uF 25V, Y5V, +80%/-20% HSON6 GND
C0603 B45 A45
14 EXP_TXP7
*
C231 0.1uF 25V, Y5V, +80%/-20% @945G @945P

C0603
@945PL HSOP7 GND
14 EXP_TXN7 B46 A46
*
C232 0.1uF 25V, Y5V, +80%/-20% HSON7 GND
14 GMCH_EXP_EN_HDR B48 PRSNT2_B48# HSIN7 A48 EXP_RXN7 14
B49 GND GND A49
C233 C0603 B50 A50

14 EXP_TXP8
*
0.1uF 25V, Y5V, +80%/-20% C0603 HSOP8 RSVD7

14 EXP_TXN8 B51 A51
*
C234 0.1uF 25V, Y5V, +80%/-20% HSON8 GND

C0603 B54 A54
14 EXP_TXP9
*
C235 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP9 GND

14 EXP_TXN9 B55 A55
*
C236 0.1uF 25V, Y5V, +80%/-20% HSON9 GND

C0603 B58 A58
14 EXP_TXP10
*
C237 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP10 GND

14 EXP_TXN10 B59 A59
*
C238 0.1uF 25V, Y5V, +80%/-20% HSON10 GND

C0603 B62 A62
14 EXP_TXP11
*
C239 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP11 GND

*
C240 0.1uF 25V, Y5V, +80%/-20% HSON11 GND

C0603 B66 A66
14 EXP_TXP12
*
B
C241 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP12 GND B
*
C242 0.1uF 25V, Y5V, +80%/-20% HSON12 GND

C0603 B70 A70
14 EXP_TXP13
*
C243 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP13 GND

*
C244 0.1uF 25V, Y5V, +80%/-20% HSON13 GND

C0603 B74 A74
14 EXP_TXP14
*
C245 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP14 GND

*
C246 0.1uF 25V, Y5V, +80%/-20% HSON14 GND

C0603 B78 A78
14 EXP_TXP15
*
C247 0.1uF 25V, Y5V, +80%/-20% C0603 HSOP15 GND

*
C248 0.1uF 25V, Y5V, +80%/-20% HSON15 GND

@945G @945P @945PL B81 PRSNT2_B81# HSIN15 A81 EXP_RXN15 14
B82 RSVD4 GND A82
Slot_PCI-EXPRESS
All AC Coupling caps. should be placed within 250 mils of the connector
pcie164_x16_rmh196
945G, 945P, 945PL PCIEX16

945GZ PCIEX4
@945G@945P@945PL
22 EXP_TXN0_C
22 EXP_TXP0_C
22 EXP_TXN1_C
22 EXP_TXP1_C
A A
22 EXP_TXN2_C
22 EXP_TXP2_C
22 EXP_TXN3_C
22 EXP_TXP3_C
FOXCONN PCEG
Title
PCI Express x16 Gfx Slot
C 945M03 A

5 4 3 2 1
5 4 3 2 1
FAB.B
1, Dummy C249, C254, C259
2, Change L19, L21, L23 to Res 0 Ohm
3, Change C252, C255, C260 to 10pF
D 4, Change L20, L22, L24 to inductor 47nH D
for VGA SI issue
L19
L20
RED 2 1 2 1
14 RED
*
5V_SYS
5V_SYS 5V_SYS 0
R290 +/-5% L0603 47nH
150 R0603
*
C249 +/-1% C252 C253
@945G@945GZ
1
C250 C251 1 2
* 10pF R0603
* 22pF
* 22pF F1
50V, NPO, +/-5%

2D5V_MCH
1
@945G@945GZ @945G@945GZ
* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
C0603
Dummy
50V, NPO, +/-5%
C0603
50V, NPO, +/-5%
C0603
F1813_1.5A
2
C0603 C0603 D9 @945G@945GZ @945G@945GZ @945G@945GZ
2
@945G@945GZ @945G@945GZ BAV99
@945G@945GZ
L21
L22
L_RED
EMI cap. for RGB layer change GREEN 2 1 2 1 L_GREEN
14 GREEN
*
L_BLUE
0
+/-5% L0603 47nH
C254 R291 R0603 C255 C256 VGA
1
VGA
* 10pF 150
* 22pF
* 22pF
50V, NPO, +/-5%

@945G@945GZ
1 2 2D5V_MCH C0603 +/-1% 50V, NPO, +/-5% 50V, NPO, +/-5% 5V_DDCA_CLK 15 SCL GND 5
@945G@945GZ
RGB routing Dummy R0603 C0603 C0603 5V_DDCA_DATA 10 GND
2
C
1. from GMCH to the first 150 ohm resistor: 7.5 mils(min. 6 mils spacing ) D10
@945G@945GZ @945G@945GZ 14 VSYNC ID0 4 C
9 NC
2. from the first 150 ohm res. to the second 150 ohm resistor: 4 mils BAV99 @945G@945GZ 13 HSYNC B 3
3. from the second 150 ohm resistor to connector: 4 mils 8 GND
12 SDA G 2
4. spacing minimum 6 mils, 30 mils spacing is recommended @945G@945GZ
7 GND
5. R,G,B should be length matched to 700 mils, max. length is 8400 mils L23
11 ID1 R 1
6. R,G,B signals should be ground referenced L24
C257 6 GND
BLUE 2 1 2 1
* 0.1uF
25V, Y5V, +80%/-20% DZ11AA1-HW7-4F
16
17
14 BLUE
*
C0603 @945G@945GZ
0 @945G@945GZ
+/-5% L0603 47nH
C259 R293 R0603 C260 C258
1
* 10pF 150
* 22pF
* 22pF
50V, NPO, +/-5%

3D3V_SYS 2D5V_MCH 3D3V_SYS 5V_SYS 1 2 C0603 +/-1%
@945G@945GZ
50V, NPO, +/-5% 50V, NPO, +/-5%
2D5V_MCH @945G@945GZ
Dummy R0603 C0603 C0603
2
@945G@945GZ @945G@945GZ
R292 R294 D11
0 0 BAV99 @945G@945GZ
+/-5% R0603
R295 R296 +/-5% R297 R298
2.2K 2.2K R0603 2.2K 2.2K @945G@945GZ
Dummy
+/-5% +/-5% @945G@945GZ +/-5% +/-5%
R0603 R0603 R0603 R0603
Dummy Dummy @945G@945GZ@945G@945GZ The 150 Ohm resistors near VGA connector and
G
Q41 2N7002 minimizing length to filter. The filters to VGA

R299
DDCA_CLK 100 5V_DDCA_CLK connector maximum distance 800 mils.
14 DDCA_CLK S D
+/-1%
SOT23_GSD @945G@945GZ
R0603
G
@945G@945GZ
R300
DDCA_DATA S D 100 5V_DDCA_DATA
14 DDCA_DATA
+/-1% 5V_VSYNC
R0603
@945G@945GZ
@945G@945GZ
Q42 5V_HSYNC
B 2N7002 B
SOT23_GSD C261 C262
BOM need update
* 22pF
50V, NPO, +/-5% * 22pF
50V, NPO, +/-5%
C0603 C0603
@945G@945GZ @945G@945GZ
FAB.B
C261, C262 change from 10pF to 22pF
5V_SYS 3D3V_SYS
R301 R302
0 0 FAB.B
+/-5% +/-5%
U13 R0603 R0603 Dummy R301, Stuff R302
1 5 Dummy @945G@945GZ
OE# VCC
2 A
3 4 5V_VSYNC
GND Y
NC7SZ125
@945G@945GZ R303
0
14 VSYNC
C263 Dummy +/-5%
3
R0603 @945G@945GZ
A 1 2 D12 2 1 A
*
BAV99
@945G@945GZ
U14 0.1uF @945G@945GZ
1 C0603 5 D13 2 1
OE# VCC
25V, Y5V, +80%/-20% BAV99
2
3
A
3 4 5V_HSYNC
GND Y
NC7SZ125
@945G@945GZ R304
FOXCONN PCEG
0 Title
14 HSYNC
Dummy +/-5%
R0603 VGA Connector
C 945M03 A

5 4 3 2 1
5 4 3 2 1
GPIO[39:36,23:21,19,7:0]: default as inputs and should be

pulled up to Vcc3_3 if unused.
GPIO[31:29,15:8]: default as inputs and should be pulled up to
VccSus3_3 if unused.
U11F
ICH7
double check unused GPIO
DMI_TXN0 V26 DMI0RXN USBP0N F1 USBP0N pins
14 DMI_TXN0 USBP0N 30
DMI_TXP0 V25 DMI0RXP USBP0P F2 USBP0P
14 DMI_TXP0 USBP0P 30
DMI_RXN0 U28 DMI0TXN USBP1N G4 USBP1N
14 DMI_RXN0 DMI_RXP0 USBP1P USBP1N 30
14 DMI_RXP0 U27 DMI0TXP USBP1P G3 USBP1P 30 U11C
DMI_TXN1 Y26 DMI1RXN USBP2N H1 USBP2N
14 DMI_TXN1 USBP2N 30
DMI_TXP1 DMI1RXP USBP2P USBP2P SIO PME change to GPIO8
14 DMI_TXP1
DMI_RXN1
Y25
W28 DMI1TXN USBP3N
H2
J4 USBP3N USBP2P 30 ICH7
D 14 DMI_RXN1 USBP3N 30 31,34 L_AD[3..0] D
DMI
DMI_RXP1 W27 DMI1TXP USBP3P J3 USBP3P
14 DMI_RXP1 DMI_TXN2 USBP4N USBP3P 30 ICH7_GPIO0
14 DMI_TXN2 AB26 DMI2RXN USBP4N K1 USBP4N 30 AA5 LDRQ1*/GPIO23 GPIO0/BM_BUSY* AB18
DMI_TXP2 AB25 DMI2RXP USBP4P K2 USBP4P L_AD0 AA6 LAD0 GPIO6 AC21 ICH7_GPIO6
14 DMI_TXP2 USBP4P 30 THROT 34
DMI_RXN2 AA28 DMI2TXN USBP5N L4 USBP5N L_AD1 AB5 LAD1 GPIO7 AC18 ICH7_GPIO7
14 DMI_RXN2 USBP5N 29 FWH_WPJ 31
LPC
DMI_RXP2 AA27 DMI2TXP USBP5P L5 USBP5P L_AD2 AC4 LAD2 GPIO8 E21 L_PMEJ
14 DMI_RXP2 DMI_TXN3 USBP6N USBP5P 29 L_AD3 ICH7_GPIO9 L_PMEJ 34
14 DMI_TXN3 AD25 DMI3RXN USBP6N M1 USBP6N 30 Y6 LAD3 GPIO9 E20
DMI_TXP3 AD24 DMI3RXP USBP6P M2 USBP6P AC3 LDRQ0* GPIO10 A20 ICH7_GPIO10
14 DMI_TXP3 USBP6P 30 34 L_DRQ0J
DMI_RXN3 AC28 DMI3TXN USBP7N N4 USBP7N AB3 LFRAME* GPIO12 F19 ICH7_GPIO12
14 DMI_RXN3 DMI_RXP3 USBP7P USBP7N 29 31,34 L_FRAMEJ ICH7_GPIO13
14 DMI_RXP3 AC27 DMI3TXP USBP7P N3 USBP7P 29 GPIO13 E19 WOLJ 28
USB
R310 33 U1 ACZ_BCLK GPIO14 R4 ICH7_GPIO14 AFP_DETECT 33
32 ICH_BCLK ICH7_GPIO15
32 ICH_RSTJ R5 ACZ_RST* GPIO15 E22
AUDIO
R311 0 @945GZ F26 PERN_1 OC0* D3 T2 ACZ_SDI_0 GPIO16/DPRSLPVR AC22 BOARD0
14,20 EXP_RXN0 R312 0 @945GZ USB_OCJ_FRONT_2 30 BOARD1
14,20 EXP_RXP0 F25 PERP_1 OC1* C4 T3 ACZ_SDI_1 GPIO18/STPPCI* AC20
C264 0.1uF @945GZ E28 PETN_1 OC2* D5 T1 ACZ_SDI_2 GPIO20/STPCPU* AF21 BOARD2
20 EXP_TXN0_C
** ** ** ** **
C267 0.1uF @945GZ 32 ICH_SDIN2 R305 33 ACZ_SDOUT
20 EXP_TXP0_C E27 PETP_1 OC3* D4 USB_OCJ_BACK 30 32 ICH_SDOUT T4 ACZ_SDOUT GPIO24 R3
R313 0 @945GZ H26 PERN_2 OC4* E5 R315 33 ACZ_SYNC R6 ACZ_SYNC GPIO25 D20
14,20 EXP_RXN1 R314 0 @945GZ 32 ICH_SYNC ICH7_GPIO26
14,20 EXP_RXP1 H25 PERP_2 OC5*/GPIO29 C3 7 CK_14M_ICH AC1 CLK14 EL_RSVD/GPIO26 A21 DDR_VOL_1.9V 10
C268 0.1uF @945GZ G28 PETN_2 OC6*/GPIO30 A2 EL_STATE0/GPIO27 B21 ICH7_GPIO27
20 EXP_TXN1_C SYS_VOL_1.6V 11
EPROM
C265 0.1uF @945GZ USB_OCJ_FRONT_1 30 ICH7_GPIO28
20 EXP_TXP1_C G27 PETP_2 OC7*/GPIO31 B3 USB_OCJ_BACK_LAN 29 W1 EE_CS EL_STATE1/GPIO28 E23 SYS_VOL_1.7V 11
R306 0 @945GZ K26 PERN_3 W3 EE_DIN GPIO32/CLKRUN* AG18 TP_ICH7_GPIO32
14,20 EXP_RXN2 TP41
R307 0 @945GZ K25 PERP_3 Y2 EE_DOUT GPIO33/AZ_DOCK_EN* AC19
14,20 EXP_RXP2 C270 0.1uF @945GZ USBRBIAS_ICH R316 22.6 ICH_BCLK CBLID_P 23
J28 PETN_3 USBRBIAS D1 Y1 EE_SHCLK GPIO34/AZ_DOCK_RST* U2
PCI-EXPRESS
20 EXP_TXN2_C
C269 0.1uF @945GZ J27 PETP_3 USBRBIAS* D2 GPIO35 AD21
20 EXP_TXP2_C
R308 0 @945GZ M26 PERN_4 V3 LAN_CLK GPIO38 AD20 ICH7_GPIO38
14,20 EXP_RXN3 R309 0 @945GZ C272 ICH7_GPIO39 FWH_TBLJ 31
14,20 EXP_RXP3 M25 PERP_4 U3 LAN_RSTSYNC GPIO39 AE20
20 EXP_TXN3_C
20 EXP_TXP3_C
C271
C266
0.1uF @945GZ
0.1uF @945GZ
L28
L27
PETN_4
PETP_4 CLK48 B2 CK_48M_ICH
CK_48M_ICH 7
* 22pF R317
50V, NPO, +/-5%
10K ICH_LAN_RSTJ
+/-5%
C19
U5
LAN_RST*
LAN_RXD0
CPUPWRGD_GPIO49 AG24 CPU_PWRG 12
PERN_5 C0603 R0603 LAN_RXD1 THRM* ICH_THRM_UP
LAN
26 HSI_N5 P26 V4 AF20 ICH_THRM_UP 34
P25 PERP_5 T5 LAN_RXD2 VRMPWRGD AD22 ICH_VRMPWRGD_UP
MISC
26 HSI_P5 C506 0.1uF USBRBIAS connection
26 HSO_N5_SLOT N28 PETN_5 U7 LAN_TXD0 MCH_SYNC* AH20 ICH_SYNCJ 14
C507 0.1uF N27 PETP_5 5 mils width, length no longer than 500 mils V6 LAN_TXD1 PWRBTN* C23
26 HSO_P5_SLOT Trace tied together close to pins. ICH_RIJ_PU PWRBTNJ 34
T25 PERN_6 V7 LAN_TXD2 RI* A28 ICH_RIJ_PU 36
T24 PERP_6 SUS_STAT* A27 LPCPDJ
PETN_6 ICH_RTCX1 RTCX1 SUSCLK TP_SUSCLK VCCRTC
RTC
R28 AB1 C20 TP42
1D5V_PE_ICH R27 PETP_6 ICH_RTCX2 AB2 RTCX2 SYS_RST* A22
R318 RTCRSTJ PLTRSTJ ICH_SYS_RSTJ 7,12,37
23,37 RTCRSTJ AA3 RTCRST* PLTRST* C26 PLTRSTJ 14,31,34
24.9 DMI_COMP_ICH C25 DMI_ZCOMP WAKE* F20 WAKEJ
+/-1% 3D3V_DUAL SMB_ALERT_PU WAKEJ 20,26 R319
C D25 DMI_IRCOMP B23 SMBALERT*/GPIO11 INTRUDER* Y5 INTRUDERJ 37 C
R0603 C22 SMBCLK PWROK AA4 390K
CK_PE_100M_N_ICH 20,25,26,28,35 SMB_CLK_RESUME RSMRSTJ PWRGD_3V 14,34 +/-5%
7 CK_PE_100M_N_ICH AE28 DMI_CLKN 20,25,26,28,35 SMB_DATA_RESUME B22 SMBDATA RSMRST* Y4
CK_PE_100M_P_ICH DMI_CLKP 2 of 6 R320 10K LINKALERT* INTVRMEN INTVRMEN R0603
SMB
7 CK_PE_100M_P_ICH AE27 A26 W4
R322 10K B25 SMLINK0 SPKR A19 SPKR
DMI compensation SPKR 32,37 check pull-up resistor
ICH7_652 R321 10K SMLINK1
5 mils width, 7 mils spacing 1 3D3V_SYS
A25
SLP_S3* B24
Place the resistor within 500 mils of ICH7 ICH_SPI_MOSI SLP_S3J 34
P5 SPI_MOSI SLP_S4* D23 SLP_S4J 10
ICH_SPI_MISO SPI_MISO SLP_S5*
SPI
P2 F22
R104 4.7K @945GZ ACZ_SDOUT ICH_SPI_CSJ P6 SPI_CS*
R109 4.7K @945GZ ACZ_SYNC ICH_SPI_CLK R2 SPI_CLK TP0/BATLOW* C21 ICH_BATLOW_PU
TP43 SPI_ARB P1 SPI_ARB TP1/DPRSTP* AF24 TP_ICH7_AF24
TP44
TP2/DPSLP* AH25 TP_ICH7_AH25
TP46
TP3 TP_ICH7_F21
4 of 6 F21 TP45
FAB.B ICH7_652
ADD R104, R109 for 4X pin strap 1
V input high voltage min:0.65*VCC3
3D3V_DUAL
VCCRTC
31 FWH_WPJ
ICH_RTCX2
ICH7_GPIO9 R323 10K
WP_EN
ICH_RTCX1 R0603 +/-5%
R325 1 Dummy SPI ICH7_GPIO10 R324 10K
ICH_SPI_WPJ 0 FWH_WPJ 1 ICH_SPI_CSJ R0603 +/-5%
2 2 3D3V_SYS 1 Dummy 2
+/-5% 3 3 ICH_SPI_HOLDJ 3 4 ICH_SPI_MISO INTRUDERJ R326 1M ICH7_GPIO12 R327 10K
R0603 ICH_SPI_CLK 5 6 R0603 +/-5% R0603 +/-5%
R329 Dummy ICH_SPI_MOSI 7 8 ICH7_GPIO13 R328 10K
10M Header_1X3 3D3V_SYS R0603 +/-5%
+/-5% H3M Header_2X4 ICH7_GPIO14 R330 10K
R0603 SPI R0603 +/-5%
ICH7_GPIO6 R332 10K ICH7_GPIO15 R331 10K
JP1 R0603 +/-5% R0603 +/-5%
B B
X2 JP12 SPI WP# ICH7_GPIO39 R333 10K
XTAL-32.768kHz ICH7_GPIO7 R334 10K R0603 +/-5%
X2ML R0603 +/-5% WAKEJ R335 1K
* Jumper_2P-Blue
Unlock (1-2) Default
SPI Interface
RN7 LPCPDJ
R0603
R336
+/-5%
1K
C273 C274 N/A Lock (2-3) ICH7_GPIO38
*
1 2 R0603 +/-5%
18pF
50V, NPO, +/-5% * * 18pF
50V, NPO, +/-5%
Dummy ICH_VRMPWRGD_UP
ICH_THRM_UP
3
5
4
6
ICH_BATLOW_PU R337
R0603
10K
+/-5%
C0603 C0603 ICH7_GPIO0 7 8 SMB_ALERT_PU R338 10K
R0603 +/-5%
L_PMEJ R340 10K
10K R0603 +/-5%
U12, U27 Co-layout 8P4R0603 ICH7_GPIO26 R347 10K
+/-5% R0603 +/-5%
3D3V_DUAL ICH7_GPIO27 R348 10K
Assume Capastor CL value is 12.5 U15 R339 0 ICH_VRMPWRGD_UP R0603 +/-5%
ICH_SPI_CSJ 8 VRM_PWRGD R0603 +/-5% Dummy ICH7_GPIO28 R355 10K
8 VCC CE# 1
ICH_SPI_HOLDJ 7 2 R0603 +/-5%
3D3V_DUAL HOLD# SO ICH_SPI_WPJ
6 SCK WP# 3
5 4 3D3V_DUAL
X2_1 SI GND 3D3V_DUAL 3D3V_SYS
SST25VF020SOP8JA
close to ICH7 Dummy Dummy C275
1
R342 R343 R344 * 0.1uF

25V, Y5V, +80%/-20% R345 R346 R349 R350 R351
R341
4.7K
Crystal Retainer 10K 10K 10K C0603 3.3K 3.3K 10K 10K 10K +/-5%
2
N/A +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% R0603
R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603
This clip is for ICH7 Dummy Dummy ICH_SPI_HOLDJ Dummy Dummy Dummy
U16 Dummy Dummy RSMRSTJ
32.768Khz Crystal clip. 34 RSMRSTJ
8 Dummy
VCC CE# 1
ICH_SPI_CSJ 7 HOLD# SO 2 C276
1
ICH_SPI_CLK R352 ICH_SPI_WPJ BOARD2
ICH_SPI_MOSI R353
47
47
+/-5% Dummy
+/-5% Dummy
6 SCK WP#
5 SI GND
3
4 BOARD1 * 1uF
10V, X5R, +/-10%
ICH_SPI_MISO BOARD0 C0603
2
CLIP6 CLIP5 R354 SST25LF040A Dummy
close to ICH7 within 100 mils 47 Dummy SOP8JG
A +/-5% A
R0603 SPI Population Options R357 R358 R359 gpio16 not pull high
10K 10K 10K
Clip_2P Clip_2P +/-5% +/-5% +/-5%
hb9603eh80 hb9603eh80 R0603 R0603 R0603
This is for ICH7 heatsink hook. Dummy Dummy Dummy
FOXCONN PCEG
Title
ICH7 -1
C 945M03 A

5 4 3 2 1
5 4 3 2 1
U11B 1
ICH7 SATA_TXP0 C278 10nF1 C0402
2 25V, X7R, +/-10% SATA_TXP0_C 2
** **
SATA_TXN0 C277 10nF1 C0402
2 25V, X7R, +/-10% SATA_TXN0_C 3 8
PIDE_D0 AB15 DD0 SATA0RXN AF3 SATA_RXN0 4 SATA_1 3D3V_SYS
PIDE_D1 AE14 DD1 SATA0RXP AE3 SATA_RXP0 SATA_RXN0 C279 10nF1 C0402
2 25V, X7R, +/-10% SATA_RXN0_C 5 9 SATA
PIDE_D2 AG13 DD2 SATA0TXN AG2 SATA_TXN0 SATA_RXP0 C280 10nF1 C0402
2 25V, X7R, +/-10% SATA_RXP0_C 6 SATA7_LD18
PIDE_D3 AF13 DD3 SATA0TXP AH2 SATA_TXP0 7
D RSVD/SATA1RXN D
PIDE_D4 AD14 DD4 AE5 SATA_RXN1
PIDE_D5 AC13 DD5 RSVD/SATA1RXP AD5 SATA_RXP1 1
PIDE_D6 AD12 DD6 RSVD/SATA1TXN AG4 SATA_TXN1 SATA_TXP1 C282 10nF1 C0402
2 25V, X7R, +/-10% SATA_TXP1_C 2
** **
PIDE_D7 AC12 DD7 RSVD/SATA1TXP AH4 SATA_TXP1 SATA_TXN1 C281 10nF1 C0402
2 25V, X7R, +/-10% SATA_TXN1_C 3 8 SATA_2 R360 R361
PIDE_D8 AE12 DD8 SATA2RXN AF7 SATA_RXN2 4 SATA 8.2K 4.7K
PIDE_D9 SATA_RXP2 SATA_RXN1 SATA_RXN1_C
SATA
AF12 DD9 SATA2RXP AE7 C283 10nF1 C0402
2 25V, X7R, +/-10% 5 9 SATA7_LD18 +/-5% +/-5%
PIDE_D10 AB13 DD10 SATA2TXN AG6 SATA_TXN2 SATA_RXP1 C284 10nF1 C0402
2 25V, X7R, +/-10% SATA_RXP1_C 6 R0603 R0603
PIDE_D11 DD11 SATA2TXP SATA_TXP2
IDE
AC14 AH6 7
PIDE_D12 AF14 DD12 RSVD/SATA3RXN AD9 SATA_RXN3
PIDE_D13 AH13 DD13 RSVD/SATA3RXP AE9 SATA_RXP3
PIDE_D14 AH14 DD14 RSVD/SATA3TXN AG8 SATA_TXN3 PIDE
PIDE_D15 AC15 DD15 RSVD/SATA3TXP AH8 SATA_TXP3 P_IDERSTJ 1 2
SATACLKN AF1 CK_SATA_100M_N_ICH PIDE_D7 3 4 PIDE_D8
CK_SATA_100M_N_ICH 7
PIDE_DAKJ AF16 DDACK* SATACLKP AE1 CK_SATA_100M_P_ICH PIDE_D6 5 6 PIDE_D9
CK_SATA_100M_P_ICH 7
PIDE_DREQ AE15 DDREQ PIDE_D5 7 8 PIDE_D10
PIDE_IORJ AF15 DIOR* PIDE_D4 9 10 PIDE_D11
PIDE_IOWJ AH15 DIOW* SATARBIASN AH10 SATARBIAS_ICH R362 24.9 PIDE_D3 11 12 PIDE_D12
PIDE_RDY AG16 IORDY SATARBIAS connection PIDE_D2 PIDE_D13
SATARBIASP AG10 SATA_LED PIDE_D1
13 14
PIDE_D14
PIDE_A0 DA0 SATALED* AF18 R363 5 mils width, length no longer than 500 mils
PIDE_D0
15 16
PIDE_D15
AH17 Trace tied together close to pins. 17 18
PIDE_A1 AE17 DA1 GPIO21/SATA0GP AF19 3D3V_SYS 19 X
PIDE_A2 AF17 DA2 GPIO19/SATA1GP AH18 PIDE_DREQ 21 22
GPIO36/SATA2GP AH19 PIDE_IOWJ 23 24 Cable detection
PIDE_CS1J 10K PIDE_IORJ high: 40-conductor cable(ATA 33)
AE16 DCS1* GPIO37/SATA3GP AE19 25 26
PIDE_CS3J AD16 +/-5% PIDE_RDY 27 28 low: 80-conductor cable(ATA 66/100)
DCS3*
A20GATE AE22 A20GATE 34
R0603 PIDE_DAKJ 29 30
A20M* AH28 A20MJ 12
IRQ14 31 32
IRQ14 AH16 IDEIRQ CPUSLP* AG27 PIDE_A1 33 34 CBLID_P 22
IGNNE* AG22 IGNNEJ 12 1 PIDE_A0 35 36 PIDE_A2
INIT3_3V* AG21 SATA_TXP2 C285 10nF1 C0402
2 25V, X7R, +/-10% SATA_TXP2_C 2 PIDE_CS1J 37 38 PIDE_CS3J
INITJ_3D3V 31
** **
HOST
INIT* AF22 SATA_TXN2 C286 10nF1 C0402

2 25V, X7R, +/-10% SATA_TXN2_C 3 8 SATA_3 PIDE_LED 39 40
INITJ 12
INTR AF25 4 SATA
INTR 12
FERR* AG26 FERRJ SATA_RXN2 C287 10nF1 C0402
2 25V, X7R, +/-10% SATA_RXN2_C 5 9 SATA7_LD18 Header_2X20_20 (IDE) C289 R364
FERRJ 12
SATA_RXP2 25V, X7R, +/-10% SATA_RXP2_C
NMI
RCIN*
AH24
AG23
NMI
KBRSTJ
12
34
C288 10nF1 C0402
2 6
7
* 47nF
16V, X7R, +/-10%
10K
+/-5%
SERIRQ AH21 HDD1 C0603 R0603
SERIRQ 34
SMI* AF23 SMIJ 12 1 Dummy
C STPCLK* AH22 SATA_TXP3 C290 10nF1 C0402
2 25V, X7R, +/-10% SATA_TXP3_C 2 C
STPCLKJ 12
** **
3 of 6 THERMTRIP* AF26 THERMTRIPJ
THERMTRIPJ 12
SATA_TXN3 C291 10nF1 C0402
2 25V, X7R, +/-10% SATA_TXN3_C 3 8 SATA_4
SATA
4
SATA_RXN3 C292 10nF1 C0402
2 25V, X7R, +/-10% SATA_RXN3_C 5 9 SATA7_LD18
1
ICH7_652 ? SATA_RXP3 C293 10nF1 C0402
2 25V, X7R, +/-10% SATA_RXP3_C 6
7 IDE data lines should be matched to strobes(IORJ, RDY)within +/- 250 mils,
strobes should be matched to their complement within +/- 10 mils
FSB_VTT
R365 62 THERMTRIPJ
R367
33 P_IDERSTJ
34 IDE_RSTJ +/-5%
R366 62 FERRJ R0603
C294
1
placed near IDE connector
Place at ICH7 end of route * 0.1uF
25V, Y5V, +80%/-20%
C0603
2
Dummy
C295
* 1uF
10V, X5R, +/-10%
C0603
B B
3D3V_SYS
R368 R369
10K 10K
+/-5% +/-5%
R0603 R0603
PIDE_LED 2 1
3D3V_DUAL
D14
VCCRTC 1N4148W
SOD123 HDD_LEDJ 37
D15
2 width 20 mils SATA_LED 2 1
3
1 D16
1N4148W
R370 SOD123
BAT54C 20K
SOT23_123 +/-1%
R0603
BATT1 C296
R371
1K * 1uF
10V, X5R, +/-10%
LITHIUM BATT +/-5% C0603 RTCRSTJ
CR2032
R0603 RTCRSTJ 22,37
1
Battery
* C297
+
A N/A BAT1 1uF A

10V, X5R, +/-10%
+
2
Socket_
For battery cell. C0603
Battery Holder
-
FOXCONN PCEG
Title
ICH7 -2
C 945M03 A

5 4 3 2 1
5 4 3 2 1
U11E
U11D
FAB.B ICH7
U11A ICH7
1, Dummy R689 1D5V_CORE
ICH7 1D5V_CORE REF5V E4 VSS VSS A4
AD[31..0] AG11 VSS VSS A23
AD[31..0] 25,28
A1 VCC1_5_A C27 VSS VSS B1
25,28 PAR PAR E10 PAR AD0 E18 AD0 AB10 VCC1_5_A V5REF AD17 R14 VSS VSS B8
1
25,28 DEVSELJ DEVSELJ A12 DEVSEL* AD1 C18 AD1 AB17 VCC1_5_A V5REF G10 R15 VSS VSS B11
7 CK_33M_ICH A9 PCICLK AD2 A16 AD2 AB7 VCC1_5_A REF5V_SUS L25 R16 VSS VSS B14
25,28,34 PCIRSTJ R689 0
Dummy B18 PCIRST* AD3 F18 AD3 AB8 VCC1_5_A V5REF_SUS F6 VCCRTC L0805 10uH R17 VSS VSS B17
25,28 IRDYJ IRDYJ A7 IRDY* AD4 E16 AD4 AB9 VCC1_5_A R18 VSS VSS B20
2
PMEJ B19 PME* AD5 A18 AD5 AC10 VCC1_5_A VCCRTC W5 1D5V_CORE T6 VSS VSS B26
25
25,28
PMEJ
SERRJ SERRJ
STOPJ
B10
F15
SERR*
STOP*
PCI AD6
AD7
E17
A17
AD6
AD7
AC17
AC6
VCC1_5_A
VCC1_5_A VCCUSBPLL C1
T12
T13
VSS
VSS
VSS
VSS
B28
C2
25,28 STOPJ
25 LOCKJ LOCKJ E11 PLOCK* AD8 A15 AD8 AC7 VCC1_5_A T14 VSS VSS C6
25,28 TRDYJ TRDYJ F14 TRDY* AD9 C14 AD9 AC8 VCC1_5_A VCCSATAPLL AD2 VCCSATAPLL T15 VSS VSS D10
25,28 PERRJ PERRJ C9 PERR* AD10 E14 AD10 AD10 VCC1_5_A T16 VSS VSS D13
25,28 FRAMEJ FRAMEJ F16 FRAME* AD11 D14 AD11 AD6 VCC1_5_A VCCDMIPLL AG28 VCCDMIPLL C298 C301 T17 VSS VSS D18
1
AD12 AD12 1D05V_ICH
D GNT0J E7 GNT0* AD13
B12
C13 AD13
AE10
AE6
VCC1_5_A
VCC1_5_A VCC1_05 L11
* 10uF
10V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
U4
U12
VSS
VSS
VSS
VSS
D21
D24 D
25 GNT1J D16 GNT1* AD14 G15 AD14 AF10 VCC1_5_A VCC1_05 L12 C0805 C0603 U13 VSS VSS E1
2
25 GNT2J D17 GNT2* AD15 G13 AD15 AF5 VCC1_5_A VCC1_05 L14 U14 VSS VSS E2
28 GNT3J F13 GNT3* AD16 E12 AD16 AF6 VCC1_5_A VCC1_05 L16 U15 VSS VSS E8
GNT4J A14 GNT4*/GPIO48 AD17 C11 AD17 AF9 VCC1_5_A VCC1_05 L17 U16 VSS VSS E15
GNT5J D8 GNT5*/GPIO17 AD18 D11 AD18 AG5 VCC1_5_A VCC1_05 L18 U17 VSS VSS F3
AD19 A11 AD19 AG9 VCC1_5_A VCC1_05 M11 U24 VSS VSS F4
25 PREQ0J D7 REQ0* AD20 A10 AD20 AH5 VCC1_5_A VCC1_05 M18 U25 VSS VSS F5
25 PREQ1J C16 REQ1* AD21 F11 AD21 AH9 VCC1_5_A VCC1_05 P11 U26 VSS VSS F12
25 PREQ2J C17 REQ2* AD22 F10 AD22 F17 VCC1_5_A VCC1_05 P18 V2 VSS VSS F27
25,28 PREQ3J E13 REQ3* AD23 E9 AD23 G17 VCC1_5_A VCC1_05 T11 V13 VSS VSS F28
25 PREQ4J A13 REQ4*/GPIO22 AD24 D9 AD24 H6 VCC1_5_A VCC1_05 T18 1D5V_CORE V15 VSS VSS G1
25 PREQ5J C8 GPIO1/REQ5* AD25 B9 AD25 H7 VCC1_5_A VCC1_05 U11 V24 VSS VSS G5
AD26 A8 AD26 J6 VCC1_5_A VCC1_05 U18 V27 VSS VSS G2
25,28 INTAJ A3 PIRQA* AD27 A6 AD27 J7 VCC1_5_A VCC1_05 V11 V28 VSS VSS G6
25 INTBJ B4 PIRQB* AD28 C7 AD28 1D5V_PE_ICH T7 VCC1_5_A VCC1_05 V12 W6 VSS VSS G9
25 INTCJ C5 PIRQC* AD29 B6 AD29 VCC1_05 V14 W24 VSS VSS G14
25 INTDJ B5 PIRQD* AD30 E6 AD30 D26 VCC1_5_B VCC1_05 V16 C299 C300 W25 VSS VSS G18
1
GPIO2/PIRQE* AD31 AD31
25
25
INTEJ
INTFJ
G8
F7 GPIO3/PIRQF*
D6 D27
D28
VCC1_5_B
VCC1_5_B
VCC1_05
VCC1_05
V17
V18
* 0.1uF
* 0.1uF W26
Y3
VSS
VSS
VSS
VSS
G21
G24
25 INTGJ F8 GPIO4/PIRQG* C/BE0* B15 CBEJ0 E24 VCC1_5_B C0603 C0603 Y24 VSS VSS G25
2
CBEJ1 CBEJ0 25,28 FSB_VTT
25 INTHJ G7 GPIO5/PIRQH* C/BE1* C12 CBEJ1 25,28 E25 VCC1_5_B Dummy Dummy Y27 VSS VSS G26
C/BE2* D12 CBEJ2 E26 VCC1_5_B V_CPU_IO AE23 Y28 VSS VSS H3
1 of 6 C/BE3* C15 CBEJ3 CBEJ2 25,28
VCC1_5_B V_CPU_IO VSS VSS
POWER
CBEJ3 25,28 F23 AE26 AA1 H4
3D3V_SYS F24 VCC1_5_B V_CPU_IO AH26 3D3V_SYS AA24 VSS VSS H5
1 G22 VCC1_5_B AA25 VSS VSS H24
ICH7_652 FAB.B G23 VCC1_5_B VCC3_3 A5 AA26 VSS VSS H27
Dummy R592 H22 VCC1_5_B VCC3_3 AA7 close AD2, C1 AB4 VSS VSS H28
GNT5J GNT4J BOOT 4.7K ok H23 VCC1_5_B VCC3_3 AB12 AB6 VSS VSS J1
0 1 SPI GNT5J R372 2.2K GNT4J R592 8.2K Dummy J22 VCC1_5_B VCC3_3 AB20 AB11 VSS VSS J2
1 0 PCI +/-5% Dummy +/-5% J23 VCC1_5_B VCC3_3 AC16 AB14 VSS VSS J5
1 1 LPC K22 VCC1_5_B VCC3_3 AD13 AB16 VSS VSS J24
GNT0J R619 8.2K K23 VCC1_5_B VCC3_3 AD18 AB19 VSS VSS J25
+/-5% L22 VCC1_5_B VCC3_3 AG12 AB21 VSS VSS J26
V input low voltage max: 0.3*VCC3 L23 VCC1_5_B VCC3_3 AG15 AB24 VSS VSS K24
PAGE 284 extra one 47uF(backside) in DG0.7 M22 VCC1_5_B VCC3_3 AG19 AB27 VSS VSS K27
M23 VCC1_5_B VCC3_3 AH11 AB28 VSS VSS K28
N22 VCC1_5_B VCC3_3 B13 AC2 VSS VSS L13
N23 VCC1_5_B VCC3_3 B16 AC5 VSS VSS L15
1D05V_ICH 1D5V_CORE P22 VCC1_5_B VCC3_3 B27 AC9 VSS VSS L24
P23 VCC1_5_B VCC3_3 B7 AC11 VSS VSS L25
R22 VCC1_5_B VCC3_3 C10 AD1 VSS VSS L26
R23 VCC1_5_B VCC3_3 D15 AD3 VSS VSS M3
1D5V_CORE R24 VCC1_5_B VCC3_3 F9 AD4 VSS VSS M4
C302 C303 C304 C305 VCC1_5_B VCC3_3 VSS VSS
VCCDMIPLL LRC Filter
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
R25 G11 AD7 M5

1
* 0.1uF
C0603 * 10nF
25V, X7R, +/-10% * 0.1uF
C0603 * 0.1uF
C0603
R26
T22
VCC1_5_B
VCC1_5_B
VCC3_3
VCC3_3
G12
G16
AD8
AD11
VSS
VSS
VSS
VSS
M12
M13
C0603 T23 VCC1_5_B VCC3_3 U6 3D3V_DUAL AD15 VSS VSS M14
2
T26 VCC1_5_B VCCSUS3_3 A24 AD19 VSS VSS M15

*
L26 1206 VCCDMIPLL T27 VCC1_5_B VCCSUS3_3 C24 AD23 VSS VSS M16
C +/-10% L1206 1uH C
T28 VCC1_5_B VCCSUS3_3 D19 AE2 VSS VSS M17
C306 C307 U22 VCC1_5_B VCCSUS3_3 D22 AE4 VSS VSS M24
1
Rated at least 100mA

* 10uF
+-10% * 0.1uF
25V, Y5V, +80%/-20%
U23
V22
VCC1_5_B
VCC1_5_B
VCCSUS3_3
VCCSUS3_3
E3
G19
AE8
AE11
VSS
VSS
VSS
VSS
M27
M28
C1206h18 C0603 V23 VCC1_5_B VCCSUS3_3 K3 AE13 VSS VSS N1
2
ICH7 Core decoupling caps. W22 VCC1_5_B VCCSUS3_3 K4 AE18 VSS VSS N2
W23 VCC1_5_B VCCSUS3_3 K5 AE21 VSS VSS N5
Y22 VCC1_5_B VCCSUS3_3 K6 AE24 VSS VSS N6
Y23 VCC1_5_B VCCSUS3_3 L1 AE25 VSS VSS N11
Place LRC near pin AG28 AA22 VCC1_5_B VCCSUS3_3 L2 AF2 VSS VSS N12
AA23 VCC1_5_B VCCSUS3_3 L3 AF4 VSS VSS N13
AB22 VCC1_5_B VCCSUS3_3 L6 AF8 VSS VSS N14
AB23 VCC1_5_B VCCSUS3_3 L7 AF11 VSS VSS N15
AC23 VCC1_5_B VCCSUS3_3 M6 AF27 VSS VSS N16
1D5V_PE_ICH 3D3V_SYS AC24 VCC1_5_B VCCSUS3_3 M7 AF28 VSS VSS N17
AC25 VCC1_5_B VCCSUS3_3 N7 AG1 VSS VSS N18
1D5V_CORE AC26 VCC1_5_B VCCSUS3_3 P7 AG3 VSS VSS N24
AD26 VCC1_5_B VCCSUS3_3 R7 AG7 VSS VSS N25
C308 C309 C310 C311 VCC1_5_B VCCSUS3_3 VSS VSS
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
L27 AD27 V1 AG14 N26

* 0.1uF
C0603 * 0.1uF
C0603 * 0.1uF
C0603 * 0.1uF
25V, Y5V, +80%/-20% 2 1
VCC1_5_B LC Filter AD28 VCC1_5_B VCCSUS3_3
VCCSUS3_3
V5
W2
AG17
AG20
VSS
VSS
VSS
VSS
P12
P13
C0603 VCCSUS3_3 W7 AG25 VSS VSS P14
L1206 0.47uH AH1 VSS VSS P15
VCCSUS1_05 AA2 TP_ICH7_AA2 AH3 VSS VSS P3
TP48
L28 2 1FB L0603 47 Ohm 1D5V_PE_ICH VCCSUS1_05 C28 TP_ICH7_C28 VSS P4
TP47
0603 +/-25% VCCSUS1_05 G20 TP_ICH7_G20 VSS P16
TP49
Dummy EC48 C312 VCCSUS1_05 K7 TP_ICH7_K7 AH7 VSS VSS P17
TP51
Place near B27
*
470uF
16V, +/-20% * 0.1uF
25V, Y5V, +80%/-20% 5 of 6 VCCSUS1_05 Y7 TP_ICH7_Y7
TP50 AH23
AH27
VSS
VSS
VSS
VSS
P24
P27
Place near AD28, T28, D28 CE35D80H200 C0603 VSS P28
ICH7_652 VSS VSS
PCI-E decoupling caps. 1 ?
AH12
VSS
R1
R11
VSS R12
VSS R13
co-layout with inductor Place LC near pin D28 6 of 6
Rated at least 1A, ICH7_652
ESR max. 20 mohm
VCCDMIPLL
C313
1
* 10nF
25V, X7R, +/-10%
C0603
2
3D3V_SYS FSB_VTT FSB_VTT FSB_VTT

Place near AG28
B 1D5V_CORE 1D5V_CORE B
DMI decoupling caps. 5V_SB_SYS 3D3V_DUAL

C314 C315 C316 C504 C505 C317
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
1
* 0.1uF
25V, Y5V, +80%/-20% * 1uF
10V, X5R, +/-10% * 0.1uF
C0603 * 0.1uF
C0603 * 0.1uF
C0603 * 4.7uF
1
D17 C0603 C0603 C0805
2
R373 1N4148W
10 SOD123
r0603h6 REF5V_SUS
Place near AH5 Place near AH9 Place near U6
2
1D5V_CORE 1D5V_CORE +/-5%

REF5V_SUS
C320
C319
* 0.1uF
Audio decoupling caps. Place near AE23, AE26 Place near AH26
1
*
C318
0.1uF * 10nF
25V, X7R, +/-10%
25V, Y5V, +80%/-20%
C0603 3D3V_SYS VCCSATAPLL
C0603 C0603 place cap. near pin F6
2
25V, X7R, +/-10% within 40 mils CPU decoupling caps.

3D3V_SYS
V5REF_SUS / 3D3V_SB Power Sequencing
C321 C322
Place near A1 Place near C1
* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
C0603 C0603
3D3V_DUAL C323
25V, Y5V, +80%/-20%
double check in new CRB or DG * 0.1uF

C0603
Place near AH11 Place near AD2 VCCRTC
Place near AG15, AB12

C324 C325 C326 5V_SYS 3D3V_SYS C327
1
* 0.1uF
C0603
0.1uF
C0603 *
10nF
25V, X7R, +/-10% * SATA decoupling caps. * 1uF
10V, X5R, +/-10%
1
25V, X7R, +/-10%25V, X7R, +/-10%C0603 C0603

IDE decoupling caps.
2
Place near E3 R374 D18

1K 1N4148W
+/-5% SOD123
R0603
2
Place near L1 Place near K3 3D3V_SYS
REF5V 3D3V_DUAL
REF5V
Place near W5
C328
USB decoupling caps. * 0.1uF
25V, Y5V, +80%/-20%
A C0603 A
place cap. near pin AD17 C329 C330 C331 C332 C333 RTC decoupling caps.
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
within 40 mils * 0.1uF

C0603 * 0.1uF
C0603 * 0.1uF
C0603 * 0.1uF
C0603 * 0.1uF
C0603
V5REF / 3D3V_SYS Power Sequencing
Place near V1
2
Place near A5, B7, B13, B16

LAN decoupling caps.
PCI decoupling caps.
1
CN1
HS2 FOXCONN PCEG
BGA609H_118CHANGE Title
ICH7-3
Custom 945M03 A

5 4 3 2 1
5 4 3 2 1
5V_SYS
3D3V_SYS 3D3V_SYS 5V_SYS

PCI-2
-12V_SYS 5V_SYS place this slot near board edge 12V_SYS 3D3V_SYS 3D3V_SYS
-12V_SYS 5V_SYS PCI-1 12V_SYS

Note: 20-24 mils place this slot near PCI-E x1 Slot
PCI2 Slot,PCI CONN
B1 -12V TRST# A1
B2 PCI1 Slot,PCI CONN
TCK +12V A2
D
B3 GND1 TMS A3 B1 -12V TRST# A1 D
B4 TDO TDI A4 B2 TCK +12V A2
B5 +5V1 +5V2 A5 B3 GND1 TMS A3
B6 INTBJ
INTCJ +5V3 INTA# A6 INTDJ
B4 TDO TDI A4
B7 INTB# INTC# A7 B5 +5V1 +5V2 A5
INTAJ B8 INTGJ
INTD# +5V4 A8 3D3V_DUAL INTFJ
B6 +5V3 INTA# A6 INTEJ
B9 PRSNT1# RSV1 A9 B7 INTB# INTC# A7
B10 INTHJ
RSV2 +5V5 A10 B8 INTD# +5V4 A8
B11 PRSNT2# RSV3 A11 B9 PRSNT1# RSV1 A9
B12 GND2 GND3 A12 B10 RSV2 +5V5 A10
B13 3D3V_DUAL
GND4 GND5 A13 B11 PRSNT2# RSV3 A11
B14 RSV4 SB3V A14 B12 GND2 GND3 A12
B15 GND6 RESET# A15 PCIRSTJ 24,28,34 B13 GND4 GND5 A13
7 CK_33M_PCI1 B16 CLK +5V6 A16 B14 RSV4 SB3V A14
B17 GND7 GNT# A17 GNT2J 24 B15 GND6 RESET# A15 PCIRSTJ 24,28,34
PREQ2J B18 REQ# GND8 A18 7 CK_33M_PCI2 B16 CLK +5V6 A16
B19 +5V7 PCI_PME# A19 PMEJ 24 B17 GND7 GNT# A17 GNT1J 24
AD31 B20 AD30 PREQ1J
AD29 AD(31) AD(30) A20 B18 REQ# GND8 A18 PMEJ
B21 AD(29) +3.3V1 A21 B19 +5V7 PCI_PME# A19
B22 AD28 AD31 AD30
AD27 GND9 AD(28) A22 AD26 AD29
B20 AD(31) AD(30) A20
B23 AD(27) AD(26) A23 B21 AD(29) +3.3V1 A21
AD25 B24 AD28
AD(25) GND10 A24 AD24 AD27
B22 GND9 AD(28) A22 AD26
B25 +3.3V2 AD(24) A25 B23 AD(27) AD(26) A23
CBEJ3 B26 IDSEL1 IDSEL1 R375 330 AD18 AD25
24,28 CBEJ3
AD23 C/BE#(3) IDSEL A26 R0603 +/-5%
B24 AD(25) GND10 A24 AD24
B27 AD(23) +3.3V3 A27 B25 +3.3V2 AD(24) A25
B28 AD22 CBEJ3 IDSEL2 IDSEL2 R376 330 AD17
AD21 GND11 AD(22) A28 AD20 AD23
B26 C/BE#(3) IDSEL A26 R0603 +/-5%
B29 AD(21) AD(20) A29 B27 AD(23) +3.3V3 A27
AD19 B30 AD22
AD(19) GND12 A30 AD18 AD21
B28 GND11 AD(22) A28 AD20
B31 +3.3V4 AD(18) A31 B29 AD(21) AD(20) A29
AD17 B32 AD16 AD19
AD(17) AD(16) A32 B30 AD(19) GND12 A30 AD18
B33 C/BE#(2) +3.3V5 A33 B31 +3.3V4 AD(18) A31
B34 FRAMEJ AD17 AD16
24,28 CBEJ2
IRDYJ GND13 FRAME# A34 FRAMEJ 24,28
CBEJ2
B32 AD(17) AD(16) A32
24,28 IRDYJ B35 IRDY# GND14 A35 B33 C/BE#(2) +3.3V5 A33
B36 TRDYJ FRAMEJ
DEVSELJ +3.3V6 TRDY# A36 TRDYJ 24,28
IRDYJ
B34 GND13 FRAME# A34
24,28 DEVSELJ B37 DEVSEL# GND15 A37 B35 IRDY# GND14 A35
B38 STOPJ TRDYJ
LOCKJ GND16 STOP# A38 STOPJ 24,28
DEVSELJ
B36 +3.3V6 TRDY# A36
24 LOCKJ B39 LOCK# +3.3V7 A39 B37 DEVSEL# GND15 A37
PERRJ B40 PSCLK STOPJ
24,28 PERRJ PERR# SDONE A40 PSDATA LOCKJ
B38 GND16 STOP# A38
C B41 +3.3V8 SBO# A41 B39 LOCK# +3.3V7 A39
C
SERRJ B42 PERRJ PSCLK
24,28 SERRJ SERR# GND17 A42 PAR
B40 PERR# SDONE A40 PSDATA
B43 +3.3V9 PAR A43 PAR 24,28 B41 +3.3V8 SBO# A41
CBEJ1 B44 AD15 SERRJ
24,28 CBEJ1 AD14 C/BE#(1) AD(15) A44 B42 SERR# GND17 A42 PAR
B45 AD(14) +3.3V10 A45 B43 +3.3V9 PAR A43
B46 AD13 CBEJ1 AD15
AD12 GND18 AD(13) A46 AD11 AD14
B44 C/BE#(1) AD(15) A44
B47 AD(12) AD(11) A47 B45 AD(14) +3.3V10 A45
AD10 B48 AD13
AD(10) GND19 A48 AD9 AD12
B46 GND18 AD(13) A46 AD11
B49 GND20 AD(9) A49 B47 AD(12) AD(11) A47
AD10 B48 AD(10) GND19 A48 AD9
B49 GND20 AD(9) A49
AD8 B52 A52 CBEJ0
AD(8) C/BE#(0) CBEJ0 24,28
AD7 B53 A53
AD(7) +3.3V11 AD6 AD8 CBEJ0
B54 +3.3V12 AD(6) A54 B52 AD(8) C/BE#(0) A52
AD5 B55 A55 AD4 AD7 B53 A53
AD3 AD(5) AD(4) AD(7) +3.3V11 AD6
B56 AD(3) GND21 A56 B54 +3.3V12 AD(6) A54
B57 A57 AD2 AD5 B55 A55 AD4
AD1 GND22 AD(2) AD0 AD3 AD(5) AD(4)
B58 AD(1) AD(0) A58 B56 AD(3) GND21 A56
B59 A59 B57 A57 AD2
ACK64J +5V8 +5V9 REQ64_1J AD1 GND22 AD(2) AD0
B60 ACK64# REQ64# A60 B58 AD(1) AD(0) A58
B61 +5V10 +5V11 A61 B59 +5V8 +5V9 A59
B62 A62 ACK64J B60 A60 REQ64_2J
+5V12 +5V13 ACK64# REQ64#
B61 +5V10 +5V11 A61
B62 +5V12 +5V13 A62
AD[31..0]
AD[31..0] 24,28
-12V_SYS 5V_SYS 12V_SYS

3D3V_SYS
-12V_SYS 5V_SYS
PSCLK 3D3V_SYS
SMB_CLK_RESUME 20,22,26,28,35
B B
C334
* 0.1uF
25V, Y5V, +80%/-20% *
EC49
1000uF * C335
C336
0.1uF * C337
0.1uF *
C0603 6.3V, +/-20% 0.1uF 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% PSDATA C338
SMB_DATA_RESUME 20,22,26,28,35
CE35D80H200 C0603
25V, Y5V, +80%/-20%
C0603 C0603
EC52
Dummy
* * 0.1uF
25V, Y5V, +80%/-20% * C339
* C340
* C341
*
100uF C0603 0.1uF 0.1uF 0.1uF C342
C0603
25V, Y5V, +80%/-20%
C0603
25V, Y5V, +80%/-20%
C0603
25V, Y5V, +80%/-20%
CE20D50H110 0.1uF
25V, Y5V, +80%/-20%
16V, +/-20% C0603
5V_SYS
3D3V_SYS
*
1
3
2
4
RN8
8.2K
INTDJ
INTCJ
INTDJ
INTCJ
24
24
R379 2.7K REQ64_2J
5 6 +/-5% INTBJ R0603 +/-5%
INTBJ 24
7 8 8P4R0603 INTAJ 5V_SYS 3D3V_SYS
INTAJ 24,28
R380 2.7K REQ64_1J

R0603 +/-5%
*
1 2 RN9 INTGJ
INTGJ 24
C344 0.1uF 25V, Y5V, +80%/-20% C0603
*
3 4 8.2K INTEJ
INTEJ 24
5 6 +/-5% INTHJ R381 2.7K ACK64J
INTHJ 24
7 8 8P4R0603 INTFJ R0603 +/-5%
INTFJ 24
3D3V_SYS
*
1
3
2
4
RN10
8.2K
PREQ2J
PREQ0J
24
24 *
1 2 RN11 STOPJ
A 5 6 +/-5% 3 4 8.2K LOCKJ A
PREQ1J 24
7 8 8P4R0603 5 6 +/-5% PERRJ
PREQ5J 24
7 8 8P4R0603 SERRJ
R383 8.2K +/-5% R0603

PREQ4J 24
R382 8.2K +/-5% R0603
PREQ3J 24,28
*
1 2 RN12 FRAMEJ FOXCONN PCEG
3 4 8.2K IRDYJ
5 6 +/-5% TRDYJ Title
7 8 8P4R0603 DEVSELJ PCI Slots 1, 2
C
945M03 A

5 4 3 2 1
5 4 3 2 1
D D
3D3V_DUAL 3D3V_SYS 12V_SYS

12V_SYS 3D3V_SYS
PCI-E1
B1 12V PRSNT1# A1
B2 12V 12V A2
B3 RSVD 12V A3
B4 GND GND A4
20,22,25,28,35 SMB_CLK_RESUME B5 SMCLK JTAG2 A5
20,22,25,28,35 SMB_DATA_RESUME B6 SMDAT JTAG3 A6
B7 GND JTAG4 A7
B8 3.3V JTAG5 A8
B9 JTAG1 3.3V A9
B10 3.3VAUX 3.3V A10
B11 A11 ICH_G_PLTRSTJ
20,22 WAKEJ WAKE# PWRGD ICH_G_PLTRSTJ 20,34
KEY
B12 RSVD1 GND A12

B13 A13 CK_PE_100M_P_1PORT
GND REFCLK+ CK_PE_100M_N_1PORT CK_PE_100M_P_1PORT 7
22 HSO_P5_SLOT B14 HSOP0 REFCLK- A14 CK_PE_100M_N_1PORT 7
C
22 HSO_N5_SLOT B15 HSON0 GND A15 C
B16 GND HSIP0 A16 HSI_P5 22
B17 PRSNT2# HSIN0 A17 HSI_N5 22
B18 GND GND A18
PCIE-X1_SLOT
pcie36_x1A
12V_SYS 3D3V_SYS 3D3V_DUAL
C680 C681 C682

* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
C0603 C0603 C0603
12V_SYS
B B
EC77
* 470uF
16V, +/-20%
CE35D80H200
A A
FOXCONN PCEG
Title
PCIx X1
C 945M03 A

5 4 3 2 1
5 4 3 2 1
3D3V_DUAL These capacitors are for RTL8110S(B)/RTL8100C digital 3.3V pins, such as 26, 41, 56, 71, 84, 94 and 107.
FB3 FB L0805 100 Ohm
* 3D3V_LAN
EC55 C345 C346 C347 C348 C349 C350 C351 C352
1
* 100uF
16V, +/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
D CE20D50H110 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 D
2
AVDDH
@8110S@8110SB@8110SC
V_12P 28
R386 R387
FB4 FB L0805 100 Ohm 0 0 When use RT8100C,
* +/-5% +/-5% @8100C
1D8V_LAN
1D8V_LAN is 2.5V
C353 C354 R0603 R0603
1
At RTL8100C application, keep FB19;
At RTL8110S(B) application, remove
* 0.1uF
* 0.1uF @8110SB@8110SC
C355
1
C0603 C0603
* 0.1uF
2
FB19, pop Q8,EC2,C77. @8110S@8110SB@8110SC @8110S@8110SB@8110SC 25V, Y5V, +80%/-20%
C0603
2
3D3V_LAN FB5
Install@Giga
*
@8100C FB L0805 100 Ohm For RTL8110S(B)/RTL8100C pin 12
When use RT8100C, 2D5V_LAN is 3.3V
E
B Q43
28 CTRL_2D5 BCP69
These capacitors are for RTL8110S(B) analog 2.5V pins/RTL8100C
analog 3.3V pins, such as 3, 7, 16, and 20.
C
4
2D5V_LAN RTL8100C RTL8110S / RTL8110SB / RTL8110SC
C @8110S@8110SB@8110SC C356 C357 C358 C359
RTL8169S RTL8169SB C
1
*
EC56
100uF * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
AVDDH N/A 3.3AVDD 3.3AVDD 3.3AVDD
16V, +/-20% C0603 C0603 C0603 C0603
2
CE20D50H110 @8110S@8110SB@8110SC
@8110S@8110SB@8110SC
V_12P 2.5AVDD N/A 3.3AVDD 3.3AVDD
Install@Giga 2.5AVDD 2.5AVDD 1.8AVDD
2D5V_LAN 3.3AVDD
Modyfy by Kevin
2D5V_LAN for RTL 3D3V_LAN R388 0 @8100C@8110S@8110SC
V_DAC N/A 2.5AVDD 2.5AVDD N/A
R0603 +/-5%
8110SB,3D3V_LAN for RTL R389 0 @8110SB
2D5V_LAN
8100C&8110SC R0603 +/-5% 1D8V_LAN 2.5VDD 1.8VDD 1.2VDD 1.5VDD
Install@Giga
DVDD_A N/A 1.8AVDD 1.2AVDD 1.5AVDD
E
28 CTRL_1D8
R390
R0603
0
+/-5%
B Q44
BCP69 FB(72-01010125-00) for 8100S,0欧姆 for 8100C
@8110S@8110SB@8110SC R392
E
0 @8110S@8110SB@8110SC
DVDD_A 28
C
4
R391 0 B Q45 +/-5%

28 CTRL_2D5 MMBT3906 1D8V_LAN
R0603 +/-5% @8100C R0603
@8110S@8110SB@8110SC @8100C
C
C370
1
C360 C361 C362 C363 C364 C365 C366 C367 C368 C369 0.1uF
*
1
1
* 10uF
+-10% * 0.1uF
* 0.1uF
* 0.1uF
*
0.1uF
* 0.1uF
*
0.1uF
*
0.1uF
*
0.1uF 0.1uF
* 25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% 25V, Y5V,C0603
+80%/-20%
2
B C1206h18 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 B
2
2
Power quality shuld be check These capacitors are for RTL8110S(B) digital
(change from 22uF to 10uF) 1.8V pins/RTL8100C digital 2.5V pins, such as
24, 32, 45, 54, 64, 78, 99, 110 and 116.
A A
FOXCONN PCEG
Title
LAN POWER
Custom 945M03 A

5 4 3 2 1
5 4 3 2 1
D D
R393 5.6K 3D3V_DUAL

29 LAN_LINK_1000J
R394 5.6KDummy 5V_SB_SYS
29 LAN_LINK_100J
3D3V_LAN
29 LAN_ACTLEDJ
U17
*
C371 2 1 27pF LAN_EECS 1 8 C523
CS VCC
1
LAN_EESK
FAB.B C0603 50V, NPO, +/-5%
X3
LAN_EEDI
2
3
SK
DI
NC
ORG
7
6
* 0.1uF
25V, Y5V, +80%/-20%
LAN_EEDO 4 5 C0603
2
XTAL-25MHz DO GND
1D8V_LAN
1D8V_LAN
AVDDH
R396_S1
2
*
2.49K C372 2 1 27pF AT93C46-10SU-2.7
@8110S@8110SB@8110SC C0603 50V, NPO, +/-5% R395 Dummy 3D3V_LAN
R0603 10K
27 CTRL_1D8
27 DVDD_A stuff when using AT93C56

+/-5%
R396 5.6K 3D3V_LAN
R76 value should be 5.6K (1%) at
AD0
AD1
RTL8100C application, and 2.49K @8100C
(1%) at RTL8110S(B) application.
2D5V_LAN
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
U18
VSS
HV
EESK
EEDI
EECS
LWAKE
RSET
LV2
CTRL18
LG2
HG
VSSPST
XTAL2
XTAL1
LED0
VDD18
LED1
LED2
LED3
VDD18
EEDO
VDD33
AD0
AD1
GND
GND
1 102 AD2
29 MDIP_0 MDI0+ AD2
29 MDIN_0 2 MDI0- VSSPST 101
3 AVDDL GND 100
C 4 VSS VDD18 99 1D8V_LAN C
5 98 AD3
29 MDIP_1 MDI1+ AD3 AD4
29 MDIN_1 6 MDI1- AD4 97
7 96 AD5
AVDDL AD5 AD6
27 CTRL_2D5 8 CTRL25 AD6 95
9 VSS VDD33 94
AVDDH 10 93 AD7
R397 @8110SC HSDAC AVDDH AD7
11 HSDAC+ CBE0B 92 CBEJ0 24,25
0 12 91
27 V_12P HSDAC- VSSPST
13 90 AD8
VSS AD8 R398 AD9
29 MDIP_2 14 MDI2+ AD9 89
15 88 1K
29 MDIN_2 MDI2- M66EN +/-5% AD10
16 AVDDL AD10 87
17 86 R0603 AD11
VSS AD11 AD12
29 MDIP_3 18 MDI3+ AD12 85
RTL8100C
29 MDIN_3 19 MDI3- VDD33 84
20 83 AD13
AVDDL AD13 AD14
21 VSSPST AD14 82
22 GND VSSPST 81
LAN_DISABLEJ 23 80
ISOLATEB GND AD15
1D8V_LAN 24 VDD18 AD15 79
24,25 INTAJ 25 INTAB VDD18 78 1D8V_LAN
3D3V_LAN 26 VDD33 CBE1B 77 CBEJ1 24,25
24,25,34 PCIRSTJ 27 RSTB PAR 76 PAR 24,25
7 CK_33M_LAN 28 CLK SERRB 75 SERRJ 24,25
24 GNT3J 29 GNTB SMBDATA 74 SMB_DATA_RESUME 20,22,25,26,35
24,25 PREQ3J 30 REQB GND 73
22 WOLJ 31 PMEB SMBCLK 72 SMB_CLK_RESUME 20,22,25,26,35
1D8V_LAN 32 VDD18 VDD33 71
AD31 33 70
AD31 PERRB PERRJ 24,25
AD30 34 69
AD30 STOPB STOPJ 24,25
35 GND DEVSELB 68 DEVSELJ 24,25
AD29 36 67
AD29 TRDYB TRDYJ 24,25
AD28 37 66
AD28 VSSPST
38 65
FRAMEB
VSSPST CLKRUNB
VSSPST
AD[31..0]
CBE3B
CBE2B
VDD33
VDD18
VDD18
VDD33
VDD18
24,25 AD[31..0]
IRDYB
IDSEL
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
GND
GND
GND
B B
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
1D8V_LAN
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
IRDYJ 24,25
LAN_IDSEL
FRAMEJ 24,25
3D3V_LAN 3D3V_LAN
CBEJ2 24,25
24,25 CBEJ3 R399 3D3V_SYS
AD19
100 R400
+/-5% 1K
R0603 +/-5%
R0603
R401
LAN_DISABLEJ 15K
MDIN_0
MDIN_1
MDIN_2
MDIN_3
MDIP_0
MDIP_1
MDIP_2
MDIP_3
+/-5%
R0603
R402 R403 R404 R405 R406 R407 R408 R409

49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9
+/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1%
R0603 R0603 R0603 R0603 R0603 R0603 R0603 R0603
LAN DISABLE(By disabling LAN clock)
@8100C@8110S@8110SB
@8100C@8110S@8110SB
@8100C@8110S@8110SB
@8100C@8110S@8110SB
@8110S@8110SB
@8110S@8110SB
@8110S@8110SB
@8110S@8110SB
A A
C373 C374 C375 C376

1
* 10nF
25V, X7R, +/-10% * 10nF
25V, X7R, +/-10% * 10nF
25V, X7R, +/-10% * 10nF
25V, X7R, +/-10%
C0603 C0603 C0603 C0603
2
FOXCONN PCEG
@8100C@8110S@8110
@8100C@8110S@8110
@8110S@8110SB
@8110S@8110SB
Stuff for 8110S Title

Close to Realtek Lan Chip LAN RTL8100C & RTL8110SC
C 945M03 A
Date: Saturday, July 15, 2006 Sheet 28 of 40

5 4 3 2 1
5 4 3 2 1
Stuff R287 for

8110S&8110SB,Dummy
BACK PANEL ( LAN + 2 USB Connector ) for 8100C&8110SC
USE CONNECTOR(Foxconn P/N: JFM31U1A-01U5W) WITH GIGABIT DESIGN Can be change to cost down conn
USE CONNECTOR(Foxconn P/N: JFM25U13-01U5W) WITH 10/100 DESIGN P/N = JFM31U1A-01U5W For GIGA LAN U30
2D5V_LAN USBP5N 1 6 USBP5P

modify the EEPROM LED register 3D3V_DUAL
D for the LED issue 2 5 5V_DUAL D
Change 3V_DUAL to 3D3V_LAN is more advantageous. USBP7P USBP7N
Fail:(default) Pass: Pass: 3 4
11-08-05
LEDS0= NOTUSED LEDS0= NOTUSED LEDS0=USED C377
1
IP4220CZ6
LEDS = USED LEDS1= NOTUSED LEDS1=USED
R410 R411 R412 R413 R414 * 470pF
50V, NPO, +/-5%
330 330 330 330 0 C0603
2
+/-5% +/-5% +/-5% +/-5% +/-5% @8110S@8110SB
R0603 R0603 R0603 R0603 R0603 @8100C
LED Definition: @8100C Dummy @8110S@8110SB
@8110S@8110SB@8110SC NIC_USB
1000: Yellow and Green LED
100: Yellow and Green LED R417 0 Dummy 27
R416 0 @8110SC@8110S@8110SB 22 28
YLW_LED
10: Only Green LED R415 0 @8100C 21 29 L29
28 LAN_ACTLEDJ
R419 0 Dummy C378 1 Dummy
USB-2
USB-1
28 LAN_LINK_1000J 30 2
1
28 LAN_LINK_100J
R418 0 Dummy *0.1uF
25V, Y5V, +80%/-20%
Right Side SVCC2 4 3
C0603 9 1
2
10 5 Common Choke 90 Ohm_2L
28 MDIP_0
28 MDIN_0 11
RJ45-MJ2
12 2 R421 0
28 MDIP_1 R420 0 USBP5N 22
28 MDIN_1 13 6 USBP7N 22
28 MDIP_2 14
15 3 R423 0
28 MDIN_2 R422 0 USBP5P 22
28 MDIP_3 16 7 USBP7P 22
28 MDIN_3 17
18 4 L30
8 1 Dummy 2
C C
GRN_LED
R424 0 +/-5% Dummy Left Side 4 3
R426 0 +/-5% Dummy 20 23
R425 0 +/-5% 19 24 Common Choke 90 Ohm_2L
28 LAN_LINK_100J
R427 0 +/-5% Dummy 25
28 LAN_LINK_1000J
R428 0 +/-5% Dummy 26
28 LAN_ACTLEDJ
C379 C380 C381
NIC_USB1
1
* 0.1uF
* 0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20% USBX2_RJ45 10/100 Mbit LAN * 0.1uF
25V, Y5V, +80%/-20%
Co-lay 10 resistors in 4 location: C0603 C0603 C0603
2
Gigabit LAN Place R69,R443,R603,R627,R629,R651 in horizontal Dummy Dummy
Place R70,R602,R628,R630 in vertical
Connector 11-06-05
LED caps. should be placed The Lan connector for
next to connector TF Request,mismatch
USBX2_RJ45 Gigabit LAN
@8110SC Lenovo spec
5V_DUAL
B B
F2
F1813_1.5A
SVCC2
*
R429
47K
22 USB_OCJ_BACK_LAN
+/-5%
R0603
C382 R430 EC57
1
* 0.1uF
25V, Y5V, +80%/-20%
56K
+/-5%
* 1000uF
6.3V, +/-20%
C0603 R0603 CE35D80H200
2
A A
FOXCONN PCEG
Title
LAN connector
Custom 945M03 A

5 4 3 2 1
5 4 3 2 1
USB Front Header 2 USB Front Header 1
5V_DUAL 5V_DUAL
F5
F4 F1813_1.5A
*
F1813_1.5A
*
D D
EC60 C387
*
EC59 C385 * 470uF 0.1uF
*
470uF
16V, +/-20%
0.1uF
* R433
10K
+/-5%
R0603
USB_OCJ_FRONT_2 22
16V, +/-20%
CE35D80H200 C0603
CE35D80H200 C0603 R435 +/-5%
FOR EMI ISSUE USB_OCJ_FRONT_1 22
10K R0603
FOR EMI ISSUE R434 C386
15K
+/-5% * 0.1uF
25V, Y5V, +80%/-20% R436
* C388
R0603 C0603 15K 0.1uF
+/-5% 25V, Y5V, +80%/-20%
R0603 C0603
USBPWR_FP2 USBPWR_FP1
F_USB2 F_USB1
1 2 1 2
R447 0 3 4 R449 0 R451 0 3 4 R485 0
22 USBP0N R448 0 R450 0 USBP2N 22 22 USBP4N R452 0 R538 0 USBP6N 22
22 USBP0P 5 6 USBP2P 22 22 USBP4P 5 6 USBP6P 22
7 8 7 8
L35 X 10 L36 L37 X 10 L38
1 Dummy 2 1 Dummy 2 1 Dummy 2 1 Dummy 2
Header_2X5_K9 Header_2X5_K9
4 3 4 3 4 3 4 3
Common Choke 90 Ohm_2L Common Choke 90 Ohm_2L Common Choke 90 Ohm_2L Common Choke 90 Ohm_2L
USB Front Header II
C C
Rear Dual USB Connector 5V_SYS

EMI
C685 C686 C687 C692 C693 C694
1
5V_DUAL * 0.1uF
* 0.1uF
25V, Y5V, +80%/-20%* *
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, 25V,*
0.1uF
+80%/-20%
Y5V, 25V,*
0.1uF
+80%/-20%
0.1uF
Y5V, 25V,
+80%/-20%
Y5V, +80%/-20%
C0603 C0603 C0603 C0603 C0603 C0603
2
F3
F1813_1.5A
*
R431
10K
USB_OCJ_BACK 22
+/-5%
C383 EC58 R0603 R432 C384 U19
1
* 0.1uF
C0603
* 470uF
16V, +/-20%
15K
*
+/-5%
0.1uF
25V, Y5V, +80%/-20%
USBP1N 1 6 USBP1P
CE35D80H200 R0603 C0603
2
2 5 5V_DUAL
B B
USBP3P 3 4 USBP3N
L31 IP4220CZ6
12
9
1 Dummy 2 CONN-USBx2
4 3
RUSB_PWR 1
Common Choke 90 Ohm_2L
U20
BOTTOM
R443 0 2
22 USBP1N R444 0
22 USBP1P USBP0N 1 6 USBP0P
3
2 5 5V_DUAL
4
USBP2N 3 4 USBP2P
5 IP4220CZ6
TOP
6
R445 0
22 USBP3N R446 0
22 USBP3P 7
U21
L32 8 USBP4N 1 6 USBP4P
1 Dummy 2
2 5 5V_DUAL
4 3
USB
USBP6N USBP6P
10
11
Common Choke 90 Ohm_2L 3 4
IP4220CZ6
A A
FOXCONN PCEG
Title
CLOCK DISTRIBUTION
946M01 A

5 4 3 2 1
5 4 3 2 1
Dummy
FWH ON BOARD HEADER
FAB.B 3D3V_SYS
3D3V_SYS
WINBOND W39V040BPZ?
D D
C0603
C391
C0603
C392
C0603
C393
U22_1
* * * R438
0.1uF
0.1uF
0.1uF
PLCC
C389
0.1uF ** C390
0.1uF
14,22,34 PLTRSTJ
180
+/-5%
FWH_RSTJ
32pin R0603
D
Socket C0603 C0603
Q46
U22
25
32
27
place near pin25, 27, 32 G LPC_ID0
2N7002
VCCA
VCC_2
VCC_1
S
R439
1 24 INITJ_3D3V 10K
VPP INITJ INITJ_3D3V 23
+/-5%
31 22 R0603
7 CK_33M_FWH CLK RFU_1
RFU_2 21
3D3V_SYS 29 20
IC RFU_3
RFU_4 19
Board_ID4 30 18
FGPI4 RFU_5
FWH_RSTJ 2
Near the FWH/LPC ROM
R437 R440 RSTJ
FWH4 23 L_FRAMEJ 22,34
4.7K 4.7K 17 L_AD3
+/-5% +/-5% Board_ID3 FWH3 L_AD2
3 FGPI3 FWH2 15
R0603 R0603 Board_ID2 4 14 L_AD1
Board_ID1 FGPI2 FWH1 L_AD0
5 FGPI1 FWH0 13
Board_ID0 6 FGPI0 LPC_ID0
22 FWH_WPJ 7 WPJ ID0 12
22 FWH_TBLJ 8 TBLJ ID1 11 L_AD[3..0] 22,34
ID2 10
ID3 9
GND3
GND2
GND1
C C
R694
Dummy
16
26
28
0 SST49LF004B
R693
Dummy +/-5% PLCC32J
0 Reserved INITJ_3D3V 1 Dummy2 CK_33M_FWH
+/-5% 3D3V_SYS 3 4 PLTRSTJ
TBL_EN LPC_ID0 5 6 L_AD0
1 7 8 L_AD1
1 L_AD2
2 2 X 10
3 11 12 L_AD3
3 L_FRAMEJ
13 14
Header_1X3
If need TBL jumper reserved? Dummy
3D3V_SYS R441 10K +/-5% L_FRAMEJ FWH/LPC
Dummy LPC/FWH Interface
R0603
RN14 Dummy
3D3V_SYS *
1
3
2
4
L_AD0
L_AD1
5 6 L_AD2
7 8 L_AD3
10K
L_AD serial R?
8P4R0603
+/-5%
3D3V_SYS
B B
R467 R465 R457 R455 R453

8.2K 8.2K 8.2K 8.2K 8.2K
+/-5% +/-5% +/-5% +/-5% +/-5% MH1 MH4 MH6 MH5 MH2 MH3
R0603 R0603 R0603 R0603 R0603 Mounting Hole Mounting Hole Mounting Hole Mounting Hole Mounting Hole Mounting Hole
@No RAID @945P@945PL @8100C @ICH7R
@945GZ@945PL Board_ID0
6
5
6
5
6
5
6
5
6
5
6
5
Board_ID1
Board_ID2 7 Dummy4 7 Dummy 4 7 Dummy 4 7 Dummy4 7 Dummy 4 7 Dummy4
Board_ID3 8 3 8 3 8 3 8 3 8 3 8 3
Board_ID4 9 2 9 2 9 2 9 2 9 2 9 2
1
1
R468 R466 R463 R456 R454
8.2K 8.2K 8.2K 8.2K 8.2K mh40x80_8 mh40x80_8 mh40x80_8 mh40x80_8 mh40x80_8 mh40x80_8
+/-5% +/-5% +/-5% +/-5% +/-5%
R0603 R0603 R0603 R0603 R0603
@RAID @945G@945GZ @8110SC @ICH7
@945G@945P
FD1 FD2 FD3 FD4

FMARK FMARK FMARK FMARK
FD40Dummy FD40Dummy FD40Dummy FD40Dummy
A A
1
1
FOXCONN PCEG
Title
FWH
C 945M03 A
Date: Saturday, August 05, 2006 Sheet 31 of 40

5 4 3 2 1
5 4 3 2 1
5V_AUDIO 5V_DUAL 12V_SYS SPDIF_OUT

33 SPDIF_OUT
1
D33
1N4148W D32
SOD123 U23 1N4148W
D 2 R675 10 SOD123 D
40 mils
2
3 Dummy FB6
OUT IN 1
* R678 0 @861-VD
1
FB L0805 60 Ohm C66 R679 R680
*
GND
C397 C394 EC63 R540 47 1nF 4.99K 20K
1
1
* 0.1uF
* 4.7uF * 100uF
* C396 R0603 +/-1%@861-VC 50V, X7R, +/-10%
+/-1% +/-1%
2
10V, Y5V, +80%/-20% 16V, +/-20%
0.1uF C0603 R0603 R0603
2
C0603 C0805 CE20D50H110
25V, Y5V, +80%/-20% @861-VC@861-VC @861-VD
2
2
C0603
5V_AUDIO
GND_AUDIO
GND_AUDIO GND_AUDIO GND_AUDIO 3D3V_SYS
SPDIF_OUT C400 C401
1
0.1uF 10uF
* * 10V, Y5V, +80%/-20%
U33 C402 C398 C399 C0603 C0805
2
1
1
10uF 0.1uF 0.1uF
1 OUT IN 3
* *
10V, Y5V, +80%/-20% *
C0805 C0603 C0603 5V_AUDIO
GND
48
47
46
45
44
43
42
41
40
39
38
37
U24
L78L05N GND_AUDIO
NC7
SIDESURR_L
LFE
AVSS2
SURR_L
AVDD2
NC6
SPDIF_OUT
SIDESURR_R
CEN
SURR_R
JDREF/NC
2
BOM need update
C 1 36 EC61 100uF 16V, +/-20%CE25D60H110 C

DVDD1 FRONT_R LINE_OUT_R 33
*
GND_AUDIO 2 35 EC62 100uF 16V, +/-20%CE25D60H110
NC1 FRONT_L LINE_OUT_L 33
*
3 34 R677 0 @861-VD
NC2 SENSE B FRONT_IO_SENSE 33
4 DVSS1 NC5 33
22 ICH_SDOUT 5 32 R479 47
SDATA_OUT MIC1_VREFO_R MIC1_VREF_R 33
22 ICH_BCLK R458 0 +/-5% 6 31 R0603 +/-1%@861-VC
BIT_CLK LINE2_VREFO LINE2_VREF 33
R459 7 30
DVSS2 ALC861-VC/VD MIC_VREFO MIC2_VREF 33
1
22 C65
22 ICH_SDIN2
+/-5%
8
9
SDATA_IN
DVDD2
NC4
MIC1_VREFO_L
29
28 MIC1_VREF_L 33
* 1nF
22 ICH_SYNC R0603 10 27 50V, X7R, +/-10%
2
SYNC VREF C0603
22 ICH_RSTJ 11 RESET# AVSS1 26
12 25 @861-VC
CD_GND_REF
C407 NC3 AVDD1
1
47pF GND_AUDIO
*
SENSE A
LINE2_R
LINE1_R
LINE2_L
LINE1_L
50V, NPO, +/-5%
MIC2_R
MIC1_R
MIC2_L
MIC1_L
CD_R
C0603 C408
CD_L
2
1
1uF C415 C409
Dummy *
1
10V, X5R, +/-10% 10uF 10uF
2 C0603ALC861-VC/VD * *
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
13
14
15
16
17
18
19
20
21
22
23
24
Dummy C0805 C0805
2
PC-BEEP R460 10K
22,37 SPKR
R0603 +/-5%
Dummy R464 C412
1
1K 100pF GND_AUDIO
GND_AUDIO
GND_AUDIO
+/-5% * 50V, NPO, +/-5%
@861-VD R0603 C0603 C405 4.7uF
LINE1_R 33
2
* * * *
R539 5.1K Dummy Dummy C0805
B R0603 +/-1% B
R477 4.99K @861-VC C406 4.7uF
33 LINE_OUT_JD LINE1_L 33
R0603 +/-1% C0805
R478 20K
33 MIC1_JD
R0603 +/-1% C413 4.7uF
MIC1_R 33
R480 10K R676 0 @861-VD SENSEA C0805
33 LINE1_JD
R0603 +/-1%
R476 47 C414 4.7uF
MIC1_L 33
1
C59 R0603 +/-1%@861-VC C0805

*1nF
***
50V, X7R, +/-10% C416 2 1 1uF CD_R 33
2
C0603 C0805
@861-VC C417 2 1 1uF CD_GND 33
C0805
GND_AUDIO C418 2 1 1uF CD_L 33
C0805
CE25D60H11016V, +/-20% 100uF EC64 EC69 100uF 16V, +/-20%CE25D60H110
* *
33 FRONT_OUT_L MIC2_R 33
33 FRONT_OUT_R CE25D60H11016V, +/-20% 100uF EC65 EC70

* * 100uF 16V, +/-20%CE25D60H110
MIC2_L 33
CP15 GND_AUDIO GND_AUDIO GND_AUDIO

A A
2 1
X_COPPER C688 C689 C690

FOXCONN PCEG
1
0.1uF 0.1uF 0.1uF

GND_AUDIO * 25V, Y5V, +80%/-20% * 25V, Y5V, +80%/-20% * 25V, Y5V, +80%/-20%
C0603 C0603 C0603 Title
2
Dummy Dummy Dummy AD1986A

Custom 945M03 A

5 4 3 2 1
5 4 3 2 1
FAB.B
LINE IN
LINE1_JD 32 BOM AUDIO CON change
(SURR_OUT) from JA33331-H21P-4F-G to JA33331-HA1P-4F-G
UP apply CIS
D AUDIO D
AUDIO32 32 INSULATOR
FB7 FB L0603 80 OhmAUDIO35
32 LINE1_R * AUDIO34 AUDIO34
33
34 CD_IN
AUDIO35 35 1
32 CD_L
FB8 FB L0603 80 Ohm AUDIO32
32 LINE1_L * 32 CD_GND
2
3
5
39 4
C422 C423 38 32 CD_R
1
100pF 100pF AUDIO22 Header_1X5
* *
50V, NPO,50V,
+/-5%
NPO, +/-5%
22
23
C0603 C0603 AUDIO24 24
2
AUDIO25 25
37
AUDIO2 2 36
GND_AUDIO 3
AUDIO4 4
AUDIO5 5
1 5V_SYS
SPDIF_OUT
CONN-JACK
LINE_OUT_JD 32 1 1
C6951 Dummy
210nF R681 100
Dummy
LINE OUT 32 SPDIF_OUT 3
*
C0603 3
C 4 4 C
MIDDLE GND_AUDIO GND_AUDIO R682 C696
1
220 100pF
Dummy *
+/-5% Dummy
Header_1X4_2
50V, NPO, +/-5% Dummy
R0603 C0603
2
32 LINE_OUT_R * AUDIO24

32 LINE_OUT_L * 32 MIC2_VREF
3
R483 R484 C424 C425 D34
1
22K 22K 100pF 100pF

+/-5% +/-5% * *
50V, NPO,50V,
+/-5%
NPO, +/-5%
BAT54A
R0603 R0603 C0603 C0603 MIC( OR LINE_IN) AND HP JACKS

2
PROVIDED ON FRONT PANEL
2
R683 R684
2.2K 2.2K
+/-5% +/-5% F_AUDIO
GND_AUDIO GND_AUDIO R0603 R0603
32 MIC2_L 1 2
32 MIC2_R 3 4 AFP_DETECT 22
32 FRONT_OUT_R R687 75 5 6 R486 20K
32 FRONT_IO_SENSE 7 X
B 32 FRONT_OUT_L R688 75 9 10 R487 39.2K B
+/-1%
MIC IN R489 R488 R542 R541 Header_2X5_8
(CEN/LFE) 22K 22K 22K 22K
+/-5% +/-5% +/-5% +/-5%
R685 R686
BOTTOM R0603 R0603 R0603 R06032.2K 2.2K
+/-5% +/-5%
R0603 R0603 GND_AUDIO GND_AUDIO
MIC1_JD 32
1
GND_AUDIO
GND_AUDIO
GND_AUDIO
GND_AUDIO D35
32 MIC1_VREF_R
BAT54A
32 MIC1_VREF_L
R462 R461
2.2K 2.2K
FAB.B
3
+/-5% +/-5% 1, Add R685, R686 2.2K
R0603 R0603
32 LINE2_VREF 2, Add D35 BAT54A
32 MIC1_R * AUDIO4

32 MIC1_L *
C426 C427
1
100pF 100pF
* *
50V, NPO,50V,
+/-5%
NPO, +/-5%
C0603 C0603
2
A A
GND_AUDIO FOXCONN PCEG

Title
AUDIO
Custom 945M03 A

5 4 3 2 1
5 4 3 2 1
5V_SYS
TMPIN2 R493 10K SIOVREF
R0603 +/-1%
change 0805 5V_SYS 5V_SB_SYS
2
RT2 C430 Note:
C428
0.1uF * T 10K
R0603 * C429
0.1uF * 1uF
10V, X5R, +/-10%
*Place CAPs close to pin 67, trace minimum 12 mils
C0603 +/-1% C0603 C0603
25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20%
C431 EC66
1
Place near pin4, 35, 99 * 0.1uF * 100uF
16V, +/-20%
C0603 CE20D50H110
5V_SYS
D System Temperature Monitor RESET OPEN DRAIN
Printer
D
U25
35
99
67
select "high"
4
R494
COM A
VCC
VCC
AVCC
VCCH
2.2K
SIOVREF +/-5% PD[7..0]
PD[7..0] 36
R0603 118 116 PD7
36 DCDAJ DCD1# PD7
119 115 PD6
36 RIAJ RI1# PD6
R495 120 114 PD5
36 CTSAJ CTS1# PD5
30.1K DTRBJ 121 113 PD4
36 DTRAJ DTR1#/JP1 PD4
Parallel Port
+/-1% 122 112 PD3
36 RTSAJ RTS1#/JP2 PD3
R0603 123 111 PD2
Serial Port 1/2

FAB.B 36 DSRAJ DSR1# PD2
Dummy R499 680 SOUTB 124 110 PD1
Change C432 from NPO to X7R 36 SOUTA SOUT1/JP3 PD1
CP10 R0603 +/-5% 125 109 PD0
36 SINA SIN1 PD0
TMPIN1 1 2 126 108
THERMDA 12 DCD2#/GP67 STB# STBJ 36
CP11 127 107 AFDJ 36
C432 R496 680 RTSBJ RI2#/GP66 AFD#
1 X_COPPER
2 THERMDC 12 128 106 ERRJ 36
CTS2#/GP65 ERR#
1
* 3.3nF
50V, X7R, +/-10% X_COPPER
R0603
Dummy
+/-5%
3D3V_SYS
DTRBJ
RTSBJ
1
2
DTR2#/JP4
RTS2#/JP5
INIT#
SLIN#
105
104
INIT
SLINJ
36
36
C0603 THERMDA/THERMDC 3 103 ACKJ 36
2
GNDA 1. width=10 mils, spacing=10 mils. FAN half speed FAB.B SOUTB DSR2#/GP64 ACK#
2. route the lines in parallel 5 SOUT2/JP6 BUSY 102 BUSY 36
R674 Add R674, Q65 6 101
SIN2/GP63 PE PE 36
GNDA 4.7K
Dummy 100
CPU Temperature Monitor +/-5%
IT8718F-S/AX-L
SLCT SLCT 36 5V_SB_SYS
R0603 29
FAB.B GP16/SO2
37 S1_LED 25 GP22/SCK
Control
Power-on
Serial R 1k 24 78 R497 10K
SPI
C
GP23/SI PWROK2/GP41 R672 10K
Update by ITE Gary 0202 R65 Dummy
1K B Dummy
Q65 20
SUSC#/GP53 77
76
8,12 VID_SELECT PMBT3904 37 SIO_BEEP GP27 PSON#/GP42 PS_ONJ 11,37
+/-5% TURBOJ 21 75
7 TURBOJ GP26 PANSWH#/GP43 PBTNJ_SIO 37
R0603 26 72 PWRON
PWRBTNJ 22
E
22 THROT GP21 PWRON#GP44
37 S3_LED 27 GP20 SUSB#/GP45 71 SLP_S3J 22
5V_SYS R640 0
Dummy 28
5V_SYS FLOPPY 8 PVID6 GP17/VIDO6
1 2 FAB.B 30 RESETCONJ R502 10K R0603
1 2 RESETCON#/CIRTX/GP15/CE_N 5V_SYS
4 Add R640 85 R501 0 +/-5%
X 4 RSMRST#/CIRRX/GP55 RSMRSTJ 22
MISC.
R498 RN15 5 6 DENSELJ 51 66 +/-5%
5 6 DENSEL# IRTX/GP47 IRTX 37
C 2.2K 7 8 INDEXJ 63 70 R0603 C
7 8 INDEX# IRRX/GP46 IRRX 37
+/-5%
R0603
*
1
3
2
4
TK00J
WPTJ
9
11
9 10 10
12 12 PECI
MOTEAJ 52
55
MTRA# COPEN# 68
79 FAB.B
CASEOPENJ R505
R0603
10M
+/-5%
VCCRTC
RDATAJ 11 12 DRVAJ PECI/AMDSI_C/DRVB# 3VSBSW#/GP40 1, Add R543 Place closer to PCI slot
5 6 13 13 14 14 54 DRVA#
7 8 DSKCHGJ 15 16 53 84
RTSBJ 15 16 DIRJ SST/AMDSI_D/MTRB# PCIRST4#/GP10 ICH_THRM_UP 22
Floppy I/F
17 17 18 18 57 DIR# PCIRST3#/GP11 34 ICH_G_PLTRSTJ 20,26
150 +/-5% 19 20 STEPJ 58 33 SIO_PCIRSTJ R543 0 need BIOS support
PCIRSTJ 24,25,28
8P4R0603 19 20 WDATAJ STEP# PCIRST2#/GP12 R503 10K R0603
21 21 22 22 56 WDATA# PWROK1/GP13 32 3D3V_SYS
R500 23 24 WGATEJ 60 31 IDE_RSTJ +/-5%
23 24 WGATE# PCIRST1#/GP14 IDE_RSTJ 23
150 INDEXJ 25 26 TK00J 62
FSB_VTT 3D3V_SYS +/-1% 25 26 WPTJ TRK0# VIN0
27 27 28 28 64 WPT# VIN0 98 PWRGD_3V 14,22
R0603 29 30 RDATAJ 61 97 VIN1
29 30 SIDE1J RDATA# VIN1 VIN2
31 31 32 32 59 HDSEL# VIN2 96
33 34 DSKCHGJ 65 95
33 34 DSKCHG# VIN3/ATXPG PWRG_ATX 10,37
94 VIN4
Header_2X17_3 (FDD) VIN4 VID7
VIN5/VID7 93 VID7 12
Hardware Monitoring
R504 R545 FAB.B FDD34MZO3 92 VID6
1, Add R545 VIN6/VID6 VIN7 VID6 12
0 0 14,22,31 PLTRSTJ 37 LRESET# VIN7/PCIRSTIN# 91
R0603 R0603 38 90 SIOVREF
22 L_DRQ0J LDRQ# VREF TMPIN1 C433
+/-5% +/-5% 23 SERIRQ 39 SERIRQ TMPIN1 89
TMPIN2
Dummy
22,31 L_FRAMEJ L_AD0
40
41
LFRAME#
LAD0
TMPIN2
TMPIN3/SO1
88
87
* 1uF
FAB.B L_AD1 42 23 C0603 Place cap close to pin90, and
LPC I/F
Add R641 L_AD2 LAD1 FAN_TAC5/GP24
43 LAD2 FAN_TAC4/GP25 22 Do Not remove it.
VIDVCC L_AD3 44 12
CK_33M_SIO LAD3 FAN_CTL3/GP36 VTT_OUT_RIGHT
7 CK_33M_SIO 47 PCICLK FAN_TAC3/GP37 11 FANIN3 35
R641 Dummy
0 48 10
8 PVID7 PCIRST5#/GP50/VIDO7 FAN_CTL2/GP51 FANOUT2 35
CK_48M_SIO 49 9
7 CK_48M_SIO CLKIN FAN_TAC2/GP52 FANIN2 35
22 L_PMEJ 73 PME#/GP54 FAN_CTL1 8
for KB/MOUSE wake 7
FAN_TAC1 VID6 R663 680
GP30/VID0 19 PVID0 8,38
Dummy
45 18 VID7 R664 680
Dummy
23 KBRSTJ KRST#/GP62 GP31/VID1 PVID1 8,38
46 17 PVID6 R665 680
23 A20GATE GA20 GP32/VID2 PVID2 8,38
80 16 PVID7 R666 680
35 KBDATA KDAT/GP61 GP33/VID3 PVID3 8,38
81 14
KB/MS
35 KBCLK KCLK/GP60 GP34/VID4 PVID4 8,38 FAB.B
35 MSDATA 82 MDAT/GP57 GP35/VID5 13 PVID5 8,38
83 Add R663, R664
Voltage Monitor 35 MSCLK MCLK/GP56 Dummy R642, R643
GNDA(D-)
B VBAT 69 VCCRTC B
36 VIDVCC
VIDVCC
GNDD
GNDD
GNDD
GNDD
C434 VID6 R642 0 PVID6
VCCP 1D8V_STR 3D3V_SYS 5V_SYS 12V_SYS * 1uF

10V, X5R, +/-10% VID7 R643 0 PVID7
C0603
15
50
74
117
86
3D3V_SYS Place cap close to pin 69 BOM need update
CP14 L_AD[3..0]
R506 R507 R508 R509 R510
10K 10K 10K 6.81K 30K 22,31 L_AD[3..0]
2 1
+/-1% +/-1% +/-1% +/-1% +/-1% Dummy R642, R643 L_AD3
R0603 R0603 R0603 R0603 R0603 R511 Add R640, R641 0 ohm L_AD2
8.2K L_DRQ0J X_COPPER L_AD1
+/-5% GNDA FAB.B L_AD0
VIN0 R0603 1, Add R544
VIN1 Dummy
VIN2 R544 4.7K +/-5% SIO_PCIRSTJ
VIN7
VIN4 R512 4.7K +/-5% ICH_G_PLTRSTJ
Power On Strapping Options R513 10K +/-5% SERIRQ
3D3V_SYS
Symbol value Description R514 10K +/-5% KBRSTJ
1 Disabled. R515 10K +/-5% A20GATE R0603
JP1 Flashseg1_EN 0 Flash I/F Address Segment 1 (FFFE_0000h~FFFF_FFFFh, R516 +/-5% DTRAJ
000F_0000h~000F_FFFFh) is enabled
1 FLH_SO1 is selected as the Serial Flash I/F SO pin. 4.7K
JP2 SerFlh_SO_SEL R517
0 FLH_SO2 is selected as the Serial Flash I/F SO pin. 4.7K VIN7
* C435
0.1uF * C436
0.1uF * C437
0.1uF
R518
10K * C438
0.1uF
R519
10K * C439
0.1uF
+/-5%
R0603
C0603 C0603 C0603 +/-1% C0603 +/-1% C0603 JP3 CHIP_SEL -- Chip selection in configuration. Dummy
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
R0603 R0603 R520

5V_SYS 4.7K IDE_RSTJ
The output buffers of PCIRST1#, PCIRST2#, PCIRST3#, PCIRST4# and +/-5%
1 PCIRST5# are open-drain.
R0603
A JP4 BUF_SEL A
0 The output buffers are push-pull.

1 The default value of EC Index 15h / 16h / 17h is 00h
JP5 FAN_CTL_SEL
0 The default value of EC Index 15h / 16h / 17h is 40h
1 The threshold voltage of VID is 2.0 / 0.8V
JP6 VID_ISEL FOXCONN PCEG
0 The threshold voltage of VID is 0.8 / 0.4V
Title
SIO 8718F
C 945M03 A

5 4 3 2 1
5 4 3 2 1
Peak fan current draw: 1.5A

Average fan current draw: 1.1A
SM Bus Bridge Fan start-up current draw: 2.2A
Fan start-up current draw maximum duration: 1.0 second
Fan header voltage: 12V +/- 10%
3D3V_DUAL
5V_SYS 12V_SYS
C440
placed near the LM358 pin 8
R522
4.7K * 0.1uF
25V, Y5V, +80%/-20%
3D3V_SYS R521 2.7K SMB_DATA_RESUME +/-5% C0603
R0603 +/-5% R0603 R524 Dummy
If use SUIO power good 100
D D
R523 2.7K SMB_CLK_RESUME +/-5%
function, dummy Q7,Q6,Q8 R0603 +/-5% R0603 12V_SYS
pop R25,R18
? R525
R0603
8.2K
+/-5%
SMB_DATA_MAIN
12V_SYS Dummy
R526
1K
+/-5%
10 PWOK+
R527 8.2K SMB_CLK_MAIN R0603
R0603 +/-5%
E
R529
8
470 B Q48 R530
Q47 3 +/-5% BCP69 0 12V_SYS
+
S D R528 1 R0603
Dummy +/-5%
7,17,18 SMB_DATA_MAIN SMB_DATA_RESUME 20,22,25,26,28
15K 2 R0805
4
C
34 FANOUT2 -
2N7002 +/-5% U26A
R0603 Dummy LM358M
4
for Clock Generator/DIMMs/TPM/Clock Buffer C441 Dummy
2
for PCI-E x16/ICH7/LAN/PCI/PCI-E x1/Riser Card/New Card
* 22uF
10V, Y5V, +80%/-20% 1N4148W
R533
4.7K
G
C1206 +/-5%
CPU_FAN
Q49 Dummy D20 R0603
7,17,18 SMB_CLK_MAIN S D SMB_CLK_RESUME 20,22,25,26,28
Dummy R534 4 FAN2_4 SOD123 R531
1
36K 4 FAN2_3 27K
3 3 FANIN2 34
2N7002 +/-5% 2 FAN2_2 +/-5% R535
R532 R0603 Dummy 2 R0603 22K C442
1 1
Max. output current = 3A
22K
+/-5% *
EC67
33uF
Header_1X4 (FAN4P)
*
+/-5%
R0603
C0603
47pF
R536 R0603 16V, +/-20% 50V, NPO, +/-5%
0 Dummy CE25D63H110
+/-5% Dummy
R0603
Dummy FAB.B
FAN PIN Reverse
C CPU FAN C
R537
0
+/-5%
R0603 5V_DUAL
Dummy
5V_DUAL
F6
F1813_1.5A
*
8
6
4
2
RN16
4.7K
+/-5%
8P4R0603 CHIPSET FAN
*
7
5
3
1
FB14 12V_SYS
FB L0805 300 Ohm
0805
+/-25%
EMC suggest use 180pF(BOM need update)
1
2
KB/MS R607
4.7K D27
12V_SYS +/-5% 1N4148W
R0603
16
1
13
34 KBCLK CLK_NET03 5 11
B B
C443 3 9 C502
SYS_FAN
1
* 180pF 1 7 0.1uF R612
1
50V, NPO, +/-5%
C0603
2
4
17
8
*
C0603 3
2
27K
+/-5%
FANIN3 34
2
6 10 1 R0603
2
12 C503 R613
1
34 KBDATA
C444
14 Header_1X3 (FAN3P) * 10nF 10K
+/-5%
1
* 180pF 15 C0603 R0603
2
50V, NPO, +/-5% UP DOWN
C0603 PS2X2
2
PWR_NET02 ps2x2h286
C445 CLK_NET02
34 MSCLK
1
* 180pF
50V, NPO, +/-5% Check datasheet
C0603
2
C446
* 0.1uF
25V, Y5V, +80%/-20%
34 MSDATA
C447 C0603 System FAN
1
* 180pF
50V, NPO, +/-5%
C0603
2
A A
FOXCONN PCEG
Title
Keyboard / Mouse / Fan
C 945M03 A

5 4 3 2 1
5 4 3 2 1
D22
1N4148W
SOD123 5V_SYS
2 1
R549 R550 R551 R552 C450
1
10K
+/-5%
10K
+/-5%
10K
+/-5%
2.7K
+/-5% * 0.1uF
25V, Y5V, +80%/-20%
R0402 R0402 R0402 R0402 C0603
2
D D
R553 R554 R555 R556 R557

2.7K 10K 10K 2.7K 2.7K
R558 +/-5% +/-5% +/-5% +/-5% +/-5%
33 R0402 R0402 R0402 R0402 R0402
R0402 +/-5%
34 STBJ PD[7..0]
34 PD[7..0]
PD0 R559 33+/-5% R0402
PD1 R561 33+/-5% R0402
PD2 R560 33+/-5% R0402
PD3 R562 33+/-5% R0402
PD4 R563 33+/-5% R0402
PD5 R564 33+/-5% R0402
PD6 R566 33+/-5% R0402
PD7 R565 33+/-5% R0402
R567 33 R0402 +/-5%

34 AFDJ
34 ERRJ R569 33 R0402 +/-5%
34 INIT R568 33 R0402 +/-5%
34 SLINJ
34 ACKJ
34 BUSY
34 PE
34 SLCT
CONN-D-SUB
1
AFD1- 14
P_D0 2
C ERR- 15 C
P_D1 3
INIT1- 16
SLIN1-
P_D2 4
17
PRT PORT
P_D3 5
18
P_D4 6
19
P_D5 7 28
20 27
P_D6 8 26
21
P_D7 9
22
ACKJ 10
23
BUSY 11
24
PE 12
25
SLCT 13
PRT
C462 C464
* 220pF
25V, NPO, +/-5%
C463
*
220pF * 220pF
25V, NPO, +/-5%
*
C465
220pF
C0402 25V, NPO, +/-5% C0402 25V, NPO, +/-5%
C466 C0402 C467 C468 C0402 C469
* 220pF
25V, NPO, +/-5% * 220pF
25V, NPO, +/-5% * 220pF
25V, NPO, +/-5% * 220pF
25V, NPO, +/-5%
C0402 C0402 C0402 C472 C0402 C473
*
C470
220pF
*
C471
220pF * 220pF
25V, NPO, +/-5% * 220pF
25V, NPO, +/-5%
25V, NPO, +/-5% 25V, NPO, +/-5% C0402 C479 C0402 C476
B
U28 -12V_SYS 5V_SYS 12V_SYS
C0402
C478
C0402 C475
* 220pF * 220pF
25V, NPO, +/-5% * 220pF
25V, NPO, +/-5%
B
5V_SYS 20 VCC +12V 1 12V_SYS
C480 C474 C477 *220pF
25V, NPO, +/-5%
25V, NPO, +/-5%
C0402
C0402 C0402
NRTSA
34 RTSAJ 16
15
DA1 DY1 5
6 NDTRA * 0.1uF
C0603 * 0.1uF
C0603 * 0.1uF
25V, Y5V, +80%/-20%
C0402
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
34 DTRAJ DA2 DY2 NSOUTA C0603

34 SOUTA 13 DA3 DY3 8
19 2 NRIA
34 RIAJ RY1 RA1 NCTSA
34 CTSAJ 18 RY2 RA2 3
17 4 NDSRA
34 DSRAJ RY3 RA3 NSINA
34 SINA 14 RY4 RA4 7
12 9 NDCDA
34 DCDAJ RY5 RA9
11 GND -12V 10 -12V_SYS
GD75232
SSOP20FB placed near GD75232
RS232 Drivers and Receivers 3D3V_DUAL
CONN-COM PORT
11 R570
8.2K
NDCDA 1 +/-5%
NDSRA 6 R0603
NSINA 2
NRTSA 7
NSOUTA 3 ICH_RIJ_PU 22
NCTSA 8
D
NDTRA 4
NRIA 9 Q51
5 R571
C481 C482 C483 C484 C485 C486 C487C488 NRIA 10K G
* 150pF
*NPO,
50V, *+/-5%
50V, NPO,*+/-5%
50V, NPO,*+/-5%
50V, NPO,*+/-5%
50V, NPO,*+/-5%
150pF 150pF 150pF 150pF 150pF 150pF
50V, *+/-5%
NPO,
50V,
150pF
50V,
NPO,NPO,
+/-5%+/-5%
10 +/-5%
R0603
2N7002
S
C0603 C0603 C0603 C0603 C0603 C0603 C0603

C0603 COM1 R573 SOT23_GSD
2
10K
+/-5% D21 7.5 Ohm@Vgs=5V
R0603 1N4148W
SOD123
A A
1
COM 1
placed near connector
FOXCONN PCEG
Title
Serial / Parallel
C 945M03 A

5 4 3 2 1
5 4 3 2 1
for some power supplies without pw-ok function

5V_SB_SYS EMI CAPS.
-12V_SYS 3D3V_SYS 3D3V_SYS 12V_SYS 5V_SB_SYS
5V_SYS 3D3V_SYS 12V_SYS 3D3V_SYS

R576 5V_SYS 5V_SYS
8.2K
+/-5% PWR1
R0603 13 1 R577
14
+3.3V3 +3.3V1
-12V +3.3V2 2 100K Value? C489 C490 C491
1
D
11,34 PS_ONJ
15
16
GND4
PSON
GND1
+5V1
3
4
+/-1%
R0603 * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
* 0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20% D
17 5 C0603 C0603 C0603
2
GND5 GND2
18 GND6 +5V2 6
19 GND7 GND3 7
20 8 PWRG_ATX
RSVD PWR0K
21 +5V3 +5V_AUX 9
22 +5V4 +12V_1 10
23 +5V5 +12V_2 11
24 12 C492 12V_SYS
GND8 +3.3V4
HM1512E-EP1 * 0.1uF
25V, Y5V, +80%/-20%
C0603
PWR24NWP2_HM25A
for 5V_SYS / 5V_SB switching quickly 3D3V_SYS

PWRG_ATX 10,34
2
D25
D
1N4148W
Q54 FAB.B SOD123
R581
PWR CON PCB change Clear CMOS
1
100 G
+/-5% 2N7002 CLR_CMOS(2-3)
R0603 from pwr24nwh128 to PWR24NWP2_HM25 CLR_CMOS JP6 CMOS
S
1 1
22,23 RTCRSTJ 2 2
3 3 Clear (1-2)
Jumper_2P-Blue
Header_1X3 Normal (2-3) Default N/A
H3M
prevent clearing CMOS when power-on

C C
INTR(1-2)
5V_SYS INTR
22 INTRUDERJ 1
2
Jumper_2P-Blue
Header_1X2 Dummy
N/A
C493
0.1uF
25V, Y5V, +80%/-20% * Chassis Intruder
C0603 IR
1 1
34 IRRX 3 3
4 4
34 IRTX 5 5
Header_1X5_2
C494 C495
* *
470pF 470pF
50V, X7R,50V,
+/-10%
X7R, +/-10%
C0603 C0603 IR CONNECTOR SPEAKER HEADER
Dummy Dummy SPEAKER
1 1
R582 3 Dummy
5V_SYS 100 3
4 4 H4MO2
+/-5%
R0603 Header_1X4_2
R583 BUZ
100 1 +
5V_SB_SYS +/-5%
R0603 BUZZER
B
2 - B
R639
3D3V_DUAL 3D3V_SYS 4.7K Buzzer
+/-5%
R0603 5V_SYS BZ2
R584 D23 R673 PLED
4.7K 1N4148W 4.7K
+/-5% SOD123 +/-5%
C
R0603 R0603 Q55 R652 D26

5V_SB_SYS 5V_SYS 34 S1_LED Dummy 2 1 B PMBT3904 4.7K BAT54C
SOT23_BEC +/-5% SOT23_123
C
Date:10/09 R0603 2 R586
22,32 SPKR
E
3 2.2K B Q56 C496

PMBT3904
5V_SYS 3D3V_DUAL
34 SIO_BEEP 1 +/-5%
R0603 SOT23_BEC * 0.1uF
25V, Y5V, +80%/-20%
E
* R587
330
R671
330
5V_SB_SYS C0603
R588 R589 +/-5% +/-5%

330 8.2K apply CIS R0603 R0603 R590
+/-5% +/-5% Dummy 4.7K
R0603 R0603 FP1 1N4148W +/-5%
Dummy R0603
1 2 PLED+ SOD1231 2 D24 S3_LED 34
FAB.B
3 4 PLED
23 HDD_LEDJ
5 6 SIO_beep pull high
7,12,22 ICH_SYS_RSTJ 7 8
9 X FAB.B
C497 C498 Header_2X5_10 Shield D24 reverse
34 PBTNJ_SIO
* 470pF
50V, X7R, +/-10% * 470pF
50V, X7R, +/-10%
HH2X5MZO10
C0603 C0603 C499

Dummy Dummy * 0.1uF
25V, Y5V, +80%/-20%
C0603
Dummy
A A
Front Panel Switch/LED
HD_LED+ 1 2 Power
HD_LED- 3 4 Power LED(Green)
GND 5 6 Power button

Reset button
NC
7
9
8
10
GND
Key
FOXCONN PCEG
Title
S0: steady light
S1: blinking Power / MISC Connector
S3~S5: off Size Document Number Rev
C 945M03 A

5 4 3 2 1
5 4 3 2 1
D
PULL HIGH 1K D
VTT_OUT_RIGHT VTT_OUT_RIGHT
R620 R626
680 680
+/-5% +/-5%
R0603 R0603
R622 Dummy
10K R628 10K
Dummy
8,34 PVID0 VID0 12 8,34 PVID3 VID3 12
R621 R627
R644 0 100K
Dummy R647 0 100K
Dummy
+/-5% +/-5%
R0603 R0603
R623 BOM need update R629

680 680
+/-5% +/-5%
C R0603 R0603 C
R625 10K
Dummy R631 Dummy
10K
8,34 PVID1 VID1 12 8,34 PVID4 VID4 12
R624 R630
R645 0 100K
Dummy R648 0 100K
Dummy
+/-5% +/-5%
R0603 R0603
R632 R635
680 680
+/-5% +/-5%
R0603 R0603
R634 10K
Dummy R637 10K
Dummy
8,34 PVID2 VID2 12 8,34 PVID5 VID5 12
R633 R636
R646 0 100K
Dummy R649 0 100K
Dummy
+/-5% +/-5%
B R0603 R0603 B
FAB.B for VID adjust

1, Add R621, R627, R624, R630, R633, R636 100K
2, Change R644, R645, R646, R647, R648, R649 to 1K
3, Add R663, R664 680 ohm
4, Dummy R642, R643 page34
5, Add R640, R641 0 ohm page34
6, Add R545 page34
7, Add R65 1K, R74 4.7K page34
8, Add Q65 PMBT3904 page34
A A
FOXCONN PCEG
Title
VID CONTROLLER
Custom 945M03 A

5 4 3 2 1
5 4 3 2 1
ICH7 GPIO Summary

D
Name
GPIO0
GPIO1
Power Well
Vcc3_3
V5REF
Type
I/O
I/O
Description
Pull-up through
REQ_5#
10K resistor(Unused) Super I/O GPIO Summary D
Name Power Plane Type Description

GPIO2 V5REF I/OD PIRQE#
GPIO27 SUS I/O BEEP
GPIO3 V5REF I/OD PIRQF#
GPIO26 SUS I/O TURBOJ
GPIO4 V5REF I/OD PIRQG#
GPIO21 SUS I/O THROT
GPIO5 V5REF I/OD PIRQH#
GPIO20 SUS I/O S3_LED
GPIO6 Vcc3_3 I/O THROT
GPIO22 SUS I/O S1_LED
GPIO7 Vcc3_3 I/O FWH_WPJ
GPIO16 MAIN I/O VID_SELECT
GPIO8 VccSus3_3 I/O LPC PME#
GPIO9 VccSus3_3 I/O Pull-up through 10K resistor(Unused) I/O
GPIO12 VccSus3_3 I/O Pull-up through 10K resistor(Unused)
GPIO13 VccSus3_3 I/O Wake On LAN
GPIO14 VccSus3_3 I/O AFP_DETECT
GPIO15 VccSus3_3 I/O Pull-up through 10K resistor(Unused)
GPIO16
GPIO17
Vcc3_3
Vcc3_3
I/O
I/O
(Unused)
GNT_5#
FWH GPIO Summary
GPIO18 Vcc3_3 I/O (Unused)
C
Name Power Plane Type Description C
GPIO19 Vcc3_3 I/O SATA_1GP
GPIO20 Vcc3_3 I/O (Unused) FGPI0 Main I BOARD_ID0
GPIO21 Vcc3_3 I/O SATA_0GP FGPI1 Main I BOARD_ID1
GPIO22 Vcc3_3 I/O REQ_4# FGPI2 Main I BOARD_ID2
GPIO23 Vcc3_3 I/O Pull-up through 10K resistor(Unused) FGPI3 Main I BOARD_ID3
GPIO24 VccSus3_3 I/O (Unused) FGPI4 Main I BOARD_ID4
GPIO25 VccSus3_3 I/O (Unused)
GPIO26 VccSus3_3 I/O DDR_VOL_1.9V
GPIO27 VccSus3_3 I/O SYS_VOL_1.6V
GPIO28 VccSus3_3 I/O SYS_VOL_1.7V
GPIO29 VccSus3_3 I/O USB OC5#
GPIO32
GPIO33
GPIO34
Vcc3_3
Vcc3_3
Vcc3_3
I/O
I/O
I/O
(Unused)
IDE1 Cable Detection(33 or 66/100)
(Unused)
PCI Routing Summary
GPIO35 Vcc3_3 I/O (Unused) PCI1 PCI2 LAN
GPIO36 Vcc3_3 I/O SATA_2GP INTAJ D C A
B GPIO37 Vcc3_3 I/O SATA_3GP INTBJ A D B
GPIO38 Vcc3_3 I/O FWH_TBLJ INTCJ B A

GPIO39 VccSus3_3 I/O Pull-up through 10K resistor(Unused) INTDJ C B
GPIO40 N/A N/A Not Implemented INTEJ C
GPIO41 N/A N/A Not Implemented INTFJ B
GPIO42 N/A N/A Not Implemented INTGJ A
GPIO43 N/A N/A Not Implemented INTHJ D
GPIO44 N/A N/A Not Implemented REG#/GNT# 2 1 0 3
GPIO45 N/A N/A Not Implemented IDSEL 18 17 21 19
GPIO46 N/A N/A Not Implemented
GPIO47 N/A N/A Not Implemented
GPIO48 Vcc3_3 I/O GNT_4#
GPIO49 V_CPU_IO I/O CPU_PWRGD
A A
FOXCONN PCEG
Title
New Card Header and Riser Card
C 945M03 A

5 4 3 2 1
5 4 3 2 1
1, Dummy R148
2, CPU PIN.AL3 floating
D
3, Dummy R213, R215 D
4, VGA on 945G@945GZ
Dummy C249, C254, C259
Change L19, L21, L23 to Res 0 Ohm
Change C252, C255, C260 to 10pF
Change L20, L22, L24 to inductor 47nH
Del R301 Add R302
5, Add R104, R109 4.7K
6, Dummy R592
7, Change R369 from 5.6K to 2.49K on RTL8110SC
8, for AUDIO on all sku
Add R685, R686 2.2K
Add D35 BAT54A
AUDIO CON change from JA33331-H21P-4F-G to JA33331-HA1P-4F-G
C C
9, Change C432 from NPO to X7R for material issue on all SKU
10, For PCIRSTJ
Add R689 Dummy.
Add R543 0 ohm, R544 4.7K
11, FAB.B for VID adjust on all SKU
Add R621, R627, R624, R630, R633, R636 100K
Change R644, R645, R646, R647, R648, R649 to 1K
Add R663, R664 680 ohm
Dummy R642, R643
Add R640, R641 0 ohm
Add R545 0 ohm
Add R65 1K, R74 4.7K
Add Q65 PMBT3904
B
12, Reverse CPU_FAN con B
13, change POW CON(PWR1) PCB footprint from pwr24nwh128 to PWR24NWP2_HM25

14, Add R652 4.7K ohm
15, Reverse D24
16, CPU power
17, 1D5V power sequence
18, Add R140 1K ohm
19, Change EC37 PCB FOOTPRINT TO CE35_50D100H300
20, Add R112, Dummy R96, R97
A A
FOXCONN PCEG
Title
Modify List
Custom 945M03 A

5 4 3 2 1

945M03 Schematic Foxconn Precision Co. Inc.: Fab.B Data: 2006/07/13 Page Index

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945M03 Schematic Foxconn Precision Co. Inc.: Fab.B Data: 2006/07/13 Page Index

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Доступные форматы

5 4 3 2 1

Foxconn Precision Co. Inc.

06. Power Sequence 30. USB

16. LAKEPORT-GMCH-3 40. Modify List

Date: Thursday, August 17, 2006 Sheet 1 of 40

Prescott, Smithfield &

GMCH DDR2 533/667 Channel B DDR2

Back Panel 5788

Date: Thursday, August 17, 2006 Sheet 2 of 40

CPU (Tejas / Prescott)

Front Panel PWROK AC_RST#

RST# RST# Audio

Date: Thursday, July 13, 2006 Sheet 3 of 40

MCH 133/200 MHz Diff Pair

DDR2 4 Slots 12 Diff CLKs

PCI Express/DMI 100 MHz Diff Pair

PCI 33 MHz PCI Slot 2

SATA 100 MHz Diff Pair

Date: Thursday, July 13, 2006 Sheet 4 of 40

Vcore (Core Logic) PCI Express

1.5V PCI Express=tbdmA

1.8V +2.5V=tbdA BJT

*Power derived through filter FOXCONN PCEG

Date: Thursday, July 13, 2006 Sheet 5 of 40

+3D3V_DUAL +3D3V_SYS +3D3V_SYS +3D3V_DUAL

+5V_SYS +5V_DUAL +5V_DUAL +5V_SYS

+3D3V_SYS +3D3V_DUAL +3D3V_DUAL +3D3V_SYS

+1D8V_STR +1D8V_STR +1D8V_STR +1D8V_STR

Date: Thursday, July 13, 2006 Sheet 6 of 40

PCI/REF/USB Power Filter 3D3V_SYS 3D3V_SYS

place near pin 5, 56 place near pin 48

latched select input for 24 or 48 MHz output

Date: Thursday, July 13, 2006 Sheet 7 of 40

R59 C0603 R0603

C42 C0603 +/-5% +/-5% L3 0.1uF

0.1uF PHASE1 AOD472 AOD472 R72

VID2 25V, X7R, +/-10% C53

BOOT3 +/-5% C0805 0.22uF R84 25V, Y5V, +80%/-20% +/-1%

+/-1% C57 2.2

higher than 0.850V 1K 25V, X7R, +/-10%

Size Document Number Rev

Date: Thursday, July 13, 2006 Sheet 8 of 40

C0603 CE50D100H300 CE50D100H300 CE50D100H300 CE50D100H300

0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

C EC14 EC15 EC16 EC17 EC18 C

R92 TC1 TC2

c1206h6 c1206h6 c1206h6 c1206h6 c1206h6 c1206h6

R0603 R0603 BC7 BC8 BC9 BC10 BC11 BC12

16V, Y5V, +80%/-20% Dummy Dummy Dummy Dummy Dummy Dummy

R0603 22uF 22uF 22uF 22uF 22uF 22uF

Dummy 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10% 6.3V,X5R,+/-10%

Date: Thursday, July 13, 2006 Sheet 9 of 40

LGATE R105 3.3uH@100KHz

R0603 C1206h18 C1206h18

U5 AIC1084CE 5V_SYS 5V_SB_SYS

CE35D80H200 G PWRG_ATX 5V level

Date: Monday, July 31, 2006 Sheet 10 of 40

10V, X5R, +/-10%

10V, X5R, +/-10%

10V, X5R, +/-10%

10V, Y5V, +80%/-20%

10V, Y5V, +80%/-20%

BOM need update R87 R696 6 AOD452 AOD452