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1 Overview
Features
• One channel device
• Low Stand-by current
• Current controlled input
• Reverse battery protection
• Electrostatic discharge protection (ESD)
• Optimized Electromagnetic Compatibility (EMC)
• Compatible to cranking pulses (Severe cold start E11 in LV124)
• Embedded diagnostic functions
• Embedded protection functions
• Green Product (RoHS compliant)
Potential applications
• Suitable for resistive, inductive and capacitive loads
• Replaces electromechanical relays, fuses and discrete circuits
• Most suitable for application with high current loads, such heating system, fan and pump
• PWM applications with low frequency
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100.
Description
The BTS50025-1TEA is a 2.5mΩ single channel Smart High-Side Power Switch, embedded in a PG-TO-252-5-11
package, providing protective functions and diagnosis. It contains Infineon® ReverSave™ functionality. The
power transistor is built by an N-channel MOSFET with charge pump. It is specially designed to drive high
current loads up to 60A, for application like heaters, glow plugs, fan and pump in the harsh automotive
environment.
Table of Contents
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Pin Assignment 8
3.2 Pin Definitions and Functions 8
3.3 Voltage and Current Definition 9
4 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1 Absolute Maximum Ratings 10
4.2 Functional Range 13
4.3 Thermal Resistance 14
5 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 Power Stage 15
5.1.1 Output ON-State Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.2 Switching Resistive Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.3 Switching Inductive Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.3.1 Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.3.2 Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.1.4 PWM Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1.5 Advanced switch-off behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.2 Input Pins 19
5.2.1 Input Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.3 Protection Functions 19
5.3.1 Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.3.1.1 Activation of the Switch into Short Circuit (Short Circuit Type 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.3.1.2 Short Circuit Appearance when the Device is already ON (Short Circuit Type 2) . . . . . . . . . . . . 20
5.3.1.3 Over-power shutdown (PSD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.3.2 Temperature Limitation in the Power DMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.4 Diagnostic Functions 22
5.4.1 IS Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.4.2 SENSE Signal in Different Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.4.3 SENSE Signal in the Nominal Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.4.3.1 SENSE Signal Variation and Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.4.3.2 SENSE Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.4.3.3 SENSE Signal in Case of Short Circuit to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.4.3.4 SENSE Signal in Case of Over Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
List of Tables
Table 1 Product Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table 2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 3 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 5-1 Sense Signal, Function of Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 6-1 Electrical Characteristics: BTS50025-1TEA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 7-1 Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
List of Figures
Figure 2-1 Block Diagram for the BTS50025-1TEA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2-2 Internal diode diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3-1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3-2 Voltage and Current Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 1 Maximum Energy Dissipation for Inductive Switch OFF, EAS/AR vs. IL at VS = 13.5 V . . . . . . . . . . . . 12
Figure 2 Maximum Energy Dissipation Repetitive Pulse temperature derating . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 3 Typical Transient Thermal Impedance Zth(JA) = f(time) for Different PCB Conditions . . . . . . . . . . 14
Figure 5-1 Switching a Resistive Load: Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 5-2 Output Clamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 5-3 Switching an Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 5-4 Switching in PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 5-5 Input Pin Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 5-6 Diagram of Diagnosis & Protection Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 5-7 Over Power Shutdown behavior at low voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 5-8 Behavior of the BTS50025-1TEA during PWM operation above FIN max . . . . . . . . . . . . . . . . . . . . . 21
Figure 5-9 Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 5-10 Diagnostic Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 5-11 Current Sense for Nominal and Overload Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 5-12 IIL0 and IISO definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 5-13 Improved Current Sense Accuracy after 2-Point Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 5-14 Fault Acknowledgement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 7-1 Application Diagram with BTS50025-1TEA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 8-1 PG-TO-252-5-11 (RoHS-Compliant) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2 Block Diagram
VS
voltage sensor
gate control
driver &
IN charge over current
logic switch OFF
pump
ESD
protection OUT
load current sense
IS
VCC
35V
200
IN IFB OUT
3 Pin Configuration
3
1 2 4 5
I VS
VS
VS
I IN
IN
V DS
I OUT
OUT
VIN
I IS V OUT
IS
V IS
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Ear - TJ(0)<105°C
1.5
EA [J]
1.0
0.5
0.0
0 10 20 30 40 50 60
IL(0) [A]
Figure 1 Maximum Energy Dissipation for Inductive Switch OFF, EAS/AR vs. IL at VS = 13.5 V
100%
80%
EAR derating
60%
40%
20%
0%
100 110 120 130 140 150
Tj(0) [°C]
Note: Within the functional or operating range, the IC operates as described in the circuit description. The
electrical characteristics are specified within the conditions given in the Electrical Characteristics
table.
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more
information, go to www.jedec.org.
Figure 3 is showing the typical thermal impedance of BTS50025-1TEA mounted according to JEDEC JESD51-
2,-5,-7 at natural convection on FR4 1s0p and 2s2p boards.
100
JEDEC 1s0p / 600mm²
0.1
0.01
0.0001 0.001 0.01 0.1 1 10 100 1000
time [sec]
Figure 3 Typical Transient Thermal Impedance Zth(JA) = f(time) for Different PCB Conditions
5 Functional Description
VOUT VOUT
80 % VS
50 % VS
dVOFF/dt
dVON /dt
VIN
25 % VS
20 % VS
tON(DELAY) tR VIN tOFF( DELAY) tF
VS
VIN
Smart
Clamp
IN VDS
LOGIC
VS IL
OUT
VOUT
L , RL
VIN
t
VOUT
VS
Gnd
VS - VDS(Fast off) t
VS -VDS(CL)
IOUT
Tj
TJ0
t
The BTS50025-1TEA provides Infineon® SMART CLAMPING functionality. To increase the energy capability, the
clamp voltage VDS(CL) increases with junction temperature TJ and with load current IL. Refer to Page 37.
L VS − VDS(CL) RL × IL
E = VDS(CL) ×
RL
× [ RL
× ln 1 − (
VS − VDS(CL)
) ]
+ IL
(5.1)
Following equation simplifies under the assumption of RL = 0 Ω.
1 VS
E=
2
(
× L × I2L × 1 −
VS − VDS(CL)
)
(5.2)
The energy, which is converted into heat, is limited by the thermal design of the component. See Figure 1 for
the maximum allowed energy dissipation as function of the load current.
V S - V IN
VIN_H
VIN_L
t
PTOT
tDC
VS
75V 2mA
IN
RIN
VS
V DS
Vb, IS ESD VS
IN protection current
sense
Driver
0
1
IIS(fault) Over-
IS current IL
1
(IL/dkILIS ) ± IIS0
V IS OUT
tIN( RESET
I IS DELAY
)
&
RIS R Q
GND
5.3.1.1 Activation of the Switch into Short Circuit (Short Circuit Type 1)
When the switch is activated into short circuit, the current will raise. When the output current reaches ICL(0)
value, the device is latched and will turn off after tOFF(TRIP) regardless the output current value. For overload
(short circuit or overtemperature), the maximum retry cycle (ffault) under fault condition must be considered.
5.3.1.2 Short Circuit Appearance when the Device is already ON (Short Circuit Type 2)
When the device is in ON state and a short circuit to ground appears at the output (SC2) with an overcurrent
higher than ICL(0), the device automatically turns OFF and latches the device.
VIN
VS t
VVS-VIN(PSD)
VINL
IOUT ICL(0)
VDS
VDS(PSD)
tPSD(UV)
It also limits the maximum PWM frequency below FIN. See Figure 5-8
Input frequency < Fin max Input frequency > Fin max Input frequency < Fin max
Vin-Gnd
t
Vout-Gnd
t
Vifb t
Figure 5-8 Behavior of the BTS50025-1TEA during PWM operation above FIN max
IN tIN (RESETDELAY)
IL t
t OFF ( TRIP ) t OFF ( TRIP )
ICL(1)
ICL(0)
T J t
T J( TRIP )
TA
t
I IS
I IS( FAULT)
0
start
Short Circuit 1
t
Short Circuit 2
Latch is reseted
Overtemperature
The current sense exact signal timing can be found in the Chapter 5.4.3.2. It is represented here only for
device’s behavior understanding.
5.4.1 IS Pin
The BTS50025-1TEA provides an enhanced current sense signal called IIS at pin IS. As long as no “hard” failure
mode occurs (short circuit to GND / overcurrent / overtemperature) and the condition VIS ≤ VOUT - 3.5 V is
fulfilled, a proportional signal to the load current is provided. The complete IS pin and diagnostic mechanism
is described in Figure 5-10. The accuracy of the sense current depends on temperature and load current. In
case of failure, a fixed IIS(FAULT) is provided. In order to get the fault current in the specified range, the condition
VS - VIS ≥ 3.5 V must be fulfilled.
VS
IS 0
IL
IIS = + I with (IIS ≥ 0)
dkILIS IS0
(5.3)
IL3 - IL1
dkILIS =
IIS3 - IIS1
(5.4)
the definition of IIS0 is:
IL1
IIS0 = IIS1 −
dkILIS
(5.5)
and the definition of IL0 is:
(5.6)
5
4.5
dKILIS min.
4
dKILIS typ.
3.5
dKILIS max.
3
2.5
IIS [mA]
2
1.5
1
0.5
0
0 20 40 60 80
IL[A]
0.02
dkILIS(min) dkILIS(typ)
0.015
IIS0(max)
0.01
dkILIS(max)
0.005
IIL0(min)
0
IIS [mA]
IIL0(max)
-0.005
IIS0(min)
-0.01
-0.015
-0.02
-0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5
IL[A]
1 IIS(cal)2 − IIS(cal)1
=
dkILIS(cal) IL(cal)2 − IL(cal)1
(5.7)
The offset is defined as follows:
IL(cal)1 IL(cal)2
IIS0(cal) = IIS(cal)1 − = IIS(cal)2 −
dkILIS(cal) dkILIS(cal)
(5.8)
The bluish area in Figure 5-13 is the range where the current sense ratio can vary across temperature and load
current after performing the calibration. The accuracy of the load current sensing is improved and, given a
sense current value IIS (measured in the application), the load current can be calculated as follow, using the
absolute value for ∆(dkILIS(cal)) instead of % values:
( ) (
IL = dkILIS(cal) × 1 + ∆(dkILIS(cal)) × IIS − IIS0(cal) − ∆IIS0(cal) )
(5.9)
where dkILIS(cal) is the current sense ratio measured after two-points calibration (defined in Equation (5.7)),
IIS0(cal) is the current sense offset (calculated after two points calibration, see Equation (5.8)), and ∆IIS0(cal) is
the additional variation of the individual offset over life time and temperature. For a calibration at 25°C ∆IIS0(cal)
varies over temperature and life time for all positive ∆IIS0(cal) within the differences of the temperature
dependent Max. limits. All negative ∆IIS0(cal) vary within the differences of the temperature dependent Min.
limits.
For positive IIS0(cal) values (IIS0(cal) > 0):
Max IIS0 (@TJ = 150°C) − Max IIS0 (@TJ = 25°C) ≤ ∆IIS0(cal) ≤ Max IIS0 (@TJ = -40°C) − Max IIS0 (@TJ = 25°C)
(5.10)
For negative IIS0(cal) values (IIS0(cal) < 0):
Min IIS0 (@TJ = 150°C) − Min IIS0 (@TJ = 25°C) ≥ ∆IIS0(cal) ≥ Min IIS0 (@TJ = -40°C) − Min IIS0 (@TJ = 25°C)
(5.11)
Equation (5.9) actually provides four solutions for load current, considering that ∆(dkILIS(cal)) and ∆IIS0(cal) can
be both positive and negative. The load current IL for any sense current IIS will spread between a minimum IL
value resulting from the combination of lowest ∆(dkILIS(cal)) value and highest ∆IIS0(cal) and a maximum IL value
resulting from the combination of highest ∆(dkILIS(cal)) value and lowest ∆IIS0(cal).
IIS
1/dkILIS(min)
ΔdkILIS(cal)
1/dkILIS(cal)
IIS(cal)2
ΔdkILIS(cal)
IIS 1/dkILIS(max)
IIS(cal)1
Short/
t
Overtemp/
.
PSD
VOUT t
IIS IIS(fault) t
IIS
t
latch reset
no
reset
VIN VIN
t Short t
IL tON
80 % of circuit
IL static
t t
VOUT
VOUT
tsIS(ON) t t
IIS
90 % of
tsIS(ON)_90 IIS IIS( fault)
IS static tsIS(LC)
IIS
t t
tpIS( FAULT)
This is a device with latch functionality. The state of the device will remain and the sense signal will remain on
IIS(FAULT) until a reset signal comes from the IN pin. For example, when a thermal shutdown occurs, even when
the over temperature condition has disappeared, the DMOS can only be reactivated when a reset signal is sent
to the IN pin.
Standby Current for Whole Device with Load, Standby Current for Whole Device with Load,
IVS(OFF) = f(VS, TJ), -40°C, 85°C, 150°C IVS(OFF) = f(TJ) at VS = 13.5 V
10.0
30.0 Vs=13,5V
-40°C
9.0
25.0 8.0
85°C
7.0
20.0 150°C
6.0
IVS(OFF) [µA]
IVS(OFF) [µA]
15.0 5.0
4.0
10.0
3.0
5.0 2.0
1.0
0.0
0 5 10 15 20 25 30 0.0
-40 -20 0 20 40 60 80 100 120 140 160
V S [V]
Temperature [°C]
10 6.0
9 -40°C
5.0
8 25°C
7 150°C
4.0
RDS(ON) [mΩ]
6
RDS(ON) [mΩ]
5 3.0
4
2.0
3
2
1.0
1
0 0.0
3 8 13 18 23 28 -40 -20 0 20 40 60 80 100 120 140 160
V S - V IN [V] Temperature [°C]
100
300
-40°C
25°C
-40°C 250
150°C
75 25°C
150°C
200
tON [µs]
tOFF [µs]
50 150
100
25
50
0
0 0 5 10 15 20 25 30
0 5 10 15 20 25 30
VS - VIN [V]
VS - VIN [V]
0.6 0.6
-40°C
-40°C 25°C
0.5 25°C 0.5 150°C
150°C
0.4 0.4
dVON/dt [V/µs]
dV OFF/dt [V/µs]
0.3 0.3
0.2 0.2
0.1 0.1
0 0
0 5 10 15 20 25 30 0 5 10 15 20 25 30
30.0 30.0
-40°C -40°C
20.0 20.0
EOFF [mJ]
EON [mJ]
15.0 15.0
10.0 10.0
5.0 5.0
0.0 0.0
0 5 10 15 20 25 30 0 5 10 15 20 25 30
40.0 20.0
-40°C
25°C
38.0 150°C
15.0
RDS(REV) [mΩ]
36.0
VDS(CL) [V]
10.0
34.0
5.0
32.0
30.0 0.0
-40 -20 0 20 40 60 80 100 120 140 160 0 5 10 15 20
TJ [°C] V S - V IN [V]
4 100
-40°C
25°C
150°C
10
IIN [mA]
tSD [s]
2
1 -40°C
25°C
150°C
0 0.1
0 5 10 15 20 25 30 0 10 20 30 40 50 60 70 80
25
18500
Ris=500ohm
Ris=1kohm 18400
Ris=2.2kohm
20 18300
18200
15 18100
dKILIS
VIS(FAULT) min. [V]
18000
10 17900
17800
5 17700
17600
0 17500
0 5 10 15 20 25 30 -40 -20 0 20 40 60 80 100 120 140 160
T J [°C]
V S [V]
-40°C 25°C
112
150°C
102
92
82
ICL(0) [A]
72
62
52
42
32
22
12
0 5 10 15 20 25 30
V S - V IN [V]
7 Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.This is
a very simplified example of an application circuit. The function must be verified in the real application.
VBAT
R/ L cable
CVS
VDD
VDD VS
IN
Micro controller R/ L cable
RIS
CSENSE
GPIO RIN D
VSS
Load
8 Package Information
1) Dimensions in mm
9 Revision History
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
IMPORTANT NOTICE
Edition 2018-08-16 The information given in this document shall in no For further information on technology, delivery terms
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest
Published by
characteristics ("Beschaffenheitsgarantie"). Infineon Technologies Office (www.infineon.com).
Infineon Technologies AG With respect to any examples, hints or any typical
81726 Munich, Germany values stated herein and/or any information regarding
the application of the product, Infineon Technologies WARNINGS
hereby disclaims any and all warranties and liabilities
© 2018 Infineon Technologies AG. of any kind, including without limitation warranties of Due to technical requirements products may contain
All Rights Reserved. non-infringement of intellectual property rights of any dangerous substances. For information on the types
third party. in question please contact your nearest Infineon
In addition, any information given in this document is Technologies office.
Do you have a question about any subject to customer's compliance with its obligations
aspect of this document? stated in this document and any applicable legal Except as otherwise explicitly approved by Infineon
Email: erratum@infineon.com requirements, norms and standards concerning Technologies in a written document signed by
customer's products and any use of the product of authorized representatives of Infineon Technologies,
Infineon Technologies in customer's applications. Infineon Technologies’ products may not be used in
The data contained in this document is exclusively any applications where a failure of the product or any
intended for technically trained staff. It is the consequences of the use thereof can reasonably be
responsibility of customer's technical departments to expected to result in personal injury.
evaluate the suitability of the product for the intended
application and the completeness of the product
information given in this document with respect to
such application.