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Kartik Mohanram
Dept. of Electrical and Computer Engineering
Rice University
Administrivia
Turn in HW 0
Mailing list havoc
Downloading notes
Login: elec326
Password: class-notes
Questions/issues?
1
ELEC 220 background (lectures 1-7)
Design metrics
2
Understanding technology scaling
Moore’s law
If transistor count is an acceptable metric of
processing power
Number of transistors that can be crammed into
the same real estate will double every 24 months
More an industry driver
Semiconductor technology will double its
effectiveness every 18 months
The key (in some sense) to this is technology scaling
© Intel Corp.
3
Pictorially
http://www.intel.com/technology/mooreslaw/index.htm
© Intel Corp.
ELEC 326: Digital Logic Design 7
Processor frequency
10000
Doubled every
1000
2 years
Frequency (Mhz)
100 P6
Pentium ® proc
486
10 8085 386
8086 286
1 8080
8008
4004
0.1
1970 1980 1990 2000 2010
Year
4
Processor power
100000
18KW
10000 5KW
1.5KW
Power (Watts)
1000 500W
Pentium® proc
100
286 486
10 8086 386
8085
8080
8008
1 4004
0.1
1971 1974 1978 1985 1992 2000 2004 2008
Year
What’s missing
transistors
5
Technology scaling
Why scaling?
6
Processor power density
10000
Power Density (W/cm2) Rocket
Nozzle
1000
Nuclear
Reactor
100
8086
10 4004 Hot Plate P6
8008 8085 386 Pentium® proc
286 486
8080
1
1970 1980 1990 2000 2010
Year
7
Banias die photograph
© Intel Corp.
Codename Dothan
0.09 micron technology
1.7 to 2.0 GHz
L2 cache 2 MB
Power 21 Watts
Transistor count 140 million
Die size 87 mm2
Let’s analyze these numbers and see if they
conform to technology scaling
8
Types of memory
Side-by-side comparison
Dothan die
Not to scale, but let’s eyeball it anyway
© Intel Corp.
9
Multi-core dies
9 MB cache memory
© Intel Corp.
ELEC 326: Digital Logic Design 20
10
Challenges
11