DR.

AMBEDKAR INSTITUTE OF TECHNOLOGY

(An Autonomous Institution Affiliated To VTU, Belgaum)
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

SUB TITLE : DIGITAL SYSTEM DESIGN USING VERILOG

Sub Code: EC 665 No of Credits : 4:0:0 No of lecture hours/week : 04
Exam Duration: 3 hours CIE : 50 SEE: 50 Total No of lecture hours : 52

Unit No of
SYLLABUS
No. hours
Introduction and Methodology: 11
Digital Systems and Embedded Systems, Binary representation and Circuit
Elements, Real-World Circuits, Models, Design Methodology.
1 Combinational Basics:
Boolean Functions and Boolean Algebra, Binary Coding, Combinational
Components and Circuits, Verification of Combinational Circuits.

Number Basics: 10
Unsigned and Signed Integers, Fixed and Floating-point Numbers.
2 Sequential Basics: Storage elements, Counters, Sequential Datapaths and
Control, Clocked Synchronous Timing Methodology.

Memories: Concepts, Memory Types, Error Detection and 11

Correction.Implementation Fabrics: ICs, PLDs, Packaging and Circuit Boards,
Interconnection and Signal Integrity.
3
Processor Basics: Embedded Computer Organization, Instruction and Data,
Interfacing with memory.

Processor Basics: Embedded Computer Organization, Instruction and Data, 10

Interfacing with memory.
4 I/O interfacing: I/O devices, I/O controllers, Parallel Buses, Serial
Transmission, I/O software.

Accelerators: Concepts, case study, Verification of accelerators. 10

5 Design Methodology: Design flow, Design optimization, Design for test,

Note: Unit 1 and Unit 3 will have internal choice.

TEXT BOOKS:
1. Peter J. Ashenden, Digital Design: An Embedded Ssytems Approach Using
VERILOG, Elesvier, 2010.
2. Zainalabendin Navabi: Verilog System Design, Mcgraw-Hill professional publishing,
2006.
 
REFERENCE BOOKS:

1. David Richard Smith, Paul D. Franzon, Verilog Styles for Synthesis of Digital
Systems,Pearson Education, 2000.
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