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This document provides a faculty profile for Dr. RAMA RAO P.V.V from the Department of Electrical & Electronics Engineering at Sri Vasavi Engineering College. It lists his educational qualifications including a Ph.D from JNTU Hyderabad, employment experience in various teaching and administrative roles, current position as Professor and Dean of R&D, achievements and publications, sponsored research projects, patents, and contact details.
This document provides a faculty profile for Dr. RAMA RAO P.V.V from the Department of Electrical & Electronics Engineering at Sri Vasavi Engineering College. It lists his educational qualifications including a Ph.D from JNTU Hyderabad, employment experience in various teaching and administrative roles, current position as Professor and Dean of R&D, achievements and publications, sponsored research projects, patents, and contact details.
This document provides a faculty profile for Dr. RAMA RAO P.V.V from the Department of Electrical & Electronics Engineering at Sri Vasavi Engineering College. It lists his educational qualifications including a Ph.D from JNTU Hyderabad, employment experience in various teaching and administrative roles, current position as Professor and Dean of R&D, achievements and publications, sponsored research projects, patents, and contact details.
(Sponsored by Sri Vasavi Educational Society) Approved by AICTE, New Delhi and Permanently Affiliated to JNTUK, Kakinada Pedatadepalli, TADEPALLIGUDEM – 534 101, W.G. Dist, (A.P.) Department of Electrical & Electronics Engineering FACULTY PROFILE 1. Name: Dr. RAMA RAO P.V.V. 2. Date of Birth: 05-06-1975 3. Highest Qualification: Ph.D. 4. Academic Qualifications S. No. Degree Institution/ University Year % Division/Class 1 Ph.D. (EEE) JNTU Hyderabad 2012 --- Not Applicable 2 M. Tech (EPE) JNTU College of Engineering, Hyderabad 2006 84.33 I (Distinction) 3 B. Tech (EEE) JNTU College of Engineering, Hyderabad 1998 75.96 I (Distinction) 5. Employment Experience S. No. Period Position & Organization Nature of Job th 1 7 March 2017 to till Professor in EEE & Dean (R&D), Sri Vasavi Teaching, Administration date Engineering College, Tadepalligudem & Research th th 2 6 May 2011 to 6 Professor & HOD, Dept. of EEE, Shri Vishnu Teaching, Administration March 2017 Engineering College for Women, Bhimavaram & Research 3 1st June 2010 to 30th Professor & HOD of EEE, Arjun College of Teaching & October 2010 Technology and Sciences, Hyderabad Administration 4 December 2006 to May Professor & HOD of EEE in Tirumala Engineering Teaching & 2010 College, Bogaram, Hyderabad Administration 5 July 2000 to January Assistant Professor of EEE, Sri Venkateswara Teaching 2007 Engineering College, Suryapet 6 October 1999 to August Adhoc-lecturer, EEE Department, Godavari Teaching 2000 Institute of Engineering & Technology, Rajahmundry 7 September 1998 to Electrical Project Coordinator, M/s. Aster Electrical installations at October 1999 Teleservices Private Limited, Secunderabad. cellular towers 6. Date of joining in this Institution: 07.03.2017 7. Status as on date of joining : Professor 8. Present Status : Professor and Dean (R&D) 9. Number of promotions since date of joining: Nil 10. Achievements since date of joining: No. of International Journals 01 No. of Workshops Attended 00 No of International Conferences 01 Memberships MISTE, FIE, MWASET, MIAENG & MIEEE Others Editor-in-chief of i-Manager’s Journal on Circuits & Systems, reviewer for few international journals and conferences Acted as chair for one session in international conferences organized by Conferences world (ICRTSEM 2016) and KL University (ICSEG 2016), Organized 3 National conferences, ETE 2014, ETE 2015, ETE 2016 IE INDIA Andhra Pradesh State Electrical Division Member Elected for 2016-18 Total Publications: International Journals = 38, International Conferences = 34, National Conferences = 21 11. Sponsored Research Projects (last five years) S. No. Title Agency Period Amount Achievements 1 Structured framework for CSI Scheme, November 2013 Rs. 27.89 5 publications, 1 handling the design nonlinearity DST to October 2016 Lakhs M. Tech, 1 Ph.D. 2 FPGA Based Multilevel WOS-A, DST January 2012 to Rs. 25.10 3 Publications, Inverter March 2015 Lakhs Hardware 12. Filed 2 patents 13. Address: Flat No.: 401, Lekha Vihar Apartment, Besides LIC Office, Tadepalligudem – 534101, Mobile No.: 7569508112, Email: pvvmadhuram@gmail.com I hereby declare that the above details are true to the best of my knowledge and belief. Signature