Вы находитесь на странице: 1из 5

CISTEM’18 - Algiers, Algeria, October 29-31, 2018

Circulating Currents Control for Parallel Grid-Connected


Three-Phase Inverters
S. Bellaa,b, A. Chouderb, A. Djeriouib, A. Houaria, M. Machmouma, M-F. Benkhorisa, K. Ghedamsic
a
IREENA Laboratory, University of Nantes, Saint-Nazaire, France.
b
LGE Laboratory, University of M’sila, Algeria.
c
LMER Laboratory, University of Bejaia, Algeria.
Email: saad.bella@univ-nantes.fr

 three groups: passive methods, modulation methods, and


Abstract—When connecting two parallel three-phase voltage control methods. Traditionally, the most common way to deal
source inverters between the same DC power supply and AC bus, with the zero-sequence circulating current (ZSCC) issue, is to
a zero-sequence circulating current will occur. The presence of install isolating transformers in the ac side of the inverter [6].
these undesired currents increases the power losses and decreases The method may definitely prevent the ZSCC from flowing
the efficiency of the system. It has been demonstrated that through inverters. However, it is expansive, bulky, and
circulating currents are basically influenced by null vectors. In this transformers also produce both copper and core losses. In
paper, modeling of the parallel grid-connected three-phase previous work, different PWM methods are proposed to handle
inverters and the cause of the zero-sequence circulating current the circulating current. In [7]- [10] the suppression of the ZSCC
are presented in detail. Hence, to deal with this issue, a method for is achieved by adding zero-sequence voltage (ZSV) into
suppressing the zero-sequence circulating current based on a PI parallel inverters. In [9] the same approach was applied, where
controller is presented. Simulation results show that the proposed the zero-sequence voltages (ZSV) of slave module is replaced
control strategy achieves to effectively suppress the circulating by the zero-sequence voltages (ZSV) of the master module. The
current. open-loop control needs no stability analysis, but the zero-
sequence voltages of the master module need to be transmitted
to the slave module, thus adding extra burdens to the
Index Terms— Grid-connected inverter, Parallel inverters,
circulating current, zero-null vector. microprocessors of both, master and slave. In [11]- [12] a
circulating current PWM method for parallel inverters was
proposed. The ZSCC is prevented by eliminating the zero-
I. INTRODUCTION sequence circulating path in the harmonic-elimination region in
each inverter or between inverters. However, it increases the
N owadays, three-phase voltage source inverters play an
important role in the growth penetration of energy sources
into the grid and in the development of more electric transport
stress on the switches, thus increasing the conduction losses.
The ZSCC mechanism and modeling in three-phase parallel
inverters are detailly analyzed in [13]. Another approach in
systems [1-2]. For large power generation systems, where [14]. It essentially handles and controls the two parallel three-
reliability is expected, power electronic interfaces are the key phase three-leg inverters as one three-phase inverter. However,
elements. In this subject, the technological limitations of the the control of system becomes too complicated when more than
switching devices limit the use of a central-inverter based two inverters are in parallel.
solution and require the use of more flexible architecture. In this In [15]- [17], it has been introduced a control to modify the
way, for the increase of power capacity and the reliability of the distribution of null vectors in each commutation period of space
system, parallel inverters are usually used. Thus, offering vector PWM with a (PI) controller.
modularity, reliability, high efficiency, and redundancy [2-4]. In this work, the control of two parallel inverters connected
However, when parallel inverters are connected in the same dc to the grid through LCL filters is presented. A control of the
and ac buses, the zero-sequence circulating current will appear circulating current based on PI control is introduced to suppress
between inverters. Generally, the major cause of generating the circulating currents. As a result, good power sharing among
this problem might be the difference between the parameters of these two paralleled-units. This paper is ranged as follows. In
the filters, tolerance of hardware devices, dead-times, and Section II, the model of circulating current of the parallel
asynchronous switching frequencies [4-5]. The presence of the system is analyzed, and, in Section III, presents the control of
zero-sequence circulating current distorts the output currents of the circulating current. Section IV Simulation results validate
each inverter, increases the stress on the switching devices, the control strategy. Finally, section V the conclusions.
increases power losses, and lowers the efficiency of the overall
system. II. THE SYSTEM MODELING
To deal with this issue, many methods was reported in the
literature to suppress the circulating current. Generally, in This paper presents a system of two parallel three-phase voltage
parallel inverters, the used methods can be categorized into source inverters connected to the grid through an LCL filter

978-1-5386-4988-6/18/$31.00 ©2018 IEEE


CISTEM’18 - Algiers, Algeria, October 29-31, 2018

without any additive magnetic components as shown in Fig. 1.


The DC link is set as a constant power source. 2(LLg) 2(r rg )
'dz.vdc
iz

iA1 L ,r Lg, rg ea
ia1
DC Bus

eb Fig. 2. Dynamic model of ZSCC in parallel inverters.


ec

After applying Park transformation, the model of parallel


system in (dqz) frame can be written as:

݆݅݀ ‫݆݀ݒ‬ ݆݅݀


݀ ‫ݒ‬
൫‫ܮ‬௝ ൅ ‫ܮ‬௚௝ ൯ ቎ ‫ ݆ݍ‬቏ ൌ ൥ ‫ ݆ݍ‬൩ െ ሺ‫ݎ‬௝ ൅ ‫ݎ‬௚௝ ሻ ቎݅‫ ݆ݍ‬቏ െ
݅
݀‫ݐ‬ ‫݆ݖݒ‬
݅‫݆ݖ‬ ݅‫݆ݖ‬
Ͳ െ߱ Ͳ ݆݅݀ ݁݀
iA2 L,r Lg, rg ia2
൫‫ܮ‬௝ ൅ ‫ܮ‬௚௝ ൯ ൥߱ Ͳ Ͳ൩ ቎݅‫ ݆ݍ‬቏ െ ൥݁‫ ݍ‬൩ ሺͶሻ
Ͳ Ͳ Ͳ ݅‫݆ݖ‬ Ͳ

where ‫ݒ‬ௗ௝ , ‫ݒ‬௤௝ , and ‫ݒ‬௭௝ are the output voltages of the inverter ݆,
and ‫ݒ‬ௗ௝ , ‫ݒ‬௤௝ , and ‫ݒ‬௭௝ are the phase currents of the inverters.
Assume that for filter inductances ‫ܮ‬ଵ ൌ ‫ܮ‬ଶ ൌ ‫ ܮ‬, ‫ܮ‬௚ଵ ൌ ‫ܮ‬௚ଶ ൌ
Fig. 1. Schematic of the studied system. ‫ܮ‬௚ , and for filter inductances that ‫ݎ‬ଵ ൌ ‫ݎ‬ଶ ൌ ‫ ݎ‬, ‫ݎ‬௚ଵ ൌ ‫ݎ‬௚ଶ ൌ ‫ݎ‬௚ .
Therefore, from (4), the ZSCC dynamic equation can be
Ideally, if there is no difference between the parameters of the obtained as:
two parallel inverters and if they are similar, then no circulating
current might flow. However, a small difference in their ௗ௜೥భ
ʹሺ‫ ܮ‬൅ ‫ܮ‬௚ ሻ ൌ ሺ݀௭ଵ െ ݀௭ଶ ሻǤ ‫ݒ‬ௗ௖ െ ʹ൫‫ ݎ‬൅ ‫ݎ‬௚ ൯݅௭ ሺͷሻ
parameters can lead to a large zero-sequence circulating current ௗ௧

between the parallel inverters.


In the steady state, the average current of the capacitor is zero. noting that:
Therefore, the inverter side currents are equal to the grid side
currents. Then the equations of the system in three-phases can ݅௭ ൌ ݅௭ଵ ൌ െ݅௭ଶ ሺ͸ሻ
be given as:

݀݅௔௝ Fig 2 reveals the zero-sequence circulating current dynamic


‫ۓ‬ሺ‫ܮ‬௝ ൅ ‫ܮ‬௚௝ ሻ ൌ ݀௔௝ ܸௗ௖ െ ሺ‫ݎ‬௝ ൅ ‫ݎ‬௚௝ ሻ݅௔௝ െ ݁௔ model of two parallel inverters.
ۖ ݀‫ݐ‬
݀݅௕௝
ሺ‫ܮ‬௝ ൅ ‫ܮ‬௚௝ ሻ ൌ ݀௕௝ ܸௗ௖ െ ሺ‫ݎ‬௝ ൅ ‫ݎ‬௚௝ ሻ݅௕௝ െ ݁௕ ሺͳሻ III. THE CONTROL OF CIRCULATING CURRENT
‫۔‬ ݀‫ݐ‬
ۖ ݀݅௖௝ A) principle of circulating current suppression
‫ ە‬ሺ‫ܮ‬௝ ൅ ‫ܮ‬௚௝ ሻ ݀‫ ݐ‬ൌ ݀௖௝ ܸௗ௖ െ ሺ‫ݎ‬௝ ൅ ‫ݎ‬௚௝ ሻ݅௖௝ െ ݁௖
It is seen from the equation (5) and the model in Fig. 2 that the
where ݀௞௝ is the phase duty cycle of the inverter݆ሺ݆ ൌ basic reason of emerging the ZSCC is the difference in the
ͳǡʹሻǢ ݇ሺ݇ ൌ ͳǡʹǡ͵ሻ. ݁௞ and ݅௞௝ present the grid voltages and common mode voltages of the two inverters. This last might be
phase currents of the inverter ݆, respectively; ‫ܮ‬௝ , ‫ܮ‬௚௝ , ‫ݎ‬௝ , ‫ݎ‬௚௝ ǡ caused by the difference between filter inductances, equivalent
and ‫ܥ‬, are the parameters of the output LCL filters. The ZSCC series resistances (ESRs), dead-time. Obligatory, as (5)
can be calculated as: indicates, this means that there is a difference in their zero-
 sequence duty cycles.
݅௭௝ ൌ ሺ݅௔௝ ൅ ݅௕௝ ൅ ݅௖௝ ሻȀ͵ሺʹሻ In three-phase inverters, SVPWM modulation technique is
often used. The control vector in each period is generated by
For facilitating the control, this model can be transformed to the two active vectors ܸ௜ ሺ݅ ൌ ͳ െ ͸ሻ and two null vectors ܸ௝ ሺ݆ ൌ
synchronous frame (dqz) by (4): Ͳǡ͹ሻ. The duty cycles of the two active vectors are ݀ଵ , and ݀ଶ
respectively, the duty cycle of null vectors is ݀଴ :
ʹߨ ʹߨ ݀଴ ൌ ͳ െ ݀ଵ െ ݀ଶ (7)
‫•‘… ۍ‬ሺ߱‫ݐ‬ሻ …‘• ൬߱‫ ݐ‬െ ൰ …‘• ൬߱‫ ݐ‬൅ ൰‫ې‬
‫ێ‬ ͵ ͵ ‫ۑ‬
ʹ‫ێ‬ ʹߨ ʹߨ ‫ۑ‬ The suppressing of the zero-sequence circulating current will
ܶ ൌ ඨ ‫ێ‬െ •‹ሺ߱‫ݐ‬ሻ െ •‹ ൬߱‫ ݐ‬െ ൰ െ •‹ ൬߱‫ ݐ‬൅ ൰‫ ۑ‬ሺ͵ሻ
͵ ͵ ͵ be made by eliminating the difference between the two zero
‫ێ‬ ͳ ͳ ͳ ‫ۑ‬
‫ێ‬ ‫ۑ‬ sequence duty cycles ݀௭ଵ , and ݀௭ଶ . This objective is achieved
‫ ۏ‬ξʹ ξʹ ξʹ ‫ے‬ by adjusting the null vectors in each PWM cycle.
CISTEM’18 - Algiers, Algeria, October 29-31, 2018

da As (12) shows, the zero-sequence current loop is a first order


system. The control loop for suppressing the ZSCC can be
designed with a PI controller as:
db
‫ݕ‬ଵ ൌ ܲ‫ܫ‬ሺ݅௭ ‫ כ‬െ ݅௭ ሻሺͳ͵ሻ

Where ݅௭ ‫ כ‬, is the ZSCC reference. The zero-sequence


dc
circulating current will track its reference to generate a variable
‫ݕ‬ଵ with a PI controller as shown in Fig. 4.

d0 d1 d d0 d d1 d0 controller plant
y 2
 2y 2
y
4 2 2 2 2 2 4 iz* y iz
+
3vdc
PI PWM
( L  L ) S  (r  r )
g g
Fig. 3. Null vector adjustment with variable control.

The adjustment of null vector does not affect the line to line
duty cycles and the control objective excluding the output ac Fig. 4. Control loop of zero sequence current.
currents. Thus, this shows that the ݀௭ଵ might be controlled by Fig. 5. shows the control block of the system including the
controlling the null vectors via an introduced variable as ZSCC control. As it can be seen, the d-axis current control is
indicated in Fig. 3. the variable is y, it satisfices: defined as the active power control that flows in the grid, and
ௗబ 
the q-axis current control is defined as the reactive power
ȁ‫ݕ‬ȁ ൑ ሺͺሻ control. Generally, the q-axis current is regulated to be zero for

achieving the unity power factor. PI controllers are used as
The zero-sequence duty cycle ݀௭ଵ can be written as: shown in Fig. 5, and the reference voltages of each single
inverter can be calculated as:
݀଴
݀௭ ൌ ݀௔ ൅ ݀௕ ൅ ݀௖ ൌ ൬݀ଵ ൅ ݀ଶ ൅ ൅ ʹ‫ݕ‬൰ ൅ ‫ݒ‬ௗ௝ ‫ כ‬ൌ ‫ݑ‬ௗ௝ ᇱ െ ߱൫‫ ܮ‬൅ ‫ܮ‬௚ ൯݅௤௝ ൅ ݁ௗ 
ʹ ቊ ሺͳͶሻ
݀଴ ݀଴ ͵ ‫ݒ‬௤௝ ‫ כ‬ൌ ‫ݑ‬௤௝ ᇱ ൅ ߱൫‫ ܮ‬൅ ‫ܮ‬௚ ൯݅ௗ௝ ൅ ݁௤ 
൬݀ଶ ൅ ൅ ʹ‫ݕ‬൰ ൅ ൬ ൅ ʹ‫ݕ‬൰ ൌ ݀ଵ ൅ ʹ݀ଵ ൅ ݀଴ ൅ ͸‫ݕ‬ሺͻሻ
ʹ ʹ ʹ
Where ‫ݑ‬ௗ௝ ᇱ ǡ and ‫ݑ‬௤௝ ᇱ are calculated as:
Therefore,

͵ ‫ݑ‬ௗ௝ ᇱ ൌ ܲ‫ܫ‬൫݅ௗ௝ ‫ כ‬െ ݅ௗ௝ ൯


ο݀௭ ൌ ሺ݀௭ଵ െ ݀௭ଶ ሻ ൌ ሺ݀ଵ ൅ ʹ݀ଵ ൅ ݀଴ ൅ ͸‫ݕ‬ଵ ሻ ቊ ሺͳͷሻ
ʹ ‫ݑ‬௤௝ ᇱ ൌ ܲ‫ܫ‬൫݅௤௝ ‫ כ‬െ ݅௤௝ ൯
͵
െ ൬݀ଵ ൅ ʹ݀ଵ ൅ ݀଴ ൅ ͸‫ݕ‬ଶ ൰ ൌ ͸ሺ‫ݕ‬ଵ െ ‫ݕ‬ଶ ሻሺͳͲሻ
ʹ Inv 1

L ,r Lg, rg
ia1 ea
It is assumed that both inverters have the same control vector, Vdc
eb
ec
hence they have same ݀ଵ and ݀ଶ .
Since there exists one circulating current in two parallel
6
inverters, the control of the ZSCC is applied in one inverter of Inv 2
the two-paralleled system. The SVPWM of the inverter 1 is L,r Lg, rg
ia2
chosen to receive the variable control ‫ݕ‬ଵ . So ‫ݕ‬ଶ is automatically
set to be zero. Then the model of the zero-sequence circulating
current is obtained as:
Inv #1 6
݀݅௭ଵ 6 i ABC 2 i ABC1
ʹ൫‫ ܮ‬൅ ‫ܮ‬௚ ൯ ൌ ͸‫ݕ‬ଵ ܸௗ௖ െ ʹ൫‫ ݎ‬൅ ‫ݎ‬௚ ൯݅௭ଵ ሺͳͳሻ
݀‫ݐ‬ T T abc T
SVM1 SVM2 dqz PLL
 y
B) Proposed control strategy vq* 2 vd* 2 vq*1 vd* 1
Eq.(14) Eq.(14) - - - - - id*1
It is supposed ܸௗ௖ does not change and remains constant, then
+

iq*1
transformation of (11) to S-domain is:
+

uq' 2 ud' 2 uq' 1 ud' 1 id* 2


+

PI
iq*2
+

PI
͵‫ݕ‬ଵ ሺ‫ݏ‬ሻܸௗ௖ iz*
+

݅௭ ሺܵሻ ൌ ሺͳʹሻ PI

൫‫ ܮ‬൅ ‫ܮ‬௚ ൯‫ ݏ‬൅ ൫‫ ݎ‬൅ ‫ݎ‬௚ ൯ PI

PI


Fig. 5. the control bock of parallel inverters.


CISTEM’18 - Algiers, Algeria, October 29-31, 2018

IV. SIMULATION RESULTS


In order to verify the validity of the control strategy, a
simulation of two parallel inverters is built on
MATLAB/Simulink. The DC input voltage is ܸௗ௖ ൌ ͹ͲͲܸ; the
phase to neutral voltage is ʹʹͲܸȀͷͲ‫ݖܪ‬Ǥ The rest of parameters
are listed below in the table I.
Table. I. System parameters.

Passive filters ‫ܮ‬ଵ ൌ ‫ܮ‬ଶ ൌ Ͷ


‫ܮ‬௚ଵ ൌ ‫ܮ‬௚ଶ ൌ ʹǤͷ
‫ ݎ‬ൌ ͲǤͳ‫݄݉݋‬
‫ ܥ‬ൌ ͷɊ Fig. 8. The circulating currents through the 2-inverters without applying the
ZSCC control.
Switching frequency ݂௦௪ ൌ ͳͲ kHz
Now, Fig. 9 reveals that the circulating current is definitely
To achieve the unity power factor for both of inverters, the reduced with adding the control of ZSCC, and the DC offset
values of ݀-axis current and q-axis current are ݅ௗ ൌ ͷͲ‫ܣ‬, vanish as clearly shown in Fig. 10.
݅௤ ൌ Ͳ‫ܣ‬. Fig. 6 shows the grid voltage and the current of a-
phase of the two parallel inverters ݅௔ଵ ൅ ݅௔ଶ .

Fig. 9. The a-phase currents of the 2-inverters with applying the ZSCC
control.

Fig. 6. Grid voltage and the a-phase current.

The results below are obtained under unequal conditions, that


is done by introducing delays in the time of PWM of the
inverters. As a result, the two inverters are not similar.
Fig. 7 displays the a-phase currents of the two inverters. It is
seen that without applying the ZSCC control, the a-phase
currents are offset by the ZSCC component. Fig. 8 shows the
circulating currents ݅௭ଵ , and ݅௭ଶ , also without the control of
ZSCC.
Fig. 10. The circulating currents through the 2-inverters with applying the
ZSCC control.

V. CONCLUSION
This paper presented a simulation of suppression the zero-
sequence circulating current for two parallel grid-connected
three phase inverters. The system modeling and the origin of
generation the zero-sequence circulating current are detailed. A
control strategy for suppressing the circulating current based on
PI controller is proposed. The simulation results showed the
Fig. 7. The a-phase currents of the 2-inverters without applying the ZSCC effectiveness of the control method for minimizing the zero-
control. sequence circulating current when two parallel inverters operate
under unequal conditions.
CISTEM’18 - Algiers, Algeria, October 29-31, 2018

REFERENCES
[1] P. Zhang, G. Zhang, and H. Du, “Circulating Current Suppression of
Parallel Photovoltaic Grid-Connected Converters,” IEEE Trans. Cir. Sys., vol.
PP, no. 99, pp. 1–1, Jan. 2018.
[2] B. Li,W. Yao, L. Hang, L.M. Tolbert, “Robust proportional resonant
regulator for grid-connected voltage source inverter (VSI) using direct pole
placement design method,” IET Power Electronics, vol. 5, no. 8, pp. 1367–
1373, Sep. 2012.
[3] X. Xing, C. Zhang, A. Chen, H. Geng,, “Deadbeat Control Strategy for
Circulating Current Suppression in Multi-Paralleled,” IEEE Trans. Ind.
Electron, vol. 65, no. 88, pp. 6239–6249, Sep. 2018.
[4] J. Wang, F. Hu, W. Jiang, W. Wang, and Y. Gao, “Investigation of Zero
Sequence Circulating Current Suppression for Parallel Three-Phase Grid-
Connected Converters Without Communication,” IEEE Trans. Ind. Appl., vol.
PP, no. 99, pp. 1–1, Jan. 2018.
[5] B. Wei; J.M. Guerrero; J.C. Vásquez; X. Guo, “A Circulating Current
Suppression Method for Parallel Connected Voltage-Source-Inverters (VSI)
with Common DC and AC Buses,” IEEE Trans. Ind. Appl., vol. 53, no. 4, pp.
3758–3769, Jul./Aug. 2017.
[6] J.-K. Ji and S.-K. Sul, “Operation analysis and new current control of
parallel connected dual converter system without interphase reactors,” in Proc.
25th Annu. Conf. Ind. Electron. Soc., San Jose, America, 1999, pp. 235–240.
[7] Xueguang Zhang, Tianyi Wang, Xiongfei Wang, Gaolin Wang, Zhe Chen
Dianguo Xu, “Coordinate Control Strategy for Circulating Current Suppression
in Multi-Parallel Three-Phase Inverters,” IEEE Trans. Ind. Electron., vol. 64,
no. 1, pp838-847, Jun. 2017.
[8] J. S. Siva Prasad; R. Ghosh; G. Narayanan, “Common-Mode Injection
PWM for Parallel Converters,” IEEE Trans. Ind. Electron., vol.62, no. 2,
pp.789-794, Feb. 2015.
[9] T. P. Chen, “Dual-modulator compensation technique for parallel inverters
using space-vector modulation,” IEEE Trans. Ind. Electron., vol. 56, no. 8, pp.
3004–3012, Aug. 2009.
[10] W. Jiang; W. Ma; J. Wang; W. Wang; X. Zhang; L. Wang, “Suppression
of Zero Sequence Circulating Current for Parallel Three-phase Grid-connected
Converters Using Hybrid Modulation Strategy,” IEEE Trans. Ind. Electron.,
vol. 65, no. 4, pp. 3017–3026, Apr. 2018.
[11] T-P Chen, “Zero-Sequence Circulating Current Reduction Method for
Parallel HEPWM Inverters Between AC Bus and DC Bus,” IEEE Trans. Ind.
Electron., vol. 59, no. 1, pp. 290-300, Jan. 2012.
[12] M. Narimani; G. Moschopoulos, “Improved Method for Paralleling
Reduced Switch VSI Modules: Harmonic Content and Circulating Current,”
IEEE Trans. Ind. Electron., vol. 29, no. 7, pp. 3308–3317, Jul. 2014.
[13] Z. Ye; D. Boroyevich; F. C. Lee, “Modeling and Control of Zero-Sequence
Current in Parallel Multi-Phase Converters,” in IEEE 31st Annu. Power
Electron. Spec. Conf., 2000, pp. 680-685.
[14] A. Zorig, S. Barkat, M. Belkheiri, A. Rabhi and F. Blaabjerg, “Novel
Differential Current Control Strategy Based on a Modified Three-Level
SVPWM for two Parallel-Connected Inverters,”
[15] Z. Ye; D. Boroyevich; J.Y. Choi; F. C. Lee, “Control of Circulating
Current in Two Parallel Three-Phase Boost Rectifiers,” IEEE Trans. Ind.
Electron., vol. 17, no. 5, pp. 609–615, Sep. 2002.
[16] Z. Xueguang; C.Jiaming; M. Yan; W. Yijie; X. Dianguo, “Bandwidth
Expansion Method for Circulating Current Control in Parallel Three-phase
PWM,” IEEE Trans. Ind. Electron., vol. 29, no. 12, pp. 6847–6856, Dec. 2014.
[17] X. Zhang; T. Wang; X. Wang; G. Wang; Z. Chen; D. XuA , “Coordinate
Control Strategy for Circulating Current Suppression in Multiparalleled Three-
Phase Inverters,” IEEE Trans. Ind. Electron., vol. 64, no. 1, pp. 838–847, Jan.
2017.

Вам также может понравиться