Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01
Simulink Model of a 3-Level Voltage Fed Soft-
Switching Inverter with Two ARDCL Snubbers
Ali Kadhim Abdul-Abbas , Rabee' Hashim Thejel , Haroutuon A. Hairik
Abstract—This paper presents a new simulation soft
switching three level inverter using MATLAB program.
This circuit uses two identical Auxiliary Active Resonant
DC Link (ARDCL) snubbers connected to the high
voltage DC bus line of three-level inverter. The circuit has
the flexibility of selecting switching instants of the
resonant link in synchronism with SVPWM technique.
Control technique does not require the help of inverter
switches to create the zero voltage instants in the main
switches. In this paper, the principle of operation and
detailed analysis of the proposed ARDCL inverter are
presented and design considerations for achieving soft
switching are obtained. Detailed MATLAB simulation
studies are carried out to study the feasibility of the
proposed topology under various load condition.
key word: multilevel inverter, soft switching,
Matlab/simulation
I. INTRODUCTION
Multilevel inverters are being increasingly used in high
power industrial application due to their compatibility for
medium voltage and improved output performance at that
voltage as compared to two-level inverter [1,2,3].
Among various modulation techniques for a multilevel
inverter, Space Vector Pulse Width Modulation (SVPWM) is
an attractive candidate due to the following merits: It directly
uses the control variable given by the control system and
identifies each switching vector as a point in complex (α, β)
space, it is useful in improving DC link voltage utilization,
reducing commutation losses and THD [4,5].
In recent years, soft switching power conversion circuit
and system technologies have attracted special interest as
next generation power converters, which can achieve
efficiency improvement in high-frequency switching and
lowered electromagnetic noises [6,7]. In general, soft
switching power conversion circuit topologies can be
classified into four types: resonant DC link snubber, resonant
AC link snubber, auxiliary resonant commutated snubber and
resonant switching block link snubber[8].
This paper presents the operation performance of modified
type of Auxiliary Resonant DC Link snubber inverter, The
operation principle of this circuit and operation modes of
space vector three level inverter which incorporates soft
switching circuit is described on the basis on performance
evaluation which includes simplified implementation,
reduced auxiliary power semiconductor device and circuit
component stresses.
Mar 2012 ATE-40206015©Asian-Transactions
This soft switching compared with the conventional three-
phase three-level hard switching inverter under the conditions
of specified parameters. Theoretical study and computer
simulation using MATLAB/Simulink program are presented.
II. SVPWM DIODE-CLAMP THERR LEVEL THREE PHASE
VOLTAGE SOURCE INVERTER
The three level converters, also known as a (neutral-
clamped) converter, consist of two capacitor voltages in
series and use the center tap as the neutral. The circuit of
three-phase three-level voltage source inverter is shown in
Fig.1.
A. Analysis of Operation Modes
Mode-A (mode 1):
When switches S1a , S1b are ON and S4a , S4b are OFF ,
then the output voltage is +Vdc/2 for positive phase current
( ia> 0 ). On the other hand switches (diodes) D1a and D1b are
ON when ( ia < 0 ).
Mode-B (mode 0)
State-B of inverter operation is gained when switches S1b
and S4a are ON and S1a and S4b are OFF. Switch S1b is
conducting for ia> 0 and S4a for ia < 0.
Mode-C (mode -1)
State-C of inverter operation is gained when switches S4a
and S4b are ON and S1a and Sb are OFF. Switches (diodes)
D4a and D4b are ON when ia> 0 and switches S4a and S4b are
ON when ia < 0.
B. Theory and Operation of SVPWM
Space vector modulation is based on transforming three
phase quantities into the α-β plane. In general, a three phase
n-level VSI has a total of n3 space vectors, thus in the case of
three-phase three level VSI there are 27 space vectors that
represent the different combinations of the ON/OFF of the
twelve switches of the three-phase VSI[9]
The space vector of phase voltage Vαβ can be defined in
αβ-reference frame as follows
2
V αβ =
2
[V a + a V b + a V c ] …….. (1)
3
where a=ej(2/3) π is the complex operator and Va, Vb and Vc
are voltages of terminals A, B and C with respect to the
neutral point O of DC bus.
43
 Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01

vector and the actual switching state vectors, conventional

S1a S3a D3a space vector modulator uses the nearest three vectors ( small,
D1a S5a D5a
CU Vdc/2 S3b
medium and large) and zero vector in one sector to
S5b approximate reference voltage vector. Three main issues
D1b D3a D5b
S1b
O should be solved in SVPWM procedure: detection of nearest
Vdc c
a b three voltage vectors to the reference vector, determining of
S4a D4a S6a D6a S2a D2a
the corresponding function time and the processing sequence
CL
Vdc/2 of those three voltage vectors.
D4b S6b D6b S2b D2b In order to detect the nearest three vectors to the reference
S4b
vector, the traditional SVPWM method compares the
Ia Ib Ic reference vector with all the divided sections in turn under
α-β reference frame. The computation is relative complex in
L a three-level converter.
In this work, one large, medium and small space vectors
R
are utilized to generate the required gating pulses for the αβ-
plane of the three-phase inverter.
N The times (ta and tb) can be calculated using large and
medium space vectors, then for odd-numbered sectors
Fig.1 Three phase three-level diode-clamping VSI.
π_
The magnitudes of the space vectors shown in Fig.2 have V s*t s sin(k αs )
only four values as follows: 6
ta =
( i ) Large magnitude with 2/3 p.u. value . π
Vl sin( )
(ii) Medium magnitude with 1/√3 p.u. value. 6
(iii) Small magnitude with 1/3 p.u. value. π …….. (2)
(iv) Zero magnitude. V s*t s sin[α s _ (k _ 1) ]
6
The angle between adjacent space vectors is 30º which tb =
π
divide the space vector diagram into 12 sectors (from sector I V m sin( )
to sector XII) and three planes. 6
And for even-numbered sectors
π
β-axis V s*t s sin(k _ α s )
(-11-1) IV III (11-1) 6
ta =
π
V m sin( )
V (01-1) II 6 …….. (3)
π
V s*t s sin[α s _ (k _ 1) ]
(010) (110)
(-110) (-10-1) (00-1)
(1 6
VI I tb =
0- π
(-111) (011) α = 30º (100)
1) (1-1-1) α-axis Vl sin( )
(000) 6
(-100) (0-1-1)
(111) The application times of large, medium and small space
VII (-1-1-1) XII vectors can be calculated as follows
(- (101) (1-10) t aVsm
10 (001) t as =
(0-10)
1) (-1-10) Vl + Vm + Vsm
VIII XI
(0-11) t aV m
(1-11) t am =
(-1-11) IX X Vl + Vm + Vsm
t aVl
t al =
Fig.2 Three-phase VSI phase voltage space vectors in the αβ Vl + Vm + Vsm ……. (4)
plane. t bVsm
t bs =
C. Generation of The Inverter Switching Sequence Vl + Vm + Vsm
The basic idea of space vector modulation is to t bVm
t bm =
compensate the required volt-seconds using discrete Vl + Vm + Vsm
switching states and their on-times produced by inverter [10]. t aVl
Based on the principle of volt-second equivalent, that is volt- tb =
second value balance between magnitude of the reference Vl + Vm + Vsm

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 Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01

The switching patterns of the space vectors that utilize And for even-numbered sectors:
small, medium and large neighboring space vectors for t o = t s _ (tbl + t am + tbs ) ……… ( 6 )
sectors I and II can be shown in Figs. 3 and 4. where to is time of application of zero space vector.
D. Software Simulation of Space Vector Pulse Width
Modulation
The Simulink model for generating of the inverter
000 100 10-1 1-1-1 1-1-1 10-1 100 000 switching pulses in the αβ-plane is implemented using
Eqs.(2)-(6) with the aid of the switching pattern of the twelve
Phase a

1 sectors and a sector indicator facility. This model is shown in

Fig.5. In this figure: F(u)1 and F(u)2 blocks are used to
determine the sector number (K) through calculation of αs
from frequency (f1). F(u)3 and F(u)4 blocks are used to
calculate ta and tb according to Eqs. (3) and (4). F(u)5 to
Phase b

F(u)10 blocks are used to calculate tal , tam , tas , tbl , tbm , tbs
according to Eq. (4). f1 is frequency of the output voltage in
-1 αβ-plane. fs= 10 kHz =Switching frequency. Vs* is the
reference space vector voltage for the three-phase load.
Phase c

Output of F(u)5 to F(u)10 blocks , sector number (K) ,

time of sample (ts) and time (t) are input to crossing block
-1 which is a Matlab M-file software program. M-file generates
the 3-phase VSI switching pulses according to the switching
to/2 tas/2 tbm/2 tal/2 tal/2 tbm/2 tas/2 to/2 pattern of the twelve sectors.
E. Simulation Result
ts
In this section, simulation is performed for the proposed
space vector pulse width modulation by using
Fig.3 Switching pattern (sector I) with utilizing small, medium
Matlab/Simulink program. Figs. 6-8 show voltage and
and large neighboring space vectors.
current for modulation index 0.85 and harmonic spectrum is
shown in Fig. 9.

000 00-1 10-1 11-1 11-1 10-1 00-1 000 2*pi

x F(u)1 F(u)2
1 50 180/π
f1
Phase a

F(u)3
.7 ta
Vs*
2/3
F(u)4 tb
Vl
ts
Phase b

1 tal
F(u)5
1/sqrt(3) tam
F(u)6
1/3 tas
Phase c

Vm Vsm F(u)7
crossing
-1 tbl
F(u)8
tbm
to/2 tbs/ tam/2 tbl/2 tbl/2 tam/ tbm/2 to/2 F(u)9
2 2
tbs
s t F(u)10
Fig.4 Switching pattern (sector II) with utilizing small,
medium and large neighboring space vectors. 1 ts
Fs 10000 Π
t
The time to can be calculated for any sector using these
figures. For odd-numbered sectors it is: F(u)11
to = t s (t al + tbm + t as ) ……… ( 5 )
Fig.5 Implemented simulink model for the generation of
three-phase inverter pulses.

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 Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01
Phase 'a' voltage (Volt)

1000 Fundamental voltage 30

750 Phase b Phase c
500 Phase a
250
0 20
-250
-500
-750 10
-1000

Line current (A)

0 0.01 0.02 0.03 0.04
Time (sec)
0
Phase 'b' voltage (volt)

1000
750 Fundamental voltage
500 -10
250
0
-250
-500
-750 -20
-1000
0 0.01 0.02 0.03 0.04
Time (sec) -30
0 0.01 0.02 0.03 0.04
Phase 'c' voltage (Volt)

1000 Time (sec)

750 Fundamental voltage
500
250 Fig.8 Inverter line currents for a reference voltage of 0.85
0 pu.
-250
-500
-750 800
-1000
Harmonic amplitude (V)

0 0.01 0.02 0.03 0.04 Harmonic frequency=15kHz

600
Time (sec)
Fig.6 Inverter phase voltages for a reference voltage of
400
0.85 pu.
200
Line c-a voltage (volt) Line b-c voltage (volt) Line a-b voltage (volt)

1000 Fundamental voltage

0
0 100 200 300 400 500
0
Harmonic order
-1000
800
Harmonic amplitude (V)

0 0.01 0.02 0.03 0.04

Time (sec) 600

1000 Fundamental voltage 400

Fundamental frequency=50Hz
0 200

-1000 0
0 10 20 30 40 50
0 0.01 0.02 0.03 0.04 Harmonic order
Time (sec)
Fig.9 Harmonic content in line voltage for a reference
voltage of 0.85 pu.
1000 Fundamental voltage

0 III. ANALYSIS OF SOFT SWITCHING SVPWM INVERTER

The schematic 3-level 3-phase voltage source soft
-1000 switching inverter circuit is shown in Fig.10. This circuit has
0 0.01 0.02 0.03 0.04 two identical Auxiliary Active Resonant DC Link (ARDCL)
Time (sec) snubbers connected to the high voltage DC busline.
The main circuit, ARDCL-1 circuit acts at the transition
Fig.7 Inverter line voltages for a reference voltage of 0.85 between state-A and state-B. On other hand, ARDCL-2
pu.

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 Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01

circuit acts at the transition between state-B and state-C. The inductor current iLr1 reaches -Ib2, where -Ib2; the second boost
commutation principle from state B to state A is briefly under current.
a condition of ideal switching power semiconductor devices; State-B: mode-7 [t6, t7]:
assume the load current is kept constant during soft switching During this mode shown in Fig. 17, the active power
period. switch S4a is turned-off, the resonant capacitor voltage VCr1
ARDCL 1 starts charging to Vs/2
State-B: mode-8 [t7, t8]:
Sa1
In this mode shown in Fig. 18, Da1 starts to conduct and
Da2 S1a S3a S5a
iLr1 decreases linearly towards negative direction. This mode
Da1 Sa2
C1
D1a D3a D5a ends when the resonant inductor current iLr1 reaches zero.
VCr1
Da3
SC
a3
r1
S1b S3b S5b Sa1
D1b D3a D5b
C2 Lr1 iLr1 Da2 Sa2 S1a
Vs Da1 VCr1 D1a
C3 Lr2 iLr2 C1 Da3 Cr1
S4a S6a S2a Sa3 S1b
Cr2 D4a D6a D1b
Sa5 D2a C2 Lr1 iLr1
Da5 Vs Ix
C4 S4b S6b S2b Lr2 iLr2
D4b D6b C3 S4a
Da4 Da6 VCr2 Cr2 D4a
Sa6 D2b
C4 Da5 Sa5
Da4 S4b
VCr2 D4b
Sa4 Da6 Sa6
Sa4
ARDCL 2 Ia Ib Ic
Fig.11 State-B: mode-1 operation trajectory.
L
Sa1
R
S1a
Da1 Da2 Sa2 D1a
N C1 VCr1
Da3
Fig.10 3-level 3-phase soft switching voltage source Sa3Cr1 S1b
D1b
inverter. C2 Lr1 iLr1
Vs Ix
C3 Lr2 iLr2 S4a
The operation principle of this inverter is described as D4a
C4 Da5 Sa5Cr2
follows [11] Da4 S4b
VCr2 D4b
State-B: mode-1 [t0, t1]: Da6 Sa6
During this mode shown in Fig. 11,the load current Ix is Sa4
flowing through the main switch S1b, while S1b and S4a are
Fig.12 State-B: mode-2 operation trajectory.
on, the auxiliary switch Sa1 is on.
State-B: mode-2 [t1, t2]: Sa1
In this mode, shown in Fig. 12, the auxiliary active power
switch Sa3 is turned-on, thus the resonant inductor current iLr1 Da2 S1a
Da1 Sa2 D1a
C1 VCr1
flowing through Da2 and Sa3 starts increasing. This mode Da3
Sa3Cr1 S1b
ends when the resonant inductor current iLr1 reaches Ix+Ib1, C2 Lr1 iLr1
D1b
where Ib1; the first boost current. Vs Ix
C3 Lr2 iLr2 S4a
State-B: mode-3 [t2, t3]: D4a
During this mode Sa1 is turned-off, the resonant capacitor Da5 Sa5Cr2
C4 S4b
Da4 VCr2 D4b
Cr1 starts discharge resonantly. This operation is based on a Da6 Sa6
quasi-resonance owing to Lr1 and Cr1 as shown in Fig. 13. Sa4
State-B: mode-4 [t3, t4]:
Fig.13 State-B: mode-3 operation trajectory.
When the resonant capacitor voltage VCr1 reach zero, D1a
starts conducting as shown in Fig. 14 and iLr1 starts to Sa1
decrease linearly. This mode ends when the resonant inductor
Da2 Sa2 S1a
current iLr1 decreases to zero. Da1 VCr1 D1a
C1 Da3
State-B: mode-5 [t4, t5]: Sa3Cr1 S1b
D1b
In this mode shown in Fig. 15, iLr1 and VCr1 are zero. This C2 Lr1 iLr1
mode is called (zero voltage holding mode) and Sa3 is turned- Vs Ix
C3 Lr2 iLr2 S4a
off. D4a
C4 Da5 Sa5Cr2
State-B: mode-6 [t5, t6]: S4b
Da4 VCr2 D4b
During this mode shown in Fig. 16, the auxiliary switch Da6 Sa6
Sa2 is turned-on and iLr1 starts increasing linearly towards Sa4
negative direction. This mode ends when the resonant
Fig.14 State-B: mode-4 operation trajectory.

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 Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01

Sa1

State-B:
iLr1(A)

mode 1

State B: mode 2

State-B: mode 4
State-B: mode 5
State-B: State-B: State-B: State-B:
Da2 S1a mode 3 mode 6 mode 7 mode 8
Da1 Sa2 D1a
600
C1 Da3 VCr1 500
Sa3Cr1 S1b
400
430
D1b
C2 Lr1 iLr1 300
Vs Ix
C3 Lr2 iLr2 S4a 200
D4a 100 80

C4 Da5 Sa5Cr2 0
Da4 S4b
VCr2 D4b -100 t(μsec)
Da6 Sa6 -200
-300 -350
Sa4
Fig.15 State-B: mode-5 operation trajectory. -400
-500
-600
Sa1 Vcr1(V
500
Da2 Sa2 S1a
Da1 D1a
C1 Da3 VCr1
Sa3Cr1 S1b
Vcr1(V) < 0.2
D1b t(μsec)
C2 Lr1 iLr1 1
Vs Ix
C3 Lr2 iLr2 S4a
D4a
C4 Da5 Sa5Cr2 S4b
0
t(μsec)
Da4 iLr1(t) > 0.01
VCr2 D4b 1
Da6 Sa6
Sa4 0
t(μsec)
Fig.16 State-B: mode-6 operation trajectory. iLr1(t)< -0.01
1

Sa1
0 t(μsec)
Da2 Sa2 S1a
Da1 D1a
C1 VCr1
Da3 S1a*
Sa3Cr1 S1b
D1b
C2 Lr1 iLr1 1
Vs Ix
C3 Lr2 iLr2 S4a
D4a S4a*
Da5 Sa5Cr2 t(μsec)
C4 Da4 S4b
VCr2 D4b 1
Da6 Sa6
Sa4 Sa3
t(μsec)
1
Fig.17 State-B: mode-7 operation trajectory.
S1a t(μsec)
Sa1
1
S1a
Da1 Da2 Sa2
VCr1 D1a Sa1
C1 Da3 t(μsec)
Sa3Cr1 S1b
D1b 1
Vs C2 Lr1 iLr1
Lr2 iLr2 Ix
C3 S4a
D4a Sa2
t(μsec)
C4 Da5 Sa5Cr2 S4b
Da4 1
Da6 VCr2 D4b
Sa6
Sa4 S1b
t(μsec)
1
Fig.18 State-B: mode-8 operation trajectory.
S4a t(μsec)
The design specifications of these modes are Vs=1000 V,
Ix=20 A, Lr1=100 μH, rLr1=0.2 Ω, Cr1=0.141 μF, Fs is 1

sampling frequency=15 kHz.

t(μsec)
The commutation from state-A to state-B principally has t0 t1 t2 t3 t4 t5 t6 t7 t8
the same modes of operation for transition from state-B to
Tsoft switching
state-A. The theorical waveforms of these modes can be
shown in Fig. 19.
Fig.19 The theorical waveforms of soft switching modes.

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 Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01

IV. SIMULATION VERIFCATION Soft switch

Simulation has been carried out using MATLAB software 1 S1a* 2 S1b*
to verify the effectiveness of the proposed circuit. Figure 20 S1a* S1a 1 S1b* S1b 2
S1a S1b
3 S4a* 4 S4b*
shows the proposed software of the soft-switching inverter S4a* S4b*
S4a 3 S4b 4
with the auxiliary resonant circuit. The soft-switching circuit 5 S3a* S4a 6 S3b* S4b
can be divided into two parts as shown in Fig. 21. The first S3a*
S3a 5
S3b*
S3b 6
part (circuit 1) acts for transition form state-A to state-B 7 S6a* S3a
8 S6b* S3b
S6a* S6b*
while second part (circuit 2) acts for transition from state-B 9 S5a* S6a 7
10 S5b* S6b 8
S6a S6b
to state-C and vice versa. Circuit 1 is divided into six blocks S5a* S5b*

as shown in Fig. 22. This circuit acts to generate pulses of 11 S2a* S5a 9 12 S2b* S5b 10
S2a* S5a S2b* S5b
auxiliary switches (Sa1, Sa2 and Sa3) and pulses of main 13 iLr1 15 iLr2
S2a 11 S2b 12
switches (S1a, S4a, S3a, S6a, S5a and S2a). Circuit 2 has iLr1
> 0.1 S2a
iLr2
> 0.1 S2b
same construction of the circuit 1, and used to generate 14 <3 T
3e-007 s
Vcr1
Sa1 13
16 <3 T
3e-007 s
Vcr2
Sa4 16
Vcr1 Vcr2
pulses of auxiliary switches (Sa4, Sa5 and Sa6) and the Sa1 Sa4
Ixa+Ib1 Ixa+Ib1
pulses of main switches (S1b, S4b, S3b, S6b, S5b and S2b). 17 InS/H
Sa2 14 InS/H Sa5 17
Ixa Sa2 Sa5
Ixb+Ib1 Ixb+Ib1
Sa3 15 Sa6 18
Ixc+Ib1 Sa3 Ixc+Ib1 Sa6
S1a* 18 InS/H InS/H
Ixb
S1a gS1a V phase a Circuit 1 Circuit 2
S1b*
19 InS/H
S1b gS1b Ixc
InS/H
S4a* V phase b
S4a gS4a
S4b*
S4b gS4b V phase c
S3a* 60
S3a gS3a Ib1=Ib2
S3b* V line a-b
Demux
out S3b gS3b Fig.21 Proposed soft-switching circuit.
S6a*
V line b-c
S6a gS6a 1
S6b* 7 S1a* S1a* S1a 1 Circuit 1
S1a
S6b gS6b V line c-a iLr1 iLr1 Sa1
S5a* 8 Vcr1 Sa2
Vcr1
S5a gS5a 9 Ixa+Ib1 Sa3
S5b* iLr1 Ixa+Ib1 S1 a
3 S3a* S3a 3
S5b gS5b AND 7
S3a* S3a
S2a* iLr1 Sa1 Sa1
S2a gS2a Vcr1 Vcr1 Sa3 OR 9 OR 8
Sa3
S2b* 10 Ixb+Ib1 Sa2 Sa2
Ixb+Ib1 S3 a
Space vector modulation S2b gS2b S5a
iLr1 iLr2 5 S5a* S5a 5
Sa1 gSa1 S5a*
iLr1 Sa3
Vcr1 Vcr1 Sa2
Sa2 gSa2 Vcr2 11 Ixc+Ib1 Sa1
iLr2 Ixc+Ib1 S5 a
Sa3 gSa3
Vcr2 Ixa 2 S4a*
S4a* 2
S4a
Sa4 gSa4 S4a
Ixa Vcr1
Ixb
Sa5 gSa5 S4 a
Ixb
4 S6a*
Sa6 gSa6 Ixc S6a*
Ixc S6a 4
S6a
Soft switch Inverter Vcr1

S6 a

6 S2a*
S2a* 6
S2a
S2a
Vcr1

S2 a

Fig.20 Block diagram of proposed software circuit..

Fig.22 Proposed circuit of transition from state-B to
state- A
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 Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01

V. SIMULATION RESULT shown in Fig. 25.

For simulation studies, the variation of the phase voltage 12
THD with switching frequency (fs) at several values of
modulation index (m) for two loads (resistive and inductive
10
loads) are shown in Figs. 23 and 24. These figures show that Hard switching
the minimum value of THD occurs near switching frequency

Total power losses (watt)

of 15 kHz. 8 Soft switching

2 6

1.75 4

1.5 2
m=0.5
THD

1.25 0
m=0.6 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
modulation index (m)
1
m=0.7
Fig.25 Total power losses versus modulation index for
m=0.8 hard and soft –switching.
0.75 m=0.85 Figures 26 and 27 show the simulation results for the
phase output voltages, and line output voltages, respectively
0.5 at a modulation index m=0.7, fundamental frequency f=50
5 7.5 10 12.5 15 17.5 20
Hz and Sampled frequency fs=15kHz. The load current at
fs(kHz)
inductive load is shown in Fig.28. The harmonic content of
Fig.23 THD against fs for several modulation indexes at output voltage is shown in Fig.29. This figure proves the
resistive load. ability of the used SVPWM to produce an output voltage
with almost negligible low order harmonics.
Phase 'a' voltage (V)

750 Fundamental voltage

2 500
250
0
1.75 -250
-500
1.5 -750
0 0.01 0.02 0.03 0.04
m=0.5 Time (sec)
THD

Phase 'b' voltage (V)

1.25
750
500 Fundamental voltage
m=0.6
1 250
0
m=0.7 m=0.8 -250
0.75 -500
m=0.85 -750
0 0.01 0.02 0.03 0.04
0.5
5 7.5 10 12.5 15 17.5 20 Time (sec)
Phasr 'c' voltage (V)

fs(kHz) 750
500 Fundamental voltage
Fig.24 THD against fs for several modulation indexes at
inductive load. 250
0
-250
It is important to compare the total power losses with -500
modulation index for both hard and soft circuits. The losses -750
in the soft circuit are less than the hard circuit and minimum 0 0.01 0.02 0.03 0.04
losses occur at modulation index equal to 0.7. This result is Time (sec)
Fig.26 Inverter with soft-switching phase voltages for a
modulation index of 0.7 pu.
Mar 2012 ATE-40206015©Asian-Transactions 31
Inverter line c-a voltage Inverter line b-c voltage Inverter line a-b voltage Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01

Fundamental voltage
1000 600

Harmonic amplitude (V)

Harmonic frequency=15kHz
0
(V)

400
-1000
200
0 0.01 0.02 0.03 0.04
Time (sec)
0
Fundamental voltage 0 100 200 300 400 500
1000 Harmonic order
(V)

0 600

Harmonic amplitude (V)

-1000 400
0 0.01 0.02 0.03 0.04 Fundamental frequency=50 Hz
Time (sec) 200

Fundamental voltage
1000 0
0 10 20 30 40 50
0
(V)

Harmonic order

-1000 Fig.29 Harmonic content in line voltage for a reference

voltage of modulation index of 0.7 pu.
0 0.01 0.02 0.03 0.04
Time (sec) The total losses are almost independent on frequency; this
is shown in Fig. 30. The variations of the RMS value of
phase voltage and the fundamental phase voltage with
Fig.27 Inverter with soft-switching line voltages for a modulation index are shown in Figs. 30 and 31.
modulation index of 0.7 pu. 10

8
Total power losses (watt)

25
Phase b Phase c 6
20 Phase a

4
15

2
10

0
Line current (A)

5
30 40 50 60 70
frequency (Hz)
0
Fig.30 Total power losses versus frequency.
400
Phase voltage (rms) (Volt)

-5

300
-10

200
-15

-20 100

-25 0
0 0.01 0.02 0.03 0.04 0.1 0.3 0.5 0.7 0.85
Time (sec) modulation index (m)
Fig.31 Phase voltage versus modulation index.
Fig.28 Inverter line currents for inductive load a
modulation index of 0.7 pu.
Mar 2012 ATE-40206015©Asian-Transactions 34
 Fundemental phase voltage (rms) (volt)
Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01

iLr2 (A)
300 500
0
-500
2.42 2.44 2.46 2.48 2.5 2.52
200 Time (sec) -5

Vcr2 (volt)
x 10
1000
0
-1000
100 2.42 2.44 2.46 2.48 2.5 2.52
Time (sec) -5
x 10
2

S3b
1
0
0 -1
0.1 0.3 0.5 0.7 0.85 2.42 2.44 2.46 2.48 2.5 2.52
modulation index (m) Time (sec) -5
x 10

VS3b (volt)
1000
Fig.32 Fundamental phase voltage versus modulation 500
0
index. -500
2.42 2.44 2.46 2.48 2.5 2.52
The simulation results that prove the ability of the Time (sec) -5
x 10
proposed control circuit to accomplish soft switching process
2
are shown in Figs. 33 and 34. These figures show the ZVS of 1

S6b
the main inverter switches in phase (a) and (b) respectively. 0
-1
2.42 2.44 2.46 2.48 2.5 2.52
T ime (sec) -5
x 10
iLr1 (A)

500 VS6b (volt)

1000
0 500
-500 0
1.74 1.76 1.78 1.8 1.82 1.84 -500
2.42 2.44 2.46 2.48 2.5 2.52
Time (sec) -5
x 10 T ime (sec) -5
Vcr1 (volt)

1000 x 10
0
-1000 Fig.34 The ZVS waveforms of the main inverter switches in
1.74 1.76 1.78 1.8 1.82 1.84
phase b.
Time (sec) -5
x 10
2
Figures 35 and 36 show the voltage across the main switch
S1a

1
0
-1 and the current through it in the same switching period. The
1.74 1.76 1.78 1.8 1.82 1.84 voltage and current overlap here is considerably smaller in
Time (sec) x 10
-5 case turned on and off. This means that the switching losses
VS1a (volt)

1000 are considerably reduced.

500
0
-500 750
switch S1a (Volt)

1.74 1.76 1.78 1.8 1.82 1.84

Voltage across

500
Time (sec) -5
x 10 250

2 0
1
Sa4

-250
0 1.0872 1.0874 1.0876 1.0878 1.088 1.0882
-1
1.74 1.76 1.78 1.8 1.82 1.84 T ime (sec) -3
x 10
Time (sec) -5 200
the switch S1a (A)

x 10
VS4a (volt)

Current through

1000
500 100
0
-500 0
1.74 1.76 1.78 1.8 1.82 1.84
Time (sec) x 10
-5
-100
1.0872 1.0874 1.0876 1.0878 1.088 1.0882
T ime (sec) -3
x 10
Fig.33 The ZVS waveforms of the main inverter switches in
Fig.35 The waveforms of the voltage and the current of the
phase a.
main inverter switches in phase a at turn-on with ZVS.

Mar 2012 ATE-40206015©Asian-Transactions 34

 Asian Transactions on Engineering (ATE ISSN: 2221-4267) Volume 02 Issue 01

[6] W. Yu, J. Lai and S.Y. Park " An Improved Zero-Voltage

750
switch S4a (Volt)

Switching Inverter Using Two Coupled Magnetic in

Voltage across

500 One Resonant Pole" " IEEE Trans. on Power

250 Electron.,Vol.25,No.4,pp.952-961,April.2010.
0 [7] R. Huang and S. K. Mazumder "A Soft Switching
-250
Scheme for Multiphase DC/Pulsating-DC Converter for
1.0872 1.0874 1.0876 1.0878 1.088 1.0882 Three-Phase High-Frequency-Link Pulse width
T ime (sec) -3 Modulation (PWM) Inverter" IEEE Trans. on Power
x 10
Electron.,Vol.25,No.7,pp.1761-1774,July.2010.
the switch S4a (A)

[8] H. Zhang, Q. Wang, E. Chu, Xi. Liu, and L. Hou

Current through

100
0 Soft-Switching Snubber for PWM Inverters" IEEE
-100
1.0872 1.0874 1.0876 1.0878 1.088
T ime (sec)
x 10
Fig.36 The waveforms of the voltage and the current of the main
inverter switches in phase a at turn-off with ZVS.
VI. CONCLUSION
This paper has presented the steady-state operation
principle of the three-level three-phase voltage source
inverter with two identical Auxiliary Active Resonant DC
Link (ARDCL) snubbers connected to the high voltage DC
bus line. The auxiliary circuits are activated during the
transition of main switches. The main switches are turned-on
and off at zero-voltage condition. It is possible to present the
superiority in total power loss characteristic of soft switching
inverter from that of hard switching inverter. Simulation
results are provided to support the effectiveness of the
proposed soft-switching three-phase inverter. Successful
operation of this circuit was demonstrated in simulation
implementation.
"Analysis and Implementation of A Passive Lossless
Trans. on Power Electron. Vol. 26, No.2, pp. 411-
426,Feb.2011.
1.0882 [9] P.S.Kumar, J.Amarnath and S.V.L.Narasimham,"An
-3 Effective Space-Vector PWM Method for Multilevel
Inverter Based on Two-Level Inverter" International
Journal of Computer and Electrical
Engineering,Vol.2,No.2,pp.243-250, April,2010.
[10] Rabee' H. Thejel "Fuzzy Logic Based Speed Control of
a Multiphase Series- Connected Multimotor Drive
System Fed from SVPWM VSI" PhD. Thesis, Basrah
University, pp.67-69,July.2008.
[11] M.Yamamoto, H. Iwamoto, E.Hiraki,, T.Horiuchi,
Y.Sugawara and M.Nakaoka "3- level 3-phase Voltage
Fed Soft Switching Inverter with New Space Voltage
Vector Modulation Scheme and Its Feasible
Evaluations" Power Electronics and Variable Speed
Drive,, Yamaguchi university, Yamaguchi,Japan,pp.541-
547,18-19 September 2000.

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[2] A.K.Guptaand A.M.Khambadkone, "A Space Vector
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[3] R.Teodorescu, F.Blaubjery, J.K.Pedersen, E.Cengelcj and
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Mar 2012 ATE-40206015©Asian-Transactions 33