Compal La-1911 r1.0 Schematics PDF

A B C D E
1 1
SAPPORO 150 (DAL00)

2 2
LA-1911 REV1.0 Schematic

3 Desktop Prescott/Northwood uFCPGA-478 CPU 3
Springdale(865PE)+ICH5+nVIDIA NV34M(64MB VRAM)

2003-08-06
4 4
Title
Compal Electronics, Inc.
Cover Page
Size Document Number Rev
B 0.2
Date: Friday, August 08, 2003 Sheet 1 of 57

A B C D E
A B C D E
DAL00 LA-1911 BLOCK DIAGRAM

4 4
Desktop Northwood
Desktop Prescott Thermal Sensor Clock Generator FANController
(uFCBGA/uFCPGA-478) ADM1032 ICS952623 CPU VID RTC Battery
PAGE 4,5,6 PAGE 5,16 PAGE15 PAGE 5 PAGE 40
FSB
CRT&LVDS 800MHz
ConnectorPAGE 22 DC/DC Interface
PAGE 43
2 6 6/333/400MHz
(2.55V)
AGP AGP 8X Intel Springdale SO-DIMM x 2(DDR)
TV-OUT
4 Pin-Connector NVIDIA-NV34M AGP Bus MCH 865PE M e m o r y Bus BANK 0,1,2,3 PAGE 12,13,14
3
PAGE 22
PAGE 16,17,18,19
BATTERY 3
FCBGA-932 Charger
PAGE 47
PAGE 7,8,9,10,11
VRAM
2 Channel and 4 sets Bluetooth
Interface
HUB
PAGE 20,21 PAGE 36
Power Interface &
TEMP. sensing circuit
266MHz 480MHz PAGE 46-54
(1.8V) USB 2.0 Port *3
Mini PCI PAGE 35
PAGE 29
Primary
LID/Kill Switch
RJ-45 LAN Power Buttom
PAGE 26 RTL8101L IDE HDD
PAGE 26 PCI BUS
33MHz (3.3V) ICH5 PAGE 33
PAGE 39
IEEE1394(BTO ) mBGA-460 Secondary

2 TSB43AB21A 2
PAGE 30 CD-ROM/DVD
PAGE 23,24,25 PAGE 33
Slot 0 CARDBAY
PAGE 28 A C-LINK
T7L65XB
PAGE 27,28 AC97 CODEC Audio Amplifier
ALC 202 PAGE 31 TPA6011A4
PAGE 32
DIRECT BOARD
LPC BUS 33MHz (3.3V) PAGE 38
SD Conn
PAGE 28 MDC
ConnectorPAGE 36 RJ-11
PAGE 26
VR/CIR BOARD
PAGE 38
Super I/O Embedded
LPC47N227 Controller CIR
ControllerPAGE 41 CIR
REV B NS PC87591L SW BOARD
PAGE 34 PAGE 37
PAGE 38
1 1
BIOS(1M)
FIR(BTO) Parallel Scan KB
& I/O PORT
PAGE 35 PAGE 36 PAGE 37 PAGE 38
Title
Block Digram
Custom 0.2

A B C D E
A B C D E
Voltage Rails
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
VIN Adapter power supply (19V) N/A N/A N/A
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
1 B+ AC or battery power rail for power circuit. N/A N/A N/A 1
+CPU_CORE Core voltage for CPU ON OFF OFF S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+CPU_VID 1.2V switched power rail for CPU AGTL Bus ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+VTT_GMCH +1.225V (Prescott) / +1.45V (Northwood) ON OFF OFF
+VGA_CORE 1.2V/1.5V switched power rail for VGA chip ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.25VS 1.25V switched power rail ON OFF OFF
+1.5VS AGP 4X/8X ON OFF OFF
+2.5V 2.5V power rail ON ON OFF
+2.5VS 2.5V switched power rail ON OFF OFF Board ID Table for AD channel
+3VALW 3.3V always on power rail ON ON ON*
+3V 3.3V power rail ON ON OFF Vcc 3.3V +/- 5%
+3VS 3.3V switched power rail ON OFF OFF Ra 100K +/- 5%
Board ID
+5VALW 5V always on power rail ON ON ON* Rb VAD_BID min VAD_BID typ VAD_BID max
+5V 5V power rail ON ON OFF 0 0 0 V 0 V 0 V
+5VS 5V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
2 2
+12VALW 12V always on power rail ON ON ON* 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+RTCVCC RTC power ON ON ON 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. 7 NC 2.500 V 3.300 V 3.300 V
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
VGA AD16 PIRQA
CardBus AD20 2 PIRQA/PIRQB/PIRQC/PIRQD Board ID PCB Revision
LAN AD17 3 PIRQF 0 0.1
Mini-PCI AD18 1/4 PIRQG/PI RQH 1
1394 AD16 0 PIRQE 2
SD AD22 PIRQA/PIRQB/PIRQC/PIRQD 3
3 4 3
5
6
EC SM Bus1 address EC SM Bus2 address 7
Device Address Device Address
Smart Battery 0001 011X b ADM1032 1001 110X b
EEPROM(24C16/02) 1010 000X b
(24C04) 1011 000Xb
ICH5 SM Bus address

Device Address
4 4
Clock Generator 1101 001Xb
( ICS 952623)
DDR DIMM0 1010 000Xb

DDR DIMM2 1010 010Xb Compal Electronics, Inc.
Title
Notes
B 0.2
LA-1911
A B C D E
5 4 3 2 1
+CPU_CORE
D D
AC10
AC12
AC14
AC16
AC18
AD11
AD13
AD15
AD17
AD19
AA10
AA12
AA14
AA16
AA18
AB11
AB13
AB15
AB17
AB19
AE10
AE12
AE14
AE16
AE18
AE20
AF11
AF13
AF15
AF17
AF19
AF21
AF2
AF5
AF7
AF9
C10
C12
C14
C16
C18
C20
D11
D13
D15
D17
D19
A10
A12
A14
A16
A18
A20
B11
B13
B15
B17
B19
E10
AC8
AD7
AD9
AA8
AB7
AB9
AE6
AE8
C8
D7
D9
A8
B7
B9
JCPU1A
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
7 H_A#[3..31] H_D#[0..63] 7
H_A#3 K2 B21 H_D#0
H_A#4 K4 A#3 D#0 B22 H_D#1
H_A#5 L6 A#4 D#1 A23 H_D#2
H_A#6 K1 A#5 D#2 A25 H_D#3
H_A#7 L3 A#6 D#3 C21 H_D#4
H_A#8 M6 A#7 D#4 D22 H_D#5
H_A#9 L2 A#8 D#5 B24 H_D#6
H_A#10 M3 A#9 D#6 C23 H_D#7
H_A#11 M4 A#10 D#7 C24 H_D#8
H_A#12 N1 A#11 D#8 B25 H_D#9
H_A#13 M1 A#12 D#9 G22 H_D#10
H_A#14 N2 A#13 D#10 H21 H_D#11
H_A#15 N4 A#14 D#11 C26 H_D#12
H_A#16 N5 A#15 D#12 D23 H_D#13
H_A#17 T1 A#16 D#13 J21 H_D#14
H_A#18 R2 A#17 D#14 D25 H_D#15
H_A#19 P3 A#18 D#15 H22 H_D#16
H_A#20 P4 A#19 D#16 E24 H_D#17
H_A#21 R3 A#20 D#17 G23 H_D#18
H_A#22 T2 A#21 D#18 F23 H_D#19
H_A#23 U1 A#22 D#19 F24 H_D#20
H_A#24 P6 A#23 D#20 E25 H_D#21
H_A#25 U3 A#24 D#21 F26 H_D#22
H_A#26 T4 A#25 D#22 D26 H_D#23
H_A#27 V2 A#26 D#23 L21 H_D#24
H_A#28 R6 A#27 D#24 G26 H_D#25
H_A#29 W1 A#28 D#25 H24 H_D#26
H_A#30 T5 A#29 D#26 M21 H_D#27
H_A#31 U4 A#30 D#27 L22 H_D#28
V3 A#31 D#28 J24 H_D#29
C
W2
Y1
AB1
A#32
A#33
A#34
Prescott D#29
D#30
D#31
K23
H25
M23
H_D#30
H_D#31
H_D#32
C
A#35 D#32 N22 H_D#33

D#33 P21 H_D#34
7 H_REQ#[0..4] H_REQ#0 J1 D#34 M24 H_D#35
H_REQ#1 K5 REQ#0 D#35 N23 H_D#36
H_REQ#2 J4 REQ#1 D#36 M26 H_D#37
H_REQ#3 J3 REQ#2 D#37 N26 H_D#38
H_REQ#4 H3 REQ#3 D#38 N25 H_D#39
G1 REQ#4 D#39 R21 H_D#40
7 H_ADS# ADS# D#40 P24 H_D#41
D#41 R25 H_D#42
AC1 D#42 R24 H_D#43
V5 AP#0 D#43 T26 H_D#44
R25 62_0402_5% AA3 AP#1 D#44 T25 H_D#45
1 2 H_IERR# AC3 BINIT# D#45 T22 H_D#46
+CPU_CORE 1 2 IERR# D#46 T23 H_D#47
+CPU_CORE R35 200_0402_5% D#47 U26 H_D#48
H6 D#48 U24 H_D#49
7 H_BR0# D2 BR0# D#49 U23 H_D#50
7 H_BPRI# BPRI# D#50
G2 V25 H_D#51
7 H_BNR# G4 BNR# D#51 U21 H_D#52
7 H_LOCK# LOCK# D#52 V22 H_D#53
D#53 V24 H_D#54
CLK_BCLK AF22 D#54 W26 H_D#55
15 CLK_BCLK BCLK0 D#55
CLK_BCLK# AF23 Y26 H_D#56
15 CLK_BCLK# BCLK1 D#56 W25 H_D#57
D#57 Y23 H_D#58
D#58 Y24 H_D#59
F3 D#59 Y21 H_D#60
7 H_HIT# HIT# D#60
E3 AA25 H_D#61
7 H_HITM# HITM# D#61
BOOTSELECT
E2 AA22 H_D#62
7 H_DEFER# DEFER# D#62 AA24 H_D#63
D#63
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
AC11
AC13
AC15
AC17
AC19
AC22
AC25
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
H23
H26
A11
A13
A15
A17
A19
A21
A24
A26
E20
E18
E16
E14
E12
F13
F15
F17
F19
F11
AC2
AC5
AC7
AC9
AD4
AD8
AD1
AA1
AA4
AA7
AA9
AB3
AB6
AB8
B B
F9
H1
H4
A3
A9
E8
AMP_3-1565030-1_Prescott
+CPU_CORE
1 2 BOOTSEL 1 2
52 H_BOOTSELECT
R12 R15
0_0402_5% 0_0402_5%
R_C
Reference Intel document Pop: Northwood
Desktop P4 Spec.: 10988 P4 0.13u 512KB L2 EMTS Rev.2.0 Depop: Prescott
Desktop Prescott Spec.: 11910 Prescott EMTS Rev.0.5
Pin number Northwood Commend Prescott Commend
Pin name Pin name Northwood Prescott
B6 FERR# Pull-up 62ohm FERR#/PBE# Pull-up 62ohm

Pop Pop
to +VCC_CORE to +VCC_CORE
AA20 ITPCLKOUT0 Pull-up56ohm TESTHI6 Pull-up 62ohm

to +VCC_CORE to +VCC_CORE Pop Pop
AB22 ITPCLKOUT1 Pull-up 56ohm TESTHI7 Pull-up 62ohm
to +VCC_CORE to +VCC_CORE Pop Pop
AD2 NC float VIDPWRGD Pull-up 8.2Kohm

Depop Pop
to +VCCVID
AD3 NC float VID5 Pull-up1Kohm to
A Depop Pop A
+3VRUN & connect
to PWRIC
AF3 NC float VCCVIDLB Connect to +VCCVID Depop Pop
AD20 VCCA Connect to CPU VCCIOPLL Connect to CPU

Filter Filter
AF23 VCCIOPLL Connect to CPU VCCA Connect to CPU
Filter Filter
AD1 VSS Connect to GND BOOTSELECT CPU determine Pop Depop
Title Compal Electronics, Inc.
AE26 VSS Connect to GND OPTIMIZED/ float
Pop Depop Prescott Processor in uFCPGA478 (1/2)
COMPAT# THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALSize Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1911
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Friday, August 08, 2003 Sheet 4 of 57
5 4 3 2 1
5 4 3 2 1
Asynch GTL+ PULL HIGH

+CPU_CORE
R84
Place near ICH 1 2
1 2 H_FERR#
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AF10
AF12
AF14
AF16
AF18
AF20
AF26
R518 62_0402_5% 0_0402_5%
AF1
AF6
AF8
C11
C13
C15
C17
C19
C22
C25
D10
D12
D14
D16
D18
D20
D21
D24
B10
B12
B14
B16
B18
B20
B23
B26
E11
E13
E15
E17
E19
E23
E26
F10
F12
F14
F16
F18
F22
F25
AE7
AE9
F2
F5
JCPU1B
C2
C5
C7
C9
D3
D6
D8
B4
B8
E1
E4
E7
E9
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
SKTOCC#
1 2 H_PROCHOT# Place near CPU
R27 130_0402_5%
7 H_RS#[0..2] F1 J26
H_RS#0
1 2 H_PWRGOOD H_RS#1 G5 RS#0 DP#0 K25
D RS#1 DP#1 +CPU_GTLREF D
R74 300_0402_5% H_RS#2 F4 K26
AB2 RS#2 DP#2 L25
1 2 H_RESET# J6 RSP# DP#3
7 H_TRDY# TRDY# AA21
R75 62_0402_5% Pop: Northwood
GTLREF0 AA6
GTLREF1 Depop: Prescott
F20
C6 GTLREF2 F6
23 H_A20M#
H_FERR# B6 A20M# GTLREF3 R83
R_G 0_0402_5%
23 H_FERR# B2 FERR# AE26 1 2
23 H_IGNNE# B5 IGNNE# OPTIMIZED/COMPAT# +CPU_CORE
JTAG PULL DOWN 23 H_SMI# H_PWRGOOD AB23 SMI#
23 H _ P W R G O O D Y4 PWRGOOD AD24 H_TESTHI0 R78 1 2 62_0402_5%
23 H_STPCLK# STPCLK# TESTHI0
RP4 AA2 H_TESTHI1 R20 1 2 62_0402_5%
D1 TESTHI1 AC21
1 8 ITP_TMS 23 H_INTR E5 LINT0 TESTHI2 AC20
2 7 ITP_TRST# 23 H_NMI W5 LINT1 TESTHI3 AC24 H_TESTHI2_7 R64 1 2 62_0402_5%
3 6 ITP_TCK 23 H_INIT# H_RESET# AB25 INIT# TESTHI4 AC23
7 H_RESET# RESET# TESTHI5
4 5 ITP_TDI AA20
TESTHI6 AB22
1K_8P4R_1206_5% H5 TESTHI7 U6 H_TESTHI8 R34 1 2 62_0402_5%
7 H_DBSY# H2 DBSY# TESTHI8 W4 H_TESTHI9 R28 1 2 62_0402_5%
7 H_DRDY# AD6 DRDY# TESTHI9 Y3 H_TESTHI10 R19 1 2 62_0402_5%
15 CPU_CLKSEL0 BSEL0 TESTHI10
Close to the CPU AD5 A6 H_TESTHI11 R38 1 2 62_0402_5%
15 CPU_CLKSEL1 BSEL1 TESTHI11 AD25 1 2
H_TESTHI12 R79 62_0402_5%
TESTHI12
H_THERMDA B3
H_THERMDC C4 THERMDA
THERMDC E22
+CPU_CORE
24 H_THERMTRIP#
A2
THERMTRIP# Prescott DSTBN#0
DSTBN#1
DSTBN#2
K22
R22
W22
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
7
7
7
7
R37 1 2 62_0402_5% ITP_BPM#0 AC6 DSTBN#3
R33 1 2 62_0402_5% ITP_BPM#1 AB5 BPM#0
R30 1 2 62_0402_5% ITP_BPM#2 AC4 BPM#1 F21
R36 1 2 62_0402_5% ITP_BPM#3 Y6 BPM#2 DSTBP#0 J23 H_DSTBP#0 7
BPM#3 DSTBP#1 H_DSTBP#1 7
R32 1 2 62_0402_5% ITP_BPM#4 AA5 P23
BPM#4 DSTBP#2 H_DSTBP#2 7
R29 1 2 62_0402_5% ITP_BPM#5 AB4 W23
C BPM#5 DSTBP#3 H_DSTBP#3 7 C
Note: Please change to 10uH, DC current
ITP_TCK D4 L5
of 100mA parts and close to cap TCK ADSTB#0 H_ADSTB#0 7
ITP_TDI C1 R5
TDI ADSTB#1 H_ADSTB#1 7
D5
+CPU_CORE TDO
ITP_TMS F7
ITP_TRST# E6 TMS E21
L5 LQG21F4R7N00_0805 TRST# DBI#0 G25 H_DINV#0 7
DBI#1 H_DINV#1 7
1 2 AD20 P26
VCCIOPLL DBI#2 H_DINV#2 7
H_VCCA AE23 V21
** VCCA DBI#3 H_DINV#3 7
A5 AE25
52 VCCSENSE A4 VCCSENSE DBR#
52 VSSSENSE VSSSENSE
1 2 VCCVIDLB AF3
C80 +CPUVID VCCVIDLB
L6 LQG21F4R7N00_0805 R26 @0_0402_5% C3 H_PROCHOT#
PROCHOT# H _ P R O C H O T # 7,51
2 Trace >= 25mils H_VSSA
+
1 2 1 AD22 V6
VSSA MCERR# AB26
** 33U_D2_8M_R35 SLP# H_CPUSLP# 23
CLK_ITP AC26 A22
15 CLK_ITP CLK_ITP# AD26 ITP_CLK0 NC1 A7 1 2
15 CLK_ITP# ITP_CLK1 NC2 +CPU_CORE
Pop: Prescott AF25 R82
L24 NC3 AF24
PLL Layout note : Depop: Northwood COMP0
COMP0 NC4
62_0402_5%
COMP1 P1 AE21
1.Place cap within 600 mils of COMP1 NC5
VIDPWRGD
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
the VCCA and VSSA pins.
VCCVID
1
VID0
VID1
VID2
VID3
VID4
VID5
2.H_VCCIOPLL,HVCCA,HVSSA trace wide R65 R14
61.9_0603_1% 61.9_0603_1%
12 mils(min)
W21
W24
M22
M25
G21
G24
N21
N24
R23
R26
U22
U25
AF4
K21
K24
P22
P25
V23
V26
Y22
Y25
T21
T24
L23
L26
AD3
AD2
AE5
AE4
AE3
AE2
AE1
J22
J25
M2
M5
G3
G6
W3
W6
F8
T3
T6
L1
L4
N3
N6
R1
R4
U2
U5
K3
K6
P2
P5
V1
V4
Y2
Y5
J2
J5
2
AMP_3-1565030-1_Prescott Trace >= 25mils

+CPUVID
1 RE
Pop: Prescott
C39
Depop: Northwood
0.1U_0402_10V6K R_E
2
B B
+CPUVID
H_VID0 R31
52 H_VID0
H_VID1 @2.43K_0603_1%
52 H_VID1 H_VID2 1 2
52 H_VID2
H_VID3
52 H_VID3
H_VID4 H_VID_PWRGD
52 H_VID4
H_VID5
52 H_VID5
VID PULL HIGH GTL Reference Voltage VID PWRGD Circuit Thermal Sensor
Layout note :
1. +CPU_GTLREF Trace wide +3V +3VS
+CPU_GMCH_GTLREF +CPU_CORE 12mils(min),Space 15mils

2. Place R_A and R_B near CPU.
+3VS 3. Place decoupling cap 220PF near CPU. 1
1 C48
1
1
C780
1
R59 H_THERMDA 0.1U_0402_16V4Z
H_VID5 1 2 +CPU_GTLREF 0.1U_0402_16V4Z R70 2 R41
R18 1K_0402_5% R_A 200_0603_1% 2 10K_0402_5% @10K_0402_5%
1
H_VID4 1 2 C47
R17 1K_0402_5% 2 1 U3
2
2
2200P_0402_50V7K 2 1
2
VID_PWRGD 52 2 D+ VDD1
RP3 R63
1
H_VID3 5 4 2 0_0603_5% 1 1 2 H_THERMDC 3 6

VCORE_ENLL 49,52 D- ALERT#
H_VID2 6 3 R60 C68 R66 0_0402_5%
14
1
H_VID1 7 2 C78 U4A 8 4

A H_VID0 8 1
R_B 169_0603_1% 0.1U_0402_10V6K 220P_0402_50V8K 37 EC_SMB_CK2 SCLK THERM# A
P
OE#
1 2 H_VID_PWRGD 3 2 7 5
1K_8P4R_1206_5% O I 37 EC_SMB_DA2 SDATA GND
2
SN74LVC125APWLE_TSSOP14 ADM1032ARM_RM8
7
+3V POWER

Title
Prescott Processor in uFCPGA478 (2/2)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALSize Document Number Rev
5 4 3 2 1
5 4 3 2 1
Place 11 North of Socket(Stuff 8)

+CPU_CORE
1 1 1 1 1 1 1 1 1 1 1
C468 C491 C508 C523 C545 C560 C16 C408 C421 C440 C455
22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M
2 2 2 2 2 2 2 2 2 2 2
D D
22uF depop reference

Springdale Customer Schematic R1.2 page82
Place 12 Inside Socket(Stuff all)
+CPU_CORE
1 1 1 1 1 1 1 1 1 1
C514 C536 C558 C571 C518 C535 C557 C570 C60 C52
22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M
2 2 2 2 2 2 2 2 2 2
+CPU_CORE
1 1
C59 C70
22U_1206_6.3V6M 22U_1206_6.3V6M
2 2
C C
Place 9 South of Socket(Unstuff all)

+CPU_CORE
**
1 1 1 1 1 1 1
C15 C14 C13 C12 C19 C18 C17

22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M 22U_1206_6.3V6M
2 2 2 2 2 2 2
B B
470uF _ERS10m ohm* 15, ESR=0.5m ohm

+CPU_CORE
1 1 1 1 1 1
+ C119 + C95 + C85 + C75 + C67 + C61
470U_D4_2.5VM 470U_D4_2.5VM 470U_D4_2.5VM @470U_D4_2.5VM 470U_D4_2.5VM 470U_D4_2.5VM
2 2 2 2 2 2
+CPU_CORE
**
1 1 1 1 1
+ C51 + C8 + C29 + C44 + C53
470U_D4_2.5VM 470U_D4_2.5VM 470U_D4_2.5VM 470U_D4_2.5VM 470U_D4_2.5VM
2 2 2 2 2
+CPU_CORE
A Decoupling Reference Document: A

1 1 1 Springdale Chipset Platform Design guide Rev1.11
+ + +
(12474)page239
C63 C33 C28
470U_D4_2.5VM 470U_D4_2.5VM @470U_D4_2.5VM
2 2 2 Decoupling Reference Requirement:

560uF Polymer, ESR:5m ohm(each) * 10
22uF X5R * 32
Title
CPU Decoupling
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALSize Document Number Rev
5 4 3 2 1
5 4 3 2 1
U43A U43F U43G

4 H_A#[3..31] H_D#[0..63] 4
AR32 AE11 L31 F16
+VTT_GMCH H_A#3 H_D#0 VSS VSS VSS VSS
D26 B23 AR29 AE10 L26 F14
H_A#4 D30 HA3# HD0# E22 H_D#1 AR27 VSS VSS AE4 L25 VSS VSS F12
T race width 10mils,Space HA4# HD1# VSS VSS VSS VSS
7mils H_A#5 L23 B21 H_D#2 AR25 AE1 L24 F10
HA5# HD2# VSS VSS VSS VSS
1
H_A#6 E29 D20 H_D#3 AR23 AD33 K33 F8
R531 H_A#7 HA6# HD3# H_D#4 VSS VSS VSS VSS
B32 B22 AR20 AD30 K29 F5
301_0603_1% H_A#8 K23 HA7# HD4# D22 H_D#5 AR16 VSS VSS AD28 K27 VSS VSS F3
H_A#9 HA8# HD5# H_D#6 VSS VSS VSS VSS
C30 B20 AR13 AD10 K25 F1
H_A#10 C31 HA9# HD6# C21 H_D#7 AR11 VSS VSS AD9 K22 VSS VSS E3
HD_SWING H_A#11 HA10# HD7# H_D#8 VSS VSS VSS VSS
D 2 J25 E18 AR9 AD8 K20 E1 D
H_A#12 B31 HA11# HD8# E20 H_D#9 AN32 VSS VSS AD6 K18 VSS VSS D35
1
1 H_A#13 E30 B16 H_D#10 AN30 AD3 K16 D33

R535 C301 H_A#14 B33 HA13# HD10# D16 H_D#11 AN28 VSS VSS AC35 K14 VSS VSS D31
102_0603_1% H_A#15 HA14# HD11# H_D#12 VSS VSS VSS VSS
J24 B18 AN26 AC32 K12 D29
0.01U_0402_16V7K H_A#16 F25 HA15# HD12# B17 H_D#13 AN24 VSS VSS AC4 K11 VSS VSS D27
2 H_A#17 HA16# HD13# H_D#14 VSS VSS VSS VSS
D34 E16 AN22 AC1 J35 D25
H_A#18 C32 HA17# HD14# D18 H_D#15 AN20 VSS VSS AB33 J32 VSS VSS D23
2

F28 G20 AN18 AB30 J28 D21
H_A#20 C34 HA19# HD16# F17 H_D#17 AN16 VSS VSS AB28 J22 VSS VSS D19
J27 E19 AN14 AB27 J20 D17
H_A#22 G27 HA21# HD18# F19 H_D#19 AN12 VSS VSS AB26 J18 VSS VSS D15
F29 J17 AN10 AB10 J16 D13
H_A#24 E28 HA23# HD20# L18 H_D#21 AM35 VSS VSS AB9 J14 VSS VSS D11
GND
H27 G16 AM29 AB8 J12 D9
H_A#26 K24 HA25# HD22# G18 H_D#23 AM27 VSS VSS AB6 J10 VSS VSS D1
E32 F21 AM25 AB3 H33 C28
HDRCOMP H_A#28 F31 HA27# HD24# F15 H_D#25 AM23 VSS VSS AA32 H30 VSS VSS C26
G30 E15 AM21 AA4 H26 C24
H_A#30 J26 HA29# HD26# E21 H_D#27 AM19 VSS VSS AA1 H24 VSS VSS C22
1
H_A#31 G26 J19 H_D#28 AM17 Y35 H22 C20

R525 HA31# HD28# G14 H_D#29 AM15 VSS VSS Y33 H20 VSS VSS C18
24.9_0603_1% HD29# H_D#30 VSS VSS VSS VSS
E17 AM13 Y30 H18 C16
4 H_REQ#[0..4] H_REQ#0 B29 HD30# K17 H_D#31 AM11 VSS VSS Y28 H16 VSS VSS C14
H_REQ#1 HREQ0# HD31# H_D#32 VSS VSS VSS VSS
J23 J15 AM9 Y27 H14 C12
H_REQ#2 L22 HREQ1# HD32# L16 H_D#33 AL32 VSS VSS Y26 H12 VSS VSS C10
2
H_REQ#3 HREQ2# HD33# H_D#34 VSS VSS VSS VSS

C29 J13 AL1 Y10 H9 C8
H_REQ#4 J21 HREQ3# HD34# F13 H_D#35 AK28 VSS VSS Y9 H8 VSS VSS C4
HREQ4# HD35# H_D#36 VSS VSS VSS VSS
B30 F11 AK26 Y8 H5 A32
C 5 H_ADSTB#0 D28 HADSTB0# HD36# E13 H_D#37 AK24 VSS VSS Y6 H2 VSS VSS A29 C
FSB
5 H_ADSTB#1 HADSTB1# HD37# H_D#38 VSS VSS VSS VSS
K15 AK22 Y3 G35 A27
B7 HD38# G12 H_D#39 AK20 VSS VSS W32 G31 VSS VSS A25
15 CLK_HCLK HCLKP HD39# H_D#40 VSS VSS VSS VSS
C7 G10 AK18 W18 G28 A23
GND
15 CLK_HCLK# HCLKN HD40# L15 H_D#41 AK16 VSS VSS W17 F26 VSS VSS A20
HD41# H_D#42 VSS VSS VSS VSS
B19 E11 AK14 W4 F24 A16
5 H_DSTBP#0 C19 HDSTBP0# HD42# K13 H_D#43 AK12 VSS VSS V33 F22 VSS VSS A13
5 H_DSTBN#0 HDSTBN0# HD43# H_D#44 VSS VSS VSS VSS
C17 J11 AK10 V30 F20 A11
5 H_DINV#0 L19 DINV0# HD44# H10 H_D#45 AK8 VSS VSS V28 F18 VSS VSS A9
5 H_DSTBP#1 HDSTBP1# HD45# H_D#46 VSS VSS VSS VSS
K19 G8 AK3 V27 A7
5 H_DSTBN#1 L17 HDSTBN1# HD46# E9 H_D#47 AJ35 VSS VSS V26 VSS
5 H_DINV#1 DINV1# HD47# H_D#48 VSS VSS
G9 B13 AJ32 V19
+VTT_GMC H 5 H_DSTBP#2 F9 HDSTBP2# HD48# E14 H_D#49 AJ9 VSS VSS V17 SPRINGDALE_UFCBGA932
5 H_DSTBN#2 HDSTBN2# HD49# H_D#50 VSS VSS
L14 B14 AJ4 V10
5 H_DINV#2 D12 DINV2# HD50# B12 H_D#51 AJ1 VSS VSS V9
+GMCH_GTLREF 5 H_DSTBP#3 HDSTBP3# HD51# H_D#52 VSS VSS
E12 B15 AH33 V8
+CPU_GMCH_GTLREF 5 H_DSTBN#3 HDSTBN3# HD52# VSS VSS
1
C15 D14 H_D#53 AH30 V6

R511 5 H_DINV#3 DINV3# HD53# H_D#54 VSS VSS
C13 AH24 V3
F27 HD54# B11 H_D#55 AH22 VSS VSS U32
200_0603_1% 4 H_ADS# ADS# HD55# H_D#56 VSS VSS
5 H_TRDY# D24 D10 AH20 U19
G24 HTRDY# HD56# C11 H_D#57 AH18 VSS VSS U18
5 H_DRDY# DRDY# HD57# H_D#58 VSS VSS
L21 E10 AH16 U4
2
1 2 4 H_DEFER# E23 DEFER# HD58# B10 H_D#59 AH14 VSS VSS T35
4 H_HITM# HITM# HD59# H_D#60 VSS VSS
1 K21 C9 AH12 T33
R522 0_0603_5% 4 H_HIT# E25 HIT# HD60# B9 H_D#61 AH10 VSS VSS T30
C286 4 H_LOCK# HLOCK# HD61# H_D#62 VSS VSS
B24 D8 AH6 T28
GTL Reference Voltage 220P_0402_50V8K 4 H_BR0# B28 BREQ0# HD62# B8 H_D#63 AH3 VSS VSS T27
2 4 H_BNR# BNR# HD63# VSS VSS
Layout note : B26 AG35 T26
4 H_BPRI# E27 BPRI# AG32 VSS VSS T10
B 5 H_DBSY# H_RS#0 DBSY# H_PROCHOT# VSS VSS B
1. +GMCH_GTLREF Trace wide G22 L20 H_PROCHOT# 5,51 AG28 T9
H_RS#1 C27 RS0# PROCHOT# AG26 VSS VSS T8
12mils(min),Space 15mils. H_RS#2 RS1# VSS VSS
B27 AG24 T6
E8 RS2# L13 AG22 VSS VSS T3
2. Place decoupling cap 220PF near GMCH. 5 H_RS#[0..2] 5 H_RESET# CPURST# BSEL0 MCH_CLKSEL0 15 VSS VSS
AE14 L12 MCH_CLKSEL1 15 AG20 T1
24,27,40 SYS_PWROK PWROK# BSEL1 AG18 VSS VSS R32
HDRCOMP VSS VSS
E24 AG16 R4
HD_SWING C25 HDRCOMP AG14 VSS VSS R1
HDSWING VSS VSS
+GMCH_GTLREF F23 AG8 P33
HDVREF AG4 VSS VSS P30
VSS VSS
AF33 P28
SPRINGDALE_UFCBGA932 AF30 VSS VSS P27
VSS VSS
AF25 P26
AF24 VSS VSS P9
VSS VSS
AF22 P8
AF20 VSS VSS P6
VSS VSS
AF18 P3
AF16 VSS VSS N35
VSS VSS
AF14 N32
AF11 VSS VSS N4
VSS VSS
AF9 N1
AF6 VSS VSS M33
VSS VSS
AF3 M30
AE35 VSS VSS M28
VSS VSS
AE32 M27
AE26 VSS VSS M26
VSS VSS
AE25 M6
AE13 VSS VSS M3
VSS VSS
A AE12 L35 A
VSS VSS
SPRINGDALE_UFCBGA932

Title
Springdale-Host/GND (1/4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINSCONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOFR&D B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATIONITCONTAINS LA-1911
5 4 3 2 1
5 4 3 2 1
DDR Resistive Compensation

DDRA_SDQ[0..63] DDRA_SDQ[0..63] 12,14
DDRA_SMA[0..12] U43B +2.5V

12,14 DDRA_SMA[0..12]
DDRA_SMA0 AJ34 AN11 T r a c e width of 12mils and space
SMAA_A0 SDQS_A0 DDRA_SDQS0 12,14
DDRA_SMA1 AL33 AP12 DDRA_SDM0 12,14
DDRA_SMA2 SMAA_A1 SDM_A0 DDRA_SDQ0 10mils(min)
AK29 AP10
DDRA_SMA3 AN31 SMAA_A2 SDQ_A0 AP11 DDRA_SDQ1
SMAA_A3 SDQ_A1
1
DDRA_SMA4 AL30 AM12 DDRA_SDQ2
DDRA_SMA5 AL26 SMAA_A4 SDQ_A2 AN13 DDRA_SDQ3 R94
DDRA_SMA6 SMAA_A5 SDQ_A3 DDRA_SDQ4 42.2_0603_1%
D AL28 AM10 D
DDRA_SMA7 AN25 SMAA_A6 SDQ_A4 AL10 DDRA_SDQ5
DDRA_SMA8 SMAA_A7 SDQ_A5 DDRA_SDQ6
AP26 AL12 2
DDRA_SMA9 AP24 SMAA_A8 SDQ_A6 AP13 DDRA_SDQ7 C92
2
DDRA_SMA10 SMAA_A9 SDQ_A7 SMXRCOMP
AJ33
DDRA_SMA11 AN23 SMAA_A10 AP15 2.2U_0805_16V4Z
SMAA_A11 SDQS_A1 DDRA_SDQS1 12,14 1
DDRA_SMA12 AN21 AP16
SMAA_A12 SDM_A1 DDRA_SDM1 12,14
P lace resistors within
1
AL34 AP14 DDRA_SDQ8 1 .0 inch of GMCH (AK9)
AM34 SMAB_A1 SDQ_A8 AM14 DDRA_SDQ9 R98
SMAB_A2 SDQ_A9 DDRA_SDQ10 42.2_0603_1%
AP32 AL18
AP31 SMAB_A3 SDQ_A10 AP19 DDRA_SDQ11
SMAB_A4 SDQ_A11 DDRA_SDQ12
AM26 AL14
SMAB_A5 SDQ_A12 AN15 DDRA_SDQ13
2
DDR Channel A
SDQ_A13 DDRA_SDQ14
12,14 DDRA_SWE# AB34 AP18
Y34 SWE_A# SDQ_A14 AM18 DDRA_SDQ15
12,14 DDRA_SCAS# SCAS_A# SDQ_A15
12,14 DDRA_SRAS# AC33
SRAS_A# AP23
SDQS_A2 DDRA_SDQS2 12,14
12,14 DDRA_SBS0 AE33 AM24 DDRA_SDM2 12,14
AH34 SBA_A0 SDM_A2
12,14 DDRA_SBS1 SBA_A1
AP22 DDRA_SDQ16
DDRA_SCS#0 AA34 SDQ_A16 AM22 DDRA_SDQ17
12,14 DDRA_SCS#0 SCS_A0# SDQ_A17
DDRA_SCS#1 Y31 AL24 DDRA_SDQ18
12,14 DDRA_SCS#1 SCS_A1# SDQ_A18
Y32 AN27 DDRA_SDQ19 * R 3 91 Change to 31.12K is real
W34
SCS_A2# SDQ_A19
AP21 DDRA_SDQ20 DDR RCOMP VOH Circuitry
SCS_A3# SDQ_A20 AL22 DDRA_SDQ21
DDRA_CKE0 SDQ_A21 DDRA_SDQ22 +2.5V T r a c e width of 12mils and space
12,14 DDRA_CKE0 AL20 AP25
DDRA_CKE1 AN19 SCKE_A0 SDQ_A22 AP27 DDRA_SDQ23
12,14 DDRA_CKE1 SCKE_A1 SDQ_A23 10mils(min)
AM20
C AP20 SCKE_A2 AM30 C
SCKE_A3 SDQS_A3 DDRA_SDQS3 12,14
AP30 DDRA_SDM3 12,14
AK32 SDM_A3
SCMDCLK_A0 2 1
1
AK31 AP28 DDRA_SDQ24 C590
AP17 SCMDCLK_A0# SDQ_A24 AP29 DDRA_SDQ25 R434 C777
12 DDRA_CLK1 SCMDCLK_A1 SDQ_A25
AN17 AP33 DDRA_SDQ26 2.2U_0805_16V4Z 10K_0603_1% 0.01U_0402_16V7K
12 DDRA_CLK1# SCMDCLK_A1# SDQ_A26 1 2
12 DDRA_CLK2 N33 AM33 DDRA_SDQ27
SCMDCLK_A2 SDQ_A27 DDRA_SDQ28
12 DDRA_CLK2# N34 AM28
AK33 SCMDCLK_A2# SDQ_A28 AN29 DDRA_SDQ29 SMXRCOMPVOH
2
SCMDCLK_A3 SDQ_A29 DDRA_SDQ30
AK34 AM31
AM16 SCMDCLK_A3# SDQ_A30 AN34 DDRA_SDQ31
SCMDCLK_A4 SDQ_A31 1
1
AL16 1
+SM_VREF_A P31 SCMDCLK_A4# AF34 C595 R436
+ S M _ V R EF_A trace width of 12mils and space SCMDCLK_A5 SDQS_A4 DDRA_SDQS4 12,14
P32 AF31 1U_0603_10V6K 30.9K_0603_1% C152
12mils(min) SCMDCLK_A5# SDM_A4 DDRA_SDM4 12,14 2 * 0.01U_0402_16V7K
E34 AH32 DDRA_SDQ32 2
SMVREF_A SDQ_A32 AG34 DDRA_SDQ33
2
SMXRCOMP SDQ_A33 DDRA_SDQ34 Close to Pin AN9
AK9 AF32
SMXRCOMP SDQ_A34 AD32 DDRA_SDQ35
2 2 SDQ_A35
C730 C731 SMXRCOMPVOH AN9 AH31 DDRA_SDQ36 Close to GMCH <1"
SMXRCOMPVOH SDQ_A36 AG33 DDRA_SDQ37
2.2U_0805_16V4Z 0.1U_0402_16V4Z SMXRCOMPVOL SDQ_A37 DDRA_SDQ38
AL9 AE34
1 1 SMXRCOMPVOL SDQ_A38 AD34 DDRA_SDQ39
SDQ_A39
V34 DDRA_SDQS5 12,14 F ollow Intel design guide
C lose to GMCH(E34) SDQS_A5
W33 DDRA_SDM5 12,14 R 1.11(12474) page124,125
SDM_A5
AC34 DDRA_SDQ40
SDQ_A40 AB31 DDRA_SDQ41
B SDQ_A41 DDRA_SDQ42 B
V32
SDQ_A42 V31 DDRA_SDQ43
SDQ_A43 DDRA_SDQ44
AD31
SDQ_A44 AB32 DDRA_SDQ45
SDQ_A45
U34 DDRA_SDQ46 DDR RCOMP VOL Circuitry
SDQ_A46 U33 DDRA_SDQ47
SDQ_A47 * R 1 53 Change to 31.12K is real
M32 DDRA_SDQS6 12,14 +2.5V
SDQS_A6
M34 DDRA_SDM6 12,14
SDM_A6
T34 DDRA_SDQ48
SDQ_A48 T32 DDRA_SDQ49 T r a c e width of 12mils and space
SDQ_A49 2
K34 DDRA_SDQ50 C110
SDQ_A50 10mils(min)
1
K32 DDRA_SDQ51
SDQ_A51 DDRA_SDQ52 2.2U_0805_16V4Z R106
T31
SDQ_A52 P34 DDRA_SDQ53 1 30.9K_0603_1%
SDQ_A53 DDRA_SDQ54 *
L34
SDQ_A54 L33 DDRA_SDQ55
SDQ_A55 SMXRCOMPVOL
2
H31 DDRA_SDQS7 12,14
SDQS_A7
H32 DDRA_SDM7 12,14 1
SDM_A7
1
1
J33 DDRA_SDQ56 C146 R110
SDQ_A56 H34 DDRA_SDQ57 1U_0603_10V6K 10K_0603_1% C167
SDQ_A57 DDRA_SDQ58 2
E33 0.01U_0402_16V7K
SDQ_A58 F33 DDRA_SDQ59 2
SDQ_A59 DDRA_SDQ60 Close to Pin AL9
K31
2
SDQ_A60 J34 DDRA_SDQ61
SDQ_A61 DDRA_SDQ62 Close to GMCH <1"
A G34 A
SDQ_A62 F34 DDRA_SDQ63
SDQ_A63
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL Size
Springdale-DDR Interface-A(2/5)
Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELEC TRONICS,INC. Date: Friday, August 08, 2003 Sheet 8 of 57
5 4 3 2 1
5 4 3 2 1
DDRB_SDQ[0..63]
DDRB_SDQ[0..63] 13,14
DDR Resistive Compensation
DDRB_SMA[0..12] U43C
13,14 DDRB_SMA[0..12]
DDRB_SMA0 AG31 AF15 DDRB_SDQS0 13,14
DDRB_SMA1 SMAA_B0 SDQS_B0 +2.5V
AJ31 AG11 DDRB_SDM0 13,14
DDRB_SMA2 AD27 SMAA_B1 SDM_B0 AJ10 DDRB_SDQ0
DDRB_SMA3 SMAA_B2 SDQ_B0 DDRB_SDQ1
AE24 AE15
DDRB_SMA4 AK27 SMAA_B3 SDQ_B1 AL11 DDRB_SDQ2
DDRB_SMA5 SMAA_B4 SDQ_B2 DDRB_SDQ3
AG25 AE16 2
DDRB_SMA6 AL25 SMAA_B5 SDQ_B3 AL8 DDRB_SDQ4 C685
SMAA_B6 SDQ_B4
1
D DDRB_SMA7 AF21 AF12 DDRB_SDQ5 D
DDRB_SMA8 AL23 SMAA_B7 SDQ_B5 AK11 DDRB_SDQ6 R494 2.2U_0805_16V4Z
DDRB_SMA9 SMAA_B8 SDQ_B6 DDRB_SDQ7 42.2_0603_1% 1
AJ22 AG12
DDRB_SMA10 AF29 SMAA_B9 SDQ_B7
DDRB_SMA11 SMAA_B10
AL21 AG13 DDRB_SDQS1 13,14
DDRB_SMA12 AJ20 SMAA_B11 SDQS_B1 AG15 T race width of 12mils
2
SMAA_B12 SDM_B1 DDRB_SDM1 13,14
SMYRCOMP
a nd space 10mils(min)
AE27 AE17 DDRB_SDQ8
SMAB_B1 SDQ_B8 DDRB_SDQ9
AD26 AL13
AL29 SMAB_B2 SDQ_B9 AK17 DDRB_SDQ10
SMAB_B3 SDQ_B10
1
AL27 AL17 DDRB_SDQ11
AE23 SMAB_B4 SDQ_B11 AK13 DDRB_SDQ12 R496
DDR Channel B
SMAB_B5 SDQ_B12 DDRB_SDQ13 42.2_0603_1%
AJ14
W27 SDQ_B13 AJ16 DDRB_SDQ14
13,14 DDRB_SWE# SWE_B# SDQ_B14
W31 AJ18 DDRB_SDQ15 Place resistors within
13,14 DDRB_SCAS# SCAS_B# SDQ_B15
W26
2
13,14 DDRB_SRAS# SRAS_B# 1.0 inch of GMCH (AA33)
AG21 DDRB_SDQS2 13,14
SDQS_B2 AE21
SDM_B2 DDRB_SDM2 13,14
13,14 DDRB_SBS0 Y25
AA25 SBA_B0 AE19 DDRB_SDQ16
13,14 DDRB_SBS1 SBA_B1 SDQ_B16
AE20 DDRB_SDQ17
DDRB_SCS#0 U26 SDQ_B17 AG23 DDRB_SDQ18
13,14 DDRB_SCS#0 SCS_B0# SDQ_B18
DDRB_SCS#1 T29 AK23 DDRB_SDQ19
13,14 DDRB_SCS#1 SCS_B1# SDQ_B19
V25 AL19 DDRB_SDQ20
SCS_B2# SDQ_B20 DDRB_SDQ21
W25 AK21 * R 3 98 Change to 31.12K is real
SCS_B3# SDQ_B21 AJ24 DDRB_SDQ22 DDR RCOMP VOH Circuitry
DDRB_CKE0 SDQ_B22 DDRB_SDQ23
13,14 DDRB_CKE0 AK19 AE22
DDRB_CKE1 AF19 SCKE_B0 SDQ_B23 T r a c e width of 12mils and space
13,14 DDRB_CKE1 SCKE_B1
AG19 AH27 DDRB_SDQS3 13,14 10mils(min)
C AE18 SCKE_B2 SDQS_B3 AJ28 C
SCKE_B3 SDM_B3 DDRB_SDM3 13,14
AG29 AK25 DDRB_SDQ24 +2.5V
SCMDCLK_B0 SDQ_B24 DDRB_SDQ25
AG30 AH26
AF17 SCMDCLK_B0# SDQ_B25 AG27 DDRB_SDQ26
13 DDRB_CLK1 SCMDCLK_B1 SDQ_B26
AG17 AF27 DDRB_SDQ27
13 DDRB_CLK1# SCMDCLK_B1# SDQ_B27
13 DDRB_CLK2 N27 AJ26 DDRB_SDQ28
SCMDCLK_B2 SDQ_B28 DDRB_SDQ29
13 DDRB_CLK2# N26 AJ27 2 1
SCMDCLK_B2# SDQ_B29
1
S M_VREF_B and SM_VREF_A AJ30 AD25 DDRB_SDQ30 C709 C778
SCMDCLK_B3 SDQ_B30 DDRB_SDQ31 R510
a r e connected inside GMCH. AH29 AF28
AK15 SCMDCLK_B3# SDQ_B31 2.2U_0805_16V4Z 10K_0603_1% 0.01U_0402_16V7K
+2.5V +SM_VREF_B SCMDCLK_B4 1 2
AL15 AD29 DDRB_SDQS4 13,14
N31 SCMDCLK_B4# SDQS_B4 AC31
+ SM_VREF_B trace width of SCMDCLK_B5 SDM_B4 DDRB_SDM4 13,14
N30 SMYRCOMPVOH
2
12mils and space SCMDCLK_B5# AE30 DDRB_SDQ32
12mils(min) SDQ_B32 DDRB_SDQ33
2 AP9 AC27 1
SMVREF_B SDQ_B33
1
C598 AC30 DDRB_SDQ34 1
SMYRCOMP SDQ_B34 DDRB_SDQ35 C691 R506 C296
AA33 Y29
SMYRCOMP SDQ_B35
1
2.2U_0805_16V4Z AE31 DDRB_SDQ36 1U_0603_10V6K 30.9K_0603_1%

R442 1 SMYRCOMPVOH SDQ_B36 DDRB_SDQ37 2 0.01U_0402_16V7K
R34 AB29
SMYRCOMPVOH SDQ_B37 AA26 DDRB_SDQ38 2
150_0603_1% SMYRCOMPVOL SDQ_B38 DDRB_SDQ39 Close to Pin R14
R33 AA27
2
SMYRCOMPVOL SDQ_B39
U30 Close to GMCH <1"
2
SDQS_B5 DDRB_SDQS5 13,14

U31 DDRB_SDM5 13,14
SDM_B5
2 2 AA30 DDRB_SDQ40
SDQ_B40
1
C612 C138 W30 DDRB_SDQ41

R444 SDQ_B41 U27 DDRB_SDQ42
B
2.2U_0805_16V4Z 0.1U_0402_16V4Z SDQ_B42 DDRB_SDQ43 B
T25
150_0603_1% 1 1 SDQ_B43 AA31 DDRB_SDQ44
SDQ_B44
V29 DDRB_SDQ45 DDR RCOMP VOL Circuitry
SDQ_B45 U25 DDRB_SDQ46
2
Close to GMCH(AP9) SDQ_B46 DDRB_SDQ47

R27
SDQ_B47
L27 DDRB_SDQS6 13,14 * R 1 63 Change to 31.12K is real
SDQS_B6 M29 +2.5V
SDM_B6 DDRB_SDM6 13,14
P29 DDRB_SDQ48
SDQ_B48 DDRB_SDQ49 T r a c e width of 12mils and space
R30
SDQ_B49 K28 DDRB_SDQ50
SDQ_B50 10mils(min)
1
L30 DDRB_SDQ51 2
SDQ_B51 R31 DDRB_SDQ52 C316 R224
SDQ_B52 DDRB_SDQ53 30.9K_0603_1%
R26
SDQ_B53 P25 DDRB_SDQ54 2.2U_0805_16V4Z
SDQ_B54 DDRB_SDQ55 1
L32
SDQ_B55
2
J30 SMYRCOMPVOL
SDQS_B7 DDRB_SDQS7 13,14
J31 DDRB_SDM7 13,14
SDM_B7
1
K30 DDRB_SDQ56 1 1
SDQ_B56 DDRB_SDQ57 R223 C292
H29
SDQ_B57 F32 DDRB_SDQ58 C300 10K_0603_1%
SDQ_B58 DDRB_SDQ59 1U_0603_10V6K 0.01U_0402_16V7K
G33
SDQ_B59 N25 DDRB_SDQ60 2 2
SDQ_B60 DDRB_SDQ61 Close to Pin R33
M25
2
SDQ_B61 J29 DDRB_SDQ62
SDQ_B62 DDRB_SDQ63
A G32 A
SDQ_B63 Close to GMCH <1"
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINSCONFIDENTIAL Size
Springdale-DDR Interface-B(3/5)
Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELEC
TRONICS,INC. Date: Friday, August 08, 2003 Sheet 9 of 57
5 4 3 2 1
5 4 3 2 1
CLK_MCH_66M
+1.5VS +1.5VS
1
AGP_AD[0..31] 16
R453
@10_0402_5%
U43D
1
16 AGP_C/BE#[0..3]
R112 R103 AGP_C/BE#0 Y7 AC6
2
1 GCBE0 GADSTBF0 AGP_AD_STBF0 16
43.2_0402_1% AGP_C/BE#1 W5 AC5 AGP_AD_STBS0 16
52.3_0603_1% C624 AGP_C/BE#2 AA3 GCBE1 GADSTBS0#
@10P_0402_50V8K AGP_C/BE#3 U2 GCBE2 AE6 AGP_AD0
2 GCBE3 GAD0 AGP_AD1
AC11
2
2
GRCOMP HI_RCOMP_MCH U6 GAD1 AD5 AGP_AD2
16 AGP_FRAME # GFRAME GAD2
D CLK_MCH_66M H4 AE5 AGP_AD3 D
15 CLK_MCH_66M GCLKIN GAD3
AB4 AA10 AGP_AD4
16 AGP_DEVSEL# GDEVSEL GAD4 AGP_AD5
16 AGP_IRDY# V11 AC9
AB5 GIRDY GAD5 AB11 AGP_AD6
+1.5VS GMCH-HUB Reference Circuit 16 AGP_TRDY# GTRDY AGP GAD6
W11 AB7 AGP_AD7
16 AGP_STOP# GSTOP GAD7
16 AGP_PAR AGP_PAR AB2 AA9 AGP_AD8
GPAR/ADD_DETECT GAD8 AGP_AD9
16 AGP_REQ# N6 AA6
GREQ GAD9
1
Note: 16 AGP_GNT # M7 AA5 AGP_AD10

R163 GGNT GAD10 AGP_AD11
H I _SWING_MCH, HI_VREF_MCH W10
GRCOMP AC2 GAD11 AA11 AGP_AD12
226_0603_1% t r ace width of 10mils and AGP_SWING GRCOMP/DVOBCGCOMP GAD12 AGP_AD13
AC3 W6
space 7mils +AGP_VREF AD2 GVSWING GAD13 W9 AGP_AD14
+AGP_VREF GVREF GAD14
HI_SWING_MCH V7 AGP_AD15
2
R10 GAD15
16 AGP_RBF# GRBF
1
1 1 Close to GMCH(AE3) 16 AGP_WBF# R9

GWBF GADSTBF1
V4 AGP_AD_STBF1 16
R439 C164 16 AGP_DBIHI M4 V5 AGP_AD_STBS1 16
C170 DBI_HI GADSTBS1#
16 AGP_DBILO M5
147_0603_1% DBI_LO AA2 AGP_AD16
0.01U_0402_16V7K 16 AGP_ST[0..2] GAD16
2 0.1U_0402_16V4Z 2 AGP_ST0 N3 Y4 AGP_AD17
C l o se to GMCH ball <250mils AGP_ST1 N5 GST0 GAD17 Y2 AGP_AD18
2
AGP_ST2 GST1 GAD18 AGP_AD19

N2 W2
GST2 GAD19 Y5 AGP_AD20
23 HUB_HL[0..10] GAD20
HI_VREF_MCH HUB_HL0 AF5 V2 AGP_AD21
HUB_HL1 AG3 HI0 GAD21 W3 AGP_AD22
HI1 GAD22
1
1 1 Close to GMCH(AE2) HUB_HL2 AK2

HI2 GAD23
U3 AGP_AD23
R437 C605 HUB_HL3 AG5 T2 AGP_AD24
HI3 GAD24
HUB
C603 HUB_HL4 AK5 T4 AGP_AD25
113_0603_1% 0.1U_0402_16V4Z HUB_HL5 AL3 HI4 GAD25 T5 AGP_AD26
0.01U_0402_16V7K HI5 GAD26
2 2 HUB_HL6 AL2 R2 AGP_AD27
C C l o se to GMCH ball <250mils HUB_HL7 AL4 HI6 GAD27 P2 AGP_AD28 C
2
HUB_HL8 HI7 GAD28 AGP_AD29

AJ2 P5
HUB_HL9 AH2 HI8 GAD29 P4 AGP_AD30
HUB_HL10 HI9 GAD30 AGP_AD31
AJ3 M2
AH5 HI10 GAD31
23 HUB_HLSTRF HISTRF
23 HUB_HLSTRS AH4 U11 AGP_SB_STBF 16
HISTRS GSBSTBF T11
+1.5VS GMCH-CSA Reference Circuit GSBSTBS# AGP_SB_STBS 16
HI_RCOMP_MCH AD4
HI_RCOMP AGP_SBA[0..7] 16
HI_SWING_MCH AE3 R6 AGP_SBA0
HI_VREF_MCH HI_SWING GSBA0# AGP_SBA1
AE2 P7
HI_VREF GSBA1#
1
Note: R3 AGP_SBA2
R100 GSBA2# AGP_SBA3
C I _SWING_MCH, CI_VREF_MCH AK7 R5
AH7 CI0 GSBA3# U9 AGP_SBA4
226_0603_1% t r ace width of 10mils and CI1 GSBA4# AGP_SBA5
AD11 U10
space 20mils AF7 CI2 GSBA5# U5 AGP_SBA6
CI_SWING_GMCH CI3 GSBA6# AGP_SBA7
AD7 T7
2
AC10 CI4 GSBA7#

CI5
1
CSA
1 1 C lose to GMCH(AF2) AF8
CI6 DDCA_DATA
H3 R149 2 1 0_0402_5%
C151 R99 AG7 F2 R165 2 1 0_0402_5%
C137 CI7 DDCA_CLK
AE9
0.1U_0402_16V4Z 147_0603_1% AH9 CI8 F4 R170 2 1 0_0402_5%
0.01U_0402_16V7K CI9 RED
2 2 AG6 E4
C l o se to GMCH ball <250mils AJ6 CI10 RED# H6 R169 2 1 0_0402_5%
VGA
2
CISTRF GREEN
AJ5 G5
CI_VREF_GMCH R435 52.3_0603_1% CISTRS GREEN# H7 R172 2 1 0_0402_5%
0.35V BLUE
+1.5VS 1 2 AG2 G6
CI_RCOMP BLUE#
1
1 1 C lose to GMCH(AF4) CI_SWING_GMCH AF2

CI_SWING
C149 R108 CI_VREF_GMCH AF4 G3
C158 CI_VREF HSYNC E2
B
0.1U_0402_16V4Z 113_0603_1% R590 R166 0_0402_5% VSYNC B
0.01U_0402_16V7K 2 1 G4
2 2 1 2 @1K_0402_5% AP8 DREFCLK D2 R460 2 1 0_0402_5%
+3VS EXTTS# REFSET
2 1 @0_0402_5% AJ8
2
R596 2 1 AK4 ICH_SYNC# A3

16,22,23,26,27,29,30,33,34,37 PCIRST# RSTIN# NC_1
C l o se to GMCH ball <250mils R128 0_0402_5% A33
AG10 NC_2 A35
AG9
RESERVED_1 NC_3
AF13
Analog RGB/CRT guidelines
AN35 RESERVED_2 NC_4 AF23 for Springdale-P
RESERVED_3 NC_5
AP34 AJ12
AR1 RESERVED_4 NC_6 AN1
+1.5VS GMCH-AGP Reference Circuit RESERVED_5 NC_7
AP2
NC_8 AR3
NC_9
AR33
NC_10
1
AR35
R150 NC_11
B2
C l o s e GMCH ball (AC3) less than 250mils NC_12 B25
60.4_0603_1% NC_13
B34
NC_14 C1
AGP_SWING NC_15
C23
2
NC_16 C35
1 1 NC_17
1
C175 C171 E26

R143 NC_18 M31
39.2_0603_1% 0.1U_0402_16V4Z 0.01U_0402_16V7K NC_19
R25
2 2 NC_20
2
+AGP_VREF = 0.3535 Follow Springdale Chipset Platform Design guide Rev1.11(12474)

1 2 +AGP_VREF
A
R144 Note: A
1
44.2_0603_1% R151 1 S p r i n gdale Customer Schematic R1.2 page18

C160 A G P _ S W ING only had 0.1u cap ; But Springdale
2 0.01U_0402_16V7K C h i p s e t Platform Design guide Rev1.11(12474)
100_0603_1%
p a g e 1 3 8 had a 0.01uf cap. need confirm with
2
Intel. Title
C lose GMCH ball (AD2) Springdale-AGP/HUB/VGA/CSA (4/5)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
less than 250mils AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOFR&D B 0.2
5 4 3 2 1
5 4 3 2 1
+2.5V
1 2 1 1 1 1 1 1 1
C90 C91 C105 C208 C103 C114 C117 C109 C123
Note: 22U_1206_10V4Z 4.7U_0805_6.3V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
Placed less than 100 mils from ball 2 1 2 2 2 2 2 2 2
+1.5VS
Route to GMCH ball without via
U43E
D VTT_DCAP1 A15 J6 +2.5V +1.5VS D
VTT_DCAP2 A21 VTT VCC J7
VTT VCC
1 1 A4 J8
C681 C699 A5 VTT VCC J9
VTT VCC 1 1 1 1 1
A6 K6 C150 C98 C283 C246 C201
0.47U_0603_16V7K 0.47U_0603_16V7K B5 VTT VCC K7
2 2 VTT VCC 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
B6 K8
C5 VTT VCC K9 2 2 2 2 2
VTT VCC
C6 L6
D5 VTT VCC L7
VTT VCC
D6 L9
D7 VTT VCC L10
+VTT_GMCH VTT VCC +1.5VS
E6 L11
E7 VTT VCC M8
VTT VCC
F7 M9
VTT VCC M10
VCC 1 1 1 1 1 1 1 1 1
AA35 M11 C231 C229 C217 C213 C207 C220 C197 C216 C234
AL6 VCC_DDR VCC N9
2 +2.5V VCC_DDR VCC
AL7 N10 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
C713 AM1 VCC_DDR VCC N11 2 2 2 2 2 2 2 2 2
VCC_DDR VCC
0.1U_0402_10V6K AM2 P10
1 AM3 VCC_DDR VCC P11
VCC_DDR VCC
AM5 R11
AM6 VCC_DDR VCC T16
VCC_DDR VCC +1.5VS +VTT_GMC H
AM7 T17
AM8 VCC_DDR VCC T18
VCC_DDR VCC
AN2 T19
AN4 VCC_DDR VCC T20
POWER
VCC_DDR VCC 1 2 1 2 2 2 1 1
AN5 U16 C224 C243 C240 C253 C258 C244
C AN6 VCC_DDR VCC U17 + C198 + C266 C249 C
VCC_DDR VCC 4.7U_0805_6.3V6K 10U_1206_10V4Z 0.1U_0402_16V4Z 4.7U_0805_6.3V6K 4.7U_0805_6.3V6K 1U_0603_10V6K 0.47U_0603_16V7K
AN7 U20
AN8 VCC_DDR VCC V16 470U_D4_2.5VM 1 470U_D4_2.5VM 1 1 1 2 2
VCC_DDR VCC 2 2
AP3 V18
AP4 VCC_DDR VCC V20
VCC_DDR VCC P l a c e at the output of the 1.5V VR
AP5 W16
C618 AP6 VCC_DDR VCC W19
0.1U_0402_10V6K VCC_DDR VCC
AP7 W20 +1.5VS
2 1 VCC_DDR_DCAP5 AR15 VCC_DDR VCC Y16 +VTT_GMCH +2.5V
VCC_DDR_DCAP4 VCC_DDR VCC
2 1 AR21 Y17
C620 0.22U_0603_10V7K AR31 VCC_DDR VCC Y18
* VCC_DDR VCC 1 1 1
AR4 Y19
C736 AR5 VCC_DDR VCC Y20 C242 C233 C148
0.47U_0603_16V7K VCC_DDR VCC 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
AR7
2 1 VCC_DDR_DCAP1 E35 VCC_DDR 2 2 2
VCC_DDR Place near ball
2 1 R35 J1 Place near GMCH
C719 0.22U_0603_10V7K VCC_DDR VCC_AGP J2 Y11,routing trace
VCC_AGP Place near GMCH
+3VS G1 J3 from cap to ball
C128 G2 VCC_DAC VCC_AGP J4
Trace 14mils 0.1U_0402_10V6K VCC_DAC VCC_AGP
J5
2 1 VCC_AGP_DCAP2 AG1 VCC_AGP K2 N o t e : Please change to 0.82uH, DC current
VCCA_AGP VCC_AGP
+1.5VS Y11 K3 o f 3 0mA parts and close to cap
VCCA_AGP VCC_AGP K4
VTT_DCAP3 VCC_AGP
2 1 A31 K5
C329 0.1U_0402_10V6K VCCA_FSB B4 VCCA_FSB VCC_AGP L1 +1.5VS
R467 2 VCCA_DPLL VCCA_FSB VCC_AGP
1 0_0402_5% B3 L2
2 1 VCCA_DAC C2 VCCA_DPLL VCC_AGP L3 Trace 14mils L15 Trace 14mils
R462 0_0402_5% VCCA_DAC VCC_AGP
L4 **
1 2 VCC_DDR_DCAP2 AL35 VCC_AGP L5 2 1 VCCA_FSB1 1 2 VCCA_FSB
B
C248 0.1U_0402_10V6K VCCA_DDR VCC_AGP VCC_AGP_DCAP1 R141 B
AB25 Y1 1 2
VCCA_DDR VCC_AGP
1
AC25 0_0603_5% LQG21F4R7N00_0805 2
VCCA1P5_DDR_SM VCCA_DDR C166 C214 C235
AC26 D3 +
VCCA_DDR VSSA_DAC 0.1U_0402_10V6K
(1A)
SPRINGDALE_UFCBGA932 150U_D2_6.3VM 0.1U_0402_16V4Z
1
2
Close to GMCH
Note:
Placed less than 100 mils from ball
N o t e : P l e ase change to 1uH(0.54uH-D-IN), DC current
Route to GMCH ball without via
o f 1 000mA parts and close to cap
Trace 50mils
Decoupling Reference Document:
Springdale Chipset Platform Design guide Rev1.11 +1.5VS T r a c e 35mils (under GMCH ball field)
(12474)page246,248
Trace 35mils
L18 **
2 1 VCCA_DDR 1 2 VCCA1P5_DDR_SM
R183
0_0603_5% (1A) 0_0805_5% 1 (1A) 2
C241
Decoupling Reference Document: C222
Springdale Customer Schematic R1.2 page84 22U_1206_6.3V6M 0.1U_0402_16V4Z
2 1
Close to GMCH
A A

Title
Springdale-Decoupling (5/5)
5 4 3 2 1
5 4 3 2 1
+2.5V +2.5V D DRA_VREF trace width of

1 2 mils and space 12mils(min)
JP22
1 2 DDRA_VREF +2.5V
VREF VREF
3 4 1
DDRA_SDQ0 5 VSS VSS 6 DDRA_SDQ5 C100 DDRA_SDQ[0..63]
DQ0 DQ4 8,14 DDRA_SDQ[0..63]
1
DDRA_SDQ1 7 8 DDRA_SDQ4
9 DQ1 DQ5 10 0.1U_0402_16V4Z R87 DDRA_SDQS[0..7]
DDRA_SDQS0 VDD VDD DDRA_SDM0 2 8,14 DDRA_SDQS[0..7]
11 12
DDRA_SDQ6 13 DQS0 DM0 14 DDRA_SDQ7 75_0603_1% DDRA_SMA[0..12]
DQ2 DQ6 Close to SO-DIMM 8,14 DDRA_SMA[0..12]
15 16
DDRA_SDQ2 17 VSS VSS 18 DDRA_SDQ3 DDRA_SDM[0..7]
2
DDRA_SDQ12 DQ3 DQ7 DDRA_SDQ9 8,14 DDRA_SDM[0..7]
D 19 20 D
DQ8 DQ12
1
21 22
DDRA_SDQ8 VDD VDD DDRA_SDQ13 R92
23 24
DDRA_SDQS1 25 DQ9 DQ13 26 DDRA_SDM1
DQS1 DM1 75_0603_1%
27 28
DDRA_SDQ10 29 VSS VSS 30 DDRA_SDQ14
DDRA_SDQ15 DQ10 DQ14 DDRA_SDQ11
31 32
2
33 DQ11 DQ15 34
VDD VDD
35 36
8 DDRA_CLK1 37 CK0 VDD 38
8 DDRA_CLK1# CK0# VSS
39 40
VSS VSS
DDRA_SDQ16 43
DQ16
DQ17
DQ20
DQ21
44 DDRA_SDQ17 System Memory Decoupling caps
45 46 +2.5V
DDRA_SDQS2 VDD VDD DDRA_SDM2
47 48
DDRA_SDQ18 49 DQS2 DM2 50 DDRA_SDQ22
DQ18 DQ22
51 52 1 1 1 1 1 1 1
DDRA_SDQ19 53 VSS VSS 54 DDRA_SDQ23 C116 C134 C161 C192 C204 C227 C247
55 56
57 DQ24 DQ28 58 22U_1206_10V4Z 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
DDRA_SDQ29 VDD VDD DDRA_SDQ25 2 2 2 2 2 2 2
59 60
DDRA_SDQS3 61 DQ25 DQ29 62 DDRA_SDM3
DQS3 DM3
63 64
DDRA_SDQ30 65 VSS VSS 66 DDRA_SDQ26
67 68
69 DQ27 DQ31 70
VDD VDD +2.5V
71 72
C 73 CB0 CB4 74 C
CB1 CB5
75 76
77 VSS VSS 78
DQS8 DM8 1 1 1 1 1 1 1 1
79 80 C255 C276 C302 C319 C330 C341 C347 C354
81 CB2 CB6 82
VDD VDD 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
83 84
85 CB3 CB7 86 2 2 2 2 2 2 2 2
DU DU/RESET#
87 88
89 VSS VSS 90
CK2 VSS
91 92
93 CK2# VDD 94
DDRA_CKE1 VDD VDD DDRA_CKE0
95 96 DDRA_CKE0 8,14
8,14 DDRA_CKE1 97 CKE1 CKE0 98
DDRA_SMA12 DU/A13 DU/BA2 DDRA_SMA11
99 100
DDRA_SMA9 101 A12 A11 102 DDRA_SMA8
A9 A8
103 104
DDRA_SMA7 105 VSS VSS 106 DDRA_SMA6
DDRA_SMA5 A7 A6 DDRA_SMA4
107 108
DDRA_SMA3 109 A5 A4 110 DDRA_SMA2
DDRA_SMA1 A3 A2 DDRA_SMA0
111 112
113 A1 A0 114
DDRA_SMA10 VDD VDD DDRA_SBS1
115 116 DDRA_SBS1 8,14
DDRA_SBS0 117 A10/AP BA1 118 DDRA_SRAS#
8,14 DDRA_SBS0 BA0 RAS# DDRA_SRAS# 8,14
DDRA_SWE# 119 120 DDRA_SCAS#
8,14 DDRA_SWE# DDRA_SCS#0 121 WE# CAS# 122 DDRA_SCS#1
DDRA_SCAS# 8,14 Decoupling Reference Document:
8,14 DDRA_SCS#0 S0# S1# DDRA_SCS#1 8,14 Springdale Customer Schematic R1.2 page22
123 124
DU DU
125
VSS VSS
126 each Channel(two DIMMs) requirement 22uF*1 ; 0.1uF*14
DDRA_SDQ37 129 DQ32 DQ36 130 DDRA_SDQ33
B DQ33 DQ37 B
131 132
DDRA_SDQS4 133 VDD VDD 134 DDRA_SDM4
DDRA_SDQ34 DQS4 DM4 DDRA_SDQ38
135 136 Decoupling Reference Document:
137 DQ34 DQ38 138
DDRA_SDQ35 VSS VSS DDRA_SDQ39 Springdale Chipset Platform Design guide Rev1.11
139 140
DQ35 DQ39
DDRA_SDQ44 141
DQ40 DQ44
142 DDRA_SDQ40 (12474)pag 271 each DIMM(two) requirement 0.1uF*42
143 144
DDRA_SDQ41 145 VDD VDD 146 DDRA_SDQ45
DDRA_SDQS5 DQ41 DQ45 DDRA_SDM5
147 148
149 DQS5 DM5 150
DDRA_SDQ43 VSS VSS DDRA_SDQ42
151 152
DQ43 DQ47
155 156
157 VDD VDD 158
VDD CK1# DDRA_CLK2# 8
159 160 DDRA_CLK2 8
161 VSS CK1 162
163 164
DQ49 DQ53
167 168
DDRA_SDQS6 169 VDD VDD 170 DDRA_SDM6
DDRA_SDQ54 DQS6 DM6 DDRA_SDQ51
171 172
173 DQ50 DQ54 174
175 176
DQ56 DQ60
179 180
DDRA_SDQ61 181 VDD VDD 182 DDRA_SDQ57
DDRA_SDQS7 DQ57 DQ61 DDRA_SDM7
183 184
185 DQS7 DM7 186
A 187 188 A
DQ59 DQ63
191 192
193 VDD VDD 194
13,15,23 ICH_SMB_DATA SDA SA0
13,15,23 ICH_SMB_CLK 195 196
197 SCL SA1 198
+3VS 199
VDD_SPD
VDD_ID
SA2
DU
200 SO-DIMM 0 Compal Electronics, Inc.
REVERSE Title
KEYLINK_5762-3-111
H = 5.2mm DDR-SODIMM SLOT1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINSCONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOFR&D 0.2
5 4 3 2 1
5 4 3 2 1
+2.5V +2.5V D DRB_VREF trace width of +2.5V

1 2 mils and space 12mils(min) DDRB_SDQ[0..63]
JP23 9,14 DDRB_SDQ[0..63]
1 2 DDRB_VREF DDRB_SDQS[0..7]
VREF VREF 9,14 DDRB_SDQS[0..7]
1
3 4
DDRB_SDQ4 VSS VSS DDRB_SDQ2 R86 DDRB_SMA[0..12]
5 6 2
DDRB_SDQ0 7 DQ0 DQ4 8 DDRB_SDQ6 9,14 DDRB_SMA[0..12]
DQ1 DQ5 C101 75_0603_1% DDRB_SDM[0..7]
9 10
DDRB_SDQS0 11 VDD VDD 12 DDRB_SDM0 0.1U_0402_16V4Z 9,14 DDRB_SDM[0..7]
DDRB_SDQ7 DQS0 DM0 DDRB_SDQ1 1
13 14
2
15 DQ2 DQ6 16
VSS VSS
1
D DDRB_SDQ5 17 18 DDRB_SDQ3 D
DDRB_SDQ9 19 DQ3 DQ7 20 DDRB_SDQ13 R90
DQ8 DQ12
21 22
DDRB_SDQ12 23 VDD VDD 24 DDRB_SDQ11 75_0603_1%
DDRB_SDQS1 DQ9 DQ13 DDRB_SDM1
25 26
27 DQS1 DM1 28
2
DDRB_SDQ10 VSS VSS DDRB_SDQ15
29 30
DDRB_SDQ14 31 DQ10 DQ14 32 DDRB_SDQ8
DQ11 DQ15
33 34
35 VDD VDD 36
9 DDRB_CLK1
9 DDRB_CLK1#
37
CK0
CK0#
VDD
VSS
38 System Memory Decoupling caps
39 40
VSS VSS +2.5V
DDRB_SDQ20 41 42 DDRB_SDQ19
DQ17 DQ21 1 1 1 1 1 1 1 1
45 46 C118 C139 C162 C168 C190 C223 C225 C256
DDRB_SDQS2 47 VDD VDD 48 DDRB_SDM2
DDRB_SDQ22 DQS2 DM2 DDRB_SDQ18 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
49 50
51 DQ18 DQ22 52 2 2 2 2 2 2 2 2
53 54
DQ24 DQ28
57 58
DDRB_SDQ25 59 VDD VDD 60 DDRB_SDQ29
DDRB_SDQS3 DQ25 DQ29 DDRB_SDM3
61 62
63 DQS3 DM3 64
65 66
DQ27 DQ31
69 70
C 71 VDD VDD 72 +2.5V C
CB0 CB4
73 74
75 CB1 CB5 76
VSS VSS
77 78 1 1 1 1 1 1 1 1
79 DQS8 DM8 80 C281 C318 C312 C333 C331 C346 C353 C355
CB2 CB6
81 82
83 VDD VDD 84 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
CB3 CB7 2 2 2 2 2 2 2 2
85 86
87 DU DU/RESET# 88
VSS VSS
89 90
91 CK2 VSS 92
CK2# VDD
93 94
DDRB_CKE1 95 VDD VDD 96 DDRB_CKE0
9,14 DDRB_CKE1 CKE1 CKE0 DDRB_CKE0 9,14
97 98
DDRB_SMA12 99 DU/A13 DU/BA2 100 DDRB_SMA11
DDRB_SMA9 A12 A11 DDRB_SMA8
101 102
103 A9 A8 104
DDRB_SMA7 VSS VSS DDRB_SMA6
105 106
DDRB_SMA5 107 A7 A6 108 DDRB_SMA4
DDRB_SMA3 A5 A4 DDRB_SMA2
109 110
DDRB_SMA1 111 A3 A2 112 DDRB_SMA0
A1 A0
113 114
DDRB_SMA10 115 VDD VDD 116 DDRB_SBS1
A10/AP BA1 DDRB_SBS1 9,14
DDRB_SBS0 117 118 DDRB_SRAS#
9,14 DDRB_SBS0 DDRB_SWE# 119 BA0 RAS# 120 DDRB_SCAS#
DDRB_SRAS# 9,14 Decoupling Reference Document:
9,14 DDRB_SWE# WE# CAS# DDRB_SCAS# 9,14 Springdale Customer Schematic R1.2 page26
DDRB_SCS#0 121 122 DDRB_SCS#1
9,14 DDRB_SCS#0 S0# S1# DDRB_SCS#1 9,14
123
DU DU
124 each Channel(two DIMMs) requirement 0.1uF*24
125 126
DDRB_SDQ33 127 VSS VSS 128 DDRB_SDQ32
B
DDRB_SDQ34 DQ32 DQ36 DDRB_SDQ36 B
129 130
131 DQ33 DQ37 132 +2.5V
DDRB_SDQS4 VDD VDD DDRB_SDM4
133 134
DDRB_SDQ37 135 DQS4 DM4 136 DDRB_SDQ39
DQ34 DQ38
137 138 1 1 1 1 1 1 1 1
DDRB_SDQ38 139 VSS VSS 140 DDRB_SDQ35 C189 C165 C254 C289 C113 C309 C305 C193
DDRB_SDQ40 DQ35 DQ39 DDRB_SDQ46
141 142
143 DQ40 DQ44 144 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
DDRB_SDQ44 VDD VDD DDRB_SDQ45 2 2 2 2 2 2 2 2
145 146
DDRB_SDQS5 147 DQ41 DQ45 148 DDRB_SDM5
DQS5 DM5
149 150
153 154
155 DQ43 DQ47 156
VDD VDD
157 158 DDRB_CLK2# 9
159 VDD CK1# 160
VSS CK1 DDRB_CLK2 9
161 162
165 166
167 DQ49 DQ53 168
DDRB_SDQS6 VDD VDD DDRB_SDM6
169 170
DDRB_SDQ55 171 DQS6 DM6 172 DDRB_SDQ51
DQ50 DQ54
173 174
177 178
179 DQ56 DQ60 180
DDRB_SDQ56 VDD VDD DDRB_SDQ61
181 182
DDRB_SDQS7 183 DQ57 DQ61 184 DDRB_SDM7
DQS7 DM7
A 185 186 A
189 190
191 DQ59 DQ63 192
VDD VDD
12,15,23 ICH_SMB_DATA 193 194
195 SDA SA0 196
12,15,23 ICH_SMB_CLK SCL SA1 +3VS
197 198
+3VS 199 VDD_SPD SA2 200 Compal Electronics, Inc.
VDD_ID DU SO-DIMM 2 REVERSE Title
KLINK_5746-3-111 DDR-SODIMM SLOT2

H= 9.2mm AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOFR&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATIONITCONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELEC TRONICS,INC.
LA-1911
5 4 3 2 1
5 4 3 2 1
Channel B(DIMM2) Termination resistors & Decoupling caps

Channel A(DIMM0) Termination resistors & Decoupling caps +1.25VS +1.25VS
+1.25VS +1.25VS
RP7 RP71 RP32
RP72 RP6 RP29 DDRB_SDQ0 1 4 4 1 DDRB_SDQ2 4 1 DDRB_CKE1 DDRB_CKE1 9,13
DDRA_SDQ1 1 4 4 1 DDRA_SDQ5 4 1 DDRA_CKE1 DDRB_SDQ4 2 3 3 2 DDRB_SDQ6 3 2 DDRB_CKE0
DDRA_CKE1 8,12 DDRB_CKE0 9,13
DDRA_SDQ0 2 3 3 2 DDRA_SDQ4 3 2 DDRA_CKE0 DDRA_CKE0 8,12 56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% RP9 RP73 RP33
RP74 RP8 RP98 DDRB_SDQ7 1 4 4 1 DDRB_SDM0 4 1 DDRB_SMA9
DDRA_SDQ6 1 4 4 1 DDRA_SDM0 4 1 DDRA_SMA9 DDRB_SDQS0 2 3 3 2 DDRB_SDQ1 3 2 DDRB_SMA12
D DDRA_SDQS0 2 3 3 2 DDRA_SDQ7 3 2 DDRA_SMA12 D
DDRA_SDQ[0..63] 56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% 8,12 DDRA_SDQ[0..63] DDRB_SDQ[0..63]
RP11 RP75 RP35 9,13 DDRB_SDQ[0..63]
RP76 RP10 RP100 DDRA_SDQS[0..7] DDRB_SDQ9 1 4 4 1 DDRB_SDQ3 4 1 DDRB_SMA5
8,12 DDRA_SDQS[0..7]
DDRA_SDQ12 1 4 4 1 DDRA_SDQ3 4 1 DDRA_SMA5 DDRB_SDQ5 2 3 3 2 DDRB_SDQ13 3 2 DDRB_SMA7 DDRB_SDQS[0..7]
DDRA_SDQ2 9,13 DDRB_SDQS[0..7]
2 3 3 2 DDRA_SDQ9 3 2 DDRA_SMA7 DDRA_SMA[0..12]
8,12 DDRA_SMA[0..12] 56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% DDRB_SMA[0..12]
9,13 DDRB_SMA[0..12]
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% DDRA_SDM[0..7] RP13 RP78 RP38
8,12 DDRA_SDM[0..7] DDRB_SDQS1 1
RP77 RP12 RP102 4 4 1 DDRB_SDQ11 4 1 DDRB_SMA1 DDRB_SDM[0..7]
9,13 DDRB_SDM[0..7]
DDRA_SDQS1 1 4 4 1 DDRA_SDQ13 4 1 DDRA_SMA1 DDRB_SDQ12 2 3 3 2 DDRB_SDM1 3 2 DDRB_SMA3
DDRA_SDQ8 2 3 3 2 DDRA_SDM1 3 2 DDRA_SMA3
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% RP16 RP80 RP40
RP79 RP15 RP104 DDRB_SDQ14 1 4 4 1 DDRB_SDQ15 4 1 DDRB_SBS0 DDRB_SBS0 9,13
DDRA_SDQ15 1 4 4 1 DDRA_SDQ14 4 1 DDRA_SBS0 DDRB_SDQ10 2 3 3 2 DDRB_SDQ8 3 2 DDRB_SMA10
DDRA_SDQ10 DDRA_SBS0 8,12
2 3 3 2 DDRA_SDQ11 3 2 DDRA_SMA10
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% RP18 RP84 RP42
RP85 RP17 RP106 DDRB_SDQ21 1 4 4 1 DDRB_SDQ19 4 1 DDRB_SCS#0 DDRB_SCS#0 9,13
DDRA_SDQ16 1 4 4 1 DDRA_SDQ21 4 1 DDRA_SCS#0 DDRB_SDQ20 2 3 3 2 DDRB_SDQ16 3 2 DDRB_SWE#
DDRA_SCS#0 8,12 DDRB_SWE# 9,13
DDRA_SDQ20 2 3 3 2 DDRA_SDQ17 3 2 DDRA_SWE# DDRA_SWE# 8,12
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% RP20 RP86 RP99
RP87 RP19 RP31 DDRB_SDQ22 1 4 4 1 DDRB_SDM2 4 1 DDRB_SMA11
DDRA_SDQ18 1 4 4 1 DDRA_SDM2 4 1 DDRA_SMA11 DDRB_SDQS2 2 3 3 2 DDRB_SDQ18 3 2 DDRB_SMA8
DDRA_SDQS2 2 3 3 2 DDRA_SDQ22 3 2 DDRA_SMA8
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% RP22 RP88 RP101
RP89 RP21 RP34 DDRB_SDQ24 1 4 4 1 DDRB_SDQ23 4 1 DDRB_SMA6
C DDRA_SDQ28 1 4 4 1 DDRA_SDQ23 4 1 DDRA_SMA6 DDRB_SDQ17 2 3 3 2 DDRB_SDQ28 3 2 DDRB_SMA4 C
DDRA_SDQ19 2 3 3 2 DDRA_SDQ24 3 2 DDRA_SMA4
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% RP24 RP90 RP105
RP91 RP23 RP39 DDRB_SDQS3 1 4 4 1 DDRB_SDQ29 4 1 DDRB_SBS1 DDRB_SBS1 9,13
DDRA_SDQS3 1 4 4 1 DDRA_SDQ25 4 1 DDRA_SBS1 DDRB_SDQ25 2 3 3 2 DDRB_SDM3 3 2 DDRB_SRAS#
DDRA_SBS1 8,12 DDRB_SRAS# 9,13
DDRA_SDQ29 2 3 3 2 DDRA_SDM3 3 2 DDRA_SRAS# DDRA_SRAS# 8,12 56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% RP27 RP96 RP107
RP97 RP26 RP41 DDRB_SDQ30 1 4 4 1 DDRB_SDQ27 4 1 DDRB_SCAS# DDRB_SCAS# 9,13
DDRA_SDQ27 1 4 4 1 DDRA_SDQ26 4 1 DDRA_SCAS# DDRB_SDQ26 2 3 3 2 DDRB_SDQ31 3 2 DDRB_SCS#1
DDRA_SCAS# 8,12 DDRB_SCS#1 9,13
DDRA_SDQ30 2 3 3 2 DDRA_SDQ31 3 2 DDRA_SCS#1 DDRA_SCS#1 8,12
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% RP44 RP108 RP103
RP109 RP43 RP36 DDRB_SDQ34 1 4 4 1 DDRB_SDQ32 4 1 DDRB_SMA2
DDRA_SDQ37 1 4 4 1 DDRA_SDQ32 4 1 DDRA_SMA2 DDRB_SDQ33 2 3 3 2 DDRB_SDQ36 3 2 DDRB_SMA0
DDRA_SDQ36 2 3 3 2 DDRA_SDQ33 3 2 DDRA_SMA0
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 56_0404_4P2R_5% RP47 RP111
RP112 RP45 DDRB_SDQ37 1 4 4 1 DDRB_SDM4 +1.25VS
DDRA_SDQ34 1 4 4 1 DDRA_SDM4 +1.25VS DDRB_SDQS4 2 3 3 2 DDRB_SDQ39
DDRA_SDQS4 2 3 3 2 DDRA_SDQ38 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 56_0404_4P2R_5% 56_0404_4P2R_5% 1 1 1 1 1 1 1
56_0404_4P2R_5% 56_0404_4P2R_5% RP50 RP113 C594 C163 C111 C187 C202 C221 C639
1 1 1 1 1 1
RP114 RP49 C593 C606 C627 C749 C631 C638 DDRB_SDQ40 1 4 4 1 DDRB_SDQ35
DDRA_SDQ44 1 4 4 1 DDRA_SDQ39 DDRB_SDQ38 2 3 3 2 DDRB_SDQ46
DDRA_SDQ35 2 3 3 2 DDRA_SDQ40 2 2 2 2 2 2 2
2 2 2 2 2 2 56_0404_4P2R_5% 56_0404_4P2R_5% 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
56_0404_4P2R_5% 56_0404_4P2R_5% 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K RP52 RP115 +1.25VS
B +1.25VS DDRB_SDQS5 1 B
RP116 RP51 4 4 1 DDRB_SDQ45
DDRA_SDQS5 1 4 4 1 DDRA_SDQ45 DDRB_SDQ44 2 3 3 2 DDRB_SDM5 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
DDRA_SDQ41 2 3 3 2 DDRA_SDM5 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 1 1 1 1 1 1 1
1 1 1 1 1 1 56_0404_4P2R_5% 56_0404_4P2R_5% C263 C279 C294 C313 C322 C343 C608
56_0404_4P2R_5% 56_0404_4P2R_5% C669 C673 C324 C271 C690 C706 RP54 RP117
RP118 RP53 DDRB_SDQ42 1 4 4 1 DDRB_SDQ41
DDRA_SDQ46 1 4 4 1 DDRA_SDQ42 DDRB_SDQ43 2 3 3 2 DDRB_SDQ47 2 2 2 2 2 2 2
DDRA_SDQ43 2 3 3 2 DDRA_SDQ47 2 2 2 2 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 56_0404_4P2R_5% 56_0404_4P2R_5% +1.25VS
56_0404_4P2R_5% 56_0404_4P2R_5% +1.25VS RP56 RP119
RP120 RP55 DDRB_SDQ49 1 4 4 1 DDRB_SDQ48 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
DDRA_SDQ53 1 4 4 1 DDRA_SDQ49 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K DDRB_SDQ52 2 3 3 2 DDRB_SDQ53 1 1 1 1 1 1 1
DDRA_SDQ48 2 3 3 2 DDRA_SDQ52 1 1 1 1 1 1 C616 C746 C628 C632 C671 C677 C682
C734 C742 C614 C349 C156 C720 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% RP58 RP122
DDRB_SDQ55 1 2 2 2 2 2 2 2
RP121 RP57 4 4 1 DDRB_SDM6
DDRA_SDQ54 1 4 4 1 DDRA_SDM6 2 2 2 2 2 2 DDRB_SDQS6 2 3 3 2 DDRB_SDQ51 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
DDRA_SDQS6 2 3 3 2 DDRA_SDQ51 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K +1.25VS
+1.25VS 56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% RP60 RP124 4.7U_1206_16V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
RP123 RP59 0.1U_0402_10V6K 0.1U_0402_10V6K 4.7U_1206_16V6K DDRB_SDQ60 1 4 4 1 DDRB_SDQ54 1 1 1 1 1 1
DDRA_SDQ60 1 4 4 1 DDRA_SDQ50 DDRB_SDQ50 2 3 3 2 DDRB_SDQ62 C704 C622 C655 C716 C740 C348
1 1 1 1 1
1
DDRA_SDQ55 2 3 3 2 DDRA_SDQ56 C107 C129 C185 C200 C649 C172

56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 4.7U_0805_10V4Z RP62 RP128 2 2 2 2 2 2
2 2 2 2 2 DDRB_SDQS7 1
RP127 RP61 4 4 1 DDRB_SDQ61 0.1U_0402_10V6K 4.7U_1206_16V6K 0.1U_0402_10V6K
2
DDRA_SDQS7 1 4 4 1 DDRA_SDQ57 0.1U_0402_10V6K 0.1U_0402_10V6K DDRB_SDQ56 2 3 3 2 DDRB_SDM7

DDRA_SDQ61 2 3 3 2 DDRA_SDM7 +1.25VS Decoupling Reference Document:
56_0404_4P2R_5% 56_0404_4P2R_5%
A
56_0404_4P2R_5% 56_0404_4P2R_5% 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K RP64 RP130 Springdale Customer Schematic R1.2 page26 A
RP129 RP63 1 1 1 1 1 1 DDRB_SDQ57 1 4 4 1 DDRB_SDQ59 each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*26
DDRA_SDQ59 1 4 4 1 DDRA_SDQ63 C218 C260 C298 C338 C315 C344 DDRB_SDQ58 2 3 3 2 DDRB_SDQ63
DDRA_SDQ62 2 3 3 2 DDRA_SDQ58
56_0404_4P2R_5% 56_0404_4P2R_5%
56_0404_4P2R_5% 56_0404_4P2R_5% 2 2 2 2 2 2
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
Title
Decoupling Reference Document: DDR Termination Resistors
Springdale Customer Schematic R1.2 page22 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFID
ENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION
R&DOF Custom 0.2
each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*28 LA-1911
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATIONTIT
ACON
INS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC. Date: Friday, August 08, 2003 Sheet 14 of 57
5 4 3 2 1
5 4 3 2 1
SEL0 SEL1 CPU 3V66[0..3] REF0 REF1 SRC USB/Dot Place near each pin
+3VS +3VS_CLK W>40 mil
0 0 100 66 14.3 14.3 100/200 48
L19
1 2
Trace wide=40 mils
0 MID REF REF REF REF REF REF BLM21A601SPT_0805
L17 1 1 1 1 1 1 1 1
D 1 2 C272 C273 C274 C275 C212 C211 C215 D
0 1 200 66 14.3 14.3 100/200 48 BLM21A601SPT_0805 C232
10U_1206_6.3V7K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
2 2 2 2 2 2 2 2
1 0 133 66 14.3 14.3 100/200 48
1 1 166 66 14.3 14.3 100/200 48

CLK_VDD_PLL
1 MID Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z
1 1 The host clocks to
C210 C261
0.1U_0402_10V6K 0.1U_0402_16V4Z
the Processor must be
2 2 165 mil longer than the
host clocks to the GMCH
10
16
24
34
36
42
48
3
U11
VDD_REF
VDD_PCI
VDD_PCI
VDD_48
VDD_SRC
VDD_CPU
VDD_CPU
VDD_3V66
2 1 CLKREF1 1
24 CLK_ICH_14M REF_0
34 CLK_14M_SIO R196 2 1 33_0402_5% CLKREF0 2
R197 33_0402_5% REF_1
45
VSS_CPU
2 1 CLK_XTAL_IN 4
XTAL_IN 47 CLK_CPU2 1 2 CLK_HCLK
CPUCLKT2 CLK_HCLK 7
C277 R155 33_0402_5%
1
@10P_0402_50V8K X2 1 2
49.9_0402_1% R130
C C
C278 14.31818MHz_20P_1BX14318CC1A~L 1 2
@10P_0402_50V8K 49.9_0402_1% R131
2
2 1 CLK_XTAL_OUT 5 46 CLK_CPU2# 1 2 CLK_HCLK#
XTAL_OUT CPU_CLKC2 CLK_HCLK# 7
R156 33_0402_5%
44 CLK_CPU1 1 2 CLK_IT P
CPUCLKT1 CLK_IT P 5
R157 33_0402_5%
Place crystal within 1 2
CLKSEL0 51 49.9_0402_1% R132
500 mils of CK409 CLKSEL1 56 SEL0
SEL1
CK409
1 2
49.9_0402_1% R133
43 CLK_CPU1# 1 2 CLK_ITP# CLK_ITP# 5
R214 1 CPUCLKC1
+3VS 2 1K_0402_5% SLP_S1# 21 R158 33_0402_5%
R139 1 2 1K_0402_5% STPPCI# 49 PWRDWN# 41 CLK_CPU0 1 2 CLK_BCLK
PCI_STP# CPUCLKT0 CLK_BCLK 4
R148 1 2 1K_0402_5% STPCPU# 50 R159 33_0402_5%
CPU_STP# 1 2
49.9_0402_1% R134
40 CK409_PWRGD# CLK_VTT_PG# 35
VTT_PWRGD#
Place near CK409
1 2
+3VS 49.9_0402_1% R135
40 CLK_CPU0# 1 2 CLK_BCLK#
CPUCLKC0 CLK_BCLK# 4
12,13,23 ICH_SMB_CLK CK_SCLK 28 R160 33_0402_5%
CK_SDATA SCLK
12,13,23 ICH_SMB_DATA 30 29
SDATA 48/66MHZ_OUT/3V66_4
1
R153 R181 27 CLK66M_OUT 3 1 2

66MHZ_OUT3/3V66_3 CLK_AGP_66M 16
1K_0603_1% R191 33_0402_5%
1K_0603_1% 37 26
R137 2 1 @0_0402_5% SRCLKN_100MHZ 66MHZ_OUT2/3V66_2
B B
23 CLK66M_OUT 1 1 2
2
66MHZ_OUT1/3V66_1 CLK_MCH_66M 10
CLKSEL0 R138 2 1 0_0402_5% CPU_CLKSEL0 5 R208 33_0402_5%
22 CLK66M_OUT 0 1 2
66MHZ_OUT0/3V66_0 CLK_ICH_66M 23
CLKSEL1 R182 2 1 0_0402_5% CPU_CLKSEL1 5 R202 33_0402_5%
38 9 PCICLK_F2 1 2
SRCLKP_100MHZ PCICLK_F2 CLK_PCI_ICH 23
1
R175 2 1 @0_0402_5% R198 33_0402_5%

R145 R180 8
2K_0603_1% PCICLK_F1
2K_0603_1% 2 1 CLK48M_OUT 0 31 7
24 CLK_ICH_48M USB_48MHZ PCICLK_F0
R161 33_0402_5%
2
MCH_CLKSEL0 7
MCH_CLKSEL1 7 32
DOT_48MHZ PCICLK6
20 1 2 CLK_PCI_MINI 29
PCICLK6
1
R207 33_0402_5%
R152 R179 19 PCICLK5 1 2
PCICLK5 CLK_PCI_CB 27
2.49K_0603_1% 1 2 52 R201 33_0402_5%
2.49K_0603_1% C h e ck SPEC (250mA,300 ohm) R164 475_0603_1% IREF PCICLK4
18 1 2 CLK_PCI_LPC 37
PCICLK4 R206 33_0402_5%
L16 15 PCICLK3 1 2
2
PCICLK3 CLK_PCI_1394 30
BLM11A601S_0603 R200 33_0402_5%
1 2 CLK_VDD_PLL 55 14 PCICLK2 1 2
+3VS VDD_PLL PCICLK2 CLK_PCI_LAN 26
R205 33_0402_5%
1 1 13 PCICLK1 1 2
PCICLK1 CLK_PCI_SIO 34
C230 C239 R199 33_0402_5%
VSS_3V66
VSS_IREF
VSS_SRC
VSS_REF
12
VSS_PCI
VSS_PCI
PCICLK0
VSS_48
10U_1206_6.3V7K 0.1U_0402_16V4Z 54
2 2 VSS_PLL
A A
ICS952623BG_TSSOP56
11
17
25
33
39
53
6

Title
Clock Generator
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL 0.2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOFR&D
LA-1911
5 4 3 2 1
5 4 3 2 1
+3VS +3VS U1A

AGP_AD0 AJ28 G5 VGA_GPIO0 2 1 SPREAD_RATE
Place close AGP_AD1 AK28 AD0
AD1 nVIDIA GPIO0
GPIO1
F4 R363 0_0402_5%
1
AGP_AD2 AH27 G4 ENBKL
to pin AD2 GPIO2 ENBKL 37
D+ & D-
R362
@2.2K_0402_5%
R310
@2.2K_0402_5%
AGP_AD3
AGP_AD4
AGP_AD5
AK27
AJ27
AH26
AD3
AD4
NV31/34 GPIO3
GPIO4
H5
H4
J4
ENVDD ENVDD 22 1
R356
2
10K_0402_5%
AGP_AD6 AD5 GPIO5 VAG_GPIO6 R326 2

AJ26 J5 1 10K_0402_5% (SUS_STAT#) +3VS
@2200P_0402_50V7K +3VS AGP_AD7 AH25 AD6 GPIO6 J6 POWER_SEL
2
AD7 GPIO7 POWER_SEL 50
1 AGP_AD8 AH23 K4 NV_THERCT L# R339 2 1 10K_0402_5% +3VS
C419 U28 AGP_AD9 AJ23 AD8 GPIO8 K6 1 2
NV_THERMD A AGP_AD10 AD9 GPIO9 R331 10K_0402_5%
2 1 AH22
ZV PORT / EXT TMDS / GPIO / ROM

+3VS D+ VDD1 AGP_AD11 AJ22 AD10 M2
2 1 AD11 FPBCLKOUT#
D NV_THERMDC 3 6 NV_THERCT L# C462 AGP_AD12 AJ21 M3 D
D- ALERT# AGP_AD13 AK21 AD12 FPBCLKOUT +3VS
2 1 I2CC_SCL 8 4 AGP_AD14 AH20
AD13
R2 ROMA14 1 PCI_AD_SWAP: 0-RVSERSED 1-NORMAL
R591 @10K_0402_5% SCLK THERM# 2 AGP_AD15 AJ20 AD14 ROMA14 R1 ROMA15 STRAP0 R292 2 1 10K_0402_5%
I2CC_SDA AGP_AD16 AD15 ROMA15
2 1 7 5 AG26 AF2
R592 @10K_0402_5% SDATA GND AGP_AD17
AGP_AD18
AE24
AG25
AD16
AD17 PCI/AGP ROMCS#
L4 2 SUB_VENDOR: 0-SYSTEM BIOS 1-ADAPTER BIOS
@0.1U_0402_16V4Z AGP_AD19 AG24 AD18 VIPPCLK M4 VIPHCT L R311 2 1 10K_0402_5% STRAP1
@ADM1032ARM_RM8 AD19 VIPHCTL
AGP_AD20 AF24 M5
AGP_AD21 AG23 AD20 VIPHCLK
AGP_AD[0..31] AGP_AD22 AE22
AD21
P3 3 RAM_CFG[3:0]
10 AGP_AD[0..31] AD22 VIPHAD0
AGP_AD23 AF22 P2
AGP_AD24 AE21
AD23 VIPHAD1 (1101 = 4Mx32 DDR, DQS per byte)
AGP_SBA[0..7] AGP_AD25 AG20 AD24 J3 Low R301 2 1 @10K_0402_5% STRAP2 R291 2 1 @10K_0402_5%
10 AGP_SBA[0..7] AD25 VIPD0
AGP_AD26 AG19 J2 NV18M
AGP_AD27 AF19 AD26 VIPD1 K2 VIPD2 0 R300 2 1 @10K_0402_5% DVOD2 R285 2 1 10K_0402_5%
AGP_C/BE#[0..3] AGP_AD28 AD27 VIPD2 VIPD3
10 AGP_C/BE#[0..3] AE19 K1 NV31M:NV34M
AGP_AD29 AF18 AD28 VIPD3 L3 VIPD4
AGP_AD30 AD29 VIPD4 VIPD5
AG18 L2
10 AGP_ST[0..2] AGP_ST[0..2] AGP_AD31 AE18 AD30 VIPD5 N2 VIPD6 4 R323 2 1 @10K_0402_5% STRAP3 R290 2 1 @10K_0402_5%
AD31 VIPD6 VIPD7
N1 1 NV18M
C479 R369 AGP_C/BE#0 AJ24 VIPD7 R306 2 1 10K_0402_5% DVOD3 R286 2 1 @10K_0402_5%
AGP_C/BE#1 C/BE#0
1 2 1 2 AH19 AG2 NV31M:NV34M
AGP_C/BE#2 AF25 C/BE#1 DVOD0 AH1
@10P_0402_50V8K @10_0402_5% AGP_C/BE#3 AG22
C/BE#2 DVOD1
AG3 DVOD2 5
2 R353 2 1 @10K_0402_5%DACA_VSYNC R360 2 1 10K_0402_5%
C/BE#3 DVOD2 AJ1 DVOD3
CLK_AGP_66M DVOD3 R371 2
15 CLK_AGP_66M AG12 AH2 3 1 @10K_0402_5%DACA_HSYNC R367 2 1 10K_0402_5%
+3VS PCIRST# 1 2 AF15 PCICLK DVOD4 AK1 High
10,22,23,26,27,29,30,33,34,37 PCIRST# PCIRST# DVOD5
R601 10_0402_5% AGP_REQ# AF13 AJ3
C R354
10 AGP_REQ#
AGP_GNT # AE15 PCIREQ# DVOD6 AK3 6 CRYSTAL: (10)-27MHz C
10 AGP_GNT # PCIGNT# DVOD7
10K_0402_5% AGP_PAR AK18 AH4 DVOD8 Low 0 R302 2 1 10K_0402_5% VIPD2
10 AGP_PAR PCIPAR DVOD8
1 2 STP_AGP# 10 AGP_STOP# AGP_STOP# AH17 AK4 DVOD9
AGP_BUSY# AGP_DEVSEL# PCISTOP# DVOD9 VIPD6 R297 2
1 2 AJ16 AJ4 High 1 1 10K_0402_5%
R361 10K_0402_5% 10 AGP_DEVSEL# AGP_TRDY# AJ17 PCIDEVSEL# DVOD10 AH5
10 AGP_TRDY# PCITRDY# DVOD11
AGP_IRDY# AG16
+SVDD +3VS 10 AGP_IRDY#
AGP_FRAME# AK16 PCIIRDY# AD5 DVO_HSYNC 7 TVMODE: (01)-NTSC
L30 10 AGP_FRAME # PCIFRAME# DVOHSYNC
PCI_PIRQA# AG15 AD6 Low 0 DACB_VSYNC R284 2 1 10K_0402_5%
23,27 PCI_PIRQA# PCIINTA# DVOVSYNC
0.1U_0402_10V6K 4.7U_0805_10V4Z 1 2 AE10 AE4
FCM2012C-800_0805 NC DVODE R305 2
AJ2 1 10K_0402_5% DACB_HSYNC
AGP4X/8X DVOCLKOUT 1
1
AGP_WBF# AG17 AK2 R308 High
10 AGP_WBF# AGPWBF# DVOCLKOUT#
1
C434 C451 C461 C441 AGP_RBF# AG14 AG6 I2CC_SCL

10 AGP_RBF#
AJ18 AGPRBF# I2CC_SCL AG7 I2CC_SDA 8 AGP8X/4X: (0)-8X / (1)-4X
10 AGP_DBIHI AGPPIPE/ DBI_HI I2CC_SDA
0.1U_0402_10V6K AJ19 B1 10K_0402_5% R317 2 1 10K_0402_5% DVOD9 R322 2 1 @10K_0402_5%
10 AGP_DBILO NC/ DBI_LO BUFRST# AG1
2
4.7U_0805_10V4Z AGP_SB_STBF DVOCLKIN

AK13
2
10 AGP_SB_STBF
AGP_SB_STBS AJ13 AGPSB_STB/ ADSTBF G1 STRAP0 9 AGP_SIDEBAND: (0)-ENABLE
10 AGP_SB_STBS AGPSB_STB#/ ADSTBS STRAP0
AGP_AD_STBF0 AK24 G2 STRAP1 R314 2 1 10K_0402_5% VIPD7 R296 2 1 @10K_0402_5%
10 AGP_AD_STBF0 AGPADSTB0/ ADSTBF0 STRAP1
10 AGP_AD_STBS0 AGP_AD_STBS0 AJ25 F2 STRAP2
AGP_AD_STBS0 AGP_AD_STBF1 AGPADSTB0#/ADSTBS0 STRAP2 STRAP3
1 2 AG21 F3
R405 220K_0402_5%
10 AGP_AD_STBF1
10 AGP_AD_STBS1 AGP_AD_STBS1 AF21 AGPADSTB1/ ADSTBF1 STRAP3 10 AGP_FASTWRITE: (0)-ENABLE
AGP_AD_STBS1 AGPADSTB1#/ADSTBS1 TXOUT 0- R321 2
1 2 T4 TXOUT 0- 22 1 10K_0402_5% DVOD8 R330 2 1 @10K_0402_5%
R387 220K_0402_5% AGP_SBA0 AJ11 IFPATXDO# U4 TXOUT0+
AGPSBA0 IFPATXDO TXOUT0+ 22
AGP_SBA1 AH11 AA1 TXOUT 1-
AGP_SBA2 AJ12 AGPSBA1 IFPATXD1# Y2 TXOUT1+
TXOUT 1- 22
TXOUT1+ 22
11 PCI_DEVID[3:0] 1010-NV31M 0100-NV34M
AGP_SBA3 AGPSBA2 IFPATXD1 TXOUT 2- Low
AH12 W3 TXOUT 2- 22 1101-NV33M 0101-NV34M-U
AGP_SBA4 AJ14 AGPSBA3 IFPATXD2# V3 TXOUT2+
AGPSBA4 IFPATXD2 TXOUT2+ 22
S election Table For W180 AGP_SBA5 AH14 V4 TXOUT 3- 0 R313 2 1 10K_0402_5% VIPD4 R295 2 1 @10K_0402_5%
AGPSBA5 IFPATXD3# TXOUT 3- 22
AGP_SBA6 AJ15 U5 TXOUT3+ TXOUT3+ 22
B
AGP_SBA7 AGPSBA6 IFPATXD3 TXCLK- R312 2 B
AH15 V1 TXCLK- 22 1 1 10K_0402_5% VIPD5 R294 2 1 @10K_0402_5%
AGP_ST0 AG13 AGPSBA7 IFPATXC# W2 TXCLK+
LVDS
Modulation TXCLK+ 22
Setting SST C lose VGA ball (AK29) AGP_ST1 AE16
AGPST0 IFPATXC
V5 TZOUT0-
TZOUT0- 22 2 R303 2 1 @10K_0402_5% VIPD3 R293 2 1 10K_0402_5%
Ratio l e ss than 250mils-->350mV AGP_ST2 AE13 AGPST1
AGPST2
IFPBTXD4#
IFPBTXD4
W4 TZOUT0+ TZOUT0+ 22
AB2 TZOUT1- High 3 R333 2 1 10K_0402_5% DVO_HSYNC R341 2 1 @10K_0402_5%
SS% +AGP_VREF +AGP_REF AK29 IFPBTXD5# AB3 TZOUT1+
TZOUT1- 22
TZOUT1+ 22
R377 2 AGPVREF IFPBTXD5
0 1.25% 1 10K_0402_5% AF16 W6 TZOUT2-
1 AGP_BUSY# AF12 NC/AGPMBDET# IFPBTXD6# Y6 TZOUT2+
TZOUT2- 22
TZOUT2+ 22
12 BUS_TYPE: (1)-AGP VIPHCT L R352 2 1 10K_0402_5%
C569 STP_AGP# AGP_BUSY# IFPBTXD6 TZOUT3-
1 3.75% AG11 AC2 TZOUT3- 22
0.1U_0402_10V6K STP_AGP# IFPBTXD7# AC3 TZOUT3+
IFPBTXD7 TZOUT3+ 22
CRMA AE2 Y3 TZCLK- Low
2 22 CRMA
LUMA AD2 DACB_RED/CHROMA IFPBTXC# AA2 TZCLK+
TZCLK- 22 ROM TYPE: (00)-PARALLEL
22 LUMA DACB_GREEN/LUMA IFPBTXC TZCLK+ 22
COMPS AD1 0 R309 2 1 10K_0402_5% ROMA14 R283 2 1 @10K_0402_5%
22 COMPS DACB_HSYNC AF3 DACB_BLUE/COMPOSITE AK10 R
DACB_HSYNC DACA_RED R 22
DACB_VSYNC AE3 AJ10 G High 1 R304 2 1 10K_0402_5% ROMA15 R282 2 1 @10K_0402_5%
DACB_VSYNC DACA_GREEN G 22
1 2 DACB_RSET AD3 AJ9 B B 22
+SVDD R299 63.4_0603_1% DACB_RSET DACA_BLUE
AH9 DACA_HSYNC
DAC2
AE7 DACA_HSYNC 22
AF6 I2CB_SCL DACA_HSYNC AJ8 DACA_VSYNC
DAC1
PLACE COLSE TO VGA I2CB_SDA DACA_VSYNC DACA_VSYNC 22

+3VS 2 1 AD4
Pin AJ5, AJ7, SWAPRDY_B
6
U27 R318 10K_0402_5% Y5 AG8 DACA_RSET 1 2 Y1

AC4
STEREO DACA_RSET R370 130_0603_1% ** 4 3 XTALOUT
VDD
DACB_IDUMP AG5 DDC_CLK GND OUT

I2CA_SCL DDC_CLK 22
XTALIN AJ6 AF7 DDC_DATA XTALIN 1 2
XTALIN I2CA_SDA DDC_DATA 22 IN GND
XTALOUTBUFF 1 5 1 2 XTALSSIN XTALOUT AH6 AF9 2 1 +3VS
+3VS R319 X1/CLK CLKOUT R11 22_0402_5% XTALOUT SWAPRDY_A R351 10K_0402_5% 27MHz_16PF_6P27000019
AG10
1K_0402_5% XTALSSIN AJ7 DACA_IDUMP 1 2
XTALOUTBUFF XTALSSIN R8 @2M_0402_5%
1 2 7 2 AJ5 T2 SWAPRDY_A
FS1 X2 NV_THERMD A H2 XTALOUTBUFF IFPCTXD0# R3 C9
THERMDA IFPCTXD0 NV31,NV34 use. 1 1
1 2 8 4SPREAD_RATE 1 2 NV_THERMDC H3 T3 C27
CLK
A FS2 SS% +SVDD THERMDC IFPCTXD1# A

R315 R350 C2 U2 NV18 not use.
TMDS
GND
JTAG[0] IFPCTXD1
2
1K_0402_5% @1K_0402_5% C1 V2 22P_0402_50V8J 22P_0402_50V8J

SSC
R346 D1 JTAG[1] IFPCTXD2# U3 2 2

W180-01GT_SO8 JTAG[2] IFPCTXD2
E2 P4
10K_0402_5% D2 JTAG[3] IFPCTXC# P5
3
JTAG[4] IFPCTXC
NV34M_EPBGA701 Compal Electronics, Inc.
1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND nVIDIA NV34M (AGP BUS)
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE LA-1911
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Friday, August 08, 2003 Sheet 16 of 57
5 4 3 2 1
5 4 3 2 1
20 NDQMA[0..7] NDQMA[0..7] 21 NDQMB[0..7] NDQMB[0..7]
NDQSA[0..7] 21 NDQSB[0..7] NDQSB[0..7]

20 NDQSA[0..7]
20 NMAA[0..11] NMAA[0..11] 21 NMAB[0..11] NMAB[0..11]

D D
20 NMDA[0..63] NMDA[0..63] 21 NMDB[0..63] NMDB[0..63]
U1C
U1B
NMDB0 F13 A18 NMAB0
NMDA0 NMAA0 NMDB1 FBCD0 FBCA0 NMAB1
N25 V30 D13 C17
NMDA1 N27 FBAD0 FBAA0 U28 NMAA1 NMDB2 E13 FBCD1 FBCA1 B17 NMAB2
NMDA2 FBAD1 FBAA1 NMAA2 NMDB3 FBCD2 FBCA2 NMAB3
N26 U29 F12 C16
NMDA3 M25 FBAD2 FBAA2 T28 NMAA3 NMDB4 E10 FBCD3 FBCA3 B16 NMAB4
K26 T29 D10 D16
NMDA5 K27 FBAD4 FBAA4 T27 NMAA5 NMDB6 D9 FBCD5 FBCA5 A16 NMAB6
J27 T30 D8 E16
NMDA7 H27 FBAD6 FBAA6 T26 NMAA7 NMDB8 B13 FBCD7 FBCA7 F16 NMAB8
N29 T25 B12 D15
NMDA9 M29 FBAD8 FBAA8 R27 NMAA9 NMDB10 C12 FBCD9 FBCA9 F15 NMAB10
M28 R25 B11 A15
NMDA11 L29 FBAD10 FBAA10 R30 NMAA11 NMDB12 B9 FBCD11 FBCA11 G17
NMDA12 FBAD11 FBAA11 NMDB13 FBCD12 FBCA12
J29 U24 C9
NMDA13 J28 FBAD12 FBAA12 NMDB14 B8 FBCD13
NMDA14 FBAD13 NMDB15 FBCD14 NDQMB0
H29 A7 D11
NMDA15 G30 FBAD14 NMDB16 F10 FBCD15 FBCDQM0 B10 NDQMB1
NMDA16 FBAD15 NMDB17 FBCD16 FBCDQM1 NDQMB2
K25 E9 D7
NMDA17 J26 FBAD16 L27 NDQMA0 NMDB18 F9 FBCD17 FBCDQM2 C5 NDQMB3
NMDA18 FBAD17 FBADQM0 NDQMA1 NMDB19 FBCD18 FBCDQM3 NDQMB4
J25 K29 F7 C26
NMDA19 G26 FBAD18 FBADQM1 G25 NDQMA2 NMDB20 C6 FBCD19 FBCDQM4 F24 NDQMB5
NMDA20 FBAD19 FBADQM2 NDQMA3 NMDB21 FBCD20 FBCDQM5 NDQMB6
F28 E28 E6 B21
NMDA21 F26 FBAD20 FBADQM3 AF28 NDQMA4 NMDB22 D5 FBCD21 FBCDQM6 D20 NDQMB7
MEMORY INTERFACE
NMDA22 FBAD21 FBADQM4 NDQMA5 NMDB23 FBCD22 FBCDQM7
E27 AD27 C4
C NMDA23 D27 FBAD22 FBADQM5 AA30 NDQMA6 NMDB24 C8 FBCD23 C
NMDA24 FBAD23 FBADQM6 NDQMA7 NMDB25 FBCD24 NDQSB0
H28 Y27 B7 D12
NMDA25 G29 FBAD24 FBADQM7 NMDB26 B6 FBCD25 FBCDQS0 A10 NDQSB1
NMDA26 FBAD25 NMDB27 FBCD26 FBCDQS1 NDQSB2
F29 B5 E7
NMDA27 E29 FBAD26 M27 NDQSA0 NMDB28 A3 FBCD27 FBCDQS2 A4 NDQSB3
FBAD27 FBADQS0 FBCD28 FBCDQS3
INTERFACE A
NMDA28 C30 K30 NDQSA1 NMDB29 B3 A27 NDQSB4
NMDA29 C29 FBAD28 FBADQS1 G27 NDQSA2 NMDB30 A2 FBCD29 FBCDQS4 D24 NDQSB5
NMDA30 FBAD29 FBADQS2 NDQSA3 NMDB31 FBCD30 FBCDQS5 NDQSB6
B30 D30 B2 A21
NMDA31 A30 FBAD30 FBADQS3 AG30 NDQSA4 NMDB32 B29 FBCD31 FBCDQS6 D19 NDQSB7
FBAD31 FBADQS4 FBCD32 FBCDQS7
MEMORY
NMDA32 AJ29 AD26 NDQSA5 NMDB33 A29

NMDA33 AJ30 FBAD32 FBADQS5 AA29 NDQSA6 NMDB34 B28 FBCD33
NMDA34 FBAD33 FBADQS6 NDQSA7 NMDB35 FBCD34
AH29 W27 A28
NMDA35 AH30 FBAD34 FBADQS7 NMDB36 B26 FBCD35 C14 NMRASB#
FBAD35 FBCD36 FBCRAS# NMRASB# 21
NMDA36 AF29 NMDB37 B25
NMDA37 AE29 FBAD36 P28 NMRASA# NMDB38 B24 FBCD37 B14 NMCASB#
NMRASA# 20 NMCASB# 21
B
NMDA38 FBAD37 FBARAS# NMDB39 FBCD38 FBCCAS#
AD29 C23
NMDA39 AC28 FBAD38 P29 NMCASA# NMDB40 E26 FBCD39 C15 NMWEB#
FBAD39 FBACAS# NMCASA# 20 FBCD40 FBCWE# NMWEB# 21
NMDA40 AG28 NMDB41 D26
NMDA41 AF27 FBAD40 R28 NMWEA# NMDB42 E25 FBCD41 D17 NMCSB0#
FBAD41 FBAWE# NMWEA# 20 FBCD42 FBCCS0# NMCSB0# 21
NMDA42 AE26 NMDB43 C25
NMDA43 AE28 FBAD42 U27 NMCSA0# NMDB44 E24 FBCD43 D14
FBAD43 FBACS0# NMCSA0# 20 FBCD44 FBCCS1# NMCLKB0 21
1
NMDA44 AD25 NMDB45 F22
NMDA45 AB25 FBAD44 P27 NMDB46 E22 FBCD45 A13 NMCKEB R381
FBAD45 FBACS1# NMCLKA0 20 FBCD46 FBCCKE NMCKEB 21
1
NMDA46 AB26 NMDB47 F21 @120_0402_5%
NMDA47 AA25 FBAD46 N30 NMCKEA R390 NMDB48 A24 FBCD47 K18 NMCLKB0
FBAD47 FBACKE NMCKEA 20 FBCD48 FBCCLK0
NMDA48 AD30 @120_0402_5% NMDB49 B23 K17 NMCLKB0#
FBAD48 FBCD49 FBCCLK0# NMCLKB0# 21
NMDA49 AC29 U21 NMCLKA0 NMDB50 C22
2
NMDA50 FBAD49 FBACLK0 NMCLKA0# NMDB51 FBCD50
AB28 V21 NMCLKA0# 20 B22
NMDA51 AB29 FBAD50 FBACLK0# NMDB52 B20 FBCD51 K13 NMCLKB1
2
B FBAD51 FBCD52 FBCCLK1 NMCLKB1 21 B
1
NMDA52 Y29 N21 NMCLKA1 NMDB53 C19 K14 NMCLKB1#
FBAD52 FBACLK1 NMCLKA1 20 FBCD53 FBCCLK1#
1
NMDA53 W28 P21 NMCLKA1# NMDB54 B19 R372
NMDA54 FBAD53 FBACLK1# R389 NMDB55 FBCD54 @120_0402_5%
W29 B18
NMDA55 V29 FBAD54 @120_0402_5% NMDB56 D23 FBCD55
NMDA56 FBAD55 NMDB57 FBCD56 NMB_BA0
AC27 D22 E15 NMB_BA0 21 NMCLKB1# 21
NMDA57 AB27 FBAD56 R26 NMA_BA0 NMDB58 D21 FBCD57 FBCBA0 B15 NMB_BA1
2
FBAD57 FBABA0 NMA_BA0 20 NMCLKA1# 20 FBCD58 FBCBA1 NMB_BA1 21
NMDA58 AA27 R29 NMA_BA1 NMDB59 E21
2
FBAD58 FBABA1 NMA_BA1 20 +2.5VS FBCD59
NMDA59 AA26 NMDB60 F19
NMDA60 FBAD59 NMDB61 FBCD60
W25 E18
NMDA61 V26 FBAD60 C28 A_REF NMDB62 D18 FBCD61
FBAD61 FB_VREF FBCD62
1
NMDA62 V27 (10 mil) NMDB63 F18

NMDA63 V25 FBAD62 R396 FBCD63
FBAD63
1K_0402_1% NV34M_EPBGA701
NV34M_EPBGA701
2
1
1
C563 R388
0.1U_0402_10V6K 1K_0402_1%
2
2
1 2 NMCKEA
R417 10K_0402_5%
1 2 NMCKEB
A
R368 10K_0402_5% A
32M VRAM-->Channel A only-->2 sets

64M VRAM-->Channel A and B-->4 sets Title
nVIDIA NV34M (DDR)
0.2
LA-1911
5 4 3 2 1
5 4 3 2 1
U1D
C424 0.1U_0402_10V6K +1.5VS +5VS
+1.5VS AD11 AA4 IFPABVPROB E 1 2
AGPVDDQ IFPABVPROBE IFPABRSET
AD14 V6 1 2
AD17 AGPVDDQ IFPABRSET R324 1K_0402_5%
AGPVDDQ +IFPABPLLVDD
AD20 U10 1 1 1 1 1 1 1
AD23 AGPVDDQ IFPABPLLVDD V10 C476 C482 C460 C541 C507 C452 C436
AGPVDDQ IFPABPLLGND
D AE11 D
AE14 AGPVDDQ T5 +IFPABIOVDD 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.022U_0402_16V7K 0.022U_0402_16V7K 0.022U_0402_16V7K 0.1U_0402_10V6K 0.1U_0402_10V6K
AGPVDDQ IFPAIOVDD 2 2 2 2 2 2 2
AE17 T6
AE20 AGPVDDQ IFPAIOGND
AGPVDDQ
AE23 Y4
AGPVDDQ IFPBIOVDD W5
IFPBIOGND C423 0.1U_0402_10V6K
+VGA_CORE L11 AA3 IFPCVPROBE 1 2
VDD IFPCVPROBE
L13 R4 1 2
L14 VDD IFPCRSET R320 1K_0402_5%
VDD +IFPCPLLVDD
L17 P10 1 2
L18 VDD IFPCPLLVDD N10 R364 10K_0402_5%
VDD IFPCPLLGND
L20
2 R614 1 N6 VDD R5 +IFPCIOVDD 1 2 +3VS
0_0402_5% VDD IFPCIOVDD R332 10K_0402_5% L4
N11 R6
N20 VDD IFPCIOGND +DACA/BVDD 1 2
VDD
P11
VDD 1 1 1 KC FBM-L11-201209-221LMAT_0805
P20 C32 C428 C457
VDD +VIP/DVOVDDQ
U11 L6
U20 VDD VIPVDDQ L7 4.7U_0805_10V4Z 4700P_0402_25V7K 470P_0402_50V7K
VDD VIPVDDQ 2 2 2
V11 M7 NV31 use only.
V20 VDD VIPVDDQ
VDD NV18,NV33,NV34 not use.
Y11
Y13 VDD P6 VIPCAL_1 R347 2 1 @49.9_0402_1%
VDD VIPCAL_PD_VDDQ VIPCAL_2 R334 1 @49.9_0402_1%
Y14 P7 2
Y17 VDD VIPCAL_PU_GND
VDD +3VS
Y18
Y20 VDD KC FBM-L11-201209-221LMAT_0805 L24
VDD +PLLVDD
AA17 AD8 1 2
C AA18 VDD DVOVDDQ AD9 C
VDD DVOVDDQ 1 C7 1 1 1 C414
AE8 C450 C448
DVOVDDQ
NV31 use only.
+3VS G14 NV18,NV33,NV34 not use. +VIP/DVOVDDQ 4.7U_0805_10V4Z 4700P_0402_25V7K 470P_0402_50V7K 4.7U_0805_10V4Z
H6 VDD33 2 2 2 2
VDD33
1
H7
2 R615 1 M6 VDD33 AB6 DVOCAL_1 R349 1 2 @49.9_0402_1% R340
0_0402_5% VDD33 DVOCAL_PD_VDDQ DVOCAL_2 R348 1 @49.9_0402_1% 1K_0402_1%
P24 AB7 2
U6 VDD33 DVOCAL_PU_GND AF4
VDD33 DVO_VREF
U7
AC6 VDD33 +DVO_VREF +3VS
2
VDD33 L37
AC7
POWER
VDD33
1
AD12 AE5 R335 1 2 10K_0402_5% 1 +IFPABPLLVDD 2 1
VDD33 TESTMODE C429 R316 KC FBM-L11-201209-221LMAT_0805
AD15 G24 1 1 1
AD19 VDD33 TESTMECLK R404 1 2 10K_0402_5% 1K_0402_1% C465 C464 C490
VDD33 0.1U_0402_10V6K
AD22
I/O
VDD33 TESTMECLK 2
AD16 470P_0402_50V7K 4700P_0402_25V7K 4.7U_0805_10V4Z
VDD33 NV31,NV33,NV34 use. 2 2 2
2
AB4 +DACA/BVDD NV18 not use.
+1.5VS DACB_VDD DACAVREF
+5VS N4 AB5 1 2
R373 49.9_0402_1% AE9 VD50CLAMP0 DACB_VREF
AGPCALPD_VDDQ AA13 VD50CLAMP1 C443 0.01U_0402_16V7K
2 1
2 1 AGPCALPU_GND AA14 AGPCALPD_VDDQ AG9
R378 49.9_0402_1% +AGP_PLLVDD AGPCALPU_GND DACA_VDD DACBVREF
AE12 AH8 1 2
AGP_PLLVDD DACA_VREF
C36 0.01U_0402_16V7K +3VS +3VS
+2.5VS F8 +2.5VS L31 L25
FBVDDQ +IFPABIOVDD +VIP/DVOVDDQ
F11 2 1 1 2
F14 FBVDDQ F5 49.9_0402_1% 2 1 R289
B FBVDDQ FBCAL_PD_VDDQ 1 1 1 KC FBM-L11-201209-221LMAT_0805 1 1 1 KC FBM-L11-201209-221LMAT_0805B
F17 E4 49.9_0402_1% 2 1 R288 C427 C422 C449 C454 C430 C493
F20 FBVDDQ FBCAL_PU_GND D3 @0_0402_5% 2 1 R287
FBVDDQ FBCAL_TERM_GND @549_0402_1% R325 470P_0402_50V7K 4700P_0402_25V7K 4.7U_0805_10V4Z 470P_0402_50V7K 4700P_0402_25V7K 4.7U_0805_10V4Z
F23 E3 2 1
G8 FBVDDQ FBCAL_CLK_GND 2 2 2 2 2 2
FBVDDQ
FBCAL_PD_VDDQ G11
G20 FBVDDQ
NV31,NV33,NV34 use. FBVDDQ +FB_DLLVDD
G23 C27 F B CAL_TERM_GND & FBCAL_CLK_GND
NV18 not use. H24 FBVDDQ FB_DLLVDD AK7 +PLLVDD
FBVDDQ PLLVDD NV31 use.
H25
L24 FBVDDQ B4 N V18,NV33,NV34 not use.
FBCAL_PUK_GND FBVDDQ NC
L25 B27
NV31,NV33,NV34 use. P25 FBVDDQ NC C11
NV18 not use. FBVDDQ NC
U25 C20
Y24 FBVDDQ NC D6
FBVDDQ NC
FBCAL_TERM_GND Y25 D25
AC24 FBVDDQ NC D29
N V31 use (tie to GND). FBVDDQ NC
AC25 E12
N V18,NV33,NV34 not use. FBVDDQ NC E19 +3VS +3VS
NC L40 L34
F27
AA6 NC L28 +FB_DLLVDD 1 2 +AGP_PLLVDD 1 2
FBCAL_CLK_GND NC NC
AC5 M26 1 1 KC FBM-L11-201209-221LMAT_0805 1 1 KC FBM-L11-201209-221LMAT_0805
NV31 use. AF10 NC NC N5 C556 C555 C41 C485 C467
N V18,NV33,NV34 not use. NC NC
AG29 W7
AE27 NC NC W26 4700P_0402_25V7K 470P_0402_50V7K 4.7U_0805_10V4Z 4700P_0402_25V7K 470P_0402_50V7K
NC NC 2 2 2 2
G9 Y7
Y28 NC NC
NC +FB_DLLVDD +AGP_PLLVDD
NV31,NV33,NV34 use. NV31,NV33,NV34 use.
A
NV34M_EPBGA701 NV18 not use. NV18 not use. A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL Size
nVIDIA NV34M POWER)
Document Number Rev
5 4 3 2 1
5 4 3 2 1
+VGA_CORE
U1E
A9 M12 1 1 1 1 1 1 1 1 1 1 1
A12 GND T_GND M13 C504 C524 C530 C512 C463 C475 C511 C494 C483 C506 C516
GND T_GND
A19 M14
A22 GND T_GND M15 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 1U_0603_10V6K 1U_0603_10V6K 1U_0603_10V6K 1U_0603_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
GND T_GND 2 2 2 2 2 2 2 2 2 2 2
A25 M16
C3 GND T_GND M17
GND T_GND
C7 M18
C10 GND T_GND M19
GND T_GND
D C13 N12 D
C18 GND T_GND N13 +VGA_CORE
GND T_GND
C21 N14
C24 GND T_GND N15
GND T_GND
D4 N16 1 1 1 1 1 1 1
D28 GND T_GND N17 C473 C471 C472 C484 C478 C500 C517
GND T_GND
E5 N18
E8 GND T_GND N19 470P_0402_50V7K 470P_0402_50V7K 470P_0402_50V7K 470P_0402_50V7K 4700P_0402_25V7K 4700P_0402_25V7K 4700P_0402_25V7K
GND T_GND 2 2 2 2 2 2 2
E11 P12
E14 GND T_GND P13
GND T_GND
E17 P14
E20 GND T_GND P15
GND T_GND
E23 P16
F1 GND T_GND P17
GND T_GND
F6 P18
F25 GND T_GND P19
GND T_GND
F30 R12
G3 GND T_GND R13
GND T_GND
G28 R14
H11 GND T_GND R15
GND T_GND
H20 R16
H26 GND T_GND R17
GND T_GND
J1 R18
J7 GND T_GND R19
GROUND
GND T_GND
J30 T12
K3 GND T_GND T13 +2.5VS
GND T_GND
K5 T14
K28 GND T_GND T15
GND T_GND
L5 T16 1 1 1 1 1 1 1 1 1 1 1
C L8 GND T_GND T17 C537 C453 C531 C540 C474 C456 C466 C481 C499 C515 C532 C
GND T_GND
L23 T18
L26 GND T_GND T19 1U_0603_10V6K 1U_0603_10V6K 1U_0603_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
GND T_GND 2 2 2 2 2 2 2 2 2 2 2
M1 U12
M30 GND T_GND U13
GND T_GND
N3 U14
N28 GND T_GND U15
GND T_GND
P26 U16
T1 GND T_GND U17 +2.5VS
GND T_GND
U26 U18
V28 GND T_GND U19
GND T_GND
W1 V12 1 1 1 1 1 1
W30 GND T_GND V13 C547 C548 C549 C550 C551 C552
GND T_GND
Y8 V14
Y23 GND T_GND V15 4700P_0402_25V7K 4700P_0402_25V7K 4700P_0402_25V7K 0.022U_0402_16V7K 0.022U_0402_16V7K 0.022U_0402_16V7K
GND T_GND 2 2 2 2 2 2
Y26 V16
AA5 GND T_GND V17
GND T_GND
AA28 V18
AB1 GND T_GND V19
GND T_GND
AB30 W12
AC11 GND T_GND W13 +3VS
GND T_GND
AC20 W14
AC26 GND T_GND W15
GND T_GND
AD28 W16 1 1 1 1 1 1 1 1
AE1 GND T_GND W17 C477 C513 C437 C539 C533 C480 C446 C447
GND T_GND
AE6 W18
AE25 GND T_GND W19 1U_0603_10V6K 1U_0603_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.022U_0402_16V7K 0.022U_0402_16V7K
GND T_GND 2 2 2 2 2 2 2 2
AE30
AF5 GND
B GND B
AF8 AH13
AF11 GND GND AH16
GND GND
AF14 AH18
AF17 GND GND AH21 +3VS
GND GND
AF20 AH24
AF23 GND GND AH28
GND GND
AF26 AK6 1 1 1 1
AG4 GND GND AK9 C487 C501 C510 C522
GND GND
AG27 AK12
AH3 GND GND AK15 0.022U_0402_16V7K 4700P_0402_25V7K 4700P_0402_25V7K 4700P_0402_25V7K
GND GND 2 2 2 2
AH7 AK19
AH10 GND GND AK22
GND GND
A6 AK25
GND GND
R24
T24 NC G12
NC NC
W24 G15
AB24 NC NC G16
NC NC +VGA_CORE
A1 G19
AK30 NC1 NC G22
NC2 NC
G6 J24
NC3 NC
2
R7 M24
NC4 NC R391
T7
NC5 @470_0402_5%
NV34M_EPBGA701
1
Q28
1
D @2N7002
A A
2 SUSP SUSP 31,43,50
G
S
3

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size
nVIDIA NV34M (DECOUPLING CAP)
Document Number Rev
LA-1911
5 4 3 2 1
5 4 3 2 1
+2.5VS
As close as ppossible to related pin +2.5VS
17 NDQMA[0..7] NDQMA[0..7] 22U_1206_10V4Z 0.1U_0402_10V6K 0.1U_0402_10V6K 0.01U_0402_16V7K 22U_1206_10V4Z 0.1U_0402_10V6K 0.1U_0402_10V6K 0.01U_0402_16V7K
17 NDQSA[0..7] NDQSA[0..7] 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
C155 C136 C126 C130 C147 C135 C127 C142 C154 C141 C157 C131 C125 C124 C144 C159 C145 C132
17 NMAA[0..11] NMAA[0..11]
NMDA[0..63] 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2
17 NMDA[0..63]
D D
22U_1206_10V4Z 0.1U_0402_10V6K 0.1U_0402_10V6K 0.01U_0402_16V7K 22U_1206_10V4Z 0.1U_0402_10V6K 0.1U_0402_10V6K 0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
G10
G10
D10
D11
H10
D10
D11
H10
B11
K10
B11
K10
F10
F10
J10
J10
D4
D5
D6
D9
H5
D4
D5
D6
D9
H5
B4
E6
E9
K5
B4
E6
E9
K5
G5
G5
F5
F5
J5
J5
U37 U38
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NMAA0 N5 B7 NMDA24 NMAA0 N5 B7 NMDA47
NMAA1 N6 A0 DQ0 C6 NMDA25 NMAA1 N6 A0 DQ0 C6 NMDA46
NMAA2 A1 DQ1 NMDA26 NMAA2 A1 DQ1 NMDA45
M6 B6 M6 B6
NMAA3 N7 A2 DQ2 B5 NMDA27 NMAA3 N7 A2 DQ2 B5 NMDA44
N8 C2 N8 C2
NMAA5 M9 A4 DQ4 D3 NMDA29 NMAA5 M9 A4 DQ4 D3 NMDA43
N9 D2 N9 D2
NMAA7 N10 A6 DQ6 E2 NMDA31 NMAA7 N10 A6 DQ6 E2 NMDA42
N11 K13 N11 K13
NMAA9 M8 A8/AP DQ8 K12 NMDA6 NMAA9 M8 A8/AP DQ8 K12 NMDA48
L6 J13 L6 J13
NMAA11 M7 A10 DQ10 J12 NMDA4 NMAA11 M7 A10 DQ10 J12 NMDA51
NMA_BA0 A11 DQ11 NMDA0 NMA_BA0 A11 DQ11 NMDA54
17 NMA_BA0 N4 G13 N4 G13
C NMA_BA1 M5 BA0 DQ12 G12 NMDA3 NMA_BA1 M5 BA0 DQ12 G12 NMDA52 C
17 NMA_BA1 BA1 DQ13 BA1 DQ13
F13 NMDA2 F13 NMDA55
NDQMA3 B3 DQ14 F12 NMDA1 NDQMA5 B3 DQ14 F12 NMDA53
NDQMA0 DM0 DQ15 NMDA8 NDQMA6 DM0 DQ15 NMDA62
H12 F3 H12 F3
+2.5VS NDQMA1 H3 DM1 DQ16 F2 NMDA10 NDQMA7 H3 DM1 DQ16 F2 NMDA61
NDQMA2 DM2 DQ17 NMDA9 +2.5VS NDQMA4 DM2 DQ17 NMDA60
B12 G3 B12 G3
DM3 DQ18 G2 NMDA11 DM3 DQ18 G2 NMDA63
DQ19 DQ19
2
2
NDQSA3 B2 J3 NMDA13 R454 NDQSA5 B2 J3 NMDA58
R432 NDQSA0 H13 DQS0 DQ20 J2 NMDA12 NDQSA6 H13 DQS0 DQ20 J2 NMDA57
NDQSA1 DQS1 DQ21 NMDA15 NDQSA7 DQS1 DQ21 NMDA59
H2 K2 H2 K2
NDQSA2 B13 DQS2 DQ22 K3 NMDA14 NDQSA4 B13 DQS2 DQ22 K3 NMDA56
1K_0402_1% DQS3 DQ23 NMDA21 1K_0402_1% DQS3 DQ23 NMDA32
E13 E13
(25mil) VR_VREF_1 N13 DQ24 D13 NMDA22 (25mil) VR_VREF_2 N13 DQ24 D13 NMDA33
1
1
VREF DQ25 NMDA20 VREF DQ25 NMDA35
M13 D12 M13 D12
MCL DQ26 MCL DQ26
2
2
1 L9 C13 NMDA23 1 L9 C13 NMDA34
R430 RFU1 DQ27 NMDA19 R458 RFU1 DQ27 NMDA36
M10 B10 M10 B10
C591 RFU2 DQ28 B9 NMDA18 C626 RFU2 DQ28 B9 NMDA37
1K_0402_1% 0.1U_0402_10V6K NMRASA# DQ29 NMDA17 1K_0402_1% 0.1U_0402_10V6K NMRASA# DQ29 NMDA39
17 NMRASA# M2 C9 M2 C9
2 NMCASA# L2 RAS# DQ30 B8 NMDA16 2 NMCASA# L2 RAS# DQ30 B8 NMDA38
17 NMCASA# CAS# DQ31 CAS# DQ31
NMWEA# L3 NMWEA# L3
1
1
17 NMWEA# WE# WE#
17 NMCSA0# NMCSA0# N2 NMCSA0# N2
CS# CS#
C3 C3
NMCKEA N12 VDDQ C5 NMCKEA N12 VDDQ C5
17 NMCKEA CKE VDDQ CKE VDDQ
C7 C7
NMCLKA0 M11 VDDQ C8 NMCLKA1 M11 VDDQ C8
17 NMCLKA0 CK VDDQ 17 NMCLKA1 CK VDDQ
M12 C10 M12 C10
CK# VDDQ C12 CK# VDDQ C12
R104 VDDQ R114 VDDQ
C4 E3 C4 E3
@120_0402_5% C11 NC VDDQ E12 @120_0402_5% C11 NC VDDQ E12
B NC VDDQ NC VDDQ B
H4 F4 H4 F4
H11 NC VDDQ F11 H11 NC VDDQ F11
NC VDDQ NC VDDQ
L12 G4 L12 G4
NMCLKA0# L13 NC VDDQ G11 NMCLKA1# L13 NC VDDQ G11
17 NMCLKA0# NC VDDQ +2.5VS 17 NMCLKA1# NC VDDQ +2.5VS
M3 J4 M3 J4
M4 NC VDDQ J11 M4 NC VDDQ J11
NC VDDQ NC VDDQ
N3 K4 N3 K4
NC VDDQ K11 NC VDDQ K11
VDDQ VDDQ
E7 E7
E8 VSS D7 E8 VSS D7
VSS VDD VSS VDD
E10 D8 E10 D8
K6 VSS VDD E4 K6 VSS VDD E4
VSS VDD VSS VDD
K7 E11 K7 E11
K8 VSS VDD L4 K8 VSS VDD L4
VSS VDD VSS VDD
K9 L7 K9 L7
L5 VSS VDD L8 L5 VSS VDD L8
VSS VDD VSS VDD
L10 L11 L10 L11
E5 VSS VDD E5 VSS VDD
VSS VSS
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H6
H7
H8
H9
H6
H7
H8
H9
G6
G7
G8
G9
G6
G7
G8
G9
F6
F7
F8
F9
F6
F7
F8
F9
J6
J7
J8
J9
J6
J7
J8
J9
K4D263238A-GC_FBGA144 K4D263238A-GC_FBGA144
A A

Title
VGA DDR FOR CHANNEL A

0.2
LA-1911
5 4 3 2 1
5 4 3 2 1
+2.5VS
As close as ppossible to related pin +2.5VS
NDQMB[0..7] 22U_1206_10V4Z 0.1U_0402_10V6K 0.1U_0402_10V6K 0.01U_0402_16V7K 22U_1206_10V4Z 0.1U_0402_10V6K 0.1U_0402_10V6K 0.01U_0402_16V7K

17 NDQMB[0..7]
NDQSB[0..7] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
17 NDQSB[0..7]
1
C30 C46 C43 C42 C40 C37 C38 C35 C34 C64 C76 C73 C74 C72 C69 C66 C65 C71
NMAB[0..11]
17 NMAB[0..11]
D NMDB[0..63] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 D
2
17 NMDB[0..63]
22U_1206_10V4Z 0.1U_0402_10V6K 0.1U_0402_10V6K 0.01U_0402_16V7K 22U_1206_10V4Z 0.1U_0402_10V6K 0.1U_0402_10V6K 0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
G10
G10
D10
D11
H10
D10
D11
H10
B11
K10
B11
K10
F10
F10
J10
J10
D4
D5
D6
D9
H5
D4
D5
D6
D9
H5
B4
E6
E9
K5
B4
E6
E9
K5
G5
G5
F5
F5
J5
J5
U30 U34
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NMAB0 N5 B7 NMDB25 NMAB0 N5 B7 NMDB47
NMAB1 A0 DQ0 NMDB24 NMAB1 A0 DQ0 NMDB46
N6 C6 N6 C6
NMAB2 M6 A1 DQ1 B6 NMDB27 NMAB2 M6 A1 DQ1 B6 NMDB45
N7 B5 N7 B5
NMAB4 N8 A3 DQ3 C2 NMDB29 NMAB4 N8 A3 DQ3 C2 NMDB40
M9 D3 M9 D3
NMAB6 N9 A5 DQ5 D2 NMDB31 NMAB6 N9 A5 DQ5 D2 NMDB41
N10 E2 N10 E2
NMAB8 N11 A7 DQ7 K13 NMDB7 NMAB8 N11 A7 DQ7 K13 NMDB53
NMAB9 A8/AP DQ8 NMDB5 NMAB9 A8/AP DQ8 NMDB55
M8 K12 M8 K12
NMAB10 L6 A9 DQ9 J13 NMDB6 NMAB10 L6 A9 DQ9 J13 NMDB52
M7 J12 M7 J12
C NMB_BA0 N4 A11 DQ11 G13 NMDB0 NMB_BA0 N4 A11 DQ11 G13 NMDB51 C
17 NMB_BA0 BA0 DQ12 BA0 DQ12
NMB_BA1 M5 G12 NMDB3 NMB_BA1 M5 G12 NMDB50
17 NMB_BA1 BA1 DQ13 BA1 DQ13
F13 NMDB2 F13 NMDB48
NDQMB3 DQ14 NMDB1 NDQMB5 DQ14 NMDB49
B3 F12 B3 F12
NDQMB0 H12 DM0 DQ15 F3 NMDB9 NDQMB6 H12 DM0 DQ15 F3 NMDB62
+2.5VS NDQMB1 DM1 DQ16 NMDB8 +2.5VS NDQMB7 DM1 DQ16 NMDB61
H3 F2 H3 F2
NDQMB2 B12 DM2 DQ17 G3 NMDB11 NDQMB4 B12 DM2 DQ17 G3 NMDB60
DM3 DQ18 NMDB10 DM3 DQ18 NMDB63
G2 G2
DQ19 DQ19
2
2
NDQSB3 B2 J3 NMDB13 R402 NDQSB5 B2 J3 NMDB58
R376 NDQSB0 DQS0 DQ20 NMDB12 NDQSB6 DQS0 DQ20 NMDB57
H13 J2 H13 J2
NDQSB1 H2 DQS1 DQ21 K2 NMDB14 NDQSB7 H2 DQS1 DQ21 K2 NMDB59
NDQSB2 DQS2 DQ22 NMDB15 NDQSB4 DQS2 DQ22 NMDB56
B13 K3 B13 K3
1K_0402_1% DQS3 DQ23 E13 NMDB21 DQS3 DQ23 E13 NMDB38
(25mil) VR_VREF_3 N13 DQ24 NMDB22 1K_0402_1% (25mil) VR_VREF_4 N13 DQ24 NMDB39
D13 D13
1
1
M13 VREF DQ25 D12 NMDB20 M13 VREF DQ25 D12 NMDB36
MCL DQ26 MCL DQ26
2
2
1 L9 C13 NMDB23 1 L9 C13 NMDB37
R382 M10 RFU1 DQ27 B10 NMDB19 R410 M10 RFU1 DQ27 B10 NMDB34
C502 RFU2 DQ28 NMDB17 C553 RFU2 DQ28 NMDB35
B9 B9
1K_0402_1% 0.1U_0402_10V6K NMRASB# M2 DQ29 C9 NMDB18 1K_0402_1% 0.1U_0402_10V6K NMRASB# M2 DQ29 C9 NMDB33
2 17 NMRASB# RAS# DQ30 2 RAS# DQ30
NMCASB# L2 B8 NMDB16 NMCASB# L2 B8 NMDB32
17 NMCASB# CAS# DQ31 CAS# DQ31
NMWEB# L3 NMWEB# L3
1
1
17 NMWEB# WE# WE#
NMCSB0# N2 NMCSB0# N2
17 NMCSB0# CS# CS#
C3 C3
NMCKEB VDDQ NMCKEB VDDQ
17 NMCKEB N12 C5 N12 C5
CKE VDDQ C7 CKE VDDQ C7
NMCLKB0 VDDQ NMCLKB1 VDDQ
17 NMCLKB0 M11 C8 17 NMCLKB1 M11 C8
M12 CK VDDQ C10 M12 CK VDDQ C10
CK# VDDQ CK# VDDQ
C12 C12
R40 C4 VDDQ E3 R55 C4 VDDQ E3
B
@120_0402_5% NC VDDQ @120_0402_5% NC VDDQ B
C11 E12 C11 E12
H4 NC VDDQ F4 H4 NC VDDQ F4
NC VDDQ NC VDDQ
H11 F11 H11 F11
L12 NC VDDQ G4 L12 NC VDDQ G4
NMCLKB0# NC VDDQ NMCLKB1# NC VDDQ
17 NMCLKB0# L13 G11 17 NMCLKB1# L13 G11
M3 NC VDDQ J4 +2.5VS M3 NC VDDQ J4 +2.5VS
NC VDDQ NC VDDQ
M4 J11 M4 J11
N3 NC VDDQ K4 N3 NC VDDQ K4
NC VDDQ NC VDDQ
K11 K11
E7 VDDQ E7 VDDQ
VSS VSS
E8 D7 E8 D7
E10 VSS VDD D8 E10 VSS VDD D8
VSS VDD VSS VDD
K6 E4 K6 E4
K7 VSS VDD E11 K7 VSS VDD E11
VSS VDD VSS VDD
K8 L4 K8 L4
K9 VSS VDD L7 K9 VSS VDD L7
VSS VDD VSS VDD
L5 L8 L5 L8
L10 VSS VDD L11 L10 VSS VDD L11
VSS VDD VSS VDD
E5 E5
VSS VSS
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
TH
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H6
H7
H8
H9
H6
H7
H8
H9
G6
G7
G8
G9
G6
G7
G8
G9
F6
F7
F8
F9
F6
F7
F8
F9
J6
J7
J8
J9
J6
J7
J8
J9
K4D263238A-GC_FBGA144 K4D263238A-GC_FBGA144
A A

Title
VGA DDR FOR CHANNEL B

0.2
LA-1911
5 4 3 2 1
A B C D E
CRT, TV-OUT & LVDS CONNECTOR
1
TV-OUT Conn. D43
@DAN217_SOT 23
B+
Use for B+ discharge LVDS Conn.
3
+3VS
2
C418 1 2 22P_0402_50V8J D42 JP1
R441
1 2 @DAN217_SOT 23 C607 C600 1
16 LUMA 16 TZOUT3- 2
L2 CHB1608B121_0603 0.1U_0603_50V4Z
16 TZOUT3+ 3
10U_1210_35V4Z 100K_0402_5%
4
1 1 2 JP14 1
1
16 CRMA 16 TXOUT 3- 5
L1 CHB1608B121_0603 1. Y ground 16 TXOUT3+
LUMA_1 1 6
2 2. C ground 16 TXOUT 0- 7
16 COMPS
CRMA_1 3 3. Y (luminance+sync) 16 TXOUT0+ 8
1 2 4. C (crominance) 16 TXOUT2+
4 9
1
1
C415 16 TXOUT 2- 10
1
R7 R10 R9 C11 C10 22P_0402_50V8J
16 TXOUT1+ 11
1
C416 C417 SUYIN_030008FR004T100XU 16 TXOUT 1-
75_0603_1% 270P_0402_50V7K 12
75_0603_1% 330P_0402_50V7K 330P_0402_50V7K 13
2
16 TXCLK+ 14
C575 C572
2
2
+3VS 16 TXCLK- 15
34 PID0 PID0
75_0603_1% 270P_0402_50V7K @220P_0402_25V8K @220P_0402_25V8K PID1 16
34 PID1 17
34 PID2 PID2
PID3 18
RP5 34 PID3
8 1 PID0 19
+3VS 16 TZCLK- 20
+12VALW 7 2 PID1
16 TZCLK+ 21
6 3 PID2
PID3 22
5 4 16 TZOUT0- 23
2
16 TZOUT0+ 24
1
+LCDVDD R49 C31 10K_8P4R_1206_5%
+5V 16 TZOUT2- 25
16 TZOUT2+ 26
100K_0402_5% 4.7U_0805_10V4Z
16 TZOUT1- 27
1
1
D C559 C564
2
16 TZOUT1+ 28
R39 2 Q3
1
+LCDVDD 29
2
G @220P_0402_25V8K @220P_0402_25V8K
30
1
100_0402_5% R392 S SI2302DS-T1_SOT23
1
10K_0402_5% R50 C54 IPEX_20143-030E_30P
3
+LCDVDD
12
2 D 2
2 1 2 2 22K
1
2
G R398 JP2
2
22K
S Q2 47K_0402_5% 1
1
1
1
2N7002 1000P_0402_50V7K C492 C458 2
3
Q31 200K_0402_5% 2
37 DAC_BRIG 3
DTC124EK_SOT23 0.1U_0402_16V4Z 4.7U_0805_10V4Z DISPOFF# 4 3
3
L9 CHB2012U170_0805 4
1 2 5
2
22K 37 INVT_PWM 5
ENVDD 1 2 2 B+ 1 2 IB+ R593 0_0402_5% 6
16 ENVDD @0_0402_5% 6
R627 22K 1 2 7
7
2
L8 CHB2012U170_0805
R628 ACES_85204-0700
10K_0402_5% Q29
DTC124EK_SOT23
3
1
+3VS
2 1 +3VS
C806 0.1U_0402_16V4Z
U58
5
2
ENVDD 1 R72
4 D3 D4 D5 10K_0402_5%
2 DAN217_SOT 23 DAN217_SOT 23 DAN217_SOT 23 +5VS +R_CRT_VCC +CRT_VCC D17
10,16,23,26,27,29,30,33,34,37 PCIRST# D2 F1 RB751V_SOD323
1
1
TC7SH08FU_SSOP5 2 1 1 2 1 2 DISPOFF#
1
37 BKOFF#
3
3
CH491D_SOT23 FUSE_1A CRT Conn. 3
1
+3VS C2 1 2 C578
*** R594 @0_0402_5%
0.1U_0402_16V4Z JP13 220P_0402_50V8K
SUYIN_7849S-15G2T-HC
2
2
L29 6
11
16 R 1 2 CRT_R 1
FCM2012C-800_0805 7
L28 12
16 G 1 2 CRT_G 2 +CRT_VCC +CRT_VCC +5VS +5VS +5VS
FCM2012C-800_0805 8
L27 13
2
16 B 18P_0402_50V8K 1 2 CRT_B 3
FCM2012C-800_0805 CRT_VCC 9 R307 R6 R336 R337 R13
1
R329 R328 R327 14

1
C431 C432 C433 C411 C410 C409 4

10 4.7K_0402_5% 4.7K_0402_5% 100K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
1
18P_0402_50V8K 15P_0402_50V8J 15P_0402_50V8J 15P_0402_50V8J 15
1
75_0603_1% 5
2
2
C3 Q27
G
2
75_0603_1% 75_0603_1% 18P_0402_50V8K L3 CHB1608B121_0603 2N7002

2
+CRT_VCC DACA_HSYNC_1 1 2 DACA_HSYNC_2 DDC_DATA_1 1 3 DDC_DATA 16
S
1 2 100P_0402_50V8K
2
C22 L26 CHB1608B121_0603 Q1
G
5
1
0.1U_0402_16V4Z 1 2 DACA_VSYNC_2 C6 2N7002

R298 DDC_CLK_1 1 3 DDC_CLK 16
OE#
P
2 4 +CRT_VCC 1K_0402_5% C5 C413 C412 220P_0402_50V8K
S
4 16 DACA_HSYNC A Y 4
2
2
G
U2 1 2 @68P_0402_50V8K @68P_0402_50V8K
SN74AHCT1G125GW_SOT353-5 C426
1
2
5
1
220P_0402_50V8K
3
0.1U_0402_16V4Z
OE#
P
16 DACA_VSYNC 2 4 DACA_VSYNC_1
A Y U26
G
SN74AHCT1G125GW_SOT353-5 Title
CRT,TV-OUT & LVDS Connector
3
A B C D E
5 4 3 2 1
PCI_AD[0..31] +RTCVCC
26,27,29,30 PCI_AD[0..31]
+3VS INTRUDER# 1 2
RP30 U14A
HUB_HL[0..10] R544 1M_0603_5%
10 HUB_HL[0..10]
4 5 PCI_PERR# PCI_AD0 J4 Y12 INTRUDER#
3 6 PCI_TRDY# PCI_AD1 J5
AD0 ICH5/(ICH5-M) INTRUDER#
AD3 ICH_SMLINK0
2 7 PCI_PIRQG# PCI_AD2 G3 AD1 SMLINK0 AA2 ICH_SMLINK1 +3VALW
PCI_PIRQB# PCI_AD3 AD2 SMLINK1 LINK_ALERT#
1 8 K4 V5
PCI_AD4 H5 AD3 LINKALERT# AD2 ICH_SMB_CLK ICH_SMLINK0 1 2
AD4 SMB I/F SMBCLK ICH_SMB_CLK 12,13,15
D 8.2K_8P4R_1206_5% PCI_AD5 H2 AD1 ICH_SMB_DATA R546 10K_0402_5% D
AD5 SMBDATA ICH_SMB_DATA 12,13,15
PCI_AD6 J3 AC3 GPI_11
+3VS PCI_AD7 AD6 SMBALERT#/GPI11 ICH_SMLINK1
RP93 J2 1 2
PCI_AD8 K5 AD7 T22 R229 10K_0402_5%
AD8 A20GATE GATEA20 37
4 5 PCI_REQ#B PCI_AD9 F2 V23
AD9 A20M# H_A20M# 5
3 6 PCI_PIRQE# PCI_AD10 M4 A11 LINK_ALERT# 1 2
PCI_REQ#3 PCI_AD11 AD10 NC R523 10K_0402_5%
2 7 H4 U24 H_FERR# 5
1 8 PCI_PIRQF# PCI_AD12 L5 AD11 FERR# R21
AD12 IGNNE# H_IGNNE# 5
PCI_AD13 G2 CPU I/F R23 GPI_11 1 2
AD13 INIT# H_INIT# 5
8.2K_8P4R_1206_5% PCI_AD14 K1 U23 H_INTR 5 R547 10K_0402_5%
PCI_AD15 AD14 INTR
G5 R22 H_NMI 5
+3VS PCI_AD16 G4 AD15 NMI P24
RP37 AD16 CPUPWRGD/GPO49 H_PWRGOOD 5
PCI_AD17 L1 P23
AD17 RCIN# KBRST# 37
4 5 PCI_IRDY# PCI_AD18 B2 P22 H_CPUSLP# 5 +3VS
PCI_PLOCK# PCI_AD19 AD18 CPUSLP# SMI# 2
3 6 P5 V24 1 H_SMI# 5
2 7 PCI_DEVSEL# PCI_AD20 H3 AD19 SMI# T24 R524 2 1 0_0402_5% ICH_SMB_CLK 1 2
AD20 STPCLK# H_STPCLK# 5
1 8 PCI_SERR# PCI_AD21 N5 R24 R507 0_0402_5% R548 2.7K_0402_5%
PCI_AD22 C4 AD21 NC/(DPSLP#)
8.2K_8P4R_1206_5% PCI_AD23 AD22 HUB_HL0 ICH_SMB_DATA 1
N4 H20 2
PCI_AD24 E6 AD23 HI0 H21 HUB_HL1 R549 2.7K_0402_5%
+3VS PCI_AD25 AD24 HI1 HUB_HL2
RP95 P3 J20
PCI_AD26 D3 AD25 HI2 H23 HUB_HL3
PCI_STOP# PCI_AD27 AD26 HI3 HUB_HL4
4 5 N2 M23
3 6 PCI_PIRQD# PCI_AD28 F5 AD27 HI4 M21 HUB_HL5
PCI_FRAME# PCI_AD29 AD28 HI5 HUB_HL6 CLK_ICH_66M
2 7 P4 N21
1 8 PCI_REQ#1 PCI_AD30 F4 AD29 HI6 M20 HUB_HL7
AD30 HI7
2
PCI_AD31 P2 L22 HUB_HL8
8.2K_8P4R_1206_5% AD31 HI8 J22 HUB_HL9 R499
PCI I/F HI9
E3 HUB I/F K21 HUB_HL10
C +3VS 26,27,29,30 PCI_C/BE#0 C/BE0# HI10 C
RP28 26,27,29,30 PCI_C/BE#1 J1 G22 HUB_HL11 2 1 @10_0402_5%
C/BE1# HI11 R490 62_0402_5%
26,27,29,30 PCI_C/BE#2 N3
4 5 PCI_PIRQH# M2 C/BE2# N22 CLK_ICH_66M
1
26,27,29,30 PCI_C/BE#3 C/BE3# CLK66 CLK_ICH_66M 15 2
3 6 PCI_PIRQA# C684
2 7 PCI_PIRQC# PCI_REQ#0 D5 K23 HUB_HLSTRF 10
30 PCI_REQ#0 PCI_REQ#1 REQ0# HI_STBF @10P_0402_50V8K
1 8 C1 J24 HUB_HLSTRS 10
29 PCI_REQ#1 PCI_REQ#2 C5 REQ1# HI_STBS 1
27 PCI_REQ#2 PCI_REQ#3 REQ2# HI_RCOMP_ICH
B6 N24 2 1 +1.5VSS
8.2K_8P4R_1206_5% 26 PCI_REQ#3 PCI_REQ#4 C6 REQ3# HIRCOMP L24 HI_VREF_ICH R503 52.3_0603_1%
REQ4#/GPI40 HIREF HI_SWING_ICH
L20
+3VS PCI_GNT#0 D4 HI_VSWING
RP94 30 PCI_GNT#0 GNT0#
PCI_GNT#1 A3 Interrupt I/F
4 5 PCI_REQ#4 29 PCI_GNT#1 PCI_GNT#2 B7 GNT1# B3 PCI_PIRQA#
27 PCI_GNT#2 GNT2# PIRQA# PCI_PIRQA# 16,27
3 6 PCI_REQ#A PCI_GNT#3 C7 E1 PCI_PIRQB#
26 PCI_GNT#3 GNT3# PIRQB# PCI_PIRQB# 27 +3VS
2 7 PCI_REQ#2 A4 A2 PCI_PIRQC# PCI_PIRQC# 27
PCI_REQ#0 GNT4#/GPO48 PIRQC# PCI_PIRQD#
1 8 C2 PCI_PIRQD# 27
CLK_PCI_ICH N1 PIRQD# D7 PCI_PIRQE# IDE_IRQ15 1 2
15 CLK_PCI_ICH PCICLK PIRQE#/GPI2 PCI_PIRQE# 30 8.2K_0402_5%
8.2K_8P4R_1206_5% A6 PCI_PIRQF# R532
PIRQF#/GPI3 PCI_PIRQF# 26
26,27,29,30 PCI_FRAME# PCI_FRAME# D2 E2 PCI_PIRQG# PCI_PIRQG# 29
PCI_DEVSEL# FRAME# PIRQG#/GPI4 PCI_PIRQH# IDE_IRQ14
26,27,29,30 PCI_DEVSEL# L3 B1 PCI_PIRQH# 29 1 2
+3VS D I SABLE "TOP BLOCK SWAP" PCI_IRDY# M3 DEVSEL# PIRQH#/GPI5 Y17 IDE_IRQ14 R533 8.2K_0402_5%
26,27,29,30 PCI_IRDY# IRDY# IRQ14 IDE_IRQ14 33
(GNTA#) PCI_PAR F1 Y24 IDE_IRQ15
26,27,29,30 PCI_PAR PAR IRQ15 IDE_IRQ15 33,42
1 2 PIDERST# 26,27,29,30 PCI_PERR# PCI_PERR# K2 F23 IRQ_SERIRQ SERIRQ 27,34,37 IRQ_SERIRQ 1 2
R486 8.2K_0402_5% PCI_PLOCK# PERR# SERIRQ R488 10K_0402_5%
L2
V2 PLOCK# B10
PME# EEPROM I/F EE_CS
PCIRST# V4 B11
10,16,22,26,27,29,30,33,34,37 PCIRST# PCI_SERR# L4 PCIRST# EE_DIN B9 NC_EE_DOUT 2 1
26,27,29,30 PCI_SERR# SERR# EE_DOUT
PCI_STOP # E5 A12 R473
26,27,29,30 PCI_STOP # STOP# EE_SHCLK
26,27,29,30 PCI_TRDY# PCI_TRDY# E4 @1K_0402_5%
B TRDY# B
C10
PCI_REQ#A A5 LAN_RXD0 C9
PCI_REQ#B REQA#/GPI0 LAN_RXD1
E7 C11
REQB#REQ5#/GPI1 LAN_RXD2 D9
+1.5VSS PIDERST# LAN_TXD0
33 PIDERST# E8 LAN I/F LAN_TXD1 E9
B4 GNTA#/GPO16 B12
GNTB#/GNT5#/GPO17 LAN_TXD2
E10
LAN_CLK D10
LAN_RSTSYNC
1
AA1 LAN_RST# 2 1
R497 LAN_RST# R538
Note: ICH5 10K_0402_5%
226_0603_1% H I _SWING_MCH, HI_VREF_MCH
t r ace width of 10mils and
2
space 7mils
HI_SWING_ICH
1
2 1 Close to ICH(L20) CLK_PCI_ICH

R493 C683
1
C679
147_0603_1% 0.1U_0402_16V4Z 0.01U_0402_16V7K R211
1 2
@10_0402_5%
C l ose to ICH ball <250mils
2
1
HI_VREF_ICH
C287
@10P_0402_50V8K
A 2 A
1
2 1 Close to ICH(L24)
R495 C674
C678
113_0603_1% 0.1U_0402_16V4Z 0.01U_0402_16V7K
1 2
C l ose to ICH ball <250mils
2
Title
ICH5-PCI/HUB/LAN
5 4 3 2 1
5 4 3 2 1
+3VALW
2 1 TP0_PU R505 R220

R232 10K_0402_5% 10K_0402_5% U14B 100K_0402_5%
2 1 SYS_RESET# +3VS 1 2 R5 U3 ICH_ACIN 1 2 +3VS ICH_ACIN 2 1 ACIN ACIN 37,38,45
R222 8.2K_0402_5% SYS_RESET# U1
GPI6/(AGPBUSY#) ICH5/(ICH5-M) GPI7
Y2 EC_SMI#
EC_SMI# 37
TP0_PU AB2 SYS_RESET# GPI8 W4 EC_SCI# RB751V_SOD323 D36
TP0/(BATLOW#) GPI12 EC_SCI# 37
+3VS R1 W5 EC_LID_OUT#
GPO21/(C3_SAT#) GPI13 EC_LID_OUT# 37
AC1 GPI W3 EC_FLASH# 38
ICH_VGATE GPIO24/(CLKRUN#) GPIO25 +3VALW
2 1 P20 V3
R502 10K_0402_5% Y4 NC/(DPRSLPVR) GPIO27 W2
37 PBTN_OUT# PWRBTN# GPIO28
2 1 EC_THRM# ICH_PWROK AC12
R216 4.7K_0402_5% AB3 PWROK AA19 IDE_PDA0 2 1
37 EC_SWI# RI# PDA0 IDE_PDA0 33
D 2 1 PM_CLKRUN# EC_RSMRST# AB13 PM AD19 IDE_PDA1 C320 0.1U_0402_16V4Z D
37,41 EC_RSMRST# RSMRST# PDA1 IDE_PDA1 33
R234 10K_0402_5% T20 AC19 IDE_PDA2 IDE_PDA2 33 U15
GPO19/(SLP_S1#) PDA2
5
PM_SLP_S3# W1 AB19 IDE_PDCS1#
37 PM_SLP_S3# SLP_S3# PDCS1# IDE_PDCS1# 33
PM_SLPS4# U2 Y18 IDE_PDCS3# IDE_PDCS3# 33 PM_SLPS5# 1
+CPU_CORE PM_SLPS5# SLP_S4# PDCS3#
AA3 4 PM_SLP_S5# 37
U22 SLP_S5# AC17 IDE_PDDREQ PM_SLPS4# 2
GPO20/(STP_CPU#) PDDREQ IDE_PDDREQ 33
2 1 H_CPUPERF# U21 AC18 IDE_PDDACK#
GPO18/(STP_PCI#) PDDACK# IDE_PDDACK# 33
R519 @10K_0402_5% 27 SUSCLK SUSCLK Y1 AD18 IDE_PDIOR# IDE_PDIOR# 33
SUSCLK PDIOR# IDE_PDIOW# TC7SH08FU_SSOP5
AB1 AA17
3
SUS_STAT#/LPCPD# PDIOW# IDE_PDIOW# 33
37 EC_THRM# EC_THRM# T2 AA18 IDE_PDIORDY IDE_PDIORDY 33
SUSCLK THRM# PIORDY
2 1
R534 @10K_0402_5% AB16 IDE_PDD0 1 2
EC_RSMRST# PDD0 IDE_PDD1 R595 @0_0402_5%
2 1 F22 Y13
R543 10K_0402_5% H_CPUPERF# U20 GPO23/(SSMUXSEL) PDD1 Y14 IDE_PDD2
GPO22/(CPUPERF#) IST PDD2
40,49,52 VCORE_PWRGD 1 2 ICH_VGATE R20 AC14 IDE_PDD3
R504 0_0402_5% VRMPWRGD/(VGATE) PDD3 AA14 IDE_PDD4
PDD4 ICH_SYNC# SYS_PWROK ICH_PWROK
ICH_AC_BITCLK D8 AC15 IDE_PDD5
31,36 ICH_AC_BITCLK ICH_AC_RST_R# C12 AC_BIT_CLK PDD5 AD14 IDE_PDD6 +3VS
AC_RST# PDD6 0 0 0
+3VS ICH_AC_SDIN0 E12 AB14 IDE_PDD7
31 ICH_AC_SDIN0 AC_SDIN0 PDD7
ICH_AC_SDIN1 D12 AD15 IDE_PDD8 IDE_PDIORDY 2 1
36 ICH_AC_SDIN1 AC_SDIN1 AC97 I/F PDD8 0 1 0
2 1 ICH_AC_SDOUT A13 Y15 IDE_PDD9 R529 4.7K_0402_5%
R468 @8.2K_0402_5% ICH_AC_SDOUT_R A9 AC_SDIN2 PDD9 AD16 IDE_PDD10
AC_SDOUT PDD10 1 0 0
ICH_AC_SYNC_R B8 AA15 IDE_PDD11 IDE_SDIORDY 2 1
2 1 ICH_AC_BITCLK AC_SYNC PDD11 AC16 IDE_PDD12 R528 4.7K_0402_5%
IDE I/F PDD12 1 1 1
R482 @10K_0402_5% LPC_AD[0..3] LPC_AD0 T5 Y16 IDE_PDD13
34,37 LPC_AD[0..3] LAD0 PDD13
2 1 ICH_AC_SDIN0 LPC_AD1 R4 AA16 IDE_PDD14
R484 @10K_0402_5% LPC_AD2 LAD1 PDD14 IDE_PDD15
R3 AB17
2 1 ICH_AC_SDIN1 R598 LPC_AD3 U4 LAD2 PDD15 +3VS
LAD3 LPC I/F
R481 @10K_0402_5% 2 1 @0_0402_5% U5 W22 IDE_SDA0
C LDRQ0# SDA0 IDE_SDA0 33,42 C
LPC_DRQ1# R2 W23 IDE_SDA1 IDE_SDA1 33,42
34 LPC_DRQ1# LDRQ1#/GPI41 SDA1
1
LPC_FRAME# T4 W21 IDE_SDA2
34,37 LPC_FRAME# LFRAME# SDA2 IDE_SDA2 33,42
1
V22 IDE_SDCS1# IDE_SDCS1# 33,42 R254
SDCS1# IDE_SDCS3# R261 R574
35 USBP0+ C23 V20 IDE_SDCS3# 33,42 @1K_0402_5%
+3VALW D23 USBP0P SDCS3#
35 USBP0- USBP0N @220_0402_5%
RP92 A22 Y20 IDE_SDDREQ @220_0402_5%
USBP1P SDDREQ IDE_SDDREQ 33,42
4 5 USB_OC1# B22 W20 IDE_SDDACK#
2
USBP1N SDDACK# IDE_SDDACK# 33,42
3 6 USB_OC3# C21 Y23 IDE_SDIOR#
2
35 USBP2+ USBP2P SDIOR# IDE_SDIOR# 33,42
1
2 7 USB_OC5# 35 USBP2- D21 Y22 IDE_SDIOW# IDE_SDIOW# 33,42
USB_OC7# USBP2N SDIOW# IDE_SDIORDY
1 8 A20 Y21 IDE_SDIORDY 33,42 2 2
B20 USBP3P SIORDY Q21 Q55
+3VALW 10K_8P4R_1206_5% USBP3N IDE_SDD0 @MMBT3904_SOT23 @MMBT3904_SOT23
35 USBP4+ C19 AA22
D19 USBP4P SDD0 AB23 IDE_SDD1 2 1
3
35 USBP4- USBP4N SDD1
2 1 USB_OC6# A18 AD23 IDE_SDD2 R597 @0_0402_5%
R480 10K_0402_5% B18 USBP5P SDD2 AD24 IDE_SDD3 1 2 ICH_PWROK
USBP5N SDD3 IDE_SDD4 7,27,40 SYS_PWROK R572 0_0402_5%
36 USBP6+ C17 AB21
D17 USBP6P SDD4 AC21 IDE_SDD5
36 USBP6- USBP6N SDD5
A16 USB I/F AB20 IDE_SDD6
B16 USBP7P SDD6 AC20 IDE_SDD7 IDE_PDD[0..15]
+RTCVCC USBP7N SDD7 IDE_PDD[0..15] 33
Y19 IDE_SDD8
USB_OC0# C15 SDD8 AD22 IDE_SDD9 IDE_SDD[0..15]
35 USB_OC0# OC0# SDD9 IDE_SDD[0..15] 33,42
1 2 ICH_INTVRMEN USB_OC1# D15 AC22 IDE_SDD10
R550 330K_0402_5% USB_OC2# D14 OC1# SDD10 AA20 IDE_SDD11
35 USB_OC2# OC2# SDD11
USB_OC3# C14 AB22 IDE_SDD12 R545 +RTCVCC
USB_OC4# B14 OC3# SDD12 AC24 IDE_SDD13 2 1 2 1 2 1
35 USB_OC4# OC4#/GPI9 SDD13
USB_OC5# A14 AB24 IDE_SDD14 R540 J1 1
USB_OC6# D13 OC5#/GPI10 SDD14 AA23 IDE_SDD15 4.7K_0402_5% JOPEN 200K_0402_5%
USB_OC7# OC6#/GPI14 SDD15 C350
C13
Note: OC7#/GPI15 AA8
B
USBRBIAS A24 SATA0TXP ICH_RTCRST# 2 B
U S B R BIAS keep less than 500mils 1 2 AB8
R471 B24 USBRBIAS SATA0TXN AD7 0.1U_0402_16V4Z
22.6_0603_1% USBRBIAS# SATA0RXN
AC7
+3VS T1 SATA0RXP
GPIO32
G23 SATA I/F SATA1TXP AA10
2 1 SPKR SIDERST# F21 GPIO33 AB10 Note:
33,42 SIDERST# GPIO34 GPIO SATA1TXN
R485 @1K_0402_5% AD9 C741
SATA1RXN S A T A BIAS keep less than 500mils
Disable timer timeout ICH_INTVRMEN AD10 AC9 @0.047U_0402_16V4Z
INTVRMEN SATA1RXP
2 1ICH_VBIAS 2 1
Y11 SATABIAS 2 1 R562 R554 @1K_0402_5%
SPKR SATARBIAS R527 24.9_0603_1% @10M_0603_5%
32 SPKR E24 MISC Y9 1 2
CLK_ICH_14M CLK_ICH_48M SPKR SATARBIAS# R559 @22M_0603_5%
2
AC5
CLK100P
2
5 H_THERMTRIP# H_THERMTRIP# 1 2 T21 AD5 ICH_RTCX1 R566

R487 R508 0_0402_5% THRMTRIP# CLK100N
R489 @10_0402_5% AA12 ICH_RTCRST# ICH_RTCX2 2 1 @2.4M_0603_1%
CLK_ICH_14M RTCRST# R245 10M_0603_5%
15 CLK_ICH_14M F20
@10_0402_5% CLK14 AC11 ICH_RTCX1
1
CLOCK RTCX1 X4
21
2
C662 15 CLK_ICH_48M CLK_ICH_48M F24 AB12 ICH_RTCX2
@4.7P_0402_50V8C C663 CLK48 RTCX2
@10P_0402_50V8K 32.768KHZ_12.5PF_CM155
1 ICH5
C357 C356
1
ICH_AC_BITCLK 12P_0402_50V8J 12P_0402_50V8J
2
R479
+CPU_CORE 2 1 ICH_AC_RST_R#
A 31,36 ICH_AC_RST# A
R475 33_0402_5% @10_0402_5%
1 2 H_THERMTRIP# 31,36 ICH_AC_SYNC 2 1 ICH_AC_SYNC_R
R509 62_0402_5% R472 33_0402_5%
1
2
Near ICH 31,36 ICH_AC_SDOUT 2 1 ICH_AC_SDOUT_R C648
R470 33_0402_5%
@10P_0402_50V8K
1 Compal Electronics, Inc.
PM_CLKRUN# Title
26,27,29,30,34,37 PM_CLKRUN#
ICH5-IDE/LPC/PM/GPIO/USB
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
+3VS
U14C
A1 B5 +3VS
A7
VSS ICH5/(ICH5-M)VCC3_3 F6 1
A10 VSS VCC3_3 G1 C708
VSS VCC3_3
A15 H6
A17 VSS VCC3_3 K6 0.1U_0402_16V4Z
VSS VCC3_3 1 1 1 1 1 1 2
A19 L6 C666 C668 C645 C667 C680 C420 Place near
A21 VSS VCC3_3 M10
VSS VCC3_3 ball T22
D A23 N10 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z D
AA5 VSS VCC3_3 P6 2 2 2 2 2 2
VSS VCC3_3
AA7 R13
AA9 VSS VCC3_3 V19
VSS VCC3_3
AA11 W15 P l a c e near +3VS, DIRECTION TO ball
AA13 VSS VCC3_3 W17
VSS VCC3_3 D 1,A7,H1,P1,W24 and A21 +1.5VSS
AA21 W24
AA24 VSS VCC3_3 AD13
VSS VCC3_3
AB5 AD20
AB7 VSS VCC3_3 G19 +1.5VSS
VSS VCC3_3
AB9 G21 1 1
AB11 VSS VCC3_3 C650 C651
VSS Power
AB15 E18 +3VALW
AB18 VSS VCCSUS3_3 B15 0.1U_0402_16V4Z 0.01U_0402_16V7K
VSS VCCSUS3_3 1 1 1 1 1 1 2 2 2
AC2 E11 C737 C698 C718 C738 C672 C727 C722
AC4 VSS VCCSUS3_3 F10
VSS VCCSUS3_3 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K
AC6 F11 Place near ball D24
AC8 VSS VCCSUS3_3 E13 2 2 2 2 2 2 1
VSS VCCSUS3_3
AC10 E14
AC13 VSS VCCSUS3_3 U6
VSS VCCSUS3_3
AC23 V6 P l a c e 0.1u near +1.5VS, Direction to ball
AD4 VSS VCCSUS3_3 F16
VSS VCCSUS3_3 G 2 4 ,H24,K24,M24,AD4 and AD18;
AD6 F17
AD8 VSS VCCSUS3_3 F18 0 . 0 1 u near +1.5VS, Direction to ball AD8. +1.5VSS
VSS VCCSUS3_3
AD17 K15
AD21 VSS VCCSUS3_3
VSS +3VALW
AD12 K10 +1.5VSS
B13 VSS VCC1_5 K12
VSS VCC1_5 1 1
B17 K13 C732 C733
C B19 VSS VCC1_5 L19 C
VSS VCC1_5 0.1U_0402_16V4Z 0.01U_0402_16V7K
B21 P19 1 1 1 1 1
B23 VSS VCC1_5 R10 C644 C675 C717 C676 C686 2 2
VSS VCC1_5
C3 R6
C8 VSS VCC1_5 H24 0.01U_0402_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0603_10V6K
VSS VCC1_5 2 2 2 2 2 Place near ball AD6
C16 J19
C18 VSS VCC1_5 K19
VSS VCC1_5
C20 M15
C22 VSS VCC1_5 N15
VSS VCC1_5 P l a c e 0.1u near +3VALW, Direction to ball
D1 N23
D6 VSS VCC1_5 E15 A17,A23,V1.
VSS VCC1_5 A ddition cap near A15,A19
D11 F15
D16 VSS VCC1_5 F14
VSS VCC1_5 +3VS +5VS
D18 W19
D20 VSS VCC1_5 R12
VSS VCC1_5
D22 W9 Decoupling Reference Document:
VSS VCC1_5
2
D24 W10
VSS VCC1_5 Springdale Chipset Platform Design guide Rev1.2 D39 R521
E17 W11
VSS VCC1_5
E19
VSS VCC1_5
W6 (12837)page282 RB751V_SOD323
E20 W7 1K_0402_5%
E21 VSS VCC1_5 W8
VSS VCC1_5
E23 E22
1
F3 VSS VCC1_5 ICH_V5REF
VSS VCCSUS15_A
F9 F19
G6 VSS VCCSUS1_5_A Y5 VCCSUS15_B
VSS VCCSUS1_5_B 1 1 1
G20 AA4 C642 C712 C710
G24 VSS VCCSUS1_5_B AB4
VSS VCCSUS1_5_B VCCSUS15_C 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0603_10V6K
H1 F7
H19 VSS VCCSUS1_5_C F8 2 2 2
B VSS VCCSUS1_5_C 1 1 1 B
H22 C665 C728 C664
J6 VSS A8 ICH_V5REF
VSS V5REF 0.01U_0402_16V7K 0.01U_0402_16V7K 0.01U_0402_16V7K
J21 W14
J23 VSS V5REF 2 2 2
VSS Place near ball A8
K3 E16 ICH_V5REF_SUS
K11 VSS V5REF_SUS
VSS Place Place Place +3VALW +5VALW
K14 R15 +CPU_CORE
K20 VSS V_CPU_IO R19 near near near
VSS V_CPU_IO F7, AB4, F19,
K22 T19
VSS V_CPU_IO
2
K24 Direction Direction Direction
VSS D37 R491
L10 AA6 +1.5VSS
L11 VSS VCCSATAPLL AB6 to ball to ball to ball
VSS VCCSATAPLL RB751V_SOD323
L12 (VSS)A7 (VSS)AD4 (VSS)A19 1K_0402_5%
L13 VSS C24
VSS VCCUSBPLL ICH_V5REF_SUS
L14
1
L15 VSS AD11
VSS VCCRTC +RTCVCC
L21 1 1 1
L23 VSS C661 C660 C670
VSS 1
M1 P14 C739
M5 VSS VSS P15 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0603_10V6K
VSS VSS 0.1U_0402_10V6K 2 2 2
M11 P21
M12 VSS VSS R11 2
VSS VSS
M13 R14
M14 VSS VSS T23
VSS VSS
M22 T3 P lace near ball(VSS) E16
M24 VSS VSS T6
VSS GND VSS
N11 U19 Place near ball AD11
N12 VSS VSS V1
VSS VSS
A N13 V21 A
N14 VSS VSS W16
VSS VSS
N20 W18
P1 VSS VSS Y3
VSS VSS
P10 Y6
P11 VSS VSS Y7
VSS VSS
P12 Y8
P13 VSS VSS Y10 Compal Electronics, Inc.
VSS VSS Title
ICH5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size
ICH5 Power & Decoupling
Document Number Rev
LA-1911
5 4 3 2 1
5 4 3 2 1
TRACE=20mil
0.1U_0402_16V4Z
P l ace closed to LAN Realtek RT8101L
+2.5V_LAN +2.5V_DLAN R T L8101L pin58
R375 0_0805_5%
1
C573 C538 22U_1206_10V4Z 0.1U_0402_16V4Z
1 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
U35 C486 C505
1
PCI_AD0 47 48 C496 C495 C498
2
PCI_AD1 46 AD0 VDD25 94 0.1U_0402_16V4Z R T L 8 101L has internal
PCI_AD2 AD1 VDD25 2
45 + 2 . 5 V generator at pin58
1
PCI_AD[0..31] PCI_AD3 AD2 +2.5V_LAN T RACE=20mil
43 58
2
23,27,29,30 PCI_AD[0..31] +2.5V_LAN
Power
PCI_AD4 AD3 AVDD25 0.1U_0402_16V4Z
D 42 D
PCI_AD5 41 AD4 59 +3V_LAN_VDD1 T RACE=20mil 1 2
AD5 AVDD +3V
PCI_AD6 40 L36
PCI_AD7 AD6 +3V_LAN_VDD2 T RACE=20mil LQG21N4R7K10_0805
39 70
PCI_AD8 36 AD7 AVDD
PCI_AD9 AD8 +3V_LAN_VDD3 T RACE=20mil TRACE=30mil
35 75
PCI_AD10 AD9 AVDD
34
PCI_AD11 33 AD10
PCI_AD12 AD11
32
PCI_AD13 AD12 U32
30
PCI_AD14 AD13 LAN_EEDO
29 52 4 5
PCI_AD15 28 AD14 EEDO 53 LAN_EEDI 3 DO GND 6 +3V
PCI_AD16 AD15 EEDI LAN_EECLK DI NC 7
15 54 2
PCI_AD17 AD16 EESK LAN_EECS SK NC 8
14 55 1
PCI_AD18 13 AD17 EECS CS VCC
1
PCI_AD19 AD18 ACTIVITY# AT93C46-10SI-2.7_SO8 C459
12 78
PCI_AD20 AD19 LED0 LINK10_100#
11 77
PCI_AD21 10 AD20 LED1 76 0.1U_0402_16V4Z
AD21 LED2 Layout Note
PCI_AD22 9 1 2
2
AD22 +3V TS6121 pls close to
PCI_AD23 LAN_TD+ R383
LAN I/F
8 72
PCI I/F
AD23 TXD+ conn. U31
PCI_AD24 96 71 LAN_TD- 5.6K_0402_5%
PCI_AD25 93 AD24 TXD-
PCI_AD26 AD25 LAN_RD+ LAN_TD+ RJ45_TX+
92 68 1 16
PCI_AD27 AD26 RXIN+ LAN_RD- LAN_TD- TD+ TX+ RJ45_TX-
91 67 3 14
PCI_AD28 89 AD27 RXIN- 2 TD- TX- 15
PCI_AD29 AD28 LAN_X1 CT CT
87 61
PCI_AD30 AD29 X1
86
PCI_AD31 85 AD30 7 10
AD31 LAN_X2 LAN_RD+ CT CT RJ45_RX+
60 6 11
C PCI_C/BE#0 X2 LAN_RD- RD+ RX+ RJ45_RX- C
23,27,29,30 PCI_C/BE#0 38 1 2 8 9
+3VS
1
PCI_C/BE#1 C/BE#0 R48 1K_0402_5% RD- RX-
23,27,29,30 PCI_C/BE#1 27 64
1
PCI_C/BE#2 17 C/BE#1 LWAKE R395
23,27,29,30 PCI_C/BE#2
1
PCI_C/BE#3 C/BE#2 +3V R394 49.9_0402_1% R379 R380
84 74 1 2 TS6121C_16P
23,27,29,30 PCI_C/BE#3 C/BE#3 ISOLATE# R46 15K_0402_5% 49.9_0402_1% 49.9_0402_1% 49.9_0402_1%
IDSEL:PCI_AD17 PCI_AD17 1 2 LAN_IDSEL 98 65 1 2 R21 R22
**
3
R423 100_0402_5% IDSEL RTSET R47 5.6K_0603_1% 75_0402_5% 75_0402_5%
1
24 63 Q32 C49
2
23,27,29,30 PCI_PAR PAR RTT3
18 E @2SB1197K_SOT23
2
23,27,29,30 PCI_FRAME# 47K
1
FRAME# B C528 C488 0.1U_0402_16V4Z
19 56
23,27,29,30 PCI_IRDY# IRDY# VCTRL
20 2
2
23,27,29,30 PCI_TRDY#
23,27,29,30 PCI_DEVSEL# 21 TRDY# 1 10K ** 0.1U_0402_16V4Z ** 0.1U_0402_16V4Z
AC-Link
23 DEVSEL# AC_RST# 3 C
2
23,27,29,30 PCI_STOP# STOP# AC_SYNC 4
AC_DOUT
25 5
23,27,29,30 PCI_PERR#
26 PERR# AC_DIN 7 r e s e r ve transistor for ver.C
1 1
23,27,29,30 PCI_SERR# SERR# AC_BCK +2.5V_LAN Closed to RTL8101L Closed to Bothhand TS6121
83 C45
23 PCI_REQ#3 REQ#
82 100 RJ45_PR
23 PCI_GNT#3 GNT# GPIO0 @22U_1206_10V4Z
99
GPIO1
80
2
23 PCI_PIRQF# INTA#
79
57 INTB# 51
27,29,30,37 LAN_PME# PME# ROMCS/OEB 69 Y2
NC 25MHZ_20PF_6X25000017 Q34
10,16,22,23,27,29,30,33,34,37 PCIRST# 81
RST# DTA114YKA_SOT23 JP16
CLK_PCI_LAN 97 LAN_X1 LAN_X2
15 CLK_PCI_LAN
E
PCICLK
50 2 3 1 1 2 12
24,27,29,30,34,37 PM_CLKRUN# +3V
1
1
CLKRUN# DGND1 Amber LED+
47K
16 R412 300_0402_5%
C
6 DGND2 31 C497 C503 11
B +3V VDD DGND3 Amber LED- B
27P_0402_50V8J 27P_0402_50V8J
10K
22 44 16
B
VDD DGND4 SHLD4
37
Power 88 8
2
2
VDD DGND5 PR4-
49 62 15
CLK_PCI_LAN 90 VDD AGND1 66 7 SHLD3
2
VDD AGND2 ACTIVITY# PR4+
95 73
1
VDD AGND3 RJ45_RX- 6

R421 RTL8101L_LQFP100 PR2-
@10_0402_5% 5
PR3-
4
PR3+
12
RJ45_RX+ 3
C577 PR2+
@10P_0402_50V8K RJ45_TX- 2
PR1- 14
2
RJ45_TX+ SHLD2
1
PR1+ 13
Q33 SHLD1
10
DTA114YKA_SOT23 Green LED-
E
3 1 1 2 9
+3V Green LED+
R401 300_0402_5%
47K
C
AMP RJ45/RJ11 with LED
10K
B
1
R24 R23
2
LINK10_100# 75_0402_5% 75_0402_5%
**
C787
2
A +3V A
RJ45_PR 1 2 @0.1U_0402_16V4Z LANGND
1
1000P_1206_2KV7K
C438 C788
C566 C580 C581 C567 C526 C576 Termination plane should be coupled to chassis ground 4.7U_0805_10V4Z
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
Title
LAN REALTEK RTL8101L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFID
ENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION FR&DO 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION NTIT
ACO
INS LA-1911
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS
, INC. Date: Friday, August 08, 2003 Sheet 26 of 57
5 4 3 2 1
5 4 3 2 1
FUZZY SIGNAL
CardBus Controller 1
J2
2 +3VS
CardBus Controller RESERVED
T7L65XB (BGA) +3VC
PAD-OPEN 4x4m T7L65XB (BGA) PULL UP/DOWN
PCI/SD INTERFACE 1
PJP12
2 +3V
CARDBUS INTERACE
PAD-OPEN 4x4m EXSMI# 2 R102 1 +3VC
S1_A[0..25] @10K_0402_5%
** S1_A[0..25] 28
S1_D[0..15] TOPICREG 1 R76 2
S1_D[0..15] 28
D PCI_AD[0..31] 0_0402_5% D
23,26,29,30 PCI_AD[0..31]
U5A +3VC U5B

PCI_AD0 J16 H6 D7 S1_D0
AD0 VCC SLTA30/D0/CAD27
TOSHIBA T7L65XB 1/2
TOSHIBA T7L65XB 2/2

PCI_AD1 J15 J6 B6 S1_D1
PCI_AD2 J14 AD1 J2 K6 VCC SLTA31/D1/CAD29 D6 S1_D2
DOCKING
PCI_AD3 AD2 DPSMI# J1 VCC SLTA32/D2/RESERVED S1_D3
J13 L6 F12
PCI_AD4 K16 AD3 PCM2SPK# L7 VCC SLTA2/D3/CAD0 F16 S1_D4
I/F
PCI_AD5 K15 L8 F14 S1_D5
PCI_AD6 K14 AD5 L9 VCC SLTA4/D5/CAD3 E16 S1_D6
PCI_AD7 AD6 VCC SLTA5/D6/CAD5 S1_D7
K13 T5 L10 E14
PCI_AD8 L16 AD7 MBSTS2 R5 L11 VCC SLTA6/D7/CAD7 A6 S1_D8
PCI_AD9 L15 AD8 MBSTS1 T4 N13 VCC SLTA64/D8/CAD28 C6 S1_D9
PCI_AD10 AD9 MBSTS0 VCC SLTA65/D9/CAD30 S1_D10
L14 R4 M16 E6
PCI_AD11 L13 AD10 IFAMON# K11 VCC SLTA66/D10/CAD31 F15 S1_D11
EXT
I/F
PCI_AD12 M15 P5 J11 F13 S1_D12
PCI_AD13 AD12 IFMO# N5 FDVCE# VCC SLTA38/D12/CAD4 S1_D13
M14 H11 E15
PCI_AD14 M13 AD13 FDVCE# P4 HDSTP G11 VCC SLTA39/D13/CAD6 E13 S1_D14
PCI_AD15 N16 AD14 HDSTP N4 HDSTS VCC SLTA40/D14/RESERVED D15 S1_D15
PCI_AD16 N15 AD15 HDSTS R16 SLTA41/D15/CAD8
PCI_AD17 AD16 VIO S1_A0
N14 K3 +3VC J12 B7
PCI_AD18 P16 AD17 GPO1 E1 B16 VIO SLTA29/A0/CAD26 D8 S1_A1
PCI_AD19 P15 AD18 PDNVGA E2 E7 VIO SLTA28/A1/CAD25 B8 S1_A2
AD19 RSTVGA# J4 +S1_VCC VIO SLTA27/A2/CAD24
PCI_AD20 P14 QSWON E10 E8 S1_A3
PCI_AD21 R14 AD20 QSWON J3 G6 VIO SLTA26/A3/CAD23 A9 S1_A4
AD21 DCPCLR# H3 +3VC VCCS SLTA25/A4/CAD22
PCI_AD22 P13 C9 S1_A5
GENERAL
PCI_AD23 AD22 IDERSTA# H4 SLTA24/A5/CAD21 S1_A6
R13 +S1_VCC F11 D9
PCI_AD24 T13 AD23 IDERSTB# D2 F10 VCCA SLTA23/A6/CAD20 B10 S1_A7
PORT
PCI_AD25 N12 AD24 LCDENA# D3 F9 VCCA SLTA22/A7/CAD18 B14 S1_A8
PCI_AD26 P12 AD25 LCDENB# E3 F8 VCCA SLTA12/A8/CCBE#1 C14 S1_A9
PCI_AD27 AD26 CRTEN# G1 BIOSWP# VCCA SLTA11/A9/CAD14 S1_A10
R12 F7 D14
PCI_AD28 T12 AD27 BIOSWP# F6 VCCA SLTA8/A10/CAD9 C16 S1_A11
AD28 +3VC VCCA SLTA10/A11/CAD12
PCI_AD29 N11 N6 TOPICREG D10 S1_A12
PCI_AD30 AD29 TOPICREG SLTA21/A12/CCBE#2 S1_A13
C P11 F5 C13 C
PCI_AD31 R11 AD30 PCI BUS INTERFACE
R7 H7 GND SLTA13/A13/CPAR A13 S1_A14
AD31 TSTI3 P7 GND SLTA14/A14/CPERR#
VOLTAGE/GROUND
P C C ARD I/F SLOTA

J7 B11 S1_A15
TSTI2 T7 GND SLTA20/A15/CIRDY# S1_A16
23 PCI_REQ#2 L12 J8 B15
** T8 REQ# TSTI1 N7 K7 GND SLTA19/A16/CCLK A14 S1_A17
23,34,37 SERIRQ IRQDT# TSTI0 GND SLTA46/A17/CAD16
T11 TEST R616 L5 B13 S1_A18
24,26,29,30,34,37 PM_CLKRUN# CLKRUN# GND SLTA47/A18/RESERVED
C3 1 2 T1 D12 S1_A19
SDLED D1 SDLED 39 GND SLTA48/A19/CBLOCK#
N9 0_0402_5% M6 B12 S1_A20
23,26,29,30 PCI_FRAME# FRAME# ZVAEN T6 GND SLTA49/A20/CSTOP#
P9 K8 D11 S1_A21
23,26,29,30 PCI_IRDY# IRDY# TSTO3 P6 GND SLTA50/A21/CDEVSEL#
R9 K9 C11 S1_A22
23,26,29,30 PCI_DEVSEL# DEVSEL# TSTO2 R6 GND SLTA53/A22/CTRDY#
T9 J9 A11 S1_A23
23,26,29,30 PCI_TRDY# TRDY# TSTO1 M7 GND SLTA54/A23/CFRAME#
N8 K10 C10 S1_A24
23,26,29,30 PCI_STOP# STOP# TSTO0 GND SLTA55/A24/CAD17
P8 T16 A10 S1_A25
23,26,29,30 PCI_PAR PAR GND SLTA56/A25/CAD19
C1 J10
DBGRX GND
DEBUG
N10 H10 C7 S1_BVD1

23,26,29,30 PCI_C/BE#0 S1_BVD1 28
PC CARD PULL-UP
PORT
P10 C/BE#0 C2 H12 GND SLTA63/BVD1/CSTSCHG A7 S1_BVD2

23,26,29,30 PCI_C/BE#1 R10 C/BE#1 DBGTX H9 GND SLTA62/BVD2/CAUDIO G14 S1_CD1# S1_BVD2 28
23,26,29,30 PCI_C/BE#2
T10 C/BE#2 GND SLTA36/CD#1/CCD#1 S1_CD1# 28
23,26,29,30 PCI_C/BE#3 C/BE#3 SCDAT
F2 SCDAT G10
A16 GND SLTA67/CD#2/CCD#2
G16
A12
S1_CD2#
S1_RDY# S1_CD2# 28 REQUIREMENT
GND SLTA16/BSY#/CINT# S1_RDY# 28
M8 F4 E11 E9 S1_WAIT#
16,23
23
PCI_PIRQA#
PCI_PIRQB# M9 INTA# SCCD# G9 GND SLTA59/WAIT#/CSERR# D5 S1_WP S1_WAIT#28
S1_WP 28
BASE ON
M10 INTB# G4 G8 GND SLTA33/WP#/CCLKRUN# A8 S1_INPACK#
S MARTCARD
23
23
PCI_PIRQC#
PCI_PIRQD# M11 INTC#
INTD#
SCRST# H8 GND
GND
SLTA60/INPACK#/CREQ# S1_INPACK# 28 16-BIT PC-CARD
G5 G7 D16
23,26,29,30 PCI_SERR# R8
SCCLK
H5
E5
A1
GND
GND
SLTA7/CE#1/CCBE#0
SLTA42/CE#2/CAD10
E12
C12
S1_CE1# 28
S1_CE2# 28 STANDARD R7
I/F
23,26,29,30 PCI_PERR# SERR# SCVPEN F3 GND SLTA15/WE#/CGNT# S1_WE# 28

PCI_AD20 1 R69 2
M12
PERR# SCV3EN F1
SCV3EN
SCV5EN SLTA44/IORD#/CAD13
C15
A15
S1_IORD# 28 ELECTRICAL SPECIFICATION
SCV5EN SLTA45/IOWR#/CAD15 S1_IOWR# 28
100_0402_5% R15 D13
*** S1_OE# 28
PCI_AD21 1 R635 2 100_0402_5% T14 IDSELFL A3 J5 SLTA9/OE#/CAD11 G13 S1_VS1
SD_DAT3 28
T15 IDSELVI
PCI_AD22 1 SDCD3 B3 NC SLTA43/VS1/CVS1 S1_VS2 S1_VS1 28
2 SD_DAT2 28 K5 G15
IDSELSD SDCD2 C5 NC SLTA57/VS2/CVS2 S1_VS2 28
NC
R71 @100_0402_5% M5 C8
SDCD1 A4 SD_DAT1 28 NC SLTA61/REG#/CCBE#3 S1_REG# 28
K12 B9 S1_RST
23 PCI_GNT#2 SD_DAT0 28
H13 GNT#
PCIRST# SDCD0 SLTA58/RESET/CRST# S1_RST 28
10,16,22,23,26,29,30,33,34,37 PCIRST# PCIRST# C4 T7L65XB_BGA256
SDCMD SD_CMD 28
B K1 B
SD CARD
15 CLK_PCI_CB PCICLK
INPUT
CLOCK
1 2 A5
SDWP B5 SD_WP 28
R443 @10_0402_5% B2 MMC_DET#28
I/F
C611 @10P_0402_50V8K B1 CK48M SDCD#

R2 CK14M D4
24 SUSCLK CK32K SDCKSL R448 22_0402_5%
T3
R1 ECSMI
B4
SDCLK A2
SD_CLK1 1 2 SD_CLK 28 UNUSED PIN +3VC
I/F
EC/KBC
+3VC R3 KBSMI SDPWR SD_PWREN 28 PULL UP/DOWN

P3 ECBEEP#
PCIRST# 2 R77 1 PCLR# T2 ECNMI H16
PC CARD
VPEN0A 28 **
1
PCLR# VPEN0A G12
PS I/F
0_0402_5%
** VPEN1A H14 VPEN1A 28 R73 R101 R113 R93
VC3ENA H15 VC3ENA 28
SUSPEND# L1 @100K_0402_5%
SUSPEND# VC5ENA VC5ENA 28
L2
SYSGSPK 100K_0402_5% 100K_0402_5% 100K_0402_5%
K2
M1 PSBEEP# TOPICREG
2
PNL0
S YSTEM I/F
+3VS 1 R105 2 M2 GPSTSO#

@10K_0402_5% PNL1 BIOSWP#
N1
N2 PNL2 FDVCE#
**
7,24,40 SYS_PWROK 1 R610 2 P2 PNL3
0_0402_5% P1 VGAMOD H1 HDSTP
EXSMI# FCMOD CPUSTP# H2 HDSTS
L4
L3 EXSMI# VRCHG# QSWON
26,29,30,37 PCM_PME# PME#
M3 G2 SCDAT
32 PCM_SPK#
CNT I/F
AUDIO GCPSTP# E4 SCV5EN

K4
DEEPER
ALARM DPSLP G3
SLEEP
M4 SCV3EN
GPSTSO# N3 ATBEEP DPRSVR
GPSTSO#
1
1
R88
R115 R120 R119 R111 R96 100K_0402_5%
T7L65XB_BGA256 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%
2
2
A A
+3VALW +3VALW
14
14
U55E U55F R609

R608
P
2 1 11 10 13 12 1 2 PCLR#
+3VC I O I O
@1K_0402_5% @0_0402_5%
G
2 1 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 Title

CardBus Controller<T7L65XB>
7
C785 @0.1U_0402_10V6K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,. ANINC
D CONTAINS CONFIDSize
ENTIAL Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OFC THE
OMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
HE IN
T FORMATION IT CONTAINS LA-1911
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT
COOF
MPAL ELECTRONICS, INC. Date: Friday, August 08, 2003 Sheet 27 of 57
5 4 3 2 1
PCMCIA POWER CTRL.
CARDBUS SOCKET +5V +3V
U10
C206 27 2 W = 40mils
AVCC3IN AVCCOUT +S1_VCC
0.1U_0402_16V4Z 26
C228 1 Slot A AVCCOUT 28
0.1U_0402_16V4Z AVCC5IN AVCCOUT
3
C188 AVCC5IN Power 24 +S1_VPP
0.1U_0402_16V4Z 23 Supply AVPPOUT
C236 AVPPIN
0.1U_0402_16V4Z VC3ENA 6
27 VC3ENA AVCC3_EN
C226 VC5ENA 5
27 VC5ENA AVCC5_EN
0.1U_0402_16V4Z VPEN0A 7 11
C245 27 VPEN0A VPEN1A AEN0 NC0
8 25
27 VPEN1A AEN1 NC1
0.1U_0402_16V4Z
+3V 13 12
BVCC3IN BVCCOUT W = 40mils
14 +SD3_VCC
15 BVCCOUT 16
S1_A[0..25] BVCC5IN Slot B BVCCOUT
+5V 17
27 S1_A[0..25] BVCC5IN Power C181
10
S1_D[0..15] 9 Supply BVPPOUT 4.7U_0805_10V4Z
27 S1_D[0..15] BVPPIN
SD_PWREN 20
27 SD_PWREN BVCC3_EN
19
BVCC5_EN
21 4
BEN0 GND
+3V 22 18
BEN1 GND
MIC2563A-0BSM_SSOP28
JP26
1 2
S1_D3 3 1 2 4 S1_CD1#
S1_D4 3 4 S1_D11 S1_CD1# 27
5 6
S1_D5 5 6 S1_D12
7 8
S1_D6 7 8 S1_D13
9 10
S1_D7 9 10 S1_D14
11 12
S1_CE1# 13 11 12 14 S1_D15
27 S1_CE1# S1_A10 13 14 S1_CE2#
15 16
15 16 S1_CE2# 27
S1_OE# 17 18 S1_VS1
27 S1_OE# 17 18 S1_VS1 27
S1_A11 19 20 S1_IORD# S1_IORD# 27
S1_A9 21 19
21
20
22
22 S1_IOWR#
S1_IOWR# 27 SD SOCKET POWER SWITCH
S1_A8
S1_A13
23
25 23 24
24
26
S1_A17
S1_A18 PIN PULL DOWN
S1_A14 27 25 26 28 S1_A19 **
S1_WE# 27 28 S1_A20 C797 0.1U_0402_16V4Z
27 S1_WE# 29 30
27 S1_RDY#
S1_RDY# 31 29 30 32 S1_A21 1 2 **
33 31 32 34 +SD3_VCC +3VC
+S1_VCC 33 34 +S1_VCC
35 36 C798 0.1U_0402_16V4Z
+S1_VPP 35 36 +S1_VPP
S1_A16 37 38 S1_A22 1 2
S1_A15 37 38 S1_A23
39 40
S1_A12 39 40 S1_A24 C799 1U_0603_10V4Z
41 42
8
7
6
5
1
S1_A7 43 41 42 44 S1_A25 1 2 RP110
S1_A6 43 44 S1_VS2 R500 R461 R217
45 46
45 46 S1_VS2 27
S1_A5 47 48 S1_RST 10K_0402_5% @10K_0402_5% 10K_0402_5%
47 48 S1_RST 27
S1_A4 49 50 S1_WAIT# 10K_0804_8P4R_5%
49 50 S1_WAIT# 27
S1_A3 51 52 S1_INPACK#
51 52 S1_INPACK# 27
S1_A2 53 54 S1_REG#
1
2
3
4
2
S1_A1 53 54 S1_BVD2 S1_REG# 27 RP25
55 56
55 56 S1_BVD2 27 JP3
S1_A0 57 58 S1_BVD1
57 58 S1_BVD1 27
S1_D0 59 60 S1_D8 11 10 VC3ENA 1 8
59 60 27 SD_WP Wr_Pt Wr_Pt_Vss
S1_D1 61 62 S1_D9 12 VC5ENA 2 7
S1_D2 63 61 62 64 S1_D10 8 VSS VPEN0A 3 6
63 64 27 SD_DAT1 DAT1
S1_WP 65 66 S1_CD2# 7 VPEN1A 4 5
27 S1_WP 65 66 S1_CD2# 27 27 SD_DAT0 DAT0
67 68 6
67 68 Vss2 47K_0804_8P4R_5%
69 70 27 SD_CLK 5
GND GND SDCLK
71 72 4
73 GND GND 74 3 Vdd SD_PWREN 1 R147 2
GND GND Vss1 47K_0402_5%
75 76 2
GND GND 27 SD_CMD CMD
77 78 1
GND GND 27 SD_DAT3 DAT3
79 80
GND GND
81 82 27 SD_DAT2 9 13
83 GND GND 84 DAT2 MMC_DET#
GND GND SD_SOCKET
27 MMC_DET#
FOXCONN_1CA415M1-TA_68P
R517 C707
1 2 1 2
@15_0402_5% @15P_0402_50V8J
SLOT 1 VCC DECOUPLING SLOT 1 VPP DECOUPLING +3V DECOUPLING

+S1_VCC **
+3VC +3VC
0.1U_0402_16V4Z 0.01U_0402_16V7K 0.01U_0402_16V7K 0.01U_0402_16V7K 0.01U_0402_16V7K

C293 C199 C297 1 1 1 1 1 1 1 1 1 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z +S1_VPP C592 C610 C602 C597 C599 C613 C615
C104 C601 C609 C596
W =30mils 2 2 2 2 2 2 2 2 2 2
C307 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K 0.01U_0402_16V7K 0.01U_0402_16V7K

C180
0.01U_0402_25V4Z 1U_0805_25V4Z
+S1_VCC
0.1U_0402_16V4Z
C259 C308 C195 C203

Title
C265
4.7U_0805_10V4Z 1000P_0402_50V7K PCMCIA/SD SOCKET
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA
L Size Document Number Rev
10U_1206_10V4Z 0.1U_0402_16V4Z
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DCustom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAIN
S LA-1911
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
. INC Date: Friday, August 08, 2003 Sheet 28 of 57
+3V
C779 0.1U_0402_16V4Z
PCI_AD[0..31] PCI_AD[0..31] 23,26,27,30
U54
5
37 WL_OFF# 1
4
2
37,39 KILL_SW# MINI_PCI SOCKET
TC7SH08FU_SSOP5
3
JP24
TIP 1 2 RING
1 2
KEY KEY
3 4
LAN RESERVED 5 3 4 6
5 6
7 8
D38 9 7 8 10 LAN RESERVED
RB751V_SOD323 9 10
11 12
1 2 13 11 12 14
+3VS_MINIPCI 13 14
15 16
L20 PCI_PIRQH# 17 15 16 18 W=30mils +5VS_MINIPCI
1 2 W=40mils 23 PCI_PIRQH# 19
17 18
20 PCI_PIRQG#
+3V 21 19 20 22 PCI_PIRQG# 23
0_0603_5% 21 22 W=40mils +3VS_MINIPCI
23 24 +3V
CLK_PCI_MINI 25 23 24 26 PCIRST# L21
15 CLK_PCI_MINI 25 26 PCIRST# 10,16,22,23,26,27,30,33,34,37
27 28 W=40mils 1 2
29 27 28 30 +3V
23 PCI_REQ#1 29 30 PCI_GNT#1 23
31 32 0_0603_5%
PCI_AD31 33 31 32 34
PCI_AD29 33 34 WLANPME # 26,27,30,37
35 36
37 35 36 38 PCI_AD30
PCI_AD27 37 38
39 40
PCI_AD25 41 39 40 42 PCI_AD28
41 42 PCI_AD26
43 44
45 43 44 46 PCI_AD24
23,26,27,30 PCI_C/BE#3 45 46
PCI_AD23 47 48 MINI_IDSEL 1 2 PCI_AD18
49 47 48 50 R192 100_0402_5% IDSEL : PCI_AD18
PCI_AD21 49 50 PCI_AD22
51 52
PCI_AD19 53 51 52 54 PCI_AD20
53 54
55 56 PCI_PAR 23,26,27,30
PCI_AD17 57 55 56 58 PCI_AD18
57 58 PCI_AD16
23,26,27,30 PCI_C/BE#2 59 60
61 59 60 62
23,26,27,30 PCI_IRDY# 61 62
63 64 PCI_FRAME# 23,26,27,30
65 63 64 66
24,26,27,30,34,37 PM_CLKRUN# 65 66 PCI_TRDY# 23,26,27,30
67 68 PCI_STOP# 23,26,27,30 +5VS_MINIPCI
23,26,27,30 PCI_SERR# 69 67 68 70
69 70
23,26,27,30 PCI_PERR# 71 72 PCI_DEVSEL# 23,26,27,30 1
71 72 74
2
73 C143 C184 C321
23,26,27,30 PCI_C/BE#1 PCI_AD14 73 74 PCI_AD15 C328
75 76
77 75 76 78 PCI_AD13 1000P_0402_50V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_1206_10V4Z
PCI_AD12 77 78 PCI_AD11 2
79 80
1
PCI_AD10 81 79 80 82
81 82 PCI_AD9
83 84
PCI_AD8 85 83 84 86
CLK_PCI_MINI PCI_AD7 85 86 PCI_C/BE#0 23,26,27,30
87 88
89 87 88 90 PCI_AD6
89 90
1
PCI_AD5 91 92 PCI_AD4
91 92 94 +3VS_MINIPCI
R520 93 PCI_AD2
@33_0402_5% PCI_AD3 93 94 PCI_AD0
95 96 1
95 96 98
2
+5VS_MINIPCI W=30mils 97 C209 C250 C299 C251 C280
PCI_AD1 97 98 C288
99 100
101 99 100 102 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_1206_10V4Z
2
101 102 2
103 104
1
1
103 104 106
1
105
C711 105 106
107 108
@10P_0402_50V8K 109 107 108 110
109 110
111 112
2
113 111 112 114

113 114
115 116
117 115 116 118
117 118
119 120
121 119 120 122
121 122
+5VS 1 2 W=30mils 123 124 W=20mils
+3V
L14 0_0603_5% 123 124
2
KEYLINK_5305-4-211
0603 C153
+5VS_MINIPCI 0.1U_0402_16V4Z
1

Title
MINI_PCI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOFR&D B LA-1911 0.2
A B C D E
+3VS
+3VS
1 2
R385 4.7K_0402_5%
1 2 C519 C520 C544 C554 C565 C77 C79 C585
R386 10K_0402_5%
+3VS 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
R384 4.7K_0402_5%
1 2
R427 4.7K_0402_5%
1 2 1 1
R429 4.7K_0402_5% +3VS
PCI_AD[0..31] U36
20
35
48
62
78
87
86
96
10
11
23,26,27,29 PCI_AD[0..31]
C584 C62 C84 C82 C58
TEST17
TEST16
CNA
CYCLEIN
CYCLEOUT/CARDBUS
VDDP
VDDP
VDDP
VDDP
VDDP
15
PCI_AD0 84 DVDD 27 +3VS 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K
PCI_AD1 PCI_AD0 DVDD
82 39
PCI_AD2 81 PCI_AD1 DVDD 51
PCI_AD3 PCI_AD2 DVDD
80 59
PCI_AD4 79 PCI_AD3 DVDD 72
PCI_AD5 PCI_AD4 DVDD L7
77 88
PCI_AD6 76 PCI_AD5 DVDD 100 BLM21A601SPT_0805
PCI_AD7 PCI_AD6 DVDD 1394_PLLVDD 0.01U_0402_25V4Z
74 7 1 2
PCI_AD8 71 PCI_AD7 PLLVDD 1 +3VS
PCI_AD9
PCI_AD10
70
69
PCI_AD8
PCI_AD9 TSB43AB21 AVDD
AVDD
2
107
C582 C108
PCI_AD11
PCI_AD12
67
66
PCI_AD10
PCI_AD11 /(TSB43AB22) AVDD
AVDD
108
120
4.7U_0805_10V4Z
PCI_AD13 PCI_AD12 AVDD

65
PCI_AD14 63 PCI_AD13
PCI_AD14 PCI BUS INTERFACE
PCI_AD15 61 106 1 2
PCI_AD16 46 PCI_AD15 CPS R403 1K_0402_5%
PCI_AD17 PCI_AD16
45
PCI_AD18 43 PCI_AD17 125
PCI_AD19 PCI_AD18 NC/(TPBIAS1)
42 124
PCI_AD20 41 PCI_AD19 NC/(TPA1+) 123
PCI_AD21 PCI_AD20 NC/(TPA1-)
40 122
2 PCI_AD22 38 PCI_AD21 NC/(TPB1+) 121 2
PCI_AD23 PCI_AD22 NC/(TPB1-)
37
PCI_AD24 32 PCI_AD23 118 R68 6.34K_0603_1%
PCI_AD24 BIAS CURRENT R0
PCI_AD25 31
PCI_AD26 29 PCI_AD25
IDSEL:PCI_AD16 PCI_AD27 PCI_AD26
28
PCI_AD28 26 PCI_AD27 C588 22P_0402_50V8J
PCI_AD16 PCI_AD28
1 2 1394_IDSEL PCI_AD29 25 119
PCI_AD29 R1
2
R416 100_0402_5% PCI_AD30 24
PCI_AD31 PCI_AD30 X5
22 OSCILLATOR 6
PCI_C/BE#3 34 PCI_AD31 X0 24.576MHz_16P_3XG-24576-43E1
23,26,27,29 PCI_C/BE#3 PCI_C/BE3
PCI_C/BE#2 47
23,26,27,29 PCI_C/BE#2 PCI_C/BE2
PCI_C/BE#1 60
1
23,26,27,29 PCI_C/BE#1 PCI_C/BE1
PCI_C/BE#0 73 5 C587 22P_0402_50V8J
23,26,27,29 PCI_C/BE#0 PCI_C/BE0 X1
15 CLK_PCI_1394 CLK_PCI_1394 16
PCI_GNT#0 PCI_CLK
23 PCI_GNT#0 18
PCI_REQ#0 19 PCI_GNT 3 C81
23 PCI_REQ#0 PCI_REQ FILTER FILTER0
1394_IDSEL 36
PCI_FRAME# 49 PCI_IDSEL 4 0.1U_0402_16V4Z
23,26,27,29 PCI_FRAME# PCI_FRAME FILTER1
PCI_IRDY# 50
23,26,27,29 PCI_IRDY# PCI_IRDY
23,26,27,29 PCI_TRDY# PCI_TRDY# 52 92 1 2
PCI_DEVSEL# PCI_TRDY EEPROM 2 WIRE BUS SDA R45 220_0402_5%
23,26,27,29 PCI_DEVSEL# 53
PCI_STOP # 54 PCI_DEVSEL 91 1 2
23,26,27,29 PCI_STOP # PCI_STOP SCL 220_0402_5% 1
PCI_PERR# 56 R44 C579
23,26,27,29 PCI_PERR# PCI_PERR
23 PCI_PIRQE# PCI_PIRQE# 13 POWER CLASS 99 R422 R420
1394_PME # PCI_INTA/CINT PC0 0.33U_0603_16V4Z
26,27,29,37 1394_PME # 21 98 56.2_0603_1% 56.2_0603_1%
PCI_SERR# 57 PCI_PME/CSTSCHG PC1 97 2
23,26,27,29 PCI_SERR# PCI_SERR PC2
PCI_PAR 58 JP20
23,26,27,29 PCI_PAR PCI_PAR
24,26,27,29,34,37 PM_CLKRUN# 12 116 TPBIAS0
3
PCIRST# PCI_CLKRUN PHY PORT 1 TPBIAS0 TPA0+ 3
10,16,22,23,26,27,29,33,34,37 PCIRST# 85 115 4
PCI_RST TPA0+ 114 TPA0- 3 4
TPA0- TPB0+ 3
113 2
TPB0 + 112 TPB0- 1 2
TPB0 - 1
FOX_UV31413-T 1_4P
94 R415 R411
TEST9 95
TEST8 56.2_0603_1% 56.2_0603_1%
14
G_RST 101
CLK_PCI_1394 TEST3
89 102
PLLGND1
REG_EN
90 GPIO3 TEST2 104

REG18
REG18
GPIO2 TEST1
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
1
105
R428 TEST0 C543
@10_0402_5% R407
2
220P_0402_50V8K 5.11K_0603_1%
109
110
111
117
126
127
128
103
17
23
30
33
44
55
64
68
75
83
93
R42 R43 TSB43AB21_PQFP128

8
9
220_0402_5% 220_0402_5%
2
C583
@10P_0402_50V8K
1
C586 C509
0.1U_0402_16V4Z 0.1U_0402_16V4Z
4 4

Title
1394 Interface
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
B LA-1911 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
A B C D E
5 4 3 2 1
+5VALWP B+ +5VALWP
DIRECT PLAY PATH +5VALWP TO +5VLDO
POWER ON PATH
+5VALWP C802 +5VALWP
1U_0603_10V6K
5
6
7
8
INT_CD_L
14
14
R617 *** *** R136 R459
D
D
D
D
2 1 AC97_L 1 2 AMP_LEFT 2 1 11 10 AMP_LEFT 10K_0402_5% 10K_0402_5% ***
+5VAMP +5VAMP AMP_LEFT 32
SI4800DY_SO8
1
1M_0402_5% U57A R618 U57B
G
13
12
S
S
S
R619 74HCT4066 1M_0402_5% R620 74HCT4066 U59
2
1M_0402_5% 1M_0402_5%
4
3
2
1
+5VLDO
1
2N7002_SOT23 1
1U_0805_25V4Z
C807 (4.5V)
D
Q14
1
D C803 D
+5VALWP 1U_0603_10V6K +5VALWP LM431SC_SOT23 R456
S
INT_CD_R
3.9K_0603_1%
14
14
R621 2
3
2 1 AC97_R 4 3 AMP_RIGHT 2 1 8 9 AMP_RIGHT K
2
+5VAMP +5VAMP AMP_RIGHT 32
1
2N7002_SOT23 1
1
1M_0402_5% R623 U57C R622 R624 U57D A
D
1M_0402_5% 74HCT4066 1M_0402_5% 1M_0402_5% 74HCT4066 Q41 3
6
R
1
D51 R455
S
2
2
4.99K_0603_1%
R634 0_0402_5% CD_PLAY
3
33,37 CD_PLAY
SUSP# 1 2
2
33,37,38,43,49,51 SUSP# 19,43,50 SUSP
L62 +5VLDO DECOUPLING

+5VAMP 1 2 +5VLDO (4.5V) +5VALWP DECOUPLING
@CHB2012U170_0805
+AVDD_AC97
22U_1206_10V4Z
AC97 Codec **
4.7U_0805_10V4Z
4.7U_0805_10V4Z
150U_D2_6.3VM
L12 +5VALWP
+3VS
1
1 2 1 1 1
+VDDA + C589 C97 C102 C115
CHB2012U170_0805 C654 C252
0.1U_0402_16V4Z 10U_1206_10V4Z 2 2 2
2
C687 C282
22U_1206_10V4 Z
1U_0603_10V4Z
1U_0603_10V4Z
22U_1206_10V4Z
0.1U_0402_16V4Z 10U_1206_10V4Z U44 +5VLDO (4.5V)
25
38
1 1 1 1
9
C635 C633
C C696 @1000P_0402_50V7K C634 C636 C
DVDD1
DVDD2
AVDD1
AVDD2
0.1U_0402_10V6K
0.1U_0402_10V6K
C695 @1000P_0402_50V7K 2 2 2 2
1U_0603_10V4Z
1U_0603_10V4Z
14 35 LINEL C702 1U_0603_10V6K AC97_L
+5VALWP TO +5VLDO AUX_L LINE_OUT_L 1
C173
1
C179
1
C99
1
C106
L11 15 36 LINER C703 1U_0603_10V6K AC97_R
1 2 AUX_R LINE_OUT_R
+5VLDO
CHB2012U170_0805
+5VAMP
16 37 **** 2 2 2 2
VIDEO_L MONO_OUT
L10 17 39
1 2 VIDEO_R TRUE_LOUT_L
CHB2012U170_0805 LINEIN_L 23 41 1 2
LINE_IN_L TRUE_LOUT_R C238 15P_0402_50V8J
LINEIN_R 24
LINE_IN_R 6 1 2 Audio Signal Bias Circuit DGND To AGND Bypass
BIT_CLK ICH_AC_BITCLK 24,36
1 2 CD_L 18 R177 22_0402_5% 1 2
32 MIC
R212 0_0402_5% CD_L 8 1 2 R173 @10K_0402_5% 2 1 Remove Bypass R
CD_R 20 SDATA_IN R178 22_0402_5%
ICH_AC_SDIN0 24
R225 6.8K_0402_5% **
CD_R 2 2 1
2
@0.01U_0402_25V4Z CD_GNA 19 XTL_IN R228 6.8K_0402_5%
C646 C262 1U_0603_10V6K CD_GND R162 2 1 LINEIN_L
32 LINE_IN_L
C_MIC 21 X6 R226 6.8K_0402_5% C303 1U_0603_10V6K
2 R477 1 C284 1U_0603_10V6K MIC1 @1M_0402_5% 24.576MHz_16P_3XG-24576-43E1 2 1 LINEIN_R
32 LINE_IN_R
10K_0402_5% 22 3 1 2 1 R227 6.8K_0402_5% C304 1U_0603_10V6K
R474 MIC2 XTL_OUT C653 2 1 CD_L
1
***
1 2 C_MD_SPK 13 29 C306 1000P_0402_50V7K
1
C652
33 INT_CD_L
R513 20K_0402_1% C692 1U_0603_10V6K
36 MD_SPK
0_0402_5% C658 1U_0603_10V6K PHONE AFILT1 22P_0402_25V8K 2 1 CD_R
DGND AGND
2 33 INT_CD_R
1 12 30 C694 1000P_0402_50V7K 22P_0402_25V8K R514 20K_0402_1% C693 1U_0603_10V6K
32 MONO_IN PC_BEEP AFILT2 2
C781 2 1
0.1U_0402_10V6K 28 1 2 R515 6.8K_0402_5%
VREFOUT +AUD_VREF
2 1 11 R210 0_0402_5% 2 1
2 24,36 ICH_AC_RST# RESET#
R476 100_0402_5% 27 R512 6.8K_0402_5%
10 VREF
24,36 ICH_AC_SYNC SYNC 32
5 VRDA
24,36 ICH_AC_SDOUT SDATA_OUT
B 45 31 B
46 NC VRAD 33 1 2 CD_AGND To CD_GNA Bypass Analog Reference V
XTLSEL DCVOL 34 R209 @0_0402_5% +AUD_VREF
47 VAUX 43
+AVDD_AC97
****
32 EAPD EAPD GPIO0 44 1 R195 2
48 GPIO1 C314 C689 C705 C688 C700 2 1 CD_GNA ****
0.1U_0402_16V4Z
SPDIFO 40 @0_0603_5% 33 C D _ A G N D R186
1U_0603_10V6K
NC
2
4 26 AGND 20K_0402_1%
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
0.01U_0402_25V4Z
0.1U_0402_16V4Z
DVSS1 AVSS1
1
7 42 C291 C317
R188 DVSS2 AVSS2 R187 R184
@0_0402_5% 6.8K_0402_5%
0_0402_5%
ALC202_E_LQFP48
1
DGND AGND
2
PROPRIETARY NOTE
AdjustableOutput
+5VALWP
U61
4 5 +VDDA
VIN VOUT +VDDA
2
C809 C810 2 6
4.7U_0805_10V4Z 0.1U_0402_16V4Z DELAY SENSE R637 C811
7 1 69.8K_0603_1% 4.7U_0805_10V4Z
ERROR CNOISE
A SUSP# 8 3 A
ON/OFF# GND
1
SI9182DH-AD_MSOP8 C812
0.1U_0402_16V4Z
2
R638
24K _0402_1%
1

Title
AC97 Codec
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom LA-1911 0.2
5 4 3 2 1
A B C D E
+5VAMP Left Speaker Connector

Audio Amplifier
1
R553 D62 D61
100K_0402_5% @V-PORT-0603-220 M-V05_0603 @V-PORT-0603-220 M-V05_0603
+5VAMP Q52
SHUTDOWN# 2N7002_SOT 23
2
W=40Mil L58 FBM-11-160808-121-T_0603 JP11
1
D R629 0_0402_5% INTSPK_L1 1 2
2
2 1 2 INTSPK_L2 1 2 1
EAPD 31 2
1
4 C721 G L59 FBM-11-160808-121-T_0603 4
C337 +5VAMP S MOLEX_53398-0290
0.1U_0402_16V4Z 4.7U_0805_10V4Z
3
2
1
R230 *** Right Speaker Connector
100K_0402_5% R633 L60 FBM-11-160808-121-T_0603 JP10
U48 10K_0402_5% INTSPK_R1 1 2
INTSPK_R2 1
7 22 1 2
18 PVDD SHUTDOWN# 15 NBA_PLUG L61 FBM-11-160808-121-T_0603 2
2
PVDD SE/BTL# C804 0.1U_0402_16V4Z MOLEX_53398-0290
19 14
VDD PC-BEEP
1
11 D58 D57
NBA_PLUG BYPASS INTSPK_L2
2 9
VOL_AMP 3 PC-ENABLE LOUT- 16 INTSPK_R2
38 VOL_AMP VOLUME ROUT-
INTSPK_L1 4 10
0.47U_0603_16V4Z INTSPK_R1 21 LOUT+ LIN 8 @V-PORT-0603-220 M-V05_0603 @V-PORT-0603-220 M-V05_0603
AMP_LEFT C326 1 ROUT+ RIN
2 1 2 C744 5
31 AMP_LEFT 1U_0603_10V6K 23 LLINEIN 1
2
AMP_RIGHT RLINEIN GND
1 2 1 2 C332 6 12
31 AMP_RIGHT C325 1U_0603_10V6K 20 LHPIN GND 13
0.47U_0603_16V4Z RHPIN GND
24
GND
2
0.47U_0603_16V4Z 17 C339 C335 C340
AMP_LEFT C327 1 2 HP_L CLK LINE IN JACK
0.47U_0603_16V4Z
JP28
0.47U_0603_16V4Z
0.47U_0603_16V4Z
TPA0232
AMP_RIGHT C323 1 2 HP_R 5
1
0.47U_0603_16V4Z C805
1
C714 0.047U_0402_16V4Z 4
1
L48
** ** 0.1U_0402_16V4Z
31 LINE_IN_R 1 2 LINE_IN_R-1 3
3 R241 FBM-11-160808-700T_0603 6 3
2
1.5K_0603_5% R238 1 2 LINE_IN_L-1 2
31 LINE_IN_L
1.5K_0603_5% L47 1
1
FBM-11-160808-700T_0603 C761 C764
2
330P_0402_50V7K 330P_0402_50V7K FOXCONN JA6033L-5S1-TR
2
f o=1/(2*3.14*R*C)=225Hz
R=1.5K / C=0.47U
HEADPHONE OUT JACK

EC Beep System Beep To AC97' Codec JP30
37 BEEP# 5
+3V +3V C392 R587 NBA_PLUG 4

38 NBA_PLUG
150U_D2_6.3VM 47_0402_5% L51
INTSPK_R1 1 2INTSPK_R1-2 1 2 INTSPK_R1-3 1 2 INTSPK_R1-4 3
+
1
FBM-11-160808-700T_0603 6
R81 1 2 INTSPK_L1 1 2INTSPK_L1-2 1 2 INTSPK_L1-3 1 2 INTSPK_L1-4 2
+
100K_0402_5% R586 L50 1
C96 C391 47_0402_5% FBM-11-160808-700T_0603
1
0.1U_0402_16V4Z 150U_D2_6.3VM
10
14
U4C R446
U39A C769 C773 FOXCONN JA6033L-5S1-TR
2
8.2K_0402_5%
SN74LVC14APWLE_T SSOP14 +AVDD_AC97 330P_0402_50V7K 330P_0402_50V7K
OE#
9 8 1 22 1 1 2 1 2
2
I O I O R97
G
2 2
1
1 C120 560_0402_5%
SN74LVC125APWLE_T SSOP14 C121 +3V POWER 1U_0603_10V6K
0.22U_0603_10V7K R117
7
+3V POWER 10K_0402_5%

2 MICROPHONE IN JACK ***
2
1 +5VAMP
1
C140 R578
1
R107 10U_1206_10V4Z @18K_0603_1%
10K_0402_5%2 +5VAMP 1 2 2 Q57
@2SC2411K-CQ_SOT23
1
1 2
2
1 2 MONO_IN R576
3
CardBus Beep C174
MONO_IN 31
@18K_0603_1% R583 C768 1 2 +AUD_VREF
1
C 1U_0603_10V6K @100K_0402_5% @1U_0603_10V4Z R582 0_0402_5%

2
1 2 1 2 2
27 PCM_SPK# R95 B Q37 R118 R581
1
C93 560_0402_5% E 2SC2411K_SOT23 2.4K_0402_5% 2.2K_0402_5%
1U_0603_10V6K R580 JP29
3
@2.2K_0402_5% 5
1
4
PCI Beep
2
+3V 3
L49 6
MIC 1 2 MIC-1 2
31 MIC 1
14
1
1
FBM-11-160808-700T_0603 C766 1
P
3 4 1 2 1 2 220P_0402_50V8K FOXCONN JA6033L-5S1-TR

24 SPKR I O R440
2
G
+3V POWER C604 560_0402_5%

1U_0603_10V6K
1
U39B
7
SN74LVC14APWLE_T SSOP14 Compal Electronics, Inc.

R438 D50 Title
10K_0402_5% RB751V_SOD323 AMP & Audio Jack
2
CustomLA-1911 0.2
A B C D E
HDD CONNECTOR C385
0.1U_0402_16V4Z
+5VS
24 IDE_PDD[0..15]
IDE_PDD[0..15] *** U60B
U60A
14
37 EC_IDERST 4
PCIRST# 1 2 PCIRST1# 1 I0 6 PIDE_RST#
** 10,16,22,23,26,27,29,30,34,37 PCIRST#
P
R602 10_0402_5% I0 O
3 5
JP9 2 O I1
23 PIDERST# I1
G
PIDE_RST#
IDE_PDD7 1 2 IDE_PDD8 74HCT08PW_TSSOP14 74HCT08PW_TSSOP14
IDE_PDD6 3 4 IDE_PDD9
7
IDE_PDD2 11 12 IDE_PDD13 R636 @0_0402_5%
17 18
IDE_PDDREQ 19 20
24 IDE_PDDREQ 21 22
24 IDE_PDIOW# IDE_PDIOW#
IDE_PDIOR# 23 24
24 IDE_PDIOR# 25 26 PCSEL 1 2
24 IDE_PDIORDY 27 28 R281 470_0402_5%
24 IDE_PDDACK# 29 30
1
23 IDE_IRQ14 IDE_IRQ14
R279 IDE_PDA1 31 32
24 IDE_PDA1 33 34
15_0402_5% 24 IDE_PDA0 IDE_PDA0 IDE_PDA2 IDE_PDA2 24
IDE_PDCS1# 35 36 IDE_PDCS3#
24 IDE_PDCS1# 37 38 IDE_PDCS3# 24
37 PHDD_LED# 39 40 PCMRST# 37
2
+5VS 41 42 +5VS
1
R280 1 2 U60C +3V POWER
13
+5VS 43 44
1
C381 R277 100K_0402_5% U4D

15_0402_5% ALLTOP_C17826-14401 PCIRST1# 9
OE#
15P_0402_50V8J I0 SIDE_RST#
8 12 11
10 O I O
2
24,42 SIDERST# I1
2
R80
1
C382 74HCT08PW_TSSOP14 SN74LVC125APWLE_T SSOP14 10K_0402_5%
15P_0402_50V8J
2
+5VCD
+5VCD
U24
24,42 IDE_SDD[0..15] IDE_SDD[0..15] +5VALWP 1 8 C370
S D C369
2 7
3 S D 6 10U_1206_10V4Z 0.1U_0402_16V4Z
S D
1 2 4 5
JP27 +5VALWP R276 240K_0402_5% G D
INT_CD_L INT_CD_R SI4425DY-T1_SO8
31 INT_CD_L 1 2 INT_CD_R 31 C390
31 CD_AGND CD_AGND
SIDE_RST# 3 4 IDE_SDD8 R278 10K_0402_5%
IDE_SDD7 5 6 IDE_SDD9
7 8
1
IDE_SDD6 IDE_SDD10
IDE_SDD5 9 10 IDE_SDD11 1U_0805_25V4Z
IDE_SDD2 15 16 IDE_SDD14 SUSP# 22K 22K CD_PLAY
2 2
IDE_SDD1 17 18 IDE_SDD15 31,37,38,43,49,51 SUSP# CD_PLAY 31,37
19 20 22K 22K
IDE_SDD0 IDE_SDDREQ
21 22 IDE_SDDREQ 24,42
IDE_SDIOR# IDE_SDIOR# 24,42
IDE_SDIOW# 23 24 Q26 Q25
24,42 IDE_SDIOW# 25 26 IDE_SDDACK# @DTC124EK_SOT23 DTC124EK_SOT23
3
24,42 IDE_SDIORDY 27 28 IDE_SDDACK# 24,42
IDE_IRQ15
23,42 IDE_IRQ15 29 30
24,42 IDE_SDA1 IDE_SDA1 1 2 +5VCD
IDE_SDA0 31 32 R270 100K_0402_5%
24,42 IDE_SDA0 33 34 IDE_SDA2 24,42
24,42 IDE_SDCS1# IDE_SDCS1# IDE_SDCS3# IDE_SDCS3# 24,42
SHDD_LED# 35 36
37 SHDD_LED# 37 38
39 40 +5VCD
+5VCD 41 42 Placea caps. near HDD
+5VCD 1 2 SHDD_LED# 1 2 +5VCD
R268 100K_0402_5% 43 44 C367 0.1U_0402_10V6K +5VS CONN.
45 46
47 48
49 50
2
R269 ALLTOP_C12424-25001 C383 C388 C389 C387 C384
470_0402_5% 1000P_0402_50V7K 10U_1206_10V4Z 10U_1206_10V4Z 1U_0805_25V4Z 0.1U_0402_16V4Z

1
+5VCD +5VALWP
W=80mils
1 2
2
C758 C759 C365 C363 C376
C372
1000P_0402_50V7K 4.7U_0805_10V4Z 1U_0805_25V4Z 0.1U_0402_16V4Z 10U_1206_10V4Z 1U_0805_25V4Z
2 1
1
Place component's closely MODULE CONNECTOR.

Title
IDE/ FDD MODULECONN.
A B C D E
SUPER I/O SMsC FDC47N227
+3VS
1 1
1
R267
10K_0402_5%
24,37 LPC_AD[0..3] LPC_AD[0..3] LPD[0..7] LPD[0..7] 36

U21
2
LPC_AD0 20 68 LPD0 CLK_PCI_SIO CLK_14M_SIO
LPC_AD1 LAD0 PD0/INDEX# LPD1
21 69
LAD1 PD1/TRK0
2
LPC_AD2 22 70 LPD2
LPC_AD3 LAD2 PD2/WRTPRT# LPD3 R262 R274
23 71
LAD3 PD3/RDATA# 72 LPD4 @33_0402_5% @10_0402_5%
PD4/DSKCHG# LPD5
24,37 LPC_FRAME# 24 73
25 LFRAME# PD5 74 LPD6
24 LPC_DRQ1# LDRQ# PD6/MTR0#
75 LPD7 1 C366
11
1 2 26 PD7 @22P_0402_25V8K
10,16,22,23,26,27,29,30,33,37 PCIRST# PCIRST#
R603 10_0402_5% 27 79 LPTBUSY C375
LPCPD# BUSY/MTR1# 78 LPTPE LPTBUSY 36 @15P_0402_50V8J
R251 2 PE/WDATA# LPTPE 36 2
1 10K_0402_5% 50 77 LPTSLCT
2
+3VS R275 2 1 10K_0402_5% 17 GPIO12/IO_SMI# SLCT/WGATE# 81 LPTERR# LPTSLCT 36
IO_PME# ERROR#/HDSEL# LPTACK# LPTERR# 36
23,27,37 SERIRQ 30 80
28 SIRQ ACK#/DS1# 66 LPTACK# 36
24,26,27,29,30,37 PM_CLKRUN# CLKRUN# INIT#/DIR# INIT# 36
CLK_PCI_SIO 29 82
15 CLK_PCI_SIO PCICLK AUTOFD#/DRVDEN0# LPTAFD# 36
83 LPTSTB# 36 +3VS +3VS
CLK_14M_SIO STROBE#/DS0#
19 67 SLCTIN# 36 RP65 RP66
15 CLK_14M_SIO CLK14 SLCTIN#/STEP# DSR#1 8 1 CTS#2 1 8
PID0 48 100 CTS#1 7 2 DSR#2 2 7
PID1 54 GPIO10 DTR2# 99 CTS#2 RI#1 6 3 DCD#2 3 6
PID[0..3] PID2 GPIO15 CTS2# DCD#1 RI#2
22 PID[0..3] 55 98 5 4 4 5
2 PID3 56 GPIO16 RTS2# 97 DSR#2 2
GPIO17 DSR2# 4.7K_8P4R_1206_5%
57 96 4.7K_8P4R_1206_5%
36 BT_DET# 58 GPIO20 TXD2 95 1 2
GPIO21 RXD2 DCD#2 R271 1K_0402_5%
+3VS 1 2 59 94
R244 10K_0402_5% 6 GPIO22 DCD2# 92 RI#2
GPIO24 RI2#
32
33 GPIO30 89 DTR#1 +5V
GPIO31 DTR1# CTS#1 IRRX 1
34 88 2
35 GPIO32 CTS1# 87 RTS#1 R249
35 FIR_EN# GPIO33 RTS1# JP25
36 86 DSR#1 10K_0402_5%
1 2 37 GPIO34 DSR1# 85 TXD1 1
+3VS GPIO35 TXD1 1
R243 10K_0402_5% 38 84 RXD1 1 2 2
39 GPIO36 RXD1 91 DCD#1 R255 1K_0402_5% RP68 +5VS
RXD1 3 2
GPIO37 DCD1# RI#1 TXD1 3
40 90 4
41 GPIO40 RI1# RDATA# 1 8 DSR#1 5 4
GPIO41 WP# RTS#1 5
42 63 IRMODE 35 2 7 6
43 GPIO42 IRMODE/IRRX3 61 IRRX TRACK0# 3 6 CTS#1 7 6
GPIO43 IRRX2 IRRX 35 7
44 62 INDEX# 4 5 DTR#1 8
GPIO44 IRTX2 IRTXOUT 35 8
45 RI#1 9
GPIO45 RDATA# 1K_8P4R_1206_5% DCD#1 9
46 16 10
47 GPIO46 RDATA# 10 WDATA# 10
GPIO47 WDATA# WGATE#
11
2 1 51 WGATE# 12 HDSEL# @96212-1011S
R247 10K_0402_5% GPIO13/IRQIN1 HDSEL# FDDIR#
52 8
2 1 64 GPIO14/IRQIN2 DIR# 9 STEP#
R248 10K_0402_5% GPIO23/FDC_PP STEP# DRV0#
5
18 DS0# 13 INDEX# +5VS
+3VS VTR INDEX# DSKCHG# RP67
4
53 DSKCHG# 15 WP# MTR0# 6 5
3 VCC WRTPRT# TRACK0# DRV0# DSKCHG# 3
65 14 7 4
93 VCC TRK0# 3 MTR0# +5VS STEP# 8 3 FDDIR#
VCC MTR0# WGATE# WDATA#
1 9 2
DRVDEN0
1
C364 C352 C351 C371 7 1 2 +3VS 10 1 HDSEL#

0.1U_0402_16V4Z VSS R252 @1K_0402_5%
31 2
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 60 VSS DRVDEN1
VSS 10P8R_1K
76 49 1 2
2
VSS GPIO11/SYSOPT R253 1K_0402_5%
LPC47N227 TQFP100 SUPER I/O
Base I/O Address

* 0 = 02Eh
1 = 04Eh
4 4

Title
SUPER I/O
B LA-1911 0.2
A B C D E
+USB_AS
1
+USB_BS
+3VALW + C442
C435
+USB_AS
150U_D2_6.3VM 0.1U_0402_16V4Z
2
1
1
R358 R359
1
D9 D8
100K_0402_5% 100K_0402_5% USB
+5V
U29 CONNECTOR
2
1 8 1 2 USB_OC0#
GND OC1# USB_OC0# 24
2 7 R357 L32 @V-PORT-0603-220 M-V05_0603 @V-PORT-0603-220 M-V05_0603
IN OUT1 47_0402_5% JP15
3 6
2
1 EN1# OUT2
4 5 1 2 USB_OC2# USB_OC2# 24 24 USBP2- USBP2- 2 3
EN2# OC2# 1
1
+ C444 R366 USB2-
C439 TPS2042ADR_SO8 47_0402_5% USBP2+ 1 4 USB2+ 2
24 USBP2+ 3
@150U_D2_6.3VM 0.1U_0402_16V4Z @JTS0402-03_4P
2 4
1
C469 C470
2
Keep 20 mils minimum spacing L33 5

0.1U_0402_16V4Z 0.1U_0402_16V4Z USBP4- 2 3 USB4- 6
24 USBP4- 7
2
USBP4+ 1 4 USB4+ 8
24 USBP4+
SUYIN_2553A-08G1T-D_8P
@JTS0402-03_4P
1
D6 D7
@V-PORT-0603-220 M-V05_0603 @V-PORT-0603-220 M-V05_0603
2
+USB_BS
1
+USB_CS
+ C445 C425
+3VALW
0.1U_0402_16V4Z
150U_D2_6.3VM
2
1
+5V
U53 R584
1 8 100K_0402_5%
2 GND OUT 7
IN OUT +USB_CS
1 3 6 2
4 IN OUT 5 1 2 USB_OC4#
** EN# OC# USB_OC4# 24
1
+ C772 R585
C393 47_0402_5%
1
@150U_D2_6.3VM 0.1U_0402_16V4Z TPS2041ADR_SO8 C770
2
1
C776 C775
2
0.1U_0402_16V4Z +
0.1U_0402_16V4Z
2
150U_D2_6.3VM
2
USB
CONNECTOR
L52
JP31
USBP0- 2 3 USB0-
24 USBP0- 1
USBP0+ USB0+ 2
24 USBP0+ 1 4
3
4
@JTS0402-03_4P SUYIN_2569A-04G3T -A
+3VS 1 2 +IR_ANODE
1
R575 D59 D60
FIR Module @3.3_1206_5%
1 1 2
C373 R273
3.3_1206_5% @V-PORT-0603-220 M-V05_0603 @V-PORT-0603-220 M-V05_0603
+3VS 22U_1206_10V4Z
2
2
1
2
+ C377 R579
U52 USB4- USB2- USB0-
4.7U_0805_6.3VM 47_1206_5% 1 +IR_ANODE
2 2 IRED_A 3 IRTXOUT
IRED_C TXD IRTXOUT 34
IRRX 4 5 IRMODE C24 C26 C774 USBP0- 1 2 USB0-
1
34 IRRX RXD SD/MODE 7 IRMODE 34

+IR_VCC 6 R589 0_0402_5%
VCC MODE @0.1U_0402_16V4Z @0.1U_0402_16V4Z @0.1U_0402_16V4Z USBP0+ USB0+
8 1 2
GND
1
C767 R588 0_0402_5%

C765 IR_VISHAY_TFDU6101E-TR4_8P USBP2- 1 2 USB2-
100P_0402_50V8K 0.1U_0402_16V4Z R342 0_0402_5%
+IR_GND USBP2+ 1 2 USB2+
2
USB4+ USB2+ USB0+ R343 0_0402_5%

USBP4- 1 2 USB4-
R344 0_0402_5%
C23 C25 C771 USBP4+ 1 2 USB4+
R345 0_0402_5%
@0.1U_0402_16V4Z @0.1U_0402_16V4Z @0.1U_0402_16V4Z
The component's most place

1 2 cloely IRDA MODULE.
34 FIR_EN#
R250 0_0402_5% Compal Electronics, Inc.
Title
FIR_EN#
LOW FIR Poped USB Conn.
HIGH FIR Un-Poped B LA-1911 0.2
** BlueTooth Interface
MDC CONN.
+5VS +3VS
JP19
1 2
2
3 4 MD_SPK 31
R393 C57
5 6 @100K_0402_5%
7 8 +5VS_MDC 1 2 @0.1U_0402_16V4Z
9 10 +5VS
3
L39 CHB1608B121_0603
11 12 2
1
13 14 C529 Q4
2 1 +3VS
+3V_MDC 15 16 R406 10K_0402_5% @SI2301DS-T1_SOT23
+3V 17 18
1
R409 0_0402_5% 220P_0402_25V8K C55
1 2 +3VS_MDC 19 20 L38 @CHB2012U170_0805
+3VS 21 22 ICH_AC_SYNC 24,31
L41 CHB1608B121_0603 1 2 @0.1U_0402_16V4Z 1 2
1
24,31 ICH_AC_SDOUT 23 24 +BT_VCC
24,31 ICH_AC_RST# R413 0_0402_5%
25 26 22K
1 2 2
27 28 R414 22_0402_5% ICH_AC_SDIN1 24 37 BT_PWR
29 30 Q30
1 2 22K @DTC124EK_SOT23
AMP 3-1565120-0 30P H:9MM R419 22_0402_5% ICH_AC_BITCLK 24,31 C489
3
@10U_1206_10V4Z
+3V_MDC +3VS_MDC +5VS_MDC
1 1 1 Module ID
Indication for polarity of reset JP17
C542 C562 C521 Reset input High Active --> Low ,
1U_0805_25V4Z 1U_0805_25V4Z 1U_0805_25V4Z Module ID 20
2 2 2 Reset input Low Active --> Open 19
34 BT_DET# Module_Detect
18
17
16
15
BT_RESET# 14
37 BT_RST# 13
37 BT_WAKE_UP BT_WAKE_UP
12
11
10
9
37 BT_DETACH 8
7
USBP6+ R408 @0_0603_5%USB6+ 6
24 USBP6+ 5
24 USBP6- USBP6- R400 @0_0603_5%USB6-
4
3
2
+BT_VCC 1
(MAX=200mA) @ACES_87153-2008
C527 (Top Contact)
@0.1U_0402_16V4Z Bluetooth Connector
PARALLEL PORT
+5V_PRN
RP70
LPD0 1 8 FD0 LPD7 1 8 FD7 CP2
1 2 LPTINIT# D1 LPD1 2 7 FD1 LPD6 2 7 FD6 FD3 1 8
34 INIT# R4 33_0402_5% LPD2 FD2 LPD5 FD5 LPTSLCT IN#
2 1 3 6 3 6 2 7
+5VS LPD3 4 5 FD3 LPD4 4 5 FD4 FD2 3 6
1
1 2 LPTSLCTIN# LPTINIT# 4 5
34 SLCTIN# 33_0402_5% RB420D_SOT 23
R5 R2 68_8P4R_1206_5% RP69
2.2K_0402_5% 68_8P4R_1206_5% 220P_1206_8P4C_50V8K
LPD[0..7] R1 CP1
34 LPD[0..7] 33_0402_5% C1 +5V_PRN LPTSLCT 1 8
LPTSTB# 1 2 1 2 +5V_PRN LPTPE 2 7
2
34 LPTSTB# FD4 LPTBUSY 3 6

AFD#/3M# 220P_0402_50V8K FD5 LPTACK# LPTACK# 4 5
FD6 LPTBUSY
1 FD7 LPTPE 220P_1206_8P4C_50V8K
1 2 14 LPTSLCT CP3
34 LPTAFD# FD0 R3 33_0402_5% 2 FD1 1 8
LPTERR# 15 LPTERR# 2 7
10
34 LPTERR#
9
8
7
FD1 3 6 FD0 3 6
10
9
8
7
6
LPTINIT# 16 RP1 AFD#/3M# 4 5
FD2 4 2.7K_10P8R_1206_5% RP2
LPTSLCTIN# 17 2.7K_10P8R_1206_5% 220P_1206_8P4C_50V8K
FD3 5 CP4
18 FD4 1 8
FD4 6 FD5 2 7
19 FD6 3 6
FD5 7 FD7 4 5
1
2
3
4
5
20
1
2
3
4
5
+5V_PRN
FD6 8 +5V_PRN 220P_1206_8P4C_50V8K
21 JP12 FD3
FD7 9 FD2 LPTSLCTIN#
SUYIN_7843S-25G2T-01 FD1 LPTINIT#
22
LPTACK# 10 FD0 LPTERR#
34 LPTACK# AFD#/3M#
23
34 LPTBUSY LPTBUSY 11
24
LPTPE 12
34 LPTPE
25 Compal Electronics, Inc.
LPTSLCT 13
34 LPTSLCT Title
PARALLEL/MDCPORT
LA-1911 0.2
5 4 3 2 1
+3VALW
+51VDD +RTCVCC
0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VALW +51AVCC
+3VS 38 KBA[0..19]
KBA[0..19] For EC Tools
1
2
C659 C745 C723 C267 C285 R218 0_0402_5% ADB[0..7]
1 38 ADB[0..7]
1
C257 C295 C268 JP7
1000P_0402_50V7K 1
123
136
157
166
161
1 +3VALW
0.1U_0402_16V4Z 1U_0603_10V4Z EC_TINIT#
16
34
45
95
2
2
1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K U45 2 2 EC_TCK
3
2
3 EC_TDO
4
VBAT
VDD
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
AVCC
4 EC_TDI
5
+RTCVCC +51AVCC +3VALW 5 6 EC_TMS
6 7
BATT_TEMP 7 EC_URXD
1 2 7 81 8
23,27,34 SERIRQ SERIRQ AD0 BATT_TEMPA 46 8
L23 8 82 1 2 9 EC_UTXD
ADP_I 47,51
1
1
D C264 C334 FBM-L11-160808-800LMT_0603 R204 @0_0402_5% 9 LDRQ# AD1 BATT_OVP R561 100K_0402_5% 9 EC_USCLK D
24,34 LPC_FRAME# 83 BATT_OVP 47 10
LPC_AD0 15 LFRAME# AD2 84 1 2 10
24,34 LPC_AD0 LAD0 AD3
0.1U_0402_16V4Z 0.1U_0402_16V4Z LPC_AD1 14 H o s t interface 87 ALI/MH# C750 0.22U_0603_16V4Z
24,34 LPC_AD1 LAD1 IOPE0AD4 ALI/MH# 46
LPC_AD2 13 88 EMAIL# @96212-1011S
2
24,34 LPC_AD2 LAD2 IOPE1/AD5 EMAIL# 39

LPC_AD3 10 89 MODE#
24,34 LPC_AD3 LAD3 IOPE2/AD6 MODE# 38
ECAGND 18 A D Input 90 INTERNET#
15 CLK_PCI_LPC LCLK IOPE3/AD7 INTERNET# 39
+3VALW 2 1 EC_RST# 19 93 AD_BID0
1
R221 4.7K_0402_5% RESET1# DP/AD8
22 94
R501 SMI# DN/AD9
23
@33_0402_5% PWUREQ# DAC_BRIG
99 DAC_BRIG 22
DA0 EN_DFAN2#
100 EN_DFAN2 40
24 EC_SCI# EC_SCI# 31
IOPD3/ECSCI#
D A output DA1
DA2
101 IREF IREF 47
KEYBOARD CONN.
102 EN_DFAN1# ( A C E S _ 8 5201-2405_24P)
2
DA3 EN_DFAN1 40 CP9 100P_1206_8P4C_50V8
1
C701 5 32 INVT_PWM 1 8
23 GATEA20 GA20/IOPB5 IOPA0/PWM0 INVT_PWM 22
@22P_0402_25V8K 6 33 BEEP# JP8 NUM_LED# 2 7
23 KBRST# KBRST/IOPB6 IOPA1/PWM1 BEEP# 32
36 PWR_SUSP_LED NUM_LED# PADS_LED# 3 6
2 IOPA2/PWM2 PWR_SUSP_LED 38,39 34
PWM 37 ACOFF PADS_LED# CAPS_LED# 4 5
IOPA3/PWM3 ACOFF 47 33
KSI0 71 o r PORTA 38 KILL_SW# CAPS_LED#
38 KSI0 KBSIN0 IOPA4/PWM4 KILL_SW# 29,39 32
KSI1 72 39 EC_ON 1 2 CP10 100P_1206_8P4C_50V8
38 KSI1 KBSIN1 IOPA5/PWM5 EC_ON 39,41 31 +3VS
KSI2 73 40 EC_LID_OUT# KSO15 R265 300_0402_5% KSO15 1 8
38 KSI2 KBSIN2 IOPA6/PWM6 EC_LID_OUT# 24 30
KSI3 74 43 BT_DETACH KSO14 KSO14 2 7
38 KSI3 KBSIN3 IOPA7/PWM7 BT_DETACH 36 29
KSI4 77 KSO10 KSO10 3 6
39 TV_OUT_EN# KBSIN4 28
KSI5 78 153 EC_URXD KSO11 KSO11 4 5
KBSIN5 IOPB0/URXD EC_URXD 41 27
KSI6 79 154 EC_UTXD KSO8
KBSIN6 IOPB1/UTXD EC_UTXD 41 26
KSI7 80 K e y matrix scan 162 EC_USCLK KSO9 CP11 100P_1206_8P4C_50V8
KBSIN7 IOPB2/USCLK EC_USCLK 41 25
163 EC_SMB_CK1 KSO13 KSO8 1 8
IOPB3/SCL1 EC_SMB_CK1 38,46 24
KSO0 49 PORTB 164 EC_SMB_DA1 KSI7 KSO9 2 7
KBSOUT0 IOPB4/SDA1 EC_SMB_DA1 38,46 23
KSO1 50 165 KSO3 KSO13 3 6
KBSOUT1 IOPB7/RING/PFAIL/RESET2 PCIRST# 10,16,22,23,26,27,29,30,33,34 22
KSO2 51 KSO7 KSI7 4 5
KSO3 KBSOUT2 PBTN_OUT# 21 KSO12
52 168 PBTN_OUT# 24
KSO4 53 KBSOUT3 IOPC0 169 EC_SMB_CK2 20 KSI4 CP5 100P_1206_8P4C_50V8
C KBSOUT4 IOPC1/SCL2 EC_SMB_CK2 5 19 C
KSO5 56 170 EC_SMB_DA2 KSI6 KSO3 1 8
KBSOUT5 IOPC2/SDA2 EC_SMB_DA2 5 18
KSO6 57 171 FAN_SPEED1 KSI5 KSO7 2 7
KBSOUT6 IOPC3/TA1 FAN_SPEED1 40 17
KSO7 58 PORTC 172 EC_PME# KSO6 KSO12 3 6
+3VALW KSO8 KBSOUT7 IOPC4/TB1/EXWINT22 EC_THRM# 16 KSO5 KSI4
59 175 EC_THRM# 24 4 5
KSO9 60 KBSOUT8 IOPC5/TA2 176 FAN_SPEED2 15 KSI3
KBSOUT9 IOPC6/TB2/EXWINT23 FAN_SPEED2 40 14
KSO10 61 1 KSI0 CP6 100P_1206_8P4C_50V8
BT_PWR 36
2
KSO11 KBSOUT10 IOPC7/CLKOUT 13 KSO0 KSI6

64 1 8
R185 KSO12 KBSOUT11 ACIN 12 KSO1 KSI5
65 26 ACIN 24,38,45 2 7
10K_0402_5% KSO13 KBSOUT12 IOPD0/RI1/EXWINT20 29 CD_PLAY 11 KSI1 KSO6
66 CD_PLAY 31,33 3 6
KSO14 67 KBSOUT13 P ORTD-1 IOPD1/RI2/EXWINT21 30 PM_SLP_S3# 10 KSI2 KSO5 4 5
KBSOUT14 IOPD2/EXWINT24/RESET2 PM_SLP_S3# 24 9
KSO15 68 KSO2
KBSOUT15 8 KSO4 CP7 100P_1206_8P4C_50V8
2
1
26,27,29,30 WLANPME# IOPE4/SWIN ON/OFF 39 7

EC_TINIT# 105 44 PM_SLP_S5# 1 2 KSI3 1 8
TINT# IOPE5/EXWINT40 PM_SLP_S5# 24 6 +3VS
EC_TCK 106 PORTE 24 BT_WAKE_UP R264 300_0402_5% KSI0 2 7
26,27,29,30 PCM_PME# TCK IOPE6/LPCPD/EXWIN45 BT_WAKE_UP 36 5
EC_TDO 107 25 KSO0 3 6
TDO IOPE7/CLKRUN/EXWINT46 PM_CLKRUN# 24,26,27,29,30,34 4
EC_TDI 108 J T A G debug port KSO1 4 5
26,27,29,30 1394_PME# TDI 3
EC_TMS 109 124 KBA0
EC_PME# TMS IOPH0/A0/ENV0 KBA1 2 CP8 100P_1206_8P4C_50V8
125 1 2
26,27,29,30 LAN_PME# IOPH1/A1/ENV1 1 300_0402_5% +3VS
110 126 KBA2 R263 KSI1 1 8
111 PSCLK1/IOPF0 IOPH2/A2/BADDR0 127 KBA3 6278-34P-KBCON KSI2 2 7
38,39 KSO17 PSDAT1/IOPF1 IOPH3/A3/BADDR1
114 128 KBA4 KSO2 3 6
PSCLK2/IOPF2 PORTH IOPH4/A4/TRIS KBA5 KSO4
115 131 4 5
ECAGND 2 1 BATT_TEMP *** 33 EC_IDERST
38 TP_CLK TP_CLK 116 PSDAT2/IOPF3 P S 2 interface IOPH5/A5/SHBM 132 KBA6
C336 0.01U_0402_25V4Z TP_DATA PSCLK3/IOPF4 IOPH6/A6 KBA7
38 TP_DATA 117 133
LID_SW# 118 PSDAT3/IOPF5 IOPH7/A7
39 LID_SW# PSCLK4/IOPF6
HDD_LED# 119 138 ADB0
39 HDD_LED# PSDAT4/IOPF7 IOPI0/D0 139 ADB1
+3VALW IOPI1/D1 ADB2
140 (Need to check layout library with KB spec)
RP48 IOPI2/D2 ADB3
141
1 8 MODE# CRY1 158 PORTI IOPI3/D3 144 ADB4
32KX1/32KCLKIN IOPI4/D4 I/O Address
2 7 FRD# 145 ADB5
SELIO# CRY2 IOPI5/D5 ADB6
3 6 160 146 BADDR1(KBA3) BADDR0(KBA2) Index Data
B FSEL# 32KX2 IOPI6/D6 ADB7 B
4 5 147
IOPI7/D7 0 0 2E 2F
10K_1206_8P4R_5% 150 FRD#
IOPJ0/RD FRD# 38
P ORTJ-1 151 FWR# 0 1 4E 4F
+5VALW IOPJ1/WR0 FWR# 38
RP46 152 SELIO# * 1 0 (HCFGBAH, HCFGBAL)(HCFGBAH, HCFGBAL)+1
SELIO# SELIO# 38
8 1 EC_SMB_DA2
7 2 EC_SMB_CK2 EC_SMI# 62 41 1 1 Reserved
24 EC_SMI# IOPJ2/BST0 IOPD4 PHDD_LED# 33
6 3 EC_SMB_DA1 63 42 NUM_LED#
40 S4_SATA IOPJ3/BST1 IOPD5
5 4 EC_SMB_CK1 69 P ORTD-2 54 CAPS_LED#
29 WL_OFF# IOPJ4/BST2 IOPD6
70 PORTJ-2 55 PADS_LED# ENV0 (KBA0) ENV1 (KBA1) TRIS (KBA4)
24 EC_SWI# IOPJ5/PFS IOPD7
10K_1206_8P4R_5% 75
36 BT_RST# IOPJ6/PLI
76 143 KBA8 IRE 0 0 0
40 S4_LATCH IOPJ7/BRKL_RSTO IOPK0/A8 142 KBA9 * OBD 0 1 0
SYSON IOPK1/A9 KBA10
40,43,49 SYSON 148 135 DEV 1 0 0
SUSP# IOPM0/D8 PORTK IOPK2/A10 KBA11
31,33,38,43,49,51 SUSP# 149 134 PROG 1 1 0
VR_ON IOPM1/D9 IOPK3/A11 KBA12
52 VR_ON 155 130
156 IOPM2/D10 PORTM IOPK4/A12 129 KBA13
33 PCMRST# IOPM3/D11 IOPK5/A13_BE0 SHBM(KBA5)=1: Enable shared memory with host BIOS
3 121 KBA14 TRIS(KBA4)=1: While in IRE and OBD, float all the
24,41 EC_RSMRST# IOPM4/D12 IOPK6/A14_BE1
4 120 KBA15
33 SHDD_LED# IOPM5/D13 IOPK7/A15_CBRD signals for clip-on ISE use
16 ENBKL 27
BKOFF# IOPM6/D14 KBA16 +3VALW
22 BKOFF# 28 113
IOPM7/D15 IOPL0/A16 112 KBA17
A n a l o g Board ID definition, FSEL# 173 PORTL IOPL1/A17 104 KBA18 +5VS KBA1 1 2
P l ease see page 3. 38 FSEL#
174 SEL0# IOPL2/A18 103 KBA19 R203 1K_0402_5%
SEL1# IOPL3/A19 FSTCHG TP_CLK KBA2
47 48 FSTCHG 47 1 2 1 2
+3VALW CLK IOPL4/WR1# R219 4.7K_0402_5% R193 @1K_0402_5%
TP_DATA 1 2 KBA3 1 2
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
NC10
R478 R215 4.7K_0402_5% R190 1K_0402_5%

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
CRY1 1 2 CRY2 KBA5 1 2

2
R189 1K_0402_5%
2
R541 20M_0603_5% PC87591L-VPCN01 A2_LQFP176

122
159
167
137
17
35
46
96
11
12
20
21
85
86
91
92
97
98
A A
100K_0402_5% R469
Ra 120K_0402_5%
C796 @1U_0603_10V4Z
AD_BID0 X7 1 2
2 1
2 1
1
1
C735 L22
R552 32.768KHz_12.5P_CM155 ECAGND 1 2
1
0_0402_5% 0.1U_0402_16V4Z FBM-L11-160808-800LMT_0603

Rb C656 C647
2
10P_0402_50V8K 12P_0402_50V8J Title
EC PC87591
1
P R O P R IETARY NOTE T H I S S H E E T O F E N G I N E E R I N G D R A W I N G I S T H E P R O P R IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
T R A D E S E C R E T I N F O R M A T I O N . T H I S S H E E T M A Y N OT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.2
D E P A R T M E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE LA-1911
U S E D B Y O R D I S C L O S E D T O A N Y T H I R D P A R TY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Friday, August 08, 2003 Sheet 37 of 57
5 4 3 2 1
+5VALWP
+5VALW
1 2
C753 1 2
0.1U_0402_16V4Z C726 @0.1U_0402_16V4Z
20
U50
20
U47
+3VALW ADB0 CDON_LED#
3 2
VCC
ADB1 D0 Q0 MP3_LED# ADB0
4 5 3 2
VCC
ADB2 D1 Q1 EMAIL_LED# +3VALW ADB1 D0 Q0
7 6 4 5
2
+3VALW ADB3 D2 Q2 PWR_LED# C345 ADB2 D1 Q1
8 9 7 6
D3 Q3 PWR_LED# 39 D2 Q2
R560 ADB4 13 12 1 2 ADB3 8 9
D4 Q4 WL_BT_LED# 39 D3 Q3
ADB5 14 15 BATT_LOW_LED# ADB4 13 12
100K_0402_5% ADB6 D5 Q5 BATT_CHGI_LED# 0.1U_0402_16V4Z ADB5 D4 Q4 EC_RCVEN
14
17 16 14 15 EC_RCVEN 41
ADB7 D6 Q6 ADB6 D5 Q5 EC_RCRST#
14
18 19 17 16
KBA2 1 D7 Q7 ODD_LED# 39
U17C ADB7 18 D6 Q6 19
EC_RCRST# 41 to 3V
1
CIR_GATING# 41
P
A AA KBA4 D7 Q7
3 11 10
GND
P
SELIO# O CP A CC
2 1 8 11
GND
37 SELIO#
G
B MR SELIO# O CP
9 1
G
U17A SN74HCT374PW_TSSOP20 B MR
10
SN74LVC32APWLE_TSSOP14 SN74LVC32APWLE_TSSOP14 @SN74HCT273PW_TSSOP20
10
7
C729
1 2 1 2 C783
+5VALW
R542 1 2 1 2
+5VALWP
1U_0603_10V6K 820K_0402_5% R607
@20K_0603_1% @1U_0603_10V6K
+3VALW
+3VALW SW Board Connector
1
R231
100K_0402_5%
SUSP# 31,33,37,43,49,51
** JP4
+5VS
1
2
1
G
14
+5VS 2
2
3
4 1 3 SW/B and TP/B FFC Connector TP_CLK 4 3
2
EC_FLASH# 24 37 TP_CLK 2
P
FWE# 6 A Pin 1 Definition Same As SW/B and TP/B TP_DATA 5 4

D
O 37 TP_DATA 5
5 6 C311
G
U17B B Q18 PWR_LED# 6 0.1U_0402_16V4Z

7
SN74LVC32APWLE_TSSOP14 2N7002_SOT23 PWR_SUSP_LED 7 1
37,39 PWR_SUSP_LED 8
VR/B FFC Connector ACIN 9 8
7
24,37,45 ACIN 9
FWR# 37 Pin 1 Definition Swap with VR/B BATT_LOW_LED# 10
10
BATT_CHGI_LED# 11
1
C790 C813 C814 C815 C791 EMAIL_LED# 11 +5VALWP
12
Direct CD button board 12
220P_0402_50V8K
+5VALWP 13
220P_0402_50V8K
220P_0402_50V8K
220P_0402_50V8K
220P_0402_50V8K
13
14
+5VALW JP5 14
15
2
15 2
MODE# 51ON# CDON_LED# 16
37 MODE# 1 2 51ON# 39,45 16
+5VALW MP3_LED# 17 C310
1
C290 KSO17 3 4 EC_REVBTN# 17 0.1U_0402_16V4Z

KSI2 37 1 2 18
37,39 KSO17 +3VALW
1
5 6 18 1
1 2 0.1U_0402_16V4Z R236 37 KSI3 EC_FRDBTN# EC_PLAYBTN# KSI0 37 C816 C817 C818 L54 19
7 8 19
220P_0402_50V8K
EC_STOPBTN# FCM2012C-800_0805 20
37 KSI1 9 10 20
1
220P_0402_50V8K
220P_0402_50V8K
100K_0402_5% C792
1
1
U16 D63 D64 D66 ACES_85201-1005 D67 D65 ACES_85201-2005
2
1
8 1 C793 220P_0402_50V8K
2
VCC A0 2
7
2
WP A1 3 100P_0402_50V8K
37,46 EC_SMB_CK1 6
SCL A2 4 V-PORT-0603-220 M-V05_0603 V-PORT-0603-220 M-V05_0603
5
2
37,46 EC_SMB_DA1 SDA GND
AT24C16N10SC-2.7_SO8 V-PORT-0603-220 M-V05_0603 ** V-PORT-0603-220 M-V05_0603
2
2
1
V-PORT-0603-220 M-V05_0603
R235 VR/CIR Board Connector
100K_0402_5% JP6
1 2
2
3 4 RCIRRX
+5V_CIR 5 6 RCIRRX 41
VOL_AMP
7 8 VOL_AMP 32
32 NBA_PLUG 9 10 +5VAMP
1 C789
1
C819 ACES_85201-1005
1MB Flash ROM 220P_0402_50V8K 1U_0603_10V4Z
2
2
KBA[0..19] **
37 KBA[0..19]
37 ADB[0..7]
ADB[0..7]
C697
512KB Flash ROM
+3VALW @0.1U_0402_16V4Z
U56 ** 1 2 U46
KBA0 21 31 U13 KBA11 1 32 FRD#

KBA1 A0 VCC0 KBA9 A11 OE# KBA10
20 30 1 2 31
KBA2 A1 VCC1 C786 KBA18 KBA8 A9 A10 FSEL#
19 1 32 +3VALW 3 30
KBA3 A2 KBA16 NC VCC FWE# KBA13 A8 CE# ADB7
18 2 31 4 29
KBA4 A3 ADB0 0.1U_0402_16V4Z KBA15 A16 WE* KBA17 KBA14 A13 DQ7 ADB6
17 25 3 30 5 28
KBA5 A4 D0 ADB1 2 KBA12 A15 A17 KBA14 KBA17 A14 DQ6 ADB5
16 26 4 29 6 27
KBA6 A5 D1 ADB2 KBA7 A12 A14 KBA13 FWE# A17 DQ5 ADB4
15 27 5 28 7 26
KBA7 A6 D2 ADB3 KBA6 A7 A13 KBA8 WE# DQ4 ADB3
14 28 6 27 8 25
A7 D3 A6 A8 +3VALW VCC DQ3
KBA8 8 32 ADB4 KBA5 7 26 KBA9 KBA18 9 24
KBA9 A8 D4 ADB5 KBA4 A5 A9 KBA11 KBA16 A18 VSS ADB2
7 33 8 25 10 23
KBA10 A9 D5 ADB6 KBA3 A4 A11 FRD# C657 KBA15 A16 DQ2 ADB1
36 34 9 24 FRD# 37 11 22
KBA11 A10 D6 ADB7 KBA2 A3 OE* KBA10 KBA12 A15 DQ1 ADB0
6 35 10 23 @0.1U_0402_16V4Z 12 21
KBA12 A11 D7 KBA1 A2 A10 FSEL# KBA7 A12 DQ0 KBA0
5 11 22 FSEL# 37 13 20
KBA13 A12 KBA0 A1 CE* ADB7 KBA6 A7 A0 KBA1
4 12 21 14 19
KBA14 A13 ADB0 A0 DQ7 ADB6 KBA5 A6 A1 KBA2
3 10 1 2 +3VALW 13 20 15 18
KBA15 A14 RP# R611 ADB1 DQ0 DQ6 ADB5 KBA4 A5 A2 KBA3
2 11 14 19 16 17
KBA16 A15 NC @100K_0402_5% ADB2 DQ1 DQ5 ADB4 A4 A3
1 12 15 18
KBA17 A16 READY/BUSY# DQ2 DQ4 ADB3
40 29 16 17
KBA18 A17 NC0 VSS DQ3 @SST39VF040_TSOP
13 38
KBA19 A18 NC1
37
A19 @29F040/SST39VF040_PLCC
FSEL# 22 Compal Electronics, Inc.
FRD# CE#
24 23
FWE# OE# GND0 Title
9 39
WE# GND1
BIOS & EXT. I/O PORT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC.ANDCONTAINSCONFIDENTIAL Size Document Number Rev
SST39VF080-70_TSOP40
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD YOFTHECOMPETENTDIVISIONOFR&D Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEETNORTHEINFORMATIONITCONTAINS LA-1911
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTOFCOMPALELECTRONICS,INC. Date: Friday, August 08, 2003 Sheet 38 of 57
5 4 3 2 1
LID Switch +3VALW

ODD LED +5VALWP
HDD LED
1
+5VALWP
R54
3
Q16
100K_0402_5% DTA114YKA_SOT23
47K E
D11 B
2
1
1
37 LID_SW# LID_SW# 2 C800 R213 38 ODD_LED# ODD_LED# 2
1 10K
41 CIR_LID_SW# 3 0.01U_0402_16V7K C
D
2 ** D
1
DAN202U_SC70 300_0402_5%
D10 SW1
1
40 S4_LID_SW#
@V-PORT-0603-220 M-V05_0603 FR2283_2P
R142
2
300_0402_5%
2
D25
2
HT-191NB_BLUE_0603
Power Button
1
D30
D31
1
37 HDD_LED# HDD_LED#
HT-191NB_BLUE_0603
@V-PORT-0603-220 M-V05_0603
2
ON/OFFBTN# 40,41
3
+3VALW
Wireless LED +5VALWP
D47
SD LED +5VALWP Kill SWITCH
2
PSOT24C_SOT23 R425 * Change +3V to +5VALW
3
100K_0402_5% Q45
SW3 DTA114YKA_SOT23 1
1
C 1 3 D49 C801 R492 D48 C
47K E
3 B 300_0402_5%
1
ON/OFF 37
2 4 1 38 WL_BT_LED# WL_BT_LED# 2 0.01U_0402_16V7K +3VALW
2 51ON# 2 @V-PORT-0603-220 M-V05_0603
51ON# 38,45 10K
HCH SMT1-05 C
2
DAN202U_SC70
2
1000P_0402_50V7K
2
*** D33 R426
1
1
D46 100K_0402_5%
1
C574 R498 HT-191NB_BLUE_0603
1
1
KILL_SW# 29,37
1
+3VALW
@V-PORT-0603-220 M-V05_0603
2
RLZ20A
300_0402_5%
1
2
2
1
D53
2
1
R424 SW7
1
4.7K_0402_5% C D54 D Q44 DS-1200-02
D34 27 SDLED SDLED 2
1
G 2N7002
EC_ON 1 R418 2 2 22K HT-191NB_BLUE_0603 R16 @V-PORT-0603-220 M-V05_0603
1
37,41 EC_ON S
B
2
33K_0603_1% E 1M_0402_5%
Q36 22K
2
DTC124EK_SOT23
2
3
* Add R16 1M Pull Low

1
D
2
G
S Q35
B B
2N7002
Internet Button Console/E-MAIL Button TV OUT Button
3
+3VALW
1 51ON#
R122 2 1 100K_0402_5% EMAIL#

POWER LED R56
+5VALWP +5VALWP R67 2 1 100K_0402_5% INTERNET#
0_0603_5% SW5
3
S
Q8 1 3
3
G
2
2
1
Q5 37,38 KSO17 KSO17 2 4 KSI4 TV_OUT_EN# 37

R62 E DTA114YKA_SOT23 NDS352P_SOT23 D
47K
2
2
B
1
1
300_0402_5% 2 PWR_LED# PWR_LED# 38 D12 D24 HCH SMT1-05 D29
10K 1N4148_SOT 23 1N4148_SOT 23
C
22
D68
SW2 SW4
1
1
1 3 D18 1 3 D26 @V-PORT-0603-220 M-V05_0603
1
HT-191UD_AMBER_0603 1 2 1 2
2
INTERNET# 37 EMAIL# 37
1
2 4 2 4
R61 1N4148_SOT 23 1N4148_SOT 23
1
300_0402_5% HCH SMT1-05 HCH SMT1-05
3
2
3
2
A A
1
D Q6 D13 D69 D15

37,38 PWR_SUSP_LED PWR_SUSP_LED 2 D22
G 2N7002
S
D16
PSOT24C_SOT23 Compal Electronics, Inc.
PSOT24C_SOT23
3
@V-PORT-0603-220 M-V05_0603 Title

Switchs & Connectors
2
HT-191NB_BLUE_0603 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOFR&D
@V-PORT-0603-220 M-V05_0603 B LA-1911 0.2
5 4 3 2 1
A B C D E
FAN CONN. 1
+12VALW C568
Battery mode Hibernation
0.1U_0402_16V4Z
1 2 +5VALW
RTCVREF RTCVREF RTCVREF

1
8
1 1
1
37 EN_DFAN1 EN_DFAN1 3 + C FMMT619_SOT 23 D45 C546
1 EN_FAN1 1 2 2 10U_1206_10V4Z
2
1
2 1 2 - R51 2 B Q7 D32 C194 0.1U_0402_10V6K
100_0402_5% C56 E R126 R127 R167 1 2 ON/OFFBTN# 39,41
R53 U33A 1SS355_SOD323
3
10K_0402_5% LM358AMX 0.1U_0402_16V4Z FAN1 100K_0402_5% 100K_0402_5% 620K_0402_5%
2
1
5
JP18
2
1
1
D44 C534 1N4148_SOT 23 D
1 Q43
1 2 2 4 1 2 2
1 2 1N4148_SOT 23 2 C183 1U_0805_16V7K R154 G 2N7002_SOT 23
R52 8.2K_0402_5% 1000P_0402_50V7K 3 U8 10K_0402_5%
2
S
ACES_85205-0300 D27 NC7SZ14M5X
3
1
D
3
1
+3VS 1 2 C525 39 S4_LID_SW# 1 2 2 Q12
R397 10K_0402_5% G 2N7002_SOT 23
RB751V_SOD323 S
1
2 1 1000P_0402_50V7K D
3
37 FAN_SPEED1
R631 37,43,49 SYSON 2
0_0603_5% G
FAN CONN. 2 Q42
2N7002_SOT 23
S
3
+12VALW C561 RTCVREF 1 2 1 2
0.1U_0402_16V4Z +5VALW R168 C641 1U_0805_16V7K
10K_0402_5%
*** RTCVREF
2 R625 U42 0.1U_0402_10V6K 2
1 1 2 1 14 1 2
CD1# VCC
8
10K_0402_5% 2 13 C637
D1 CD2#
1
EN_DFAN2 5 C FMMT619_SOT 23 D20 C89 3 12
37 EN_DFAN2 + 10U_1206_10V4Z 37 S4_LATCH CP1 D2
7 EN_FAN2 1 2 2 RTCVREF 1 2 4 11
R89 B Q9 2 R171 SD1# CP2
2 1 6 - 2 1 5 10
100_0402_5% C94 E 10K_0402_5% C643 6 Q1 SD2# 09
R58 U33B 1SS355_SOD323 Q1# Q2
7 08
3
10K_0402_5% LM358AMX 0.1U_0402_16V4Z FAN2 @1U_0805_16V7K GND Q2#
4
2
1 2
74LCX74
1
JP21
1
D19 C86 +3VALW 1 2
1 R483 D52 Q17
2
1
1 2 1N4148_SOT 23 10K_0402_5% D C808
R57 8.2K_0402_5% 1000P_0402_50V7K 3 2 1 D_SET_S4 2
2
37 S4_SATA
ACES_85205-0300 G @220P_0402_50V8K
2
2N7002_SOT 23
2
RB751V_SOD323 S
1
1 2 C87
3
+3VS
R85 10K_0402_5%
2 1 1000P_0402_50V7K
2
37 FAN_SPEED2
R632
0_0603_5%
CK409 Power Good Circuit VS +3VS
3 3
1
C191
RTC Battery *** 0.1U_0603_50V4Z 10K_0402_5%

R463
2
Power ON Circuit
8
U9A
- BATT1 + +RTCBATT 1 2 3
2
+3VS
P
+3VS R464 33K_0402_5% +
1 CK409_PWRGD# 15
2 1 +RTCBATT 1 2 2 O
+3VS -
G
+3V +3V R466 100K_0603_1%
LM393M_SO8
***
1
4
1
RTCBATT R445 U39C C629 R465
1
SN74LVC14APWLE_T SSOP14
14
14
D41 820K_0402_5% U39D 1U_0603_10V6K 68K_0402_5%

SN74LVC14APWLE_T SSOP14 2
P
BAS40-04_SOT23 5 6 9 8
2
2
I O I O SYS_PWROK 7,24,27
+RTCVCC
G
2 +3V POWER +3V POWER

C112
3
R91
1U_0805_25V4Z
CHGRTC 1
1
100K_0402_5% D
1
C374 24,49,52 VCORE_PWRGD 2

G
0.1U_0402_16V4Z Q59 S
@2N7002_SOT23
2
3
4 4

Title
Power OK/Reset/RTC battery/Lid Switch/Int. KB
0.2
LA-1911
A B C D E
5 4 3 2 1
Q53
@SI2301DS 1P_SOT23
+5V_CIR 3 1 +5VALWP EC_ON 37,39

3 1
1 1
2
C762
C760
2
@1U_0603_10V6K @1U_0603_10V6K
2
2 2 Q20
100K
100K
1 2 @DTC115EKA_SOT23
D C360 @1U_0603_10V6K D
1 2 1 2 1 3
R257 @100K_0603_5% R256 @10K_0402_5%
U20 L53
1 8 1 2 B+
OUT IN
2 7
1 2 3 SNS FB 6 C358 @0_0805_5%
B+ SHDN TAP
R260 @100K_0603_5% 4 5
GND ERR# @1U_0805_25V4Z
39 CIR_LID_SW# @MIC2951
1
D
B+ 1 2 2
R573 G Q22
1
@100K_0402_5% D S @2N7002_SOT23
2
3
24,37 EC_RSMRST#
G Q56
S @2N7002_SOT23
3
1 2 +5V_CIR
1 2 R567 @10K_0402_5% 2 1 +5V_CIR
C756 @10P_0402_50V8K U19 R569
1
3 20 CIR_RCVEN @10K_0402_5%
XIN P00
1
R259 19 CIR_UTXD
X8 P01 18 1 2
@1M_0603_5% P02 R564 @0_0402_5%
@4MHz 17 ON/OFFBTN# 39,40
C P03 C
1 2 1 2 4 16
2
XOUT P10
1
C755 @10P_0402_50V8K R571 @0_0402_5% 15 D
CIR_RCRST# P11 RC_ON/OFFBTN
6 14 2
RESET# P12/CNTR 13 CIR_UTXD G Q51
P13/INT @2N7002_SOT23
7 S
8 P21/AIN1 12 CIR_URXD
3
P20/AIN0 D0 CIR_USCLK +5V_CIR
1 11
C362 9 D1
RCIRRX D3/K
38 RCIRRX 10 5 1 2
@0.1U_0402_16V4Z D2/C CNVSS R258 @0_0402_5%
2 1 2 C754
+5V_CIR VDD VSS
1
1
C361 @M34501M4-X XXFP @1U_0805_25V4Z
@0.1U_0402_16V4Z
2 @DTC115EKA_SOT23
100K
2
Q50
Need to check
1
100K
R563
R568 +5V_CIR @47K_0402_5%
3
CIR_RCVEN 1 8
CIR_RCRST# 2 7
2
CIR_URXD 3 6
CIR_USCLK 4 5
+3VALW +5V_CIR
B B
@10K_1206_8P4R_5%
38 CIR_GATING# CIR_GATING#
1
R537 R240
1
R558
+3VALW 1 2 @10K_0402_5% @10K_0402_5%
R536 @10K_0402_5%
22
@10K_0402_5%
1
22
37 EC_UT XD 3 1 CIR_UTXD
Q48
@MMBT3904_SOT23 3 1 CIR_RCVEN
38 EC_RCVEN
Q49 @MMBT3904_SOT23
+3VALW 1 2
R555 @10K_0402_5% CIR_GATING#
1
37 EC_URXD 2 1 CIR_URXD R570
D56
@RB751V_SOD323 @10K_0402_5%
1 2
22
+3VALW
R551 @10K_0402_5%
38 EC_RCRST# 3 1 CIR_RCRST#
37 EC_USCLK 2 1 CIR_USCLK
A
D55 Q54 @MMBT3904_SOT23 A
@RB751V_SOD323

Title
CIR & Screws
5 4 3 2 1
OZ168 DIRECT CD CONTROLLER +5VOZ TO +5VCD
L46
@CHB1608G301_0603
+5VOZ 1 2
1 2 +5VCD
L45
1
+5VOZ C763 C751 C757 C752 @CHB1608G301_0603
@0.1U_0402_16V4Z @0.1U_0402_16V4Z @0.1U_0402_16V4Z @0.1U_0402_16V4Z
2
U51
44
58
9
@OZ168T-A1_TQFP 100
VDD
VDD
VDD
24,33 IDE_SDD[0..15]
IDE_SDD0 76 77
IDE_SDD1 HDD0 CDD0
78 79
IDE_SDD2 81 HDD1 CDD1 82
IDE_SDD3 HDD2 CDD2
83 84
IDE_SDD5
IDE_SDD6
90
95
HDD4
HDD5
CDD4
CDD5
91
96
OZ168 8MHz CRYSTAL OZ168 UNUSED PIN PULL UP
IDE_SDD7 HDD6 CDD6 +5VCD
97 98
IDE_SDD9 HDD8 CDD8
4 3
IDE_SDD10 8 HDD9 CDD9 7 RP126
IDE_SDD11 HDD10 CDD10 REVBTN#
11 10 8 1
IDE_SDD12 15 HDD11 CDD11 14 X3 FRDBTN# 7 2
IDE_SDD13 HDD12 CDD12 @8MHZ_16PF_7D08000014 PLAYBTN#
18 17 6 3
IDE_SDD14 20 HDD13 CDD13 19 OSC1 OSC2 STOPBTN# 5 4
IDE_SDD15 HDD14 CDD14
22 21
HDD15 CDD15 @10K_8P4R_1206_5%
24,33 IDE_SDA0 IDE_SDA0 68 69 R565 RP125

IDE_SDA1 HDA0 CDA0
24,33 IDE_SDA1 70 71 8 1
IDE_SDA2 66 HDA1 CDA1 67 7 2
24,33 IDE_SDA2 HDA2 CDA2 @1M_0402_5% 6 3
24,33 IDE_SDCS1# IDE_SDCS1# 63 64 5 4
HCS0 CCS0
1
IDE_SDCS3# 61 62
24,33 IDE_SDCS3# HCS1 CCS1 C748 C747 @10K_8P4R_1206_5%
@10P_0402_50V8K @10P_0402_50V8K
IDE_SDIOR# 99 100 GPIO_0 R556 2 1 @10K_0402_5%
2
24,33 IDE_SDIOR# HDIOR# CDIOR#
IDE_SDIOW# 6 5 GPIO_1 R557 2 1 @10K_0402_5%
24,33 IDE_SDIOW# HDIOW# CDIOW#
72 73
HIOCS16# CIOCS16#
24,33 IDE_SDIORDY 93 94
HIORDY CIORDY
23,33 IDE_IRQ15 IDE_IRQ15 74 75

IDE_SDDREQ HINTRQ CHINTRQ
24,33 IDE_SDDREQ 12 13
IDE_SDDACK# 88 HDMARQ CDMARQ 89
24,33 IDE_SDDACK# HDMACK# CHDMACK#
24 23
24,33 SIDERST#
59 HRESET#
HDASPN
CRESET#
CDASPN
60 PROGRAMMING CLOCK GENERATOR
48 47
HSYNC SSYNC
53 52
55 HBIT_CLK SBIT_CLK 54
HDATA_OUT SDATA_OUT
50 49
46 HDATA_IN SDATA_IN 45
HACRSTN SACRSTN
DM_ON 28
PLAYBTN# PAV_EN
36 51
FRDBTN# 35 PLAY/PAUSE PWR_CTL
REVBTN# FFORWARD
34
STOPBTN# 37 REWIND 80
STOP/EJECT ISCDROM
39 GPIO_1
GPIO[1]/VOL_UP GPIO_0
29 40
25 PCSYSTEM_OFF GPIO[0]/VOL_DN
INTN
30
RESET# 56
MODE0
57
26 MODE1
SDATA
38
PAVMODE
27
SCLK 41
CSN
42
OSC1 31 INCN 43
OSC2 OSCI UDN
32
OSCO
GND
GND
GND
GND
GND
16
33
65
85
92

Title
OZ-168 CD_PLAY & Programming Clock
A B C D E
+3V +5V +2.5VS

+3VALW TO +3V +5VALW TO +5V
+3V
2
+5VALWP +5V R450 R516 R457
U49 470_0805_5% 470_0805_5% 470_0805_5%
1 1 8 1
C133 C122 D S
7 2
6 D S 3
1
D S 1 1
10U_1206_10V4Z 1U_0805_25V4Z 5 4 C715 C724
2 2 D G
1
+3VALW D D D
1 U6 1 SI4800DY_SO8 2
4.7U_1206_16V4Z
2
1U_0805_25V4Z 2 SYSON# 2 SYSON# 2 SUSP 1
8 1 G G G
D S R125 C725 Q39 Q46 Q40
7 2 S S S
6 D S 3 100K_0402_5% 4.7U_1206_16V4Z 2N7002_SOT 23 2N7002_SOT 23 2N7002_SOT 23
3
D S SYSON_ALW 2
5 4 1 2 +12VALW
D G
1
SI4800DY_SO8 2
1
C176 R121 D SYSON_ALW
1
C177 2 SYSON# 2
0.1U_0402_16V4Z @1M_0402_5% G C743
10U_1206_10V4Z 1 Q13 +3VS +5VS
2 S
2N7002_SOT 23 0.1U_0402_16V4Z
3
1
2
R452 R272
470_0805_5% 470_0805_5%
1
+3VALW TO +3VS
+5VALW TO +5VS
1
D D
+3VS 2 SUSP 2 SUSP
G G
S Q38 S Q23
2N7002_SOT 23 2N7002_SOT 23
3
1 1
+3VALW C186 C196
+5VALWP +5VS
U7 10U_1206_10V4Z 1U_0805_25V4Z U22
8 1 2 2 8 1 +5VALWP +5VALWP
2 7 D S 2 R123 7 D S 2 2
D S 100K_0402_5% D S
6 3 6 3 1 1
D S 5 D S
2
5 4 5VS_GATE 1 2 +12VALW 4 C386 C379
D G D G R526 R266
SI4800DY_SO8 SI4800DY_SO8 4.7U_1206_16V4Z 1U_0805_25V4Z 10K_0402_5% 10K_0402_5%
1 2 2
1
1 2 C368
1
C205 C178 R124 D 4.7U_1206_16V4Z SYSON# SUSP
1
2 19,31,50 SUSP
2 SUSP
1
10U_1206_10V4Z 0.1U_0402_16V4Z @1M_0402_5% G D D
2 1 Q10 SYSON 2 Q47 2 Q24
S 37,40,49 SYSON 31,33,37,38,49,51 SUSP#
2N7002_SOT 23 5VS_GATE G 2N7002_SOT 23 G 2N7002_SOT 23
2
2
S S
R613 R612
3
2
C380
10K_0402_5% 10K_0402_5%
0.1U_0402_16V4Z ** **
1
1
+2.5V TO +2.5VS
+2.5V H20 H17 H9 H24 H21 H12 H5 H22 H1 H13
+2.5VS H_S315D142 H_S315D142 H_S315D142 H_S315D142 H_S315D142 H_S315D142 H_S315D142 H_S315D142 H_C276D181 H_C276D181
U41
8 1
7 D S 2
3 D S 3
6 3
5 D S 4
D G 1
1
C623 C625
SI4800DY_SO8
1
11
11
4.7U_0805_10V4Z 1U_0805_25V4Z ***
2
1
C640 PJP13 PJP14

2
H2 H11 H19 H14 H6 H10 H7 H8 H3

4.7U_0805_10V4Z H_C276D181 H_C276D181 H_S276D110 TC197S276D110 H_C276D142 H_C276D142 H_SMDC138 H_C142D142N H_C236D236N
2
5VS_GATE
2
2
C630 PAD-OPEN 2x2m PAD-OPEN 2x2m
0.1U_0402_16V4Z
1
1
1
H15 H16 H18 H23 H4 H25 H26 H27 H28 H29 H30
H_C197D98 H_C197D98 H_C228D165 H_O268X228D205X165 H_S315D142 H_C276D181 H_C276D181 H_C55D55N H_C55D55N H_SMDC157 H_SMDC157
1
11
1
PJP15
4 4
***
2
PAD-OPEN 2x2m Compal Electronics, Inc.

Title
POWER CONTROLCKT
PROPRIETARY TRADE
NOTE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B LA-1911 0.2
A B C D E
FD5 FD6 FD4 FD1 FD3 FD2
FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL
+3VALW +1.5VS +1.5VSS
1
CF21 CF2 CF15 CF3 CF4 CF5 C407 C404 C406 C403 C405
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80
4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z
2
1
1
CF9 CF8 CF10 CF11 CF6 CF7
+5VCD +3V
**
Remove +5VCD
1
1
CF28 CF26 CF27 CF30 CF20 CF29 C402 C784
4.7U_0805_10V4Z 4.7U_0805_10V4Z
2
1
1
+3VALWP
1
C397 C396 C395 C394
1
1
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z
2
1
1
CF31 CF32
SMD40M80 SMD40M80
+3VALW +3VALW
+3V
1
1
C782
R604
0.1U_0402_16V4Z
14
14
0_0402_5% U55A 1 U55B
P
1 2 3 4
2
I O I O V_ON 49
G
+3VALW POWER +3VALW POWER
1
C794 SN74LVC14APWLE_T SSOP14 SN74LVC14APWLE_T SSOP14
7
2
@0.1U_0402_16V4Z
+3VALW POWER +3VALW

+3VS
2
+3VALW +3VALW R605
10K_0402_5%
1
R606
14
14
1
VS_ON 49,51 VS_ON# 50
0_0402_5% U55C U55D
1
D
P
5 6 9 8 2 Q58
2
*** I O I O
G 2N7002_SOT 23
G
1 +3VALW POWER +3VALW POWER S
C795 SN74LVC14APWLE_T SSOP14 SN74LVC14APWLE_T SSOP14
3
7
7
2
@1U_0603_10V6K

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND Point and Capacitance
B 0.2
A B C D
VS
VIN
VIN 1 2
PF1 PR1 1M_0603_1%
1
12A_65VDC_451012 PL1
1
PCN1 1 2 1 2 PR2
PR3 VS
1 C8B BPH 853025_2P 5.6K_0603_5%
1
6 G 84.5K_0603_1% 1 2
ACIN 24,37,38
1
5 PD1 PR4
2
G
8
4 2 PU1A 1K_0603_5%
2
G 2
1
1
3 1 2 3 1
P
G +
PC1 PC2 PC3 PC4 PR5 22K_0603_5% 1 PACIN
100P_0603_50V8J 1000P_0603_50V7K 100P_0603_50V8J O PACIN 47,48
2
G
-
1
SINGA_2DC-S113L200
1
EC10QS04_SOD106 1000P_0603_50V7K PC5 PR6 PC6 LM393M_SO8 PD2
0.1U_0603_25V7K PR7
4
20K_0603_1% 10K_0603_5%
RLZ4.3B_LL34
2
2
PR8
2
1000P_0603_50V7K 2 1 RTCVREF Vin Detector
10K_0603_5%
3.3V
High 18.764 17.901 17.063
Low 17.745 16.903 16.038
VIN
2
PD3
1N4148_SOD80 1 2
PR9
PD4 1K_1206_5%
1
2 1
BATT+
1
2
RB751V_SOD323 PR10 PD5 2
VS 2 1 N3 1 2
33_1206_5% VIN PR11 B+
PD6 1N4148_SOD80 1K_1206_5%
2
CHGRTCP 2 1 N1 3 1
PQ1
RLZ3.6B_LL34 TP0610T_SOT23 1 2
1
PR12
1
PR13 PC7 1K_1206_5%

2
PC8
100K_0603_5% 0.22U_1206_25V7K 0.1U_0603_25V7K
2
PR14
2
38,39 51ON# 1 2
6.0V
1
1 2 2 1
22K_0603_5% VL PR15 10K_0603_5% PR16 1M_0603_1% PR17
499K_0603_1%
1
LM393M_SO8
8
RTCVREF PR18 PD7 PU1B
2
PU2 2 5
P
S-81233SGUP-T1_SOT89 200_0603_5% 46,48 MAINPWON 1 7 +
O 10K_0603_5%
3 6
3.3V 47 ACON
G
-
1
PR19
2
1
1 2 3 2 N2 RB715F_SOT323 PR20
CHGRTC 3 2
1
1
PD9 PC10 PC11 PR21 PC9
4
1
200_0603_5% PC12 PD8 499K_0603_1%

1
1000P_0603_50V7K PR22 1000P_0603_50V7K
2
3 PC13 1U_0805_25V4Z RLZ16B_LL34 @ RLZ6.2C_LL34 215K_0603_1% 3
2
10U_1206_10V4Z
1
1
2
2
RTCVREF
0.1U_0603_16V7K
3.3V
PJP1
PAD-OPEN 4x4m
1
1 2 PQ2 D
PJP2 2N7002_SOT 23 2 2 1 PACIN
+VTT_GMC HP 1 2 +VTT_GMCH G PR23 47K_0603_5%
PJP3 S
PAD-OPEN 4x4m Precharge detector
3
PAD-OPEN 4x4m
+2.5VP 1 2 +2.5V
15.34 15.90 16.48
1
(12A,480mils ,Via NO.=24) (2A,80mils ,Via NO.= 4) PQ3
13.13 13.71 14.20 DTC115EKA_SOT23
PJP4 PJP5
1 2 +5VALWP 1 2 100K 2
+1.25VSP +1.25VS (2A,80mils ,Via NO.= 4) +5VALW +5VALWP
PAD-OPEN 3x3m PAD-OPEN 4x4m 100K

PJP6 (6A,240mils ,Via NO.= 12)
2 1 (150mA,40mils ,Via NO.= 2)
3
+VCCVIDP +CPUVID
PAD-OPEN 2x2m PJP7
1 2 +3VALW
PJP8 +3VALWP
4
+1.5VSP 1 2 +1.5VS (6A,240mils ,Via NO.= 12) PAD-OPEN 4x4m
4
PAD-OPEN 4x4m (6A,240mils ,Via NO.= 12)

PJP9 PJP10
2 1 +12VALW (120mA,20mils ,Via NO.= 1) 1 2
+12VALWP +VGA_COREP +VGA_CORE Compal Electronics, Inc.
PAD-OPEN 2x2m THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY Title
PAD-OPEN 4x4m
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
PJP11 SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE DCIN & DETECTOR
(6A,240mils ,Via NO.= 12)
+1.5VS 1 2 +1.5VSS CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS Size Document Number Rev
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR 0.2
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
LA-1911
PAD-OPEN 4x4m
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, Date: Friday, August 08, 2003 Sheet 45 of 57
INC.
A B C D
A B C D
PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 44 degree C
1 1
VL VS VL
VMB
PCN2
1 PL2 10KB_0603_1%_TH11-3H103FT
BATT+ 2
2
1 2 1 2 BATT+ PH1
BATT+
1
3 ALI/NIMH# 2 1 PR24 PF2 15A_65VDC_451012 PR25
ID 4 AB/I 1K_0603_5% +3VALWP C8B BPH 853025_2P PC14
B/I 0.1U_0603_25V7K MAINPWON 45,48
5 TS_A 47K_0603_1%
TS 6
1
EC_SMDA 1 PR26
2
2
SMD
1
7 EC_SMCA 47K_0603_5% PC15 PC16 1 PR27 2
1
10 SMC 8 1000P_0603_50V7K 0.01U_0603_50V7K
2
GND GND-
8
11 9 3 PR30 PU3A 47K_0603_1% PQ4
2
GND GND-
1
PR28 PR29 1 2 3 PD11
P
SUYIN_20175A-09G1_M9P 100_0603_5% 16.9K_0603_1% + 100K
1 1 2 1 2
100_0603_5% PR31 TM_REF1 2 O DTC115EKA_SOT23
-
G
2 1SS355_SOD323
1
1K_0603_5% LM393M_SO8 100K
2
2
PR32
3
PD10
3.32K_0603_1%
@BAS40-04_SOT23
1
PC17
2
ALI/MH# 37 PC18 PR33
2 1 VL
PR34 100K_0603_1%
2
1 2 0.22U_0805_16V7K_V2 1000P_0603_50V7K
+3VALWP
25.5K_0603_1%
1
2 2
1
PR35
PR36
1K_0603_5% 100K_0603_1%
2
2
1 @BAS40-04_SOT23
2 PD12
B A T T _TEMPA 37
PH2 near main Battery CONN :
EC_SMB_DA1 37,38 BAT. thermal protection at 78 degree C
EC_SMB_CK1 37,38 Recovery at 44 degree C
1
PD13
@BAS40-04_SOT23 PD14
@ BAS40-04_SOT23 VL VL
2
3
3 PH2 PR37 3
47K_0603_1%
10KB_0603_1%_TH11-3H103FT
+5VALWP
PR38
1
1 2
47K_0603_1%
8
PR39 PU3B
1 2 5 PD15
P
14.7K_0603_1% + 7 2 1
TM_REF2 O
6
G
- 1SS355_SOD323
LM393M_SO8
4
1
1
PC19 PC20
PR40
1
0.22U_0805_16V7K_V2 PR41 1000P_0603_50V7K 2 1 VL
1
3.48K_0603_1% 100K_0603_1%
PR42
100K_0603_1%
2
4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE BATTERY CONN/OTP
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS Size Document Number Rev
LA-1911
INC.
A B C D
A B C D
Iadp=0~5.8A
P2 P3 B+ B++
PQ5
SI7447DP_SO8
PQ6 PQ7
PR43 PL3
VIN 8 1 1 8 2 1 1 2 1
7 D S 2 2 S D 7 2
D S S D
1
6 3 3 6 0.01_2512_1% C8B BPH 853025_2P PC21 PC22 PC23 3 5
5 D S 4 4 S D 5
D G G D
1
1
1 4.7U_1210_25V6K 4.7U_1210_25V6K 4.7U_1210_25V6K 1
PR44 PR45
2
SI4825DY_SO8 SI4825DY_SO8
4
10K_0603_5% 200K_0603_1%
PR46 PR47
2
2
ACOFF# 1 2 1 2 VIN
10K_0603_5% 47K_0603_5%
1
PR48 PU4 PR49
PD16 37,51 ADP_I 1 24
-INC2 +INC2
3
2
1
ACOFF# 1 2 150K_0603_1% 0_0603_5%
PQ8
1
1SS355_SOD323 2 1 2 23 SI4835DY_SO8
2
PR50 100K_0603_5% OUTC2 GND PC24 N18 4 PQ9
0.022U_0603_25V7K DTC115EKA_SOT23
1 D 3 22 CS 1 2
PACIN PQ10 +INE2 CS 100K
45,48 PACIN 1 2 2 2
PR51 G PC25 ACOFF 37
1
3K_0603_5% S 2N7002_SOT 23 4 21 1 2
-INE2 VCC(o)
1
PR52 100K
3
1
PR53 PC27 PR54 0.1U_0603_25V7K
5
6
7
8
ACON PC26 33.2K_0603_1% 1 2 1 2 5 20
3
45 ACON FB2 OUT
10K_0603_1% 10K_0603_5%
4700P_0603_50V7K
2
2
0.1U_0603_16V7K 6 19 1 2 LXCHRG
2
VREF VH PC28
1
PC29 PC30 PR55 0.1U_0603_25V7K
2 IREF=1.31*Icharge 1 2 1 2 7 18 1 2 2
0.1U_0603_16V7K 1K_0603_5% FB1 VCC PC31

IREF=0.73~3.3V 1000P_0603_50V7K 0.1U_0603_25V7K CC=0.5~2.7A
2
8 17 1 2
-INE1 RT PR56 CV=16.8V(12 CELLS LI-ION)
68K_0603_5%
37 IREF 1 2 9 16 PL4
PR57 205K_0603_1% +INE1 -INE3 PR58 4.7U_1210_25V6K
PR60 PC32 1 2 1 2 BATT+
+3VALWP 2 1 10
OUTC1 FB3
15 1 2 1 2
1 PR59 10K_0603_5% 47K_0603_5% 22UH_SPC-1205P-220A_2.8A_20% 0.02_2512_1%
1
CS PR61 PC33 1500P_0603_50V7K
1
11 14 ACON
OUTD CTL
1
1
PR62 100K_0603_1% 0.1U_0603_16V7K PD17 PC34 PC35 PC36
47K_0603_5% PQ11
2
DTC115EKA_SOT23 12 13
2
-INC1 +INC1 RB051L-40_SOD106
2
100K
2
2
MB3887_SSOP 24
2
1
PQ12 100K
DTC115EKA_SOT23
4.7U_1210_25V6K 4.7U_1210_25V6K
3
100K
37 FSTCHG 2
PR63 PR64
100K 2 1 4.2V 2 1
95.3K_0603_0.1% 143K_0603_0.1%
3
3 3
PR184
2 1
95.3K_0603_0.1%
VMB
1
PR65
OVP voltage : LI 340K_0603_1%
4S3P : 17.4V--> BATT_OVP= 1.935V
2
(BAT_OVP=0.1111 *VMB)
1
PR66
+5VALWP 499K_0603_1%
8
PU5A
2
3
P
+
1
37 BATT_OVP 0 2
-
G
LM358A_SO8
4
1
4 4
1
PC37 PR67
1
PR68 PC38
@0.1U_0603_16V7K 2.2K_0603_5% 0.01U_0603_50V7K

105K_0603_0.5%
2

2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY Title

SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CHARGER
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS Size Document Number Rev
LA-1911
INC.
A B C D
5 4 3 2 1
PC39
4.7U_1210_25V6K
N4 1 2
1
PD18
2
PC40
PC41
470P_0805_100V7K EC11FS2_SOD106
D 1 2 BST31 BST51 D
1
PL5 B+++ SNB 2 1 FLYBACK
2
0.1U_0603_25V7K PR69 22_1206_5%
2
1 2
B+
HCB4532K-800T90_1812
2
PT1
1
1
PC42 PC43 VS PD19 PC44
1 2
@4.7U_1210_25V6K PQ13 DAP202U_SOT 323
3
1 8 PDH31 1 2 0.1U_0603_25V7K B+++ 10uH_SDT-1205P-100-118_5A_20%
2
D1 G1
2
2 7 PR70 PD20
4.7U_1210_25V6K D1S1/D2 0_0603_5% VL
3 6
1
4 G2 S1/D2 5 PLX3 1SS355_SOD323
S2 S1/D2 +12VALWP
SI4814DY_SO8~D PC47
1
4.7U_1206_16V4Z PC45 PC46
1
@ 4.7U_1210_25V6K
2
1
PDL3 PC48 PC49
2
1
0.1U_0603_25V7K PQ14
PDH3
PC50 4.7U_1206_16V4Z 4.7U_1210_25V6K 1 8
2
PL6 2 D1 G1 7
2
47P_0603_50V8J PR71 D1 S1/D2
3 6
2
10UH_SPC-1205P-100_4.5A_20% PDH5 1 2 PDH51 4 G2 S1/D2 5

S2 S1/D2
0_0603_5% SI4814DY_SO8~D
2
1
PC51
22
21
C C
25 4 PDL5 47P_0603_50V8J
V+
VL
BST3 12OUT 5
2
VDD CSH5
27 18
DH3 BST5
1
PU6 16
PR72 PR73 DH5 PLX5
26 17
LX3 LX5
1
24 19
DL3 DL5
1
+3VALWP 0.012_2512_1% 1M_0603_1% 20 PR74
PGND 14 PR75
CSH3 CSH5 2M_0603_5%
1 13
2
3.57K_0603_1% 2 CSH3 CSL5 12 0.012_2512_1%

CSL3 MAX1902 FB5
3 15
2
1 2 10 FB3 SEQ 9
2
1 1 45,47 PACIN SKIP# REF 2.5VREF
1
PD21 PR76 23 6
SHDN# SYNC
1
PC52 + + PC53 PR77 PC54 10K_0603_5% 11

RST#
1
7 PC55
150U_D_6.3VM @150U_D_6.3VM EP10QY03 TIME/ON5
2 2 +5VALWP
28 4.7U_1206_16V4Z
2
GND
RUN/ON3
2
2
1 1
1
1
100P_0603_50V8J PC58 PD22
1
PC56 PR78 PC59 PC57 + +
8
2
VS 680P_0603_50V8J
PR79 10.5K_0603_1% 100P_0603_50V8J 150U_D_6.3VM EP10QY03
2
2 2
2
1
10K_0603_1%
2
PR80
1
1
47K_0603_5% PR81
B B
@ 150U_D_6.3VM
2 1
2
VL
PR82 10K_0603_1%
47K_0603_1%
2
1
PC60
+3.3V Ipeak = 6.66A ~ 10A
0.047U_0603_50V4Z
MAINPWON 45,46 +5V Ipeak = 6.66A ~ 10A
2
PC61
0.047U_0603_50V4Z
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY Compal Electronics, Inc.
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE 5V/3.3V/12V
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size Document Number Rev
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY 0.2
LA-1911
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
5 4 3 2 1
A B C D
PL7
1 2 B+
1 1
2
PR83 HCB4532K-800T90_1812
1
PC62 0_0603_5%
4.7U_1210_25V6K +5VALWP
1
PC63 PC64 PC65 PC66
4.7U_1210_25V6K
1
PC67 4.7U_1206_16V4Z 4.7U_1210_25V6K 4.7U_1210_25V6K
PD23
2
1U_0805_25V4Z
5
6
7
8
DAP202U_SOT 323
PQ15
D
D
D
D
2
3
PR84 IRF7821_S08
PQ16 2 1
+2.5V
G
S
S
S
1 8
D1 G1
1
2 7 PC68 20_0603_5%
+1.45V/+1.225V 3
D1 S1/D2
6 1U_0603_10V6K PR85 PL8
4
3
2
1
4 G2 S1/D2 5 0_0603_5% 2.2UH_SPC-1205P-2R2B_13A_30%
S2 S1/D2 +2.5VP
1 2 2 1 1 2
1
PL9 SI4814DY_SO8 PR86 PC69
22
+VTT_GMC HP 1 1
1
5UH_SPC-06704-5R0_2.9A_30% PC70 0_0603_5% PU7 0.1U_0603_25V7K PC71 PD24
5
6
7
8
2
1 2 2 1 1 2 25 21 + + 2
VCC
V+
UVP
BST1 VDD PC72 EP10QY03
0.1U_0603_25V7K 26 19 PD25 220U_D2_4V 220U_D2_4V
DH1 BST2 2 2
1
18
2
1 DH2
1
PD26 PC73 27 17 EC31QS04
2
EP10QY03 + 150U_D2_6.3V LX1 LX2
24 20 4
DL1 DL2 16
CS2
2
PR87 28 PQ17
2 1 CS1 15 FDS6672A_SO8 PR88
2
4.53K_0603_1% OUT1 OUT2

14 15K_0603_1%
2
2 FB2 12
3
2
1
FB1 ON2
7
1
PGOOD
5
1 2 11 TON
24,40,52 VCORE_PWRGD ON1
PR89 @0_0603_5% 13
1 2 ILIM2 3
SKIP
GND
OVP
REF
5,52 VCORE_ENLL ILIM1
1
1
PR177 0_0603_5% 2 1 SYSON 37,40,43
PR91 1 2 PR90 @0_0603_5%
10K_0603_1% 31,33,37,38,43,51 SUSP# PR178 @ 0_0603_5% PR92
23
10
PR93 2 1 V_ON 44 10K_0603_1%
6
1 2 42.2K_0603_1% PR179 0_0603_5%
44,51 VS_ON PR180 @ 0_0603_5% 2 1
2
2
**
***
1
PR95
1
D PR94 MAX1845EEI_QS OP28 220K_0603_1%

52 GMCH_SEL 2 10K_0603_1% 2 1
G
3 PQ18 S 3
2N7002_SOT 23
3
1
PC74
PR96 PR97
0.22U_0805_16V7K
100K_0603_1% 100K_0603_1%
2
GMCH_SEL=0 PRESCOTT VTT_GMCH=1.225V
GMCH_SEL=1 NORTHWOOD VTT_GMCH=1.45V
4 4
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE DDR_2.5V/VTT_GMCH
LA-1911
A B C D
A B C D
+5VALW
2
PR98
0_1206_5%
1
1 1
1
PD27 PC75 PC76
5
PU8 EP10QY03
22U_1210_6.3V6M 22U_1210_6.3V6M
2
IN
10 PC77
11
1 BST 0.1U_0603_16V7K
HSD
8 PQ19 PL10
+1.5V
2
DH 1 8
D1 G1 2.2UH_PLFC1235P-2R2A_6A_30%
2 7 +1.5VSP
3 D1S1/D2 6 1 2
G2 S1/D2
1
9 4 5
LX S2 S1/D2
SI4814DY_SO8 PR99 1 1
2 8.06K_0603_1%
COMP PC78 + + PC79
6
DL
2
PR100 220U_D2_4VM
@ 220U_D2_4VM2 2
1
D 220K_0603_1%
1
SUSP 2 1 SUSP1 2 PQ20 7 PR101
19,31,43 SUSP PGND
PR182 @0_0603_5% G PC80 9.09K_0603_1%
21
S 2N7002_SOT 23 10P_0603_50V8J
VS_ON# 2 1 PC81
3
2
44 VS_ON# 390P_0603_50V7K
PR181 0_0603_5% 4 3
2
GND FB
2
2 ** 2
MAX1954EUB_10UMAX
+3VALW
2
PR102
0_1206_5%
1
1
PD28 PC82 PC83
5
PU9 EP10QY03
22U_1210_6.3V6M 22U_1210_6.3V6M
2
IN
10 PC84
11
1 BST 0.1U_0603_16V7K **
HSD
8 PQ21
+1.15V/1.0V
2
DH 1 8 PL11
D1 G1 2.2UH_SPC-1205P-2R2B_13A_30%
2 7 +VGA_COREP
3 D1 S1/D2 6 1 2
G2 S1/D2
9 4 5
LX S2 S1/D2
3 SI4814DY_SO8 1 1
3
1
2
COMP PC85 + + PC86
6
DL
1
PR103
PR104 3.92K_0603_1% @ 220U_D2_4VM 220U_D2_4VM
2 2 PR103 PR106
1
D 180K_0603_1%
1
SUSP1 2 PQ22 7
2
G PC87 PGND
NV31M 4.53K 9.09K
21
S 2N7002_SOT 23 15P_0603_50V8J
PC88
3
390P_0603_50V7K 4 3
GND FB
2
NV33M 3.92K 0K
1
PR105
MAX1954EUB_10UMAX
9.09K_0603_1%
NV34M 3.92K 0K
2 NV31M NV33M/NV34M
1
1
D
16 POWER_SEL 2 PQ23 PR106
G 0K_0603_5% POWER_SEL=1 VOUT=1.2V VOUT=1.15V
S 2N7002_SOT 23
1
PR107
3
100K_0603_5% POWER_SEL=0 VOUT=1.0V VOUT=1.15V

4 4
2
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE 1.5V/VGA_CORE
LA-1911
A B C D
5 4 3 2 1
1 2
PR108 1M_0603_1% VL
VS
1
D PR109 D
H_PROCHOT# 5,7
1
PC89
365K_0603_1%
0.1U_0603_25V7K
1
1 2 3 D
37,47 ADP_I
P
PR110 64.9K_0603_1% + PQ24
1 2
1 2 2 O G 2N7002_SOT 23
VL -
G
PR111 249K_0603_1% PU10A S
LM393M_SO8
3
1
4
1
1
PR112 PC91
PC90 10P_0603_50V7K
100K_0603_1% 1000P_0603_50V7K
2
2
8
PU10B
5
P
+ 7
O
6
G
-
LM393M_SO8
4
C C
+3VALWP
+3VALWP
2
PR113
0_1206_5%
PR114
1
1 2
5.1_0603_5%
1
PC92 PC93
1U_0603_10V6K 4.7U_1206_16V4Z
PR115
2
1
22K_0603_5% PC94
2
0.1U_0603_16V7K
2
B B
PU11 PL12 +1.25VSP

1 8 2.2UH_SPC-06703-2R2_20%
VIN PVIN
2 7 1 2
3 GND LX 6
SD PGND
+2.5VP 2 1 4 5
PR116 VREF VFB
PR117 1
105K_0603_0.5% PQ25 CM3718 100K_0603_5%
FB_VDD+
1
2N7002_SOT 23 1 2 + PC95
1
PC97 D 220U_D2_4VM
1
PR118 2 PC96
G 0.1U_0603_16V7K 2
2
105K_0603_0.5% 1U_0603_10V6K S 1 PR119 2 1 2
PC98
2
1K_0603_5%
2
470P_0603_50V8J
REMOTE SENSE
PR183
44,49 VS_ON 1 2
0_0603_5%
1
PR120 D
1 2 2 PR121
31,33,37,38,43,49 SUSP#
G 100K_0603_5%
@0_0603_5% S
PQ26
3
2N7002_SOT 23
1
A A
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE DDR_1.25V/THROTTLING
LA-1911
5 4 3 2 1
A B C D
+5VALWP
1 1
2
PR126
B+
0_0603_5%
PR122
Battery Feed
2
80.6K_0603_1%
1
Forward
1
PC99 PU12
1U_0603_10V6K 32 7 2 1
1
VCC RAMPS PR123 10K_0603_5%
2
5 H_VID4 1 39 VCORE_PWRGD 24,40,49
VID4 PGOOD
5 H_VID3 2
3 VID3
5 H_VID2 VID2
+5VALWP 5 H_VID1 4 25 PWM1 53
5 VID1 PWM1
5 H_VID0 VID0
5 H_VID5 6 24 ISEN1+ 53
VID12.5 ISEN1+ 23
ISEN1- ISEN1- 53
1
5,49 VCORE_ENLL 34
ENLL
PR124 1 2 33 26 PWM2 53
0_0603_5% DRSEN PWM2
PR125 0_0603_5% 27 ISEN2+ 53
35 ISEN2+ 28
2
DSEN# ISEN2- ISEN2- 53
20 PWM3 54
2
10 PWM3 2
OCSET
21 ISEN3+ 54
PR130 ISEN3+ 22
PC100 ISEN3- ISEN3- 54
1
2 PR127 1 +5VALWP
PR129 69.8K_0603_1% 2 1 11
SOFT @ 0_0603_5%
31 PWM4 54
475_0603_1% PWM4
0.047U_0603_25V7M
30 ISEN4+ 54
9 ISEN4+ 29
2
DSV ISEN4- ISEN4- 54

Frequency Select PC101 PR132
1
PU5B 1000P_0603_50V7K 20K_0603_1%

1
PC102 PR131 5 36 15 2 1 1 2
21.5K_0603_1% 7 + PR133 FS COMP
0
1
100P_0603_50V8J 6 100K_0603_1% 2 1 PC103

- 22P_0603_50V7K
37 13
2
LM358A_SO8 DRSV FB
2
PR134 @0_0603_5% PR135

1 2 38 14 2 1 PR137
VR-TT# NC
2
@ 0_0603_5% PC104 @0_0603_5%

2
2
PR136 40 16 2 1 2 1
PC105 PR138 NTC VDIFF
17
VSEN
1
10K_0603_1% @220P_0603_50V8J 12 18 @ 1000P_0603_50V7K PR139

GND VRTN 2.26K_0603_1%
@330K_0402_5% +5VALWP
PR140 19 8 1 2
1
GND OFS
Place close to IC
2
1
1
1
@10K_0603_5% ISL6247_MLFP40 PQ27 PR143
2
2
PR144 PR142 0.1U_0603_16V7K 3 1 2 1
D
2
1M_0603_1% PC106
2
3 45.3K_0603_1% +3VALWP Panasonic ERTJ0EV334J (0402) 2N7002_SOT 23 16.2K_0603_1% 3
1
PR141 PC107
1
+3VALWP
G
Locate this NTC resistor on
2
PR146 32.4K_0603_1% PQ28
2
2
2 1 1.2VDD PCB between phase 2 and 3 1U_0603_10V6K
1
1
2
PR148 PR149
2
0_0603_5% PC108 for thermal compensation. 2 PR145 PR147 2 1
1
4.7U_1206_16V4Z 340K_0603_1% 5.1K_0603_1% 0_0603_5%
+CPU_CORE Remote
PU13 TP0610T_SOT23 Sensing
2
1
+VCCVIDP PQ29 27K_0603_5% 2 PR150 1
3
VCCSENSE 5
1
1 5 D 2N7002_SOT 23 @0_0603_5%
1
IN OUT PR151
2 Place near +VCC_CORE
1
4 G D 2 1
5 VID_PWRGD PG
2 PQ30 0_0603_5% output capacitor
S 49 GMCH_SEL
1
3 2 G 2N7002_SOT 23 PR152
3
EN GND PC109 S 2 1 VSSSENSE 5
1
4.7U_1206_16V4Z PR153 @0_0603_5%
3
PR154 MIC5258_SOT23-5 2 1 2 PQ31
2
4 H_BOOTSELECT
37 VR_ON 2 1 22K_0603_5% MMBT3904_SOT23
1
0_0603_5%
2
PR155
3
PR156
100K_0603_5% 100K_0603_5%
1 . When mode control signal is
2
h i g h/ low, the VR will operate to

1
N o rthwood/ Prescott load line

( N orthwood="0",Prescott="1")
4
2 . VID5(12.5) should be pulled 4
h i gh, when the VR operates to

Nothwood load line.
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS CPU_CORE_Controller
LA-1911
A B C D
A B C D
CPU_B+ PL13
PC110 1 2 B+
+5VALWP C8B BPH 853025_2P
2 1 PC112 1 1
5
6
7
8
5
6
7
8
1
4.7U_1210_25V6K PC113 PC141 PC142
2
+ PC149
D
D
D
D
D
D
D
D
PR157 0.22U_0805_16V7K PQ32 PQ33 PC111 4.7U_1210_25V6K 470P_0402_50V7K 0.1U_0603_25V7K 220U_25V_M
IRF7811W_S08 4.7U_1210_25V6K 2
3_0603_5%
2
IRF7811W_S08 2
G
S
S
S
S
S
S
1 1
1
**
4
3
2
1
4
3
2
1
PU14
6 2 PR160
VCC BOOT 1_0603_5%
PWM1 52
3 1 N5 2 1 Panasonic ETQ-P4LR56WFC
PR158 PWM UGATE PL14
2 1 7 8 PHASE1 1 2
EN PHASE
2
0_0603_5%
2
PC116 4 5 0.56UH_ETQP4LR56WFC_21A_20%
GND LGATE
5
6
7
8
5
6
7
8
PR159 PC117
499K_0603_1% ISL6207CB-T_SO8
D
D
D
D
D
D
D
D
0.1U_0603_16V7K PQ34 PQ35
1
1U_0805_25V4Z
1
1
PR161 PC119
SI4362_SO8 SI4362_SO8
G
S
S
S
S
S
S
2 1 2 1
4
3
2
1
4
3
2
1
CPU_DRIVE_EN 32.4K_0603_1% 0.01U_0603_50V7K
N6
52 ISEN1- PH3
52 ISEN1+ 2 1
820_0603_5%
CPU_B+
2
PC120 2
1 2 PC123
5
6
7
8
5
6
7
8
4.7U_1210_25V6K PC122 1
2
1
PQ36 PQ37 PC121 PC143 PC144
D
D
D
D
D
D
D
D
0.22U_0805_16V7K
1
PR163
3_0603_5% IRF7811W_S08 IRF7811W_S08 4.7U_1210_25V6K 470P_0402_50V7K 0.1U_0603_25V7K
4.7U_1210_25V6K 2
2
G
G
S
S
S
S
S
S
2
1
Local Transistor
4
3
2
1
4
3
2
1
PU15 PR165 **
Swtich Decoupling
6 2
VCC BOOT 1_0603_5%
PWM2 52
PWM UGATE PL15
7 8 PHASE2 1 2 +CPU_CORE
EN PHASE
2
5
6
7
8
5
6
7
8
PR164 4 5 0.56UH_ETQP4LR56WFC_21A_20%
GND LGATE
2
PC125
D
D
D
D
D
D
D
D
1
499K_0603_1% ISL6207CB-T_SO8 PQ38 PQ39 PD30
1U_0805_25V4Z
SI4362_SO8 SI4362_SO8
1
G
S
S
S
S
S
S
PR166 PC126 EC31QS04
2 1 2 1
4
3
2
1
4
3
2
1
2
32.4K_0603_1% 0.01U_0603_50V7K
3 3
N8
PH4
52 ISEN2-
52 ISEN2+ 2 1
820_0603_5%
Local Transistor
Swtich Decoupling
4 4
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CPU_CORE_Power stage1
LA-1911
A B C D
A B C D
CPU_B+
PC127
1 2
5
6
7
8
5
6
7
8
PC128 PC129 PC130 1
1
+5VALWP PC145 PC146
D
D
D
D
D
D
D
D
PR168 0.22U_0805_16V7K PQ40 PQ41
3_0603_5% IRF7811W_S08 IRF7811W_S08 4.7U_1210_25V6K 4.7U_1210_25V6K 470P_0402_50V7K 0.1U_0603_25V7K
2
2
G
G
S
S
S
S
S
S
4.7U_1210_25V6K
4
3
2
1
4
3
2
1
PU16 **
1
6 2 PR170 1
VCC BOOT 1_0603_5%

PWM3 52
PWM UGATE PL16
7 8 PHASE3 1 2
EN PHASE
2
PR169
4 5 0.56UH_ETQP4LR56WFC_21A_20%
GND LGATE
5
6
7
8
5
6
7
8
499K_0603_1% PC131
ISL6207CB-T_SO8
D
D
D
D
D
D
D
D
1U_0805_25V4Z PQ42 PQ43
SI4362_SO8 SI4362_SO8
1
1
PR171 PC133
G
S
S
S
S
S
S
2 1 2 1
4
3
2
1
4
3
2
1
32.4K_0603_1% 0.01U_0603_50V7K
N10
PH5
52 ISEN3-
52 ISEN3+ 2 1
CPU_DRIVE_EN CPU_B+
PC134 820_0603_5%
1 2
5
6
7
8
5
6
7
8
PC137 1
2
1
2
PC135 PC136 PC147 PC148 2
D
D
D
D
D
D
D
D
PR173 0.22U_0805_16V7K PQ44 PQ45
3_0603_5% IRF7811W_S08 IRF7811W_S08 4.7U_1210_25V6K 470P_0402_50V7K 0.1U_0603_25V7K
4.7U_1210_25V6K 2
2
G
G
S
S
S
S
S
S
4.7U_1210_25V6K
1
Local Transistor
4
3
2
1
4
3
2
1
PU17
Swtich Decoupling
**
6 2 PR175
VCC BOOT 1_0603_5%
PWM4 52
PWM UGATE PL17
7 8 PHASE4 1 2 +CPU_CORE
EN PHASE
2
5
6
7
8
5
6
7
8
PR174 4 5 0.56UH_ETQP4LR56WFC_21A_20%
GND LGATE
2
499K_0603_1%
D
D
D
D
D
D
D
D
PC138 ISL6207CB-T_SO8 PQ46 PQ47
1U_0805_25V4Z SI4362_SO8 SI4362_SO8
1
G
S
S
S
S
S
S
PR176 PC140
2 1 2 1
4
3
2
1
4
3
2
1
32.4K_0603_1% 0.01U_0603_50V7K
N12
3 3
52 ISEN4- PH6
52 ISEN4+ 2 1
820_0603_5%
4 4
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CPU_CORE_Power stage2
LA-1911
A B C D
DAL00 PIR LIST POWER PIR LIST
************* Rev0.1 PIR List ************** EVT2 page Reason for change Modify list
04/01/03 Written by Po 49,50,51 M o d i f y power sequence for H/W request D e l e t e P R 89,PR90,PR120 and add PR179,PR180,PR181,PR183
P52:Add Oz168 for reservation 49 D e s i gn change VTT_GMCH OCP point C h a nge PR95 from 75K to 220K
47 D e s ign change charger voltage C h a n g e PR63 from 47.5K to 95.3K and add PR184
04/09/13 Written by Jei
P36:Swap RP142 Pin 10 <-> 6; Pin 7 <-> 8 51 I n crease throttling speed C h a nge PC91 from 1000P to 10P
P36:Swap CP4 Pin 4 <-> 1; Pin 2 <-> 3
50 C h a n g e VGA_CORE voltage for H/W request C h a n g e P R 1 06 from 13.3K to 6.49K;PR103 from 5.62K to 3.92K
53,54 S o l v e CPU_CORE noise for EMI request A d d 4 7 0 P at location PC141,PC143,PC145,PC147
A d d 0 . 1 U at location PC142,PC144,PC146,PC148
53,54 Update BOM C h a n g e P Q 3 4 , P Q35,PQ38,PQ39,PQ42,PQ43,PQ46,PQ47 from IRF7832 to SI4362
52 C h a n g e P C100 from 0.033U to 0.056U; delete PR138
47 D e l e t e P C 3 7; change PR43 from SD021100D00 to SD036100D00
48 C h a n g e P C60,PC61 from SE026473K06 to SE023473NT1
53,54 T o prevent shortage C h a n g e P C 1 4 2,PC144,PC146,PC148 from SE072104K00 to SE042104K01
PVT 53,54 C h a n g e high side MOSFET and add gate/boot C h a n g e P Q 3 2 ,PQ33,PQ36,PQ37,PQ40,PQ41,PQ44,PQ45 from IRF7821
r e sistor for EMI request t o I R F 7 8 1 1 W , change PR157,PR163,PR168,PR173 from 0ohm to 3ohm,
c h a n g e P R160,PR165,PR170,PR175 from 0ohm to 1ohm
49 S o l v e p ower sequency problem for H/W request D e l e te PR180 and add PR177(0ohm)
50 C h a n g e VGA_CORE voltage for H/W request C h a n g e P R 1 0 6 from 6.49K to 0ohm (for X6326251001_NV33M/34M)
46 C h a n g e CPU/Battery's OTP point for Thermal C h a n g e P R 3 9 from 16.9K to 14.7K, PR32 from 2.8K to 3.32K
team request P R 41 from 3.24K to 3.48K
53 S o l v e LAN transmission has high frequency Add PC149
noise issue
47,52 Update BOM C h a n g e P D 1 7 f rom SC1B051L000 to SC11QS04000, delete PR150,PR152 and
a d d P R 1 4 9 , P R 1 51(0ohm),delete PC105,change PC100 from 0.056U to 0.047U
PVT(memo) 50 C h a n g e VGA_CORE voltage for H/W request C h a n g e P R 1 0 3 f r o m 3.4K to 4.53K, PR106 from 4.53K to 9.09K (for X6326251002_NV31M)
52 C h a n g e CPU_CORE OCP point for QAD request C h a n ge PR131 from 27.4K to 21.5K
PVT(memo) 50 M o dify CPU_CORE load line C h a n ge PR139 from 1.87K to 2.26K

52 S o l v ed CPU_CORE shutdown issue Add PC103

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND DAL00 PIR LIS T
B 0.2
5 4 3 2 1
Rev 0.2
Page Location From To Page Location From To
5 Modify L5,L6 10U 4.7U 38 ADD L54 X FCM2012C-800
D D
6 DEL C20,C21 22U X 38 ADD C789 X 1U
6 DEL 470U 470U X 38 ADD U56 X SST39VF080-70
11 Modify L15 0.82U 4.7U 38 DEL U13 29F040 X

MODIFY C49,C488
26 C528 0.01U 0.1U 39 MODIFY Q6 DTA114YKA 2N7002
26 DEL C50 0.01U X 40 ADD R625 X 10K
26 ADD C787 X 1000P 40 MODIFY R464 20K 33K
26 ADD C788 X 4.7U 40 MODIFY C629 0.33U 1U

C 27 ADD D21 X RB751V 40 MODIFY R465 100K 68K C
27 ADD C83 X 0.1U 40 ADD L55,L56 X CHB1608U301

ADD C797,C798 ADD Q23,Q38
28 C799 X 0.1U
43 Q39,Q40 X 2N7002
DEL L42,L43
31 L44 CHB2012U170 X Q46
ADD L10,L11 ADD R450,R516
31 L12 X CHB2012U170
43 R457,R452 X 470 Ohm
31 ADD U57 X 74HCT4066 R272
ADD R617,R618
31 R619,R620 X 1M 43 ADD R612,R613 X 10K
R621,R622 ADD L55,L56
R623,R624 43 L57 X BLM11A601S
B B
31 MODIFY C781 0.01U 0.1U 44 ADD C794,C795 X 1U
32 MODIFY R238,R241 1.3K 1.5K
38 CHANGE U50 SN74HCT273PW SN74HCT374PW
38 CHANGE C729 R542
38 CHANGE R542 C729
38 ADD C793 X 100P

ADD C790,C791
A
38 C792 X 220P
A

Title
PIR
Custom
LA-1911 0.2
5 4 3 2 1
5 4 3 2 1
Rev 1.0
31 ADD U61 X SI9182DH
D D
31 ADD C809,C811 X 4.7U
31 ADD C810,C812 X 0.1U
31 ADD R637 X 69.8K
31 ADD R638 X 24K
C C
B B
A A

Title
PIR
Custom
LA-1911 1.0
5 4 3 2 1
5 4 3 2 1
Rev 0.3
22 ADD R627 X 0 Ohm
D D
22 ADD U58 X TC7SH08FU
22 ADD C806 X 0.1U
22 ADD R628 X 10K
31 ADD C807 X 1U
31 DEL Q15 SI2302DS X
31 ADD U59 X SI4800DY
31 ADD R634,R635 X 0 Ohm

C 32 ADD R629,R630 X 0 Ohm C
32 ADD R633 X 10K
40 Modify R445 180K 820K
40 ADD R631 X 0 Ohm
40 ADD R632 X 0 Ohm
40 ADD R625 X 10K
44 DEL C795 1U X
B
44 MODIFY R606 68K 0 Ohm
B
A A

Title
PIR
Custom
LA-1911 0.3
5 4 3 2 1
www.s-manuals.com

Compal La-1911 r1.0 Schematics PDF

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Compal La-1911 r1.0 Schematics PDF

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A B C D E

SAPPORO 150 (DAL00)

LA-1911 REV1.0 Schematic

Springdale(865PE)+ICH5+nVIDIA NV34M(64MB VRAM)

Date: Friday, August 08, 2003 Sheet 1 of 57

DAL00 LA-1911 BLOCK DIAGRAM

IEEE1394(BTO ) mBGA-460 Secondary

Date: Friday, August 08, 2003 Sheet 2 of 57

ICH5 SM Bus address

DDR DIMM0 1010 000Xb

A#35 D#32 N22 H_D#33

B6 FERR# Pull-up 62ohm FERR#/PBE# Pull-up 62ohm

AA20 ITPCLKOUT0 Pull-up56ohm TESTHI6 Pull-up 62ohm

AD2 NC float VIDPWRGD Pull-up 8.2Kohm

AD20 VCCA Connect to CPU VCCIOPLL Connect to CPU

Asynch GTL+ PULL HIGH

AMP_3-1565030-1_Prescott Trace >= 25mils

+CPU_GMCH_GTLREF +CPU_CORE 12mils(min),Space 15mils

H_VID3 5 4 2 0_0603_5% 1 1 2 H_THERMDC 3 6

H_VID1 7 2 C78 U4A 8 4

Compal Electronics, Inc.

Prescott Processor in uFCPGA478 (2/2)

Place 11 North of Socket(Stuff 8)

22uF depop reference

Place 9 South of Socket(Unstuff all)

C15 C14 C13 C12 C19 C18 C17

470uF _ERS10m ohm* 15, ESR=0.5m ohm

A Decoupling Reference Document: A

2 2 2 Decoupling Reference Requirement:

U43A U43F U43G

1 H_A#13 E30 B16 H_D#10 AN30 AD3 K16 D33

H_A#19 HA18# HD15# H_D#16 VSS VSS VSS VSS

H_A#31 G26 J19 H_D#28 AM17 Y35 H22 C20

H_REQ#3 HREQ2# HD33# H_D#34 VSS VSS VSS VSS

C15 D14 H_D#53 AH30 V6

Compal Electronics, Inc.

DDR Resistive Compensation

DDRA_SMA[0..12] U43B +2.5V

2.2U_0805_16V4Z AE31 DDRB_SDQ36 1U_0603_10V6K 30.9K_0603_1%

SDQS_B5 DDRB_SDQS5 13,14

C612 C138 W30 DDRB_SDQ41

Close to GMCH(AP9) SDQ_B46 DDRB_SDQ47

Note: 16 AGP_GNT # M7 AA5 AGP_AD10

1 1 Close to GMCH(AE3) 16 AGP_WBF# R9

AGP_ST2 GST1 GAD18 AGP_AD19

1 1 Close to GMCH(AE2) HUB_HL2 AK2

HUB_HL8 HI7 GAD28 AGP_AD29

AC10 CI4 GSBA7#

1 1 C lose to GMCH(AF4) CI_SWING_GMCH AF2

R596 2 1 AK4 ICH_SYNC# A3

C175 C171 E26

+AGP_VREF = 0.3535 Follow Springdale Chipset Platform Design guide Rev1.11(12474)

44.2_0603_1% R151 1 S p r i n gdale Customer Schematic R1.2 page18

C lose GMCH ball (AD2) Springdale-AGP/HUB/VGA/CSA (4/5)

Compal Electronics, Inc.

+2.5V +2.5V D DRA_VREF trace width of

+2.5V +2.5V D DRB_VREF trace width of +2.5V

KLINK_5746-3-111 DDR-SODIMM SLOT2

Channel B(DIMM2) Termination resistors & Decoupling caps

DDRA_SDQ55 2 3 3 2 DDRA_SDQ56 C107 C129 C185 C200 C649 C172

DDRA_SDQS7 1 4 4 1 DDRA_SDQ57 0.1U_0402_10V6K 0.1U_0402_10V6K DDRB_SDQ56 2 3 3 2 DDRB_SDM7

1 1 166 66 14.3 14.3 100/200 48

R153 R181 27 CLK66M_OUT 3 1 2