IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 55, NO.

2, FEBRUARY 2008 131

Class-AB Fully Differential Voltage Followers

Jaime Ramirez-Angulo, Fellow, IEEE, Antonio J. Lopez-Martin, Member, IEEE,
Ramon G. Carvajal, Senior Member, IEEE, and Belen Calvo, Member, IEEE

Abstract—Two fully differential class-AB voltage followers with accurately the differential input voltage , in-
essentially enhanced slew rate are introduced. The first one is dependently of the load. This circuit, as well as other followers
based on the crossquad cell. The second one is based on the conven- using positive feedback (e.g., [8], [9]), operate on the principle
tional voltage follower. Class-AB operation with accurate control that load current variations lead to unequal positive and neg-
of the quiescent current and extended bandwidth is achieved in
both cases with minimal additional circuitry, zero extra static ative gate–source voltage changes in transistors ,
power dissipation and without increasing supply requirements. and in transistors , , respectively, [see Fig. 1(f)].
Experimental results of a test chip fabricated in 0.5- m CMOS The cross connection from the source of to the gate of
technology show slew rate enhancement of over a factor 15 and (and from the source of to the gate of ) implements pos-
large extension of the peak-to-peak input range. itive feedback, leading to a cancellation of these variations in the
Index Terms—Analog signal processing, class-AB circuits, differential output voltage : the individual output voltages
CMOS analog integrated circuits, voltage buffers. and are given by
and , where is the qui-
escent gate–source voltage of all transistors. If no body effect is
I. INTRODUCTION present, then the differential output voltage follows accurately
HE quasi-floating gate (QFG) technique was introduced the differential input voltage according to
T in [1]. It uses MOS transistors weakly connected to a dc
biasing voltage by means of a large resistive element .
. This takes place independently of the value of the
current and of the load resistor .
This element can be realized using a reverse biased PN junc- Therefore, the crossquad cell is ideally characterized by zero
tion, a diode connected transistor, or a transistor working in sub- differential output impedance, which makes it suitable to imple-
threshold region [2]–[5]. The QFG technique allows setting ac- ment highly linear transconductors by connecting a resistor at
curately the quiescent operating point at the gate of the QFG the output terminals that transforms a differential input voltage
transistor which performs as a floating gate from the dynamic into a current [7]. Current can be sensed
point of view. One of its applications is the compact implemen- and replicated by including diode connected transistors at the
tation of class-AB circuits with essentially enhanced slew rate, drains of , . In practice, the maximum value of the load
accurate control of the quiescent current and zero extra static current is limited by the bias current and as a re-
power dissipation [6], [7]. QFG class-AB circuits have the same sult, the peak-to-peak output voltage is restricted to a maximum
supply requirements as their class-A counterparts. In this paper value .
we discuss two additional applications of the QFG technique In order to extend the input range (or to allow lower resis-
for the implementation of compact class-AB fully differential tive loads for a given input amplitude) the QFG scheme of
buffers. Fig. 1(b) can be used. Using this scheme dynamic currents
whose values are not limited by the bias current can be gener-
ated. In the circuit of Fig. 1(b), the gates of transistors ,
II. CLASS-AB CROSSQUAD are connected to a biasing voltage through large valued re-
sistive elements , which are implemented using minimum
Fig. 1(a) shows the conventional MOS crossquad [8]. In this size pMOS diode connected transistors as shown in Fig. 1(e).
circuit, positive feedback is used to compensate for nonlinear The gates of and are also connected to the sources of
variations in the gate–source voltage of , , , so and through small-valued capacitors ( 1 pF). In
that the differential output voltage follows this way, under quiescent conditions, the voltage at the gates of
and takes a value .
This sets the quiescent current through these transistors to
Manuscript received April 25, 2007; revised September 21, 2007. This work a value . Meanwhile, under dynamic condi-
was supported in part by the Spanish Ministry of Education and Science and
FEDER under Projects TEC2006-13031-C03 and TEC2007-67460-C03. This
tions, capacitors (since they can not charge rapidly through
paper was recommended by Associate Editor B. Bakkaloglu. -operate as floating batteries and transfer variations in
J. Ramirez-Angulo is with the Klipsch School of Electrical and Computer , sensed at the sources of and , to the gates of
Engineering, New Mexico State University, Las Cruces, NM 88003-8001 USA and , respectively. Note that this takes place for signal
(e-mail: jramirez@nmsu.edu).
A. J. Lopez-Martin is with the Department of Electrical and Electronic En-
frequencies higher than . In practice,
gineering, Public University of Navarra, E-31006 Pamplona, Spain (e-mail: an- with typical values of in the range of 100 G , Hz.
tonio.lopez@unavarra.es). Therefore, assuming positive variations in and negative
R. G. Carvajal is with the Department of Electronic Engineering, University variations in , the voltages at the gates of and are
of Seville, E-41092 Sevilla, Spain (e-mail: carvajal@gte.esi.us.es).
B. Calvo is with the Group of Electronic Design, University of Zaragoza, also subject to the same variations. This causes the drain current
E-50009 Zaragoza, Spain (e-mail: becalvo@unizar.es). to decrease (turning off ) and to increase, and thus al-
Digital Object Identifier 10.1109/TCSII.2007.911827 lows generation of signal currents with values much greater
1549-7747/$25.00 © 2007 IEEE
132 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 55, NO. 2, FEBRUARY 2008

Fig. 1. (a) Conventional class-A crossquad. (b) QFG class-AB crossquad. (c) Conventional fully differential voltage follower. (d) QFG class-AB fully differential
voltage follower. (e) Implementation of R 1V
. (f) Illustration of unequal gate–source voltage changes 01V
, and i
for equal drain current changes and0i
using transfer characteristic of MOS transistor. All transistor bulk terminals are connected to the respective source terminal.

than the bias current . A dc level shifting using floating ca- voltage variations at the gates of , follow input voltage
pacitors to get class-AB operation has been reported recently in variations , which lead to signal currents that can be
[10]. However, in that case the capacitor charge is periodically essentially larger than the bias current . The small-signal gain
updated using a switch, so the resulting circuit is not suited for of the class-A version of Fig. 1(c) is given by
continuous-time applications, as opposed to the approach pro-
posed here.
(1)
III. CLASS-AB FULLY DIFFERENTIAL VOLTAGE FOLLOWER
The circuit in Fig. 1(c) shows the scheme of a classical differ- Since in its class-AB counterpart of Fig. 1(d) transistors ,
ential voltage follower. In this circuit the differential output re- are also active, straightforward AC analysis of the circuit
sistance is given by and the maximum load cur- (with replaced by a short circuit and by an open
rent and peak-to-peak input voltage are also limited to a value circuit) leads to a gain
and , respectively. The output
voltage follows the input voltage , but in this case it is
subject to nonlinear distortion since . (2)
Class-AB voltage followers have been reported that require
non negligible additional hardware and power dissipation as
This gain can be greater than one, which is consistent with the
well as increased supply requirements. They also lead to de-
experimental results discussed later.
graded frequency response (e.g., [11]). Fig. 1(d) shows a new
class-AB version of the circuit of Fig. 1(c) based on the QFG
technique. In similar fashion as for the circuit of Fig. 1(b) the IV. LARGE-SIGNAL ANALYSIS
gates of the biasing transistors , are connected to a dc
biasing voltage through large resistive elements (imple- A. Slew-Rate Analysis
mented as shown in Fig. 1(e)) and through capacitors to The slew rate of the differential followers presented is
the input terminals and . , where is the maximum output current available
The drain current in , has a value under quiescent and the load capacitor. For the class-A circuits of Fig. 1(a)
conditions. Class-AB operation is also achieved in this case: and (c), and therefore . In the circuit
RAMIREZ-ANGULO et al.: CLASS-AB FULLY DIFFERENTIAL VOLTAGE FOLLOWERS 133

of Fig. 1(b) and (d), when there is no input signal where the error term is given by
and

(3)
(8)
where and are the threshold
voltage and transconductance factor, respectively, of transistors
and . When a large differential input is applied, this Using the Maclaurin series approximation for and
input variation is transferred to the gate of and , leading taking in (8), we get
to drain currents (assuming a complementary input swing)

(9)

where the increase in the dominant third-order nonlinearity term

with can be noticed. This analysis does not consider
reactive effects and channel length modulation, but it helps as-
sessing the main factors influencing linearity.
The output voltage for the circuit of Fig. 1(d) is also given by
(7) but now the error term is

(4)
(10)
where for the follower of Fig. 1(d) and
for the follower of Fig. 1(b), respectively. Constant with and given by (4). Due to the dependence on of
is the attenuation due to the capacitive divider formed by and , linearity is degraded as compared with the circuit
and the parasitic resistance at the gate of , , and is of Fig. 1(c). This degradation is verified experimentally in the
given by . It is approximately 1 if we following section.
choose larger enough than . As mentioned before, it Linearity for the circuits of Fig. 1(a) and (b) is much better,
is clear from (4) that currents and are not bounded by and there is no degradation due to the class-AB operation in
, reflecting the class-AB operation of the followers. For large the circuit of Fig. 2(b) in this case. This is due to the positive
positive the output current is , whereas for large feedback provided by and , as explained in Section II.
negative the output current is . In both cases the Again experimental results in next section verify this feature.
maximum output current amplitude for a complementary input
step is given by approximately
V. EXPERIMENTAL RESULTS
A test chip prototype with the circuits of Fig. 1(a)–(d) has
been fabricated in a 0.5- m CMOS technology. All transistors
(5) have dimensions m m. They were tested with
a resistor k and load capacitances
pF at both outputs. The bias current was set to A
which leads to a increase over the class-A topology given and the single power supply to V. This current and
by transistor sizes lead to transconductance gain values of approx-
imately mA/V.
Focusing on the class-AB behavior of the proposed circuits,
Fig. 3 shows a comparison of the transient response of the output
(6) signals for the class-A and class-AB crossquad and conven-
tional circuits of Fig. 1(a)–(d) when applying a complementary
The analysis is only approximate as it assumes an ideal MOS 150 kHz input pulse signal with 1 amplitude. Experimental
I–V square law, but it provides insight about the large-signal results show a slew rate enhancement of over a factor 15 for the
class-AB operation of the circuit. class-AB version of both circuits. In this 0.5- m CMOS process
A V mA/V . Using (6) with this value,
B. Linearity Analysis V, and A, the theoretical slew-rate
enhancement predicted is 16.9, in reasonable agreement with
The output voltage in the circuit of Fig. 1(c) is given by the experimental value.
The class-AB version of the conventional voltage follower
had a gain . This is consistent with the gain expres-
(7) sion (2) for k and mA/V for all transistors.
134 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 55, NO. 2, FEBRUARY 2008
Fig. 2. Experimental output waveforms for 50 kHz, 1.5 V sinusoidal input
waveforms. (a) Class-AB (top) and class-A (bottom) conventional voltage fol-
lower. (b) class-AB (top) and class-A (bottom) crossquad. Vertical axis 0.5V/
div. Horizontal axis 5 s=div .
Next, we verify if the proposed class-AB structures overcome
the limitation in the maximum load current and
peak-to-peak input voltage that exhibit their
class-A counterparts. Fig. 2 shows a comparison of the output
voltages of the class-A and class-AB circuits by applica-
tion of sinusoidal input signals with 1.5 V peak-to-peak ampli-
tude and 50-kHz frequency with A and k .
The transconductance gains of all transistors are in this case
mA/V. Expected saturation of the
output signal can be observed in the class-A case for ampli-
tudes V. No saturation can be observed
in the class-AB case due to increased dynamic currents avail-
able. The class-AB version of the conventional follower shows
in this case close to unity gain which is consistent again with the
values for and . The unclipped waveforms confirm efficient
class-AB operation of both the proposed class-AB versions of
the crossquad and of the conventional differential voltage fol-
lower.
The main performances for all circuits are summarized in
Table I and the fabricated chip microphotograph is shown in
Fig. 3. Comparison of pulse responses of class-A and class-AB fully differen-
tial followers (a) Class A (top) and class-AB (bottom) crossquad output wave-
forms. (b) Class A (top) and class-AB (bottom) ouput waveforoms for conven-
tional fully differential voltage follower. Vertical axis 0.5V/div. Horizontal axis
2 s/div.
Fig. 4. For the cross-quad topology, measured bandwidth was 8
MHz and 14 MHz for both the class-A and class-AB circuits, re-
spectively, while the measured bandwidth was 3.7 and 6.3 MHz
for the class-A and class-AB conventional voltage follower cir-
cuits, respectively.
Experimental output impedance was essentially smaller than
in both circuits since no noticeable change in output am-
plitude could be observed by removing . THD for a 0.5-
1-MHz sinusoidal input signal with , k
and 70-pF load capacitors was 0.036%, 0.032%, 0.15%, and
0.7% for the circuits of Fig. 1(a)–(d), respectively. Noise den-
sity was 10, 9, 8, and 5 nV/ Hz for the same circuits.
VI. CONCLUSION
Simple modifications of the crossquad and of the conven-
tional differential voltage follower were introduced. These mod-
ifications provide them with efficient class-AB operation and
extended bandwidth and do not require increased supply volt-
ages or additional quiescent power dissipation. The modifica-
RAMIREZ-ANGULO et al.: CLASS-AB FULLY DIFFERENTIAL VOLTAGE FOLLOWERS 135

TABLE I
SUMMARY OF PERFORMANCES FOR CIRCUITS IN FIG. 1 WITH R = 20 k
, I = 50 A AND C = 70 pF

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