Real Time (problems)

Lec (2) ADC:

Resolution ( Q ) , LSB=V ref ¿ ¿

FS=V ref −LSB

 Choosing the number of bits based on the dynamic range ( ADC stage)
V max
N ≥ ln( ¿ )¿
V noise
 Choosing the number of bits based on the resolution required
(transducer stage)
S max
N ≥ ln ( ¿ )¿
S noise

1
F max=
2∗conversion time

A
Maximum Quantization error ( qmax )= N +1
2

A
Average Quantization error ( q av ) = N +2
2

Where:
N= number of bits
LSB= lest significant bit
Vref = reference voltage
FS=full scale
Fmax= maximum frequency that can be converted
A=is the amplitude

Q/ Assume an AD7823 has 8 bit, if the Vref is 2.5V what is the LSB and FS?
Sol:
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 V ref 2.5 2.5
LSB= N
= = =0.976 mv
2 28 265

FS=V ref −LSB=2.5−0.976∗10−3 =2.94 v

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Q/ How many comparators are needed in a 4-bit flash ADC?
Sol:
Number of comparators ¿ 2N −1=16−1=15
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Example: 10 bit ADC, Vin= 0.6 volts (from analog device), Vref =1 volts, Find
the digital value of Vin .
Sol:
Resolution ( Q )=V ref ¿ ¿
Bit (9) MSB:

 Divided Vref by 2
 Compare Vref /2 with Vin
 If Vin is greater than Vref /2 , turn MSB on (1)
 If Vin is less than Vref /2 , turn MSB off (0)
 Vin =0.6V and V=0.5
 Since Vin>V, ∴ Bit (9) = 1 (on)
Bit (8):
 Compare Vin=0.6 V to V=Vref/2 + Vref/4= 0.5+0.25 =0.75V
 Since 0.6<0.75, ∴ Bit (8) =0 (off)
Bit (7):
 Go back to the last voltage that caused it to be turned on (Bit 9) and
add it to Vref/8, and compare with Vin
 Compare Vin with (0.5+Vref/8)=0.625
 Since 0.6<0.625, ∴ Bit(7) =0
Bit (6):
 V=(Vref/2) + (Vref/16)=0.5 + 0.0625=0.5625v
 Since Vin > V, ∴ Bit (6)=1
Bit (5):
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  V=(Vref/2) + (Vref/16) + (Vref/32)= 0.59375v
 Since Vin > V, ∴ Bit (5)=1
Bit (4):
 V=(Vref/2) + (Vref/16) + (Vref/32) + (Vref/64) = 0.609375v
 Since Vin < V, ∴ Bit (4)=0
Bit (3):
 V=(Vref/2) + (Vref/16) + (Vref/32) + (Vref/128) = 0.6015625v
 Since Vin < V, ∴ Bit (3)=0
Bit (2):
 V=(Vref/2) + (Vref/16) + (Vref/32) + (Vref/256) = 0.597523v
 Since Vin > V, ∴ Bit (2)=1

Bit (1):
 V=(Vref/2) + (Vref/16) + (Vref/32) + (Vref/256) + (Vref/512) = 0.5994761v
 Since Vin > V, ∴ Bit (1)=1
Bit (0):
 V=(Vref/2) + (Vref/16) + (Vref/32) + (Vref/256) + (Vref/512) + (Vref/1024) =
0.600452v
 Since Vin < V, ∴ Bit (0)=0

Example: A
transducer is
to be used to find the temperature over a range of 0 to 100 C. we are
required to read and display the temperature to a resolution of +- 1 C. the

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transducer produces a voltage from 0 to 3v over this temperature range
with +-3mv noise. Specify the number of bits in ADC:
1. Based on dynamic range.
2. Based on required resolutions.
Sol:
V
max 3
1. N ≥ ln( V ¿ )=ln ⁡( )≅ 7 bit ¿
noise 3∗10−3

S
max 100
2. N ≥ ln ( S ¿ )=ln ⁡( 1 )≅ 5 bit ¿
noise

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Example: An ADC has a conversion time of 100 µs. what is the maximum
frequency that can be converted?
Sol:
1 1
F max= = =5000 Hz=5 KHz
2∗conversion time 2∗100∗10−6
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Example: A 1 KHz sinusoidal signal to be digitized using 8-bit ADC. Find the
conversion time that can be used?
Sol:
1 1
conversion time= = =0. 5 ms
2∗F max 2∗1∗103
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Example: An 8-bits ADC is used to digitize a five volt (5v) full scale signal.
What is the resolution?
Sol:
full scale signal 5
Resolution ( Q )= = 8 =0.01953 v
2N 2

Q/ Predict how the operation of this “flash” analog-to-digital converter

(ADC) circuit will be affected as a result of the following faults. Consider
each fault independently (one at a time, no multiple faults)?

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1. Resistor R16 connected to ground.
2. Resistor R1 connected to Vref.
3. Solder bridge (short) across resistor R14.

Sol:
N=16, No. of resistors= 16, No. of comparators=15
1. Since R16 is connected to the ground, V ref =0 , so for that the input to
the non-inverting node of each comparator will be zero, so the output of
each comparator will be low (since Vin > Vref) but high to the priority
encoder, for that it will generate a binary number based on the highest-
order active input, ignoring all the other active inputs (only bit 15=1),so
the binary output =(1111)
2. Since R1 is connected to the Vref (R15 connected to the ground ) the
operation & the result of the flash ADC will be reversed, since:

Bit (0) (LSB):

 Divided Vref by 2
 Compare Vref /2 with Vin

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  If Vin is greater than Vref /2 , turn LSB on (1)
 If Vin is less than Vref /2 , turn LSB off (0)
Bit (1): assuming bit (0) =1
 Compare Vin= to V=Vref/2 + Vref/4
And so on for the other bits………..

3. ????????

Q/The above “flash” ADC circuit has a problem. The output code jumps
from 0000 to 1111 with just the slightest amount of input voltage (Vin). In
fact, the only time it outputs 0000 is when the input terminal is slightly
negative with reference to ground. Identify at least one possible
component faults that could cause this problem?
Sol: because the input to the non-inverting node (+) of each op-amp is
equal to zero due to Vref=0 (because R15 is connected to the ground), the
output of the op-amp is always low (since Vin > Vref) so for that all the
input to the encoder is high. The priority encoder chooses the highest order
active input (the output of the comparator 15), ignoring all the other input
and generating the binary number based on that which is (1111).
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Example: An analog signal of amplitude 12v is sampled with an 8bit ADC;
calculate the maximum and average quantization error?
Sol:
A 12
Maximum Quantization error ( qmax )= N +1
= =0.02343
2 29
A 12
Average Quantization error ( q av ) = N +2
= =0.01171
2 210
Lec (3) DAC:
Resolution ( Q ) , LSB=V ref ¿ ¿

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 for the R-2R DAC and binary weighted resistor DAC (if Rf=R/2)
N
1
V out =−V ref ∑ bN −i
i =1 2i

 In the binary weighed resistor DAC if (Rf≠R/2), the output is:

V1 V V 3 VN
V out =−I Rf =I R f ( + + +… N −1 )
R 2R 4 R 2 R

Since VN =Vref * bN
In case of 4-bit DAC

Rf b3 b2 b1 b0
V out =−V ref ( + + + )
R 1 2 4 8

N
Rf
V out =−V ref
R
∑ b N −i 21i−1
i=1

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Example: Find output voltage and resolution for a binary weighted resistor
DAC of 4 bits given:
R = 10 kΩ, Rf = 5 kΩ, Vref = -10 V, Applied binary word is 1001
Sol:
4
1 1 1 1 1
N=4, and since Rf =/2 V out =−V ref ∑ bN −i i
=−V ref (b 3 +b 2 + b1 +b0 )
i =1 2 2 4 8 16

Resolution ( Q )=V ref ¿ ¿

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Example: A data acquisition uses a DAC with a range of ±10 V. and a
resolution of 0.04 V. How many bits must be present in the DAC?
Sol:
2 N =V ref ¿ ¿

2.7
2 N =500 → log 500=N log 2→ N= =9 bit
0.3

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_____________________________________________________________
Q/ Design a Binary Weighted Resistor with 4 bits and R 5kΩ and R F 8kΩ to
produces an analog output voltage range from 0v to -15v? or what are the
analog outputs?
Sol:
Assuming the binary input=1001

4
Rf R f b3 b 2 b1 b 0
V out =−V ref
R
∑ b N −i 21i−1 =−V ref ( + + + )
R 1 2 4 8
i=1

8 1 0 0 1
¿−(−15 ) ( + + + =24+3=27 v
5 1 2 4 8 )
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Q/ Consider the same DAC above. What value of R F will give the output
range -10 V ≤ Vo ≤ 0 V?
Sol:

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