e·MMC v4.41 and v4.

5
Architecture for High Speed
Functions and Features
Victor Tsai
Micron Technology, Inc.

Flash Storage Summits 2010

 Agenda
• e·MMC Market Trend

• e·MMC
e MMC Versions

• e·MMC v4.41 New Features

for High-Performance Mobile Handset Platform

• e·MMC v4.5 Preview

• In Conclusion

Flash Storage Summits 2010 2

e·MMC Market Trend

Flash Storage Summits 2010 3

 e·MMC Share of Total Flash Market (% of total Gbytes)

20.0%
18.0%
16.0%
14.0%
12.0%
10.0%
8.0%
6 0%
6.0%
4.0%
2.0%
0.0%

2009
2010
2011
2012
2013

Source: Micron Marketing

Flash Storage Summits 2010 4

 e·MMC Density Trend
100%
90%
nits

80%
ntage of Un

70% 128GB
64GB
60%
32GB
50%
16GB
40%
Percen

8GB
30% 4GB
20% 2GB
10% 1GB
0%

2009
2010
2011
2012
2013
2014

Source: Micron Marketing

Flash Storage Summits 2010 5

Mobile Handset Booting Architecture
100%
MLC-based eMMC
90%
SLC-based eMMC
nits

80%
ntage of Un

70%
MLC-based
60% Raw/Error Free
NAND
50% SLC NAND

40%
Percen

OneNAND
30%
20% NOR
10%
0%

2009
2010
2011
2012
2013
2014
Source: Micron Marketing

Flash Storage Summits 2010 6

e·MMC Versions

Flash Storage Summits 2010 7

• e·MMC v4.41
– JEDEC document JESD84-A441, published in March
2010
– Replaces e
e·MMC
MMC v4.4
v4 4
– Incorporates all e·MMC v4.4 features, plus new
features

• e·MMC v4.4
– JEDEC document JESD84-A44, published in March
2009
– Considered to be obsolete
– Replaced
ep aced by e
e·MMCC v4.41

Flash Storage Summits 2010 8

e·MMC v4.41 New Features
for High
High-Performance
Performance Mobile
Handset Platform

Flash Storage Summits 2010 9

 New Features for Demand Paging
g g
• exMMC v4.41 specification introduces 2 new
features for Demand Paging code execution
strategies:
– Background Operation
– High Priority Interrupt (HPI)
• The features are complementary in improving
Write Throughput performance as well as
Paging request latencies on the non-volatile
memory solution

Flash Storage Summits 2010 10

 Background Operation
• e·MMC
MMC may perform
f various
i internal
i t l background
b k d operations
ti
necessary for internal maintenance purposes during run-time,
independent from the normal operations initiated by the Host
• In order to reduce latencies during time-critical operations such as
R d and
Read d Write,
W it and d minimize
i i i uncontrolled
t ll d power consumption
ti b
by
e·MMC during Idle time, this feature gives the Host the capability to
delay Device background operations until the Host explicitly initiates
Device background operation in a controlled manner
• How it works
– Device indicates to the Host the criticality of its need for internal
background maintenance operation by the value in the BKOPS_STATUS
(ECSD[246]) register
– When Host can allocates an extended period of inactivity
inactivity, it initiates Device
background operation by writing any value to BKOP_START (ECSD[164])
register
• i.e. CMD6 with argument = (0x 03A4 FF00)
– Host mayy use high
g priority
p y interrupt
p command to stop
p the background
g
operation

Flash Storage Summits 2010 11

 Background Operation Benefits
Minimized number of time
User write request latency
Foreground Time Consuming Operations consuming operations

BO Enabled

BO Disabled

Write
Latency
Average

Time
User is not accessing the memory Foreground User write requests

• Most time
time-consuming
consuming operations are due to exMMC internal Flash Data management (Garbage
collection, wear leveling, bad block management, …)
• By enabling the Background Operation feature:
▶ The OS can check the exMMC internal state and ask to perform time consuming operations in
background
g -- i.e. when the user applications
pp are not accessing
g the non-volatile memory
y
▶ The exMMC usage is optimized to be in the best internal state during Foreground operations
▶ The number of Foreground time consuming operations is reduced and average throughput
improved
Flash Storage Summits 2010 12
 High Priority Interrupt (HPI)
• During
D i the
th execution
ti off a large
l multiple-block
lti l bl k W Write
it or Erase
E
operation, BUSY time can be long and unpredictable
• Due to this limitation, it is difficult to utilize e·MMC in system use
cases such as Demand Paging, where data must be retrieved from the
e·MMC with minimal latency
• e·MMC 4.41 introduced a mechanism to interrupt a busy condition in a
controlled manner within a well-defined timeout, without
compromising
p g data integrity
g y
• How it works
– During a large multiple-block Write operation, data transfer can be terminated by a Stop
command (CMD12), but there may still be an extended period of BUSY time necessary
to complete the Write operation on the data already transferred
– HPI interrupts
i t t this
thi process andd returns
t th
the D
Device
i tto T
Trans state
t t suchh th
thatt th
the Host
H t can
send a Read command to retrieve high-priority data
– The CORRECTLY_PRG_SECTORS_NUM field (EXT_CSD bytes [245:242]) indicates the
number of 512B sectors successfully written to the e·MMC when the Write operation is
interrupted by HPI -- Host can restart the Write operation with the correct address
offset based on this information

Flash Storage Summits 2010 13

 HPI Function
e·MMC v4.4

System Write Read Host may have to wait long time to issue the read command

Write stop Read

CMD CMD25 CMD12 CMD18

DAT DATA Device Busy DATA

e·MMC v4.41 Host can interrupt the long busy

System Write Read Host can restart the rest of the write operation if needed

Write stop
p Arg[0]=“1” Read Write
CMD CMD25 CMD12 CMD12 CMD18 CMD25
Device
DAT DATA-0 Device DATA DATA-1 Busy DATA-2
Busy

Flash Storage Summits 2010 14

 HPI Benefits
Reduced time to
interrupt a time
Paging latency Foreground Time Consuming Operations
consuming operation

HPI Enabled

HPI Disabled

Paging
Latency
Average

Paging requests Time

• Time consuming operations can dramatically reduce Paging efficiency,

efficiency resulting in OS freeze
• By enabling the HPI feature:
▶ The OS is able to suspend on-going operations (generated by user applications or background
operation) to execute first the higher priority Paging operations
▶ The suspended operation can be resumed by the e
exMMC
MMC media driver as soon as the Paging
operation is terminated
▶ Paging performances are homogeneous even during Foreground time consuming operations

Flash Storage Summits 2010 15

 Combined Effects of
Background Operation and HPI
Minimized number of time
consuming operations
Foreground Time Consuming Operations Reduced time to interrupt a
Paging latency time consuming operation

BO+HPI Enabled

BO+HPI Disabled

Paging
Latency
Average

Time
Paging requests

• By enabling both Background Operations and HPI features:

▶ Average exMMC Write throughput is improved for better user experience
▶ Homogeneous paging latencies allows to configure easier the Paging Algorithm and avoids
System freezing
▶ On-going background operations can be postponed to process Foreground requests from user

Flash Storage Summits 2010 16

 DDR Mode (52Mhz Max.)
• Transferred
T f d user data
d t are sampled
l d on both
b th clock
l k edge
d (DDR),
(DDR) but
b t
CMD line remains sampled clock rising edge (SDR)
– The rising edge of the clock always capture odd numbered byte.
– The falling edge of the clock always capture even numbered byte.
– Block length is fixed as 512B.
– Two CRC16 are computed per data line
• (one for even bits and the other for odd bits)

Flash Storage Summits 2010 17

 Security and Data Integrity
exMMC v4.41/v4.4 specification introduces several new
features that address the security and data integrity needs
off high-performance
hi h f handset
h d platforms
l f
• Addition of hardware RESET pin and signal definition
• Partition features to enable segregation of data
• Replay Protected Memory Block (RPMB)
• Multiple Write Protection definitions
• Secure Trim, Secure Erase
• Data Reliability definition
• Enhanced Reliable Write definition

Flash Storage Summits 2010 18

 Different Types of RESET
• Hard
H dR Resett
– Power Cycle or triggered by POR
Power Cycle or RSTN

H/W RESET (RSTN) signal

– W ite p
Write otection is removed
protection emo ed in Pre-Idle state
CMD0 (0xF0F0F0F0)

memory regions protected by

Power-On WP Boot
• Soft Reset Sequences
q
CMD0 (0x00000000)
– CMD0 arg=0x00000000 --
device moves to Idle state Idle state

– CMD0 arg=0xF0F0F0F0
arg 0xF0F0F0F0 --
device moves to Pre-Idle state Identification
Sequences
– Write protection in memory
regions protected by Power-On
Stand-by
Stand by
WP is maintained state

Flash Storage Summits 2010 19

 Partition Feature
• H
Hostt can configure
fi partition
titi iin e·MMC
MMC device
d i using
i
extended CSD register
– Independent addressable space
– Partition
P titi size
i iis multiple
lti l off a WP group size
i
– Configuration is one time program
• Each partition can be configured with two types of
attribute
tt ib t
– Enhanced attribute (faster read/write access, better data
integrity)
– Default
D f lt attribute
tt ib t (normal
( l mass storage
t memory))
– User may create enhanced area in the user area

Flash Storage Summits 2010 20

 Host configures max 4 partitions allowing system to separate
code from user storage area

0x00000 Enhanced attribute

0x00000 General partition 1

0x00000
General partition 2 Standard attribute

0x00000
U
User d t area
data General partition 3 Standard attribute

0x00000
General partition 4 Standard attribute

0x00000 Standard attribute

User data area
Enhanced attribute

Flash Storage Summits 2010 21

 Use Case Example
e·MMC Physical Layout Partitioning Code Layout
Boot partition1,2 Boot partition1,2 XLOAD

EBOOT
Partition 1
(Enhanced) IPL
Logo

MBR
User Area
(Default) Partition 2
ULDR
(Enhanced) Copying
Partitioning
image data NK
Partition 3
OS (Image FS)
(Enhanced)
User area
EXTFAT
(
(Highh density
d )

Flash Storage Summits 2010 22

 Replay Protected Memory Block (RPMB)
• Thi
This ffunction
ti provides
id means forf the th system
t to
t store
t data
d t to
t
the specific memory area in an authenticated and replay
protected manner
• RPMB operation is a separate self
self-contained
contained security
command protocol that has its own command opcodes
(message types) and well-defined data structure
• This feature is designed to fulfill the security requirements
below
– EICTA CCIG Doc Ref: Eicta Doc: 04cc100
– GSMA Doc Ref: Security Principles Related to Handset Theft 3.0.0

Flash Storage Summits 2010 23

 RPMB Requirements (Device Side)
• Th
The R l
Replay P t t dM
Protected Memory BlBlockk (RPMB) iis
defined as a separate partition in the e·MMC Boot partition 1
memory space
– Partition size = multiples of 128KByte Boot partition 2
• Secure storage of Authentication Key
– An Authentication Key is written to the RPMB at RPMB
host system manufacturing time and is used as
shared secret to authenticate subsequent RPMB
t ansactions between
transactions bet een the Host and DeDevice
ice
• Transaction Authentication
– Transactions (messages) are authenticated by the
Message Authentication Code (MAC) which is a hash User data area
value generated by the Authentication Key,
Key a
random number provided by the Host and the
message itself using HMAC SHA-256
• [HMAC-SHA] Eastlake, D. and T. Hansen, "US Secure
Hash Algorithms (SHA and HMAC-SHA)", RFC 4634,
July 2006.

Flash Storage Summits 2010 24

 Write Protect Feature
• Permanent
P tWWrite
it Protect
P t t
– Once the Permanent Write Protect is set, the protected memory
region becomes read-only
• Power
Power-On
On Write Protect (Volatile Write Protect)
– Once the Power-on Write Protect is set, it is persistent until the
next power cycle or H/W RESET
– Host needs to re-set the Power-On Write Protect to memory
regions
i th
thatt it wants
t tto apply
l thi
this type
t off write
it protection
t ti each
h
time after power cycle or H/W RESET
• For boot partitions, Write Protect is applied to an entire boot
p
partition
• For User Area Partition and General Partitions, Write Protect is
applied to memory regions defined by multiples of Write
Protect Group Size

Flash Storage Summits 2010 25

 Use Case Example
Partitioning Code Layout WP settings
Boot partition1,2 XLOAD Permanent WP
EBOOT Power-On WP (4MB)
Partition 1
(Enhanced) IPL Power-On WP (4MB)
Logo Power-On WP (4MB)
MBR Power-On WP (4MB)
Partition 2
(Enhanced) ULDR Power-On WP (4MB)

NK Power-On
Power On WP (8MB)
Partition 3
(Enhanced) OS (Image FS) Power-On WP (256MB)
User area
(High density ) EXTFAT Unprotected

* Assuming minimum write protect group size is 4MB

Flash Storage Summits 2010 26

 Secure Trim/Secure Erase
• Secure
S Erase
E
– When a Secure Erase command is sent, data in the
specified memory addresses must be purged from the
physical memory array
– “Logical” memory erase is not acceptable
• Secure Trim
– For cases where smaller amounts of data might be spread
through multiple erase groups, a force garbage collect
command is added
– This allows the same function as Secure Erase to be
performed on write blocks (Sectors) instead of erase
groups

Flash Storage Summits 2010 27

 Secure Erase
• Secure
S Erase
E command
d sequences
– CMD35 – Specify start address of erase groups
– CMD36 - Specify end address of erase groups
– CMD38 (with arg=0x80000000) – Erase operation
User data area User data area

Erase group A
(arg=A+1)
CMD35 (arg A+1)
Erase group A+1 CMD36 (arg=A+3)
CMD38 (arg=0x80000000)
Physical
Erase group A+2 Memory
Erase

Erase group A+3

Erase group A+4

Flash Storage Summits 2010 28

 Secure Trim
CMD35 (arg=A)
• Secure Trim
S T i command
d CMD36 (arg=A+2)
CMD38
sequences (arg=0x80000001)

• Step1: CMD35 (arg=B)

CMD36 (arg=B+4)
– CMD35 – Specify start address
CMD38
off write
it bl k tto b
blocks d
be erased (arg=0x80000001)
– CMD36 - Specify end address User data area User data area
CMD35 (arg=C)
of write blocks to be erased
CMD36 (arg=C)
– CMD38 (with Sector A CMD38 (arg=0x80000001)
arg=0x80000001) - Keep Sector A+2
write
it block
bl k address
dd to
t bbe CMD35 (arg=xx)
erased. CMD36 (arg=xx)
Sector B CMD38 (arg=0x80008000)
– Host can repeat Step 1
Sector B+4
sequence until all memory
blocks to be erased is identified
• Step2: Sector C
– CMD35 Physical
Memory
– CMD36
Erase
– CMD38 (with
arg=0x80008000) - Erase
operation for the write blocks.

Flash Storage Summits 2010 29

 Secure Bad Block Management
• Allow the user to specify that bad blocks cannot contain any
user data when they are retired
• When blocks are discarded, all “good” bits must be purged
before discarding.
• ECSD register [134] need to be set to execute this feature

Flash Storage Summits 2010 30

 Data Reliability
• Data
D t Reliability
R li bilit iis d
defined
fi d as ffollowed
ll d
– High data reliability: once a Device indicates to the Host that a
write has successfully completed, the data that was written, along
with all previous data written, cannot be corrupted by other
operations
i that
h are host
h initiated,
i ii d controller
ll initiated
i ii d or accidental
id l
(such as power interruption)
– Normal data reliability: there is some risk that previously written
data may be corrupted for unforeseen events such as power
i t
interruption
ti
• Device indicates implementation of this feature in the ECSD
registers
– WR_REL_PARAM [166]: to indicate whether the Device supports
this feature
– WR_REL_SET [167]: to set High Data Reliability per partition
• Performance implication
– Write p
performance may
y be impacted
p when high
g data reliability
y is
set

Flash Storage Summits 2010 31

 Enhanced Reliable Write
• All blocks
bl k are 512B (sector)
( t ) in
i length;
l th eachh sector
t being
b i
modified by the write is atomic
• If a power loss occurs during a Reliable Write, sectors may
either contain old data or new data; all sectors being modified
by the write operation may be in one of the following states:
– All sectors contain new data
– All sectors contain old data
– Some sectors contain new data and some sectors contain old data
• REL_WR_SEC_C parameter has no meaning
• Device defines which type (legacy or new) is supported

Flash Storage Summits 2010 32

e·MMC v4.5 Preview

Flash Storage Summits 2010 33

 e·MMC v4.5 Primary Objectives
• Embedded-only specification
• Performance improvement/optimization
• Clarification of v4.41 functions and features

Flash Storage Summits 2010 34

 Some New Features under Consideration
• E t di
Extending Partition
P titi Att
Attributes
ib t
– Adding attribute registers to clearly define and distinguish the behaviors of
individual partitions
• Data Tag
– Providing information on the type and access frequency of the data being
written
• Real-Time Clock
– Adding a capability for the e·MMC device to receive real-time clock
information from the Host such that certain time-sensitive operations
internal to the e·MMC device may be improved
• Power-Off Notification
– Adding a capability for the Host to notify the e·MMC of an impending power
shutdown
• Dynamic Device Capacity
– Extending the useful life of the e·MMC device by adding the capability of
Host-initiated reduction of Device storage capacity in order to free up spare
memory space to enable the e·MMC device to continue to function
• Discard Command
– A variant of the TRIM command that is more memory technology friendly

Flash Storage Summits 2010 35

In Conclusion

Flash Storage Summits 2010 36

• e·MMC
e MMC has established to be the dominant
standard of managed, embedded mass-
storage solution for Mobile

• New e·MMC v4.41 features address many

advanced requirements in high
high-performance
performance
handset architecture

• v4.5 Preview – a peek into the future of the

e·MMC Standard

Flash Storage Summits 2010 37

 Thank You

Flash Storage Summits 2010 38