DEPARTMENT OF COMPUTER SCIENCE

UW
Course Code:CS-121
End Semester Examination (Fall-2020)

Registration number:__________________
Course Title: Digital Logic and Design Discipline/Semester: BSCS 2nd A
Total Marks: 60 Time Allowed: 15mins each student

PART 1: Easy Questions:

Q14: Explain what is a half-adder?

Q15: Explain what is Boolean algebra?

Q17: What is difference between decoder and DeMUX?

Q19: Difference between POS and SOP?

Q20: Why k map is better to use than using theorem?

Q1: What are the analog systems?

Q2: What is difference between analog and digital system?

Q3: Name some digital systems?

Q4: What are the non positional number systems?

Q5: How can we subtract two binary numbers?

Q6: What does excess 3 or X3 coding scheme means?

Q7: Why do we use r’s and r-1 compliment?

Q8: 7’s compliment is used for which number system?

Q9: 8’s compliment is used for which number system?

Q10: 15’s compliment is used for which number system?

Q11: What is the meaning of Grey code?

Q12: What are the three basic gates?

Q13: Name universal gates? Why they are called universal gates?

Q14: How gates have revolutionized the world?

Q1: What are the digital systems?

A digital system is a system that stores data in a discrete way. ... Usually, digital systems
store the information in a binary way; that is, every bit of information can not have a value
other than zero (off) or one (on).

Q2: What are the analog systems?

Analog system uses electronic pulses with varing magnitude to send data

Q3: Name some analog system?

Analog systems are: Analog electronics, voice radio using AM frequency.

Q4: What are the positional Number systems?

Positional Numeral Systems. A positional (numeral) system is a system for representation
of numbers by an ordered set of numerals symbols (called digits) in which the value of a
numeral symbol depends on its position.

Q5: Difference between PNS and NPNS?

Positional Numeral Systems. A positional (numeral) system is a system for representation
of numbers by an ordered set of numerals symbols (called digits) in which the value of a
numeral symbol depends on its position.
A non-positional number system uses a limited number of symbols in which each symbol
has a value. However, the position a symbol occupies in the number normally bears no
relation to its value-the value of each symbol is fixed

Q6: What does base means in the number system?

Solution: Base represents type of number system. If base is 2 it shows binary number system

Q7: Difference between weighted and non weighted coding schemes?

Solution: In weighted codes, each digit is assigned a specific weight according to its position.
Examples:8421,2421,84-2-1 are all weighted codes. Non-weighted codes: The non-weighted
codes are not positionally weighted
Q22: What is combinational Logic circuit?
Solution: Output depends on only input values. No memory is required.

Q23: What is MUX?

MUX is a comnibational circuit that accept many input but give only one output.

Q24: What is parity?

Parity is a technique of detecting an error during transmission of binary information. The
message including parity is sent from transmission end and checked at receiving end for
parity.

Q25: What is even parity?

Numbers of ones in input state are set to the even numbers
Q26: What is the function of magnitude comparator?
It compares two bits,if two are equal,less are greater from one another.

Q27: Suppose we have 8*1 MUX how many selection lines this will have?
3 selection lines.depends on power of 2

Q28: What are don’t care terms?

For these output doesnot matter, it may act as zero for no combination and ones for possible
pair. In digital logic, a don't-care term (also known as optional entries, invalid
combinations, vacuous combinations) for a function is an input-sequence (a series of bits) for
which the function output does not matter

Q29: What are the minterm? How can we represent them?

Terms being AND are called min terms are standerd products

Q15: What is the function of OR gate?

Q16: How XOR gate is being formed?

Q17: Suppose we have XOR gate, tell the output for

 00
 01
 10
 11

Q18: What are the NAND and NOR gates?

Q19: What will be the output of following if we neither have NOR gate.
 00
 01
 10
 11

Q20: What is sequential logic circuit?

Q21: What is DEMUX?

Q22: What is decoder?

Q23: What is odd parity?

Q24: Suppose we have 1*4 DEMUX how many selection lines this mux will have?

Q25: Suppose we have 6 bit input decoder? How many outputs this will have?
Q26: How many possibilities of output if we have 4 bit magnitude comparator? Name
them?

Q27: What are the maxterm? How can we represent them?

Q28: Using switch analogy scheme, series circuit forms which gate?

Q29: How can we write m14 in form of min term for input values abcd?

Q30: Can parity Generator and checker correct the error?

Q32: How parity generator circuit can be called as combinational logic circuit?

Q34: Given any 5bit binary number to be converted into Grey code? 11101

Q35: Given any 5bit binary number to be converted into Grey code? 10011

Q36: Given any number to find the 10’s compliment of number, 9832?

Q37: Given any number to find the 7’s compliment of number, 6553 ?

Q38: Given any question to find the 8’s compliment of number, 7644?

Q39: Given any binary number to be converted into decimal? (1010)2

Q40: Given any binary number to be converted into decimal? (10111)2

Q41: x.x=?

Q42: x.1=?

Q43: x.x=?

Q44: x.0=?

Q45: Using theorem, how can we simplify (x+y)(x+z)?

Q46: (xy)’= ?

Q47: Using theorem, how can we simplify x(x+y)=?

Q48: AEXOR 1= ?

Q49: Theorems or k-map which one is better and why?

 PART I1: MODERATE Questions:

Q1: Given an Octal number 56 to be converted into binary?

Q2: Comparison between advantages and disadvantages of 1’s and 2’s compliment?
Which one is better?

Q3: Draw the timing diagram of 0011?

Q4: How can we write M1 in form of max terms? (ODD terms for A section)(possible
five questions)

For Q5,6,8 will be above question will be repeated in different ways.

Q9: Write f1=x’y’z+xy’z’+xyz as min terms?

Q10: Write f1=xyz’+x’yz’+xy’z as min terms?

Q11: Write f1=x’yz+xyz’ as min terms?

Q12: Using switch analogy scheme, series circuit forms which gate?

Q13: Draw the gate level diagram of F= xy’+ x’z?

Q14: Explain what is a half-adder?

Q15: Explain what is Boolean algebra?

Q16: For M3, write abc in form of Max term?

Q17: What is difference between decoder and DeMUX?

Q18: simplify the given equation?

Q19: Difference between POS and SOP?

Q20: Why k map is better to use than using theorem?

Q21: Incase of Check board configuration what kind of equation is formed in output?

Q22,23,24: Considering the circuit given below write the output for following values?

For the following values?

  000
 001
 010
 011
 100
 101
 110
 111

Q25: Combine two half adders and draw the circuit diagram of Full Adder

Q26: How can we draw inverter from NAND gate?

Q27: How can we design NOR GATE from and NAND gate?

Q28: How can we design EXOR gate from a NAND gate?

Q29: Design an inverter from a NOR gate?

Q30: Design OR gate from a NOR gate?

Q31: What is the output of following design? And why only NAND gates are being used
in it?

Q32: Using Gate level diagram proof that x+xy=x?

Q33: Using gate level diagram show that x+1=1?

Q34: Show the BCD table for 4 bit inputs?

Q35: Why cannot we take 3 bits for BCD table?

Q36: In BCD can we consider 1111 as input?

Q37: Why do we use inverter with enable line in designing large decoder using small
one?

Q38: What is the principle of duality?

Q39: Considering the table below, express F2 in form of min terms?

X Y Z F1 F2
0 0 0 0 0
0 0 1 1 0
0 1 0 0 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Q40: Considering above truth table represent above F2 in form of max terms?

Q41: F=A+BC
Express in form of min terms?

Q42: Draw the circuit diagram of 4bit binary adder/subtractor?

Q43: Show the truth table for 1 bit magnitude comparator?

Q44: Write the equation for 1 bit magnitude comparator if A>B?

Solution: A>B: AB'

Q45: Can party bit corrects error? How and why?

Q46: Find Subtraction of 342 and 614 using 7's complement method

Q47: Find Subtraction of 402 and 314 using 8's complement method

PART I1I: Difficult Questions:

Q1: Given the Boolean function F=xy+x’y+y’z, Implement this with AND,OR and NOT
gate?

Q2: Given the Given the Boolean function F=xy+x’y+y’z, Implement this with OR and
NOT gate.

Q3: Obtain the simplified equation for F(w,x,y,z)= ∑(7,13,14,15)

Q4: Obtain the simplified equation for F(A,B,C,D)= ∑(2,3,12,13,14,15)

Q5: Obtain the simplified equation in SOP for A’B+BC’+B’C’

Q6: Obtain the simplified equation in SOP for xy’z+xyz’+x’yz+xyz

Q7: simplify this k’lm’+k’m’n+klm’n’+lmn’?

Q8: Given the truth table, express the below F1 in product of Max terms?
X y Z F1 F2
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Q9: Considering above truth table, Express F1 in sum of min terms?

Q10: Considering above truth table, Obtain simplified function F1 as SOP?

Q11: Considering above truth table, Obtain simplified function F1 as POS?

Q12: Obtain simplified expression as POS for F(x,y,z)=π(0,1,4,5)

Q13: Obtain simplified expression as POS for F(A,B,C,D)=π(0,1,2,3,4,10,11)

Q14: Q27: Simplify the Boolean expression as SOP using DCC?

F=B’C’D+BCD’+ABCD’
D=B’CD’+A’BC’D

Q15: Show a Truth table for 3 bit binary subtractor?

Q16: Show the Block diagram from 4 bit Binary adder/subtractor?

Q17: How can we take compliment in 4 Bit Binary Adder?

Q18: Show the equation for Carry in 3 bit full adder?

Q19: Suppose we have 4 Bits BCD inputs? Draw the table for Excess 3 for 4 bit binary
output?

Q20: A combinational circuit has four inputs and one output.

 Output is 1 when all the inputs are equal to one
 None of the input is equal to one
 All odd inputs are equal to one
Q: draw the truth table for the above mentioned conditions

Q21: A combinational circuit has four inputs and one output.

 Output is 1 when all the inputs are equal to one
 None of the input is equal to one
 All odd inputs are equal to one
Find simplified output function in SOP

Q22: Design a combinational circuit that accepts a three bit inputs and generates an
output binary Equal to the square of that number?
Q: just write a truthtable for above mentioned question

Solution:
Q23: Given a truthtable,simplify first 2 outputs?
X Y z A B C D E F

0 0 0 0 0 0 0 0 0

0 0 1 0 0 0 0 0 1

0 1 0 0 0 0 1 0 0

0 1 1 0 0 1 0 0 1

1 0 0 0 1 0 0 1 0

1 0 1 0 1 1 0 0 1

1 1 0 1 0 0 1 0 0

1 1 1 1 1 0 0 0 1

Q 24: Simplify last two outputs in above truth table?

Solution:
Q25: draw a truth table that takes 3 inputs and generates output equal to the cube of
input values

Q26: Design a combinational circuit with three bit input line whose output is 2’s
compliment of that number?

Q27: Suppose we have a magnitude comparator 4 bit, how can we compare two values
A and B if they A>B?

Q28: What is DeMux? Draw 1:4 demux with selection lines?

Q29: suppose we have 3 bit input decoder? How many outputs will be there and draw
its combinational logic circuit?

Q30: Write the equation for 4:1 MUX?

Q32: Design 4 bit ODD parity Generator?

Q33: Design a combinational circuit with three inputs, x, y, and z, and three outputs, A,
B, and C. When the binary input is 0, 1, 2, or 3, the binary output is one greater than
the input. When the binary input is 4, 5, 6, or 7, the binary output is two less than the
input.

Q34: Simplify the following equation using 4 variable k-map?

F(w,x,y,z)=w’z+xz++x’y+wx’z

Q35: Draw the logic diagram of a 2-to-4-line decoder using (a) NOR gates only?

Q36: Simplify the following Boolean function F, together with the don’t-care conditions
d, and then express the simplified function in sum-of-products form and product-of-
sums

37: Design 3 bit ODD parity Generator?

Q38: Suppose we have 3 bit input decoder? How many outputs will be there and draw
its combinational logic circuit?