Internal Use Only

North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com

LED LCD TV
SERVICE MANUAL
CHASSIS : LD21C

MODEL : 42LM3400/340S/340T
MODEL : 42LM3400/340S/340T-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67360733 (1204-REV00) Printed in Korea

 CONTENTS

CONTENTS . ............................................................................................. 2

SAFETY PRECAUTIONS ......................................................................... 3

SERVICING PRECAUTIONS ................................................................... 4

SPECIFICATION ....................................................................................... 6

ADJUSTMENT INSTRUCTION .............................................................. 11

BLOCK DIAGRAM ................................................................................. 17

EXPLODED VIEW .................................................................................. 20

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
 SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright © LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
 SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board mod-
ule or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explo-
sion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged eas-
ily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component dam-
age caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alter-
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.
Copyright © LG Electronics. Inc. All rights reserved. -4-
Only for training and service purposes
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or expo-
sure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electri-
cally shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replace-
ment ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity suf-
ficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the compo-
nent lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the cir-
cuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as pos-
sible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
Copyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connec-
tions).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly con-
nected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
-5- LGE Internal Use Only
 SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range 3. Test method

This specification is applied to the LCD TV used LD21C 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
2. Requirement for Test
Each part is tested as below without special appointment.

1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.

4. Model General Specification

No. Item Specification Remarks
1 Market EU(PAL Market-37Countries) DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) :37 countries
UK/Italy/Germany/France/Spain/Sweden/Finland/Nether-
lands/ Belgium/Luxemburg/ Greece/Denmark/Czech/
Austria /Hungary/Swiss/Croatia/Turkey
Norway/Slovenia/Poland/Ukraine/Portugal/Ireland/Morocco/
Latvia/Estonia/Lithania/Rumania/Bulgaria/Russia/Slovakia
Bosnia/Serbia/Albania/Kazakhstan/Belarus

DTV (MPEG2/4, DVB-T2): 8 countries

UK/Denmark/Sweden/Finland/Norway/Ireland/Ukraine/
Kazakhstan

DTV (MPEG2/4, DVB-C): 37 countries

UK/Italy/Germany/France/Spain/Sweden/Finland/
Netherlands/Belgium/Luxemburg/Greece/Denmark/Czech/
Austria /Hungary/Swiss/Croatia/Turkey Norway/Slovenia/
Poland/Ukraine/Portugal/Ireland/Morocco/ Latvia/Estonia/
Lithania/Rumania/Bulgaria/Russia/SlovakiaBosnia/Serbia/
Albania/Kazakhstan/Belarus

DTV (MPEG2/4,DVB-S): 29 countries

Italy/Germany/France/Spain/Netherlands/ Belgium/
Luxemburg/ Greece/ Czech/Austria /Hungary/Swiss/
Croatia/Turkey/Slovenia/Poland/Portugal/ Morocco/Latvia/
Estonia/Lithania/Rumania/Bulgaria/Russia/Slovakia
Bosnia/Serbia/Albania/ Belarus

Supported satellite : 22 satellites

HISPASAT 1C/1D, ATLANTIC BIRD 2, NILESAT 101/102,
ATLANTIC BIRD 3, AMOS 2/3, THOR 5/6, IRIUS 4,
EUTELSAT-W3A, EUROBIRD 9A, EUTELSAT-W2A,
HOTBIRD 6/8/9, EUTELSAT-SESAT, ASTRA 1L/H/M/
KR, ASTRA 3A/3B, BADR 4/6, ASTRA 2D, EUROBIRD 3,
EUTELSAT-W7, HELLASSAT 2, EXPRESS AM1, TURK-
SAT 2A/3A, INTERSAT10

Copyright © LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
 No. Item Specification Remarks
1) PAL-BG
2) PAL-DK
2 Broadcasting system 3) PAL-I/I’
4) SECAM L/L’
5) DVB-T/T2/C/S
► DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

3 Receiving system
► DVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
Analog : Upper Heterodyne
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
Digital : COFDM, QAM
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

► DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM

► DVB-S/S2
- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
4 Scart Jack (1EA) PAL, SECAM Scart 1 Jack is Full scart and support RF-OUT(analog).
5 Video Input RCA(1EA) PAL, SECAM, NTSC 4 System : PAL, SECAM, NTSC, PAL60
Y/Cb/Cr
6 Component Input (1EA)
Y/Pb/Pr
Analog(D-SUB 15PIN)
7 RGB Input RGB-PC
Some models (LD21A,LD21C) are not supported.
HDMI1-DTV/DVI PC(HDMI version 1.3)
8 HDMI Input (3EA) HDMI2-DTV Support HDCP
HDMI3-DTV The number of Input ports is different by model.
In case of the RGB/DVI Audio input,
RGB/DVI Audio
9 Audio Input (2EA) Some models(LD21A,LD21C) are not supported.
Component & AV
Component & AV’s audio input is used by common port.
10 SDPIF out (1EA) SPDIF out Some models(LD21A,LD21C) are not supported.
Antenna, AV1, AV2, Component, RGB,
11 Earphone out (1EA) Some models(LD21A,LD21C) are not supported.
HDMI1, HDMI2, HDMI3
EMF, JPEG, MP3, DivX HD
12 USB (1EA or 2EA) DivX HD, LM58, CM96: 2EA
For SVC (download) LS56, LS35, CS46, LS,34, LM34 : 1EA
CI : U
 K, Finland, Denmark, Norway, Sweden, Russia,
DVB-T Spain, Ireland, Luxemburg, Belgium, Netherland
CI+ : France(Canal+), Italy(DGTVi)
13 DVB CI : Switzerland, Austria, Slovenia, Hungary, Bulgaria
DVB-C CI+ : S witzerland(UPC,Cablecom), Netherland(Ziggo),
Germany(KDG,CWB), Finland(labwise)
DVB-S CI + : Germany(Astra HD+ )
14 Ethernet (1EA) DLNA(Wired, DMP only) Some models (LD21A,LD21C) are not supported.

Copyright © LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
5. Video resolutions (2D)
5.1. Component Input (Y, CB/PB, CR/PR)
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed
1 720*576 15.625 50.00 13.5 SDTV ,DVD 576I
2 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
3 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
4 720*576 31.25 50.00 27.00 SDTV 576P
5 720*480 31.50 60.00 27.027 SDTV 480P
6 720*480 31.47 59.94 27.00 SDTV 480P
7 1280*720 37.50 50.00 74.25 HDTV 720P
8 1280*720 45.00 60.00 74.25 HDTV 720P
9 1280*720 44.96 59.94 74.176 HDTV 720P
10 1920*1080 28.125 50.00 74.25 HDTV 1080I
11 1920*1080 33.75 60.00 74.25 HDTV 1080I
12 1920*1080 33.72 59.94 74.176 HDTV 1080I
13 1920*1080 56.25 50.00 148.50 HDTV 1080P
14 1920*1080 67.50 60.00 148.50 HDTV 1080P
15 1920*1080 67.432 59.94 148.352 HDTV 1080P
16 1920*1080 27.00 24.00 74.25 HDTV 1080P
17 1920*1080 26.97 23.94 74.176 HDTV 1080P
18 1920*1080 33.75 30.00 74.25 HDTV 1080P
19 1920*1080 33.71 29.97 74.176 HDTV 1080P

5.2. RGB Input (PC) - HD Model

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed DDC
1 640*480 31.469 59.94 25.17 VESA(VGA) O
2 800*600 37.879 60.31 40.00 VESA(SVGA) O
3 1024*768 48.363 60.00 65.00 VESA(XGA) O
4 1152*864 54.348 60.053 80.00 VESA O

5.3. RGB Input (PC) - FHD Model

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed DDC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 80.00 VESA O
7 1360*768 47.712 60.015 85.50 VESA (WXGA) O
8 1920*1080 67.5 60 148.5 HDTV 1080P O

Copyright © LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
5.4. HDMI Input(PC/DTV)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
PC(DVI) DDC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 80.00 VESA O
7 1360*768 47.712 60.015 85.50 VESA (WXGA) O
8 1280*1024 63.981 60.020 108.0 VESA (SXGA) O FHD only
9 1920*1080 67.50 60.00 148.5 HDTV 1080P O FHD only
DTV
1 720*480 31.47 59.94 27.00 SDTV 480P
2 720*480 31.50 60.00 27.027 SDTV 480P
3 720*576 31.250 50.00 27.00 SDTV 576P
4 1280*720 37.50 50.00 74.25 HDTV 720P
5 1280*720 45.00 60.00 74.25 HDTV 720P
6 1280*720 44.96 59.94 74.176 HDTV 720P
7 1920*1080 28.125 50.00 74.25 HDTV 1080I
8 1920*1080 33.75 60.00 74.25 HDTV 1080I
9 1920*1080 33.72 59.94 74.176 HDTV 1080I
10 1920*1080 56.250 50.00 148.50 HDTV 1080P
11 1920*1080 67.50 60.00 148.50 HDTV 1080P
12 1920*1080 67.432 59.94 148.352 HDTV 1080P
13 1920*1080 27.00 24.00 74.25 HDTV 1080P
14 1920*1080 26.97 23.976 74.176 HDTV 1080P
15 1920*1080 33.75 30.00 74.25 HDTV 1080P

Copyright © LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
6. Video resolutions (3D)
6.1. HDMI Input
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1. 1920*1080 53.95 / 54 23.98 / 24 148.35/148.5 HDTV 1080P Frame packing
2. 1280*720 89.9 / 90 59.94/60 148.35/148.5 HDTV 720P Frame packing
3. 1280*720 75 50 148.5 HDTV 720P Frame packing
4 1920*1080 67.5 60 148.5 HDTV 1080P Side by Side(half), Top and bottom
5 1920*1080 56.3 50 148.5 HDTV 1080P Side by Side(half), Top and bottom
6 1280*720 45 60 74.25 HDTV 720P Side by Side(half), Top and Bottom
7 1280*720 37.5 50 74.25 HDTV 720P Side by Side(half), Top and Bottom
8 1920*1080 33.7 60 74.25 HDTV 1080i Side by Side(half), Top and Bottom
9 1920*1080 28.125 50 74.25 HDTV 1080i Side by Side(half), Top and Bottom
10 1920*1080 27 24 74.25 HDTV 1080P Side by Side(half), Top and Bottom
11 1920*1080 33.7 30 89.1 HDTV 1080P Side by Side(half), Top and Bottom

6.2. RF 3D Input(DTV)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1. 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom
2. 1920*1080 28.125 50 74.25 HDTV 1080I Side by Side, Top & Bottom

6.3. USB Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
Side by Side, Top & Bottom **support
1. 1920*1080 33.75 30.000 74.25 HDTV 1080P
MPO(Photo)

6.4. RGB-PC Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1. 1920*1080 66.587 59.93 148.50 HDTV 1080p Side by Side, Top & Bottom

6.5. DLNA Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1. 1920*1080 33.75 30 74.25 HDTV 1080p Side by Side, Top & Bottom

6.6. 3D Input mode

No. Side by Side Top & Bottom Single Frame Sequential Frame Packing

Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
 ADJUSTMENT INSTRUCTION
1. Application Range (4) Click "Connect" tab. If "Can't" is displayed, check connection
between computer, jig, and set.
This specification sheet is applied to all of the LCD TV with
LD21C chassis.
(2) (3)

2. Designation
(1) The adjustment is according to the order which is designated
and which must be followed, according to the plan which
can be changed only on agreeing.
(2) Power adjustment : Free Voltage.
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation : Above 5 Minutes (Heat Run) Please Check the Speed :
Temperature : at 25 °C ± 5 °C To use speed between
Relative humidity : 65 ± 10 % from 200KHz to 400KHz
Input voltage : 220 V, 60 Hz
(6) Adjustment equipments: Color Analyzer(CA-210 or CA-110), (5) Click "Auto" tab and set as below.
DDC Adjustment Jig, Service remote control. (6) Click "Run".
(7) Push the "IN STOP" key - For memory initialization. (7) After downloading, check "OK" message.

Case1 : Software version up

(4)
1. After downloading S/W by USB , TV set will reboot
automatically. filexxx.bin
2. Push “In-stop” key. (5)
3. Push “Power on” key.
4. Function inspection
5. After function inspection, Push “In-stop” key. (7)...........OK
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first. (6)
2. Push “Power on” key for turning it on.
→ If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
* USB DOWNLOAD
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
3. Main PCB check process - If your downloaded program version in USB Stick is Low,
▪ APC - After Manual-Insert, executing APC it didn't work. But your downloaded version is High, USB
data is automatically detecting.
(3) Show the message "Copying files from memory".
* Boot file Download (4) Updating is starting.
(1) Execute ISP program "Mstar ISP Utility" and then click
"Config" tab.
(2) Set as below, and then click "Auto Detect" and check "OK"
message.
If "Error" is displayed, check connection between computer,
jig, and set.
(3) Click "Read" tab, and then load download file(XXXX.bin)
by clicking "Read" (5) Updating Completed, The TV will restart automatically.
(6) If your TV is turned on, check your updated version and
(1) Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV
filexxx.bin can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didn’t have a DTV/
ATV test on production line.

* After downloading, have to adjust Tool Option again.

(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)

Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
3.1. ADC Process 3.3. EDID data
(1) ADC (1) FHD RGB EDID data (RGB input : only LD21B support)
- Enter Service Mode by pushing "ADJ" key, 0 1 2 3 4 5 6 7 8 9 A B C D E F
- Enter Internal ADC mode by pushing "►" key at "7. ADC 00 00 FF FF FF FF FF FF 00 1E 6D a b
Calibration". 10 c 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
EZ ADJUST ADC Calibration 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
0. Tool Option1 ADC Comp 480i NG 40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
1. Tool Option2 ADC Comp 1080p NG 50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
2. Tool Option3 ADC RGB NG 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 d
3. Tool Option4
70 d 00 e
4. Tool Option 5 Start Reset
5. Country Group
6. Area Option (2) FHD HDMI EDID data
7. ADC Calibration ඖ
0 1 2 3 4 5 6 7 8 9 A B C D E F
8. White Balance
00 00 FF FF FF FF FF FF 00 1E 6D a b
9. 10 Point WB
10 c 01 03 80 A0 5A 78 0A EE 91
A3 54 4C 99 26
10. Test Pattern
20 0F 50 54 A1 08 00 31 40 45 40 61
40 71 40 81 80
11. EDID D/L 30 01 01 01 01 01 01 02 3A 80 18 71
38 2D 40 58 2C
12. Sub B/C 40 45 00 A0 5A 00 00 00 1E 66 21 50
B0 51 00 1B 30
13. Touch Sensitivity Setting 50 40 70 36 00 A0 5A 00 00 00 1E 00
00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20
20 20 d 20
<Caution> Using "power on" key of the Adjustment remote 70 d 01 e
control, power on TV. 80 02 03 33 F1 4E 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 26 15 07 50 09 57 07 f
* ADC Calibration Protocol (RS232) A0 80 1E 20 C0 0E 01 40 0A 0F 08 10 18 10 98 10 58
NO Item CMD 1 CMD 2 Data 0 B0 10 38 10 01 1D 80 18 71 1C 16 20 58 2C 25 00 20
Enter Adjust When transfer the ‘Mode In’, C0 C2 31 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55
A A 0 0
Adjust MODE ‘Mode In’ Carry the command. D0 00 20 C2 31 00 00 1E 02 3A 80 18 71 38 2D 40 58
Automatically adjustment E0 2C 45 00 A0 5A 00 00 00 1E 01 1D 00 BC 52 D0 1E
ADC adjust ADC Adjust A D 1 0
(The use of a internal pattern) F0 20 B8 28 55 40 C4 8E 21 00 00 1E 00 00 00 00 e

Adjust Sequence (3) Detail EDID Options are below

▪ aa 00 00 [Enter Adjust Mode] a. Product ID
▪ xb 00 40 [Component1 Input (480i)]
MODEL NAME HEX EDID Table DDC Function
▪ ad 00 10 [Adjust 480i Comp1]
▪ xb 00 60 [RGB Input (1024*768)] (only LD21B) HD/FHD Model 0001 01 00 Analog/Digital
▪ ad 00 10 [Adjust 1024*768 RGB] (only LD21B)
▪ aa 00 90 End Adjust mode b. Serial No: Controlled on production line.
* Required equipment : Adjustment remote control. c. Month, Year: Controlled on production line:
ex) Week : '01' -> '01'
3.2. EDID Download Year : '2012' -> '16' fix
▪ After enter Service Mode by pushing "ADJ" key. d. Model Name(Hex):
▪ Enter EDID D/L menu. cf) TV set’s model name in EDID data is below.
▪ Enter "START" by pushing "OK" key. Model name MODEL NAME(HEX)
<Caution> Never connect HDMI && D-sub cable when EDID LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)
downloaded.
e. Checksum: Changeable by total EDID data.
EZ ADJUST EDID D/L
FHD
0. Tool Option1 HDMI1 NG EDID C/S data
1. Tool Option2 HDMI2 NG HDMI RGB
2. Tool Option3 HDMI3 NG Block 0 43 5C
3. Tool Option4 RGB NG
Check sum 23 (HDMI1)
4. Tool Option 5 Start Reset
5. Country Group
(Hex) Block 1 13 (HDMI2) -
6. Area Option 03 (HDMI3)
7. ADC Calibration
8. White Balance f. Vendor Specific(HDMI)
9. 10 Point WB
Input Model name(HEX)
10. Test Pattern
11. EDID D/L ඖ HDMI1 78030C001000
12. Sub B/C
HDMI2 78030C002000
13. Touch Sensitivity Setting
HDMI3 78030C003000

Copyright © LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
3.4 Function Check * Connecting picture of the measuring instrument
- Check display and sound (On Automatic control)
■ Check Input and Signal items. Inside PATTERN is used when W/B is controlled. Connect to
1) TV auto controller or push Adjustment R/C POWER ON →
2) AV (SCART / CVBS) Enter the mode of White-Balance, the pattern will come out.
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60hz) (* RGB input : LD21B
only support) Full White Pattern CA-210
5) HDMI
6) PC Audio In (* except LD21A chassis model) COLOR
ANALYZER
* Display and Sound check is executed by Remote control. TYPE : CA-210

<Caution>
Not to push the INSTOP key after completion if the function RS-232C Communication

inspection.

* Auto-control interface and directions

(1) Adjust in the place where the influx of light like floodlight
4. Total Assembly line process around is blocked. (illumination is less than 10 lux).
4.1. Adjustment Preparation (2) Adhere closely the Color analyzer(CA210) to the module
▪ W/B Equipment condition less than 10 cm distance, keep it with the surface of the
CA210 Module and Color analyzer's prove vertically.(80° ~ 100°).
: CCFL/EEFL -> CH9, Test signal: Inner pattern(80IRE) (3) Aging time
LED -> CH14, Test signal: Inner pattern(80IRE) - After aging start, keep the power on (no suspension of
▪ If it is executed W/B adjustment in 2~3 minutes H/run, it is power supply) and heat-run over 5 minutes.
adjusted by Target data - Using 'no signal' or 'POWER ONLY' or the others, check
Mode Temp Coordinate spec Target the back light on.
X=0.269 (±0.002) X=0.271
Cool 13,000k <Test Signal> ▪ Auto adjustment Map(using RS-232C to USB cable)
Y=0.273 (±0.002) Y=0.276
Inner pattern RS-232C COMMAND
X=0.285 (±0.002) X=0.287
Medium 9,300k (204gray, [CMD ID DATA]
Y=0.293 (±0.002) Y=0.296
80IRE) Wb 00 00 White Balance Start
X=0.313 (±0.002) X=0.315
Warm 6,500k Wb 00 ff White Balance End
Y=0.329 (±0.002) Y=0.332
RS-232C COMMAND CENTER
▪ Edge LED W/B Table in process of time (LGD module & 65” [CMD ID DATA] MIN (DEFAULT) MAX
AUO module) Cool Mid Warm Cool Mid Warm
Aging Cool Medium Warm R Gain jg Ja jd 00 172 192 192 192
time X y x y x y
G Gain jh Jb je 00 172 192 192 192
(Min) 269 273 285 293 313 329
B Gain ji Jc jf 00 192 192 172 192
1 0-2 280 287 296 307 320 337
R Cut 64 64 64 128
2 3-5 279 285 295 305 319 335
3 6-9 277 284 293 304 317 334 G Cut 64 64 64 128
4 10-19 276 283 292 303 316 333 B Cut 64 64 64 128
5 20-35 274 280 290 300 314 330
6 36-49 272 277 288 297 312 327 <Caution>
Color Temperature : COOL, Medium, Warm.
7 50-79 271 275 287 295 311 325
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
8 80-119 270 274 286 294 310 324
adjust other two lower than C0.(When R/G/B Gain are all
9 Over 120 269 273 285 293 309 323 C0, it is the FULL Dynamic Range of Module)

Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
 * Manual W/B process using adjust Remote control. 4.3. 3D function test
▪ After enter Service Mode by pushing "ADJ" key, (Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])
▪ E nter White Balance by pushing " ► " key at "8. White * HDMI mode NO. 872 , pattern No.83
Balance". (1) Please input 3D test pattern like below. (HDMI mode No.
EZ ADJUST White Balance
872 , pattern No.83)
0. Tool Option1 Color Temp. Cool
1. Tool Option2 R-Gain 172
2. Tool Option3 G-Gain 172
3. Tool Option4 B-Gain 192
4. Tool Option5 R-Cut 64
5. Country Group G-Cut 64
6. Area Option B-Cut 64
7. ADC Calibration Test-Pattern ON
8. White Balance ► Backlight 100
9. 10 Point WB Reset To Set
10. Test Pattern
11. EDID D/L
(2) When 3D OSD appear automatically , then select OK key.
12. Sub B/C
13. Touch Sensitivity Setting

* After you finished all adjustments, Press "In-start" key and

compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model's module from factory Jig model.
* P ush the "IN STOP" key after completing the function
inspection. And Mechanical Power Switch must be set
“ON”.

4.2. EYE-Q function check (3) Don't wear a 3D Glasses, Check the picture like below.
(1) Turn on TV.
(2) Press EYE key of Adjustment remote control.
(3) Cover the Eye Q II sensor on the front of the using your
hand and wait for 6 seconds.
(4) Confirm that R/G/B value is lower than 10 of the "Raw
Data (Sensor data, Back light)". If after 6 seconds, R/G/B
value is not lower than 10, replace Eye Q II sensor.
(5) Remove your hand from the Eye Q II sensor and wait for 6
seconds.
(6) Confirm that "ok" pop up. If change is not seen, replace 4.4. IR emitter inspection
Eye Q II sensor. (1) Start 3D pattern inspection.
(2) If IR emitter signal is correctly received to IR receiver, the
lamp of IR tester turn on.

Copyright © LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
4.5. Outgoing condition Configuration 6.2. Comand Set
■ When pressing IN-STOP key by SVC remocon, Red LED Adjust mode CMD(hex) LENGTH(hex) Description
are blinked alternatively. And then automatically turn off. EEPROM WRITE A0h 84h+n n-bytes Write (n = 1~16)
(Must not AC power OFF during blinking)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
5. HI-POT Test Phase
Data write : Model Name and Serial Number write in EEPROM,.
5.1. HI-POT auto-check preparation
- Check the POWER cable and SIGNAL cable insertion condition
6.3. Method & notice
(1) Serial number D/L is using of scan equipment.
5.2. HI-POT auto-check (2) S etting of scan equipment operated by Manufacturing
(1) Pallet moves in the station. (POWER CORD / AV CORD is Technology Group.
tightly inserted) (3) Serial number D/L must be conformed when it is produced in
(2) Connect the AV JACK Tester. production line, because serial number D/L is mandatory by
(3) Controller (GWS103-4) on. D-book 4.0.
(4) HI-POT test (Auto)
- If Test is failed, Buzzer operates. * Manual Download(Model Name and Serial Number)
- If Test is passed, GOOD Lamp on and move to next proc- If the TV set is downloaded by OTA or Service man, sometimes
ess automatically. model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
5.3. Checkpoint 1) Press the "Instart" key of Adjustment remote control.
(1) Test voltage 2) Go to the menu "6.Model Number D/L" like below photo.
- Touchable Metal : 3KV / min at 100mA 3) Input the Factory model name or Serial number like photo.
- SIGNAL : 3KV / min at 100mA
(2) TEST time: 1 second. (case : mass production )
(3) TEST POINT
- Touchable Metal => LIVE & NEUTRAL : Touchable Metal.
- SIGNAL => LIVE & NEUTRAL : SIGNAL.

6. Model name & Serial number D/L

▪ Press "Power on" key of service remote control.
(Baud rate : 115200 bps)
▪ Connect RS232 Signal Cable to RS-232 Jack.
▪ Write Serial number by use RS-232.
▪ Must check the serial number at the Product/Service info..
(menu key -> red key -> select product/Service info)
4) Check the model name Instart menu. → Factory name displayed.
(ex 32LV3400-ZG)
5)  Check the Diagnostics.(DTV country only) → Buyer model
displayed.(ex 32LV3400-ZG)

6.1. Signal Table

CMD LENGTH ADH ADL DATA_1 ... Data_n CS DELAY

CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +...+ Data_n
Delay : 20ms

Copyright © LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
7. MAC Address & CI+ key download 7.2 LAN Inspection
7.1 MAC Address 7.2.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
7.1.1 Equipment & Condition
▪ Play file : Serial.exe
▪ MAC Address edit
▪ Input Start / End MAC address

7.1.2 Download method

(1) Communication Prot connection

7.2.2. LAN inspection solution

▪ LAN Port connection with PCB
▪ Network setting at MENU Mode of TV
▪ Setting automatic IP
Connection : PCBA (USB Port) → USB to Serial Adapter
▪ Setting state confirmation
(UC-232A) → RS-232C cable → PC(RS-232C port)
-> If automatic setting is finished, you confirm IP and MAC
* Caution : LJ21* chassis support only UC-232A driver. (only
Address.
use this one. )

(2) MAC Address & CI+ Key Download

▪ Set CI+ Key path Directory at Start Mac & CI+ Download
Programme
▪ Com 1,2,3,4 and 115200(Baudrate)

7.3. LAN PORT INSPECTION(PING TEST)

GP4_LOW Connect SET -> LAN port == PC -> LAN Port

SET PC

7.3.1. Equipment setting

(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2

▪ Port connection button click(1)
▪ Push the (2) MAC Address write.
▪ At success Download, check the OK (3)
▪ Start CI+ Key Download, Push the (4)
▪ Check the OK or NG
7.3.2. LAN PORT inspection (PING TEST)
(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.

Copyright © LG Electronics. Inc. All rights reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
Copyright ©
X-tal LVDS
FPC(51P)
24M (FHD/50Hz)
IF +/-
TDSS-
TDSS- TU_CVBS
SERIAL FLASH
G101D SPI IC1401 (8M bit)
SIF
MX25L8005M2I

Only for training and service purposes

(LGIT)
DDR3 1Gb
DDR3 Add. DDR3 1Gb
IC1202
Rear IC1201
DDR3 Data H5TQ1G63BFR
H5TQ1G63BFR
TMDS
HDMI1/2(DVI) I2C
M24M01-HRMN6TP
CVBS, Y/Pb/Pr, L/R
IC104 256Kbit

LG Electronics. Inc. All rights reserved.

Component1
FE_ VOUT
F-SCART NAND FLASH
SC1_CVBS_IN IC102 (2Gbit)
SC1_R/G/B

LG2111A PCM_A[0:7]
74LCX244

- 17 -
RGB/H/V Buffer
CI Slot

RGB PC IC101
PCM_A[8:14]
L/R
PC/DVI Audi I PCM_DATA[0:7]
FE_TS_DATA[0:7]
SPDIF SPDIF TS_DATA[0:7]
BLOCK DIAGRAM

SENSOR
Ethernet EPHY _SCL/SDA
KEY1
KEY2
LED_R CONTROL
IR & LED /
DP/DM
SOFT TOUCH
USB1 IR (TACT SWITCH)

DP/DM
USB2
Applied Model : **LM5800, **LS5600, **LS3500, **CS460, **LM3400

Except of TMDS
HDMI3 I2S
LS3500/CS460 Audio AMP
Side SPK L/R
STA380BWE

LGE Internal Use Only

Copyright ©
X-tal LVDS
FPC(51P)
24M (FHD/50Hz)

FE_TS_DATA[0:7]
TDSN-
TDSN- TU_CVBS
G301D SERIAL FLASH
SPI IC1401 (8M bit)
SIF
MX25L8005M2I

Only for training and service purposes

(LGIT)
DDR3 1Gb
Rear DDR3 Add. DDR3 1Gb
IC1202
IC1201
DDR3 Data H5TQ1G63BFR
H5TQ1G63BFR
TMDS
HDMI1/2(DVI)
I2C
M24M01-HRMN6TP
CVBS, Y/Pb/Pr, L/R IC104 256Kbit

LG Electronics. Inc. All rights reserved.

Component1
FE_ VOUT
F-SCART NAND FLASH
SC1_CVBS_IN IC102 (2Gbit)
SC1_R/G/B

LG2111A PCM_A[0:7] 74LCX244

- 18 -
RGB/H/V Buffer
CI Slot

RGB PC IC101
PCM_A[8:14]
L/R
PC/DVI Audi In PCM_DATA[0:7]
FE_TS_DATA[0:7]
SPDIF SPDIF TS_DATA[0:7]

SENSOR
Ethernet EPHY _SCL/SDA
KEY1
KEY2
LED_R CONTROL
IR & LED /
DP/DM
SOFT TOUCH
USB1 IR (TACT SWITCH)

DP/DM
USB2
Applied Model : **LM580T, **560T, **LS350T, **CS460T, **LM340T

Except of TMDS
HDMI3 I2S
LS350T/CS460T Audio AMP
Side SPK L/R
STA380BWE

LGE Internal Use Only

Copyright ©
X-tal LVDS
FPC(51P)
24M (FHD/50Hz)

FE_TS_DATA[0:7]
TDSQ-
TDSQ- TU_CVBS
G001D SERIAL FLASH
SPI IC1401 (8M bit)
SIF
MX25L8005M2I

Only for training and service purposes

(LGIT)
DDR3 1Gb
DDR3 Add. DDR3 1Gb
IC1202
Rear IC1201
DDR3 Data H5TQ1G63BFR
H5TQ1G63BFR
TMDS
HDMI1/2(DVI) I2C
M24M01-HRMN6TP
CVBS, Y/Pb/Pr, L/R
IC104 256Kbit

LG Electronics. Inc. All rights reserved.

Component1
FE_ VOUT
F-SCART NAND FLASH
SC1_CVBS_IN IC102 (2Gbit)
SC1_R/G/B

LG2111A PCM_A[0:7]
74LCX244

- 19 -
RGB/H/V Buffer
CI Slot

RGB P IC101
PCM_A[8:14]
L/R
PC/DVI Au PCM_DATA[0:7]
FE_TS_DATA[0:7]
SPDIF SPDIF TS_DATA[0:7]

SENSOR
Ethernet EPHY _SCL/SDA
KEY1
KEY2
LED_R CONTROL
IR & LED /
DP/DM
SOFT TOUCH
USB1 IR (TACT SWITCH)

DP/DM
USB2
Applied Model : **LM580S, **560S, **LS350S, **CS460S, **LM340S

Except of TMDS
HDMI3 I2S
LS350S/CS460S Audio AMP
Side SPK L/R
STA380BWE

LGE Internal Use Only

 EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

400

521

900
540
800

910
530
820
LV1

810
550
200

AG1

* Stand Base + Body

120

* Set + Stand
A10
310

A4
A21
300

A2
510

Copyright © LG Electronics. Inc. All rights reserved. - 20 - LGE Internal Use Only
Only for training and service purposes
 +12V/+15V +3.5V_ST --> 3.375V --> 3.46V
+20V --> 3.51V --> 3.76V (3.59V) +12V/+15V +3.5V_ST
PANEL_POWER +3.5V_ST

FROM LIPS & POWER B/D L412

120
+24V --> 3.78V --> 3.92V (3.79V)
+12V --> 3.58V --> 3.82V (3.68V)
+18.5V --> 3.5V --> 3.75V (3.59V)
R488
100K
OPT
CIS21J121 PD_+12V PD_+3.5V R463
R448 R450 10K
OPT 2.7K 0 PWR_DET_ON_SEMI
0.015uF C442 1% 5% IC408
0.01uF C438 10uF NCP803SN293
C409 C436 New item
0.1uF 25V R402 POWER_DET
0.015uF 0.01uF 100
25V VCC 3 2 RESET
+3.5V_ST 50V 50V Q409
MMBT3906(NXP) AO3407A R405-*1 R407-*1 PD_KR_42_LIPS IC408-*1
+3.5V_ST 4.7K 4.7K PD_+12V R450-*1 1

D
Q402 R447 100 C474 APX803D29
C411 GND
PANEL_DISCHARGE_RES_4.7K 1.2K 0.1uF
C443 PANEL_DISCHARGE_RES_4.7K 0.1uF 1%
R439 10uF 16V 1% RESET VCC
R461 R406 1 3 33K 2 3
OPT 4.7K NORMAL_EXPEPT_32 NORMAL_32 25V G PANEL_VCC
10K R401 C +24V
P403 P404 1
RL_ON 10K 2 FW20020-24S FM20020-24 L407-*1 PD_KR_42_LIPS PD_+24V
B Q401 MLB-201209-0120P-N2 OPT +24V R447-*1 R404 GND
OPT
MMBT3904(NXP) R431 5.1K 100K
22K R440 C451 PWR_DET_ON_DIODES
L407 5.6K 0.1uF 1%
E
R462 L404-*1 PWR ON 1 2 24V 25V PD_+24V IC409-*1
CIS21J121 PD_+24V_PWR_DET_ON_SEMI
10K MLB-201209-0120P-N2 24V 24V R482 IC409 APX803D29
3 4 C 8.2K
+3.5V_ST OPT R430 NCP803SN293 PD_+24V
R610 GND 5 6 GND NON_CI_CAP 1% R480
L404 C418 10K B Q407 C455 R405 R407
33K GND GND VCC RESET 100 RESET VCC
CIS21J121 7 8 0.1uF MMBT3904(NXP) 0.1uF 5.6K 5.6K 3 2 2 3
3.5V 9 10 3.5V 50V OPT C 25V PD_+24V
R429 OPT E R403 1 1
3.5V 3.5V OPT
OPT 11 12 47K B Q406 R435 PD_+24V 1.5K GND GND
C406 C408 GND GND PANEL_CTL 22K C412
13 14 MMBT3904(NXP) 1%
0.1uF 0.1uF 0.1uF PD_+24V_PWR_DET_DIODES
GND 15 16 GND/V-sync 1:AK10 R489 PANEL_DISCHARGE_RES_5.6K
16V 16V 10K E 16V

+12V/+15V
L402
12V
12V
12V
17
19
21
18
20
22
INV ON
A.DIM
P.DIM1
+3.3V_Normal
PANEL_DISCHARGE_RES_5.6K
Power_DET
CIS21J121 GND/P.DIM2 Err OUT
23 24
+3.5V_ST
FOR 200HZ PWM_DIM2

R419
OPT 1K 780 mA
C404
0.1uF
C407 25 OPT R415
+3.3V_Normal
R408

16V
0.1uF
16V SLIM_32~52
P401
SMAW200-H24S2
R412
0
100 R426
10K +1.5V_DDR Max 1000mA
100

L402-*1 +3.5V_ST
MLB-201209-0120P-N2 OPT C
R476 R421 FET_AOS +3.3V_Normal
0 OPT
R418 B 10K INV_CTL Q403 L403
OPT 6.8K AO3407A BLM18SG700TN1D
R475 +3.5V_ST

D
0 E OPT IC407
Q405 +1.5V_DDR
MMBT3904(NXP) R427 AP7173-SPG-13 HF(DIODES)
PWM1 10K OPT OPT
L420 C437
[EP] NON_CI_CAP C425 R446
BLM18PG121SN1D C435 R434 FET_AOS G 0.1uF C445
22uF
0.1uF R438 16V 10K 0.1uF
16V 10K 22K C423 16V
16V
A_DIM 4.7uF FET_2.5V
NON_PSU_T120_LGD IN OUT
1 8 16V
R611 C423-*1

THERMAL
0 2.2uF
PWM_DIM
R1 R457 10V
PG FB 4.3K

9
2 7 FET_2.5V
OPT R445-*1
1/16W 2.2K FET_2.5V_DIODE FET_2.5V_AOS
C416 R606
0.1uF 3.9K VCC SS 1% FET_AOS AO3435
C472 DMP2130L
PWM_PULL-DOWN_3.9K 3
16V
+3.3V_Normal 1.5A6 R2 22uF
C476
0.1uF
R445
100 Q403-*1 Q403-*2

D
R606-*1 R433 10V 16V
1K 10K EN GND C467 R456
PWM_PULL-DOWN_1K 4 5 560pF 4.7K C
1/16W R443
50V POWER_ON/OFF_1 10K
1% B Q400
’ERROR_OUT’ is used for NON_CI_CAP

G
C461 C475 MMBT3904(NXP)
+3.3V_Normal 10uF 0.1uF OPT
lamp(CCFL/EEFL) models. OPT 10V
16V R490
10K
E

In other words, ERROR_OUT

R420
R486
4.7K
100
LED models need not use. ERROR_OUT

Vout=0.8*(1+R1/R2)=1.5319
FOR LPB Download
[To LED DRIVER]

+2.5V/+1.8V +3.3V_Normal

+3.3V_Normal OPT
FOR LPB MODEL R615
IC402 +2.5V_Normal P407 10K
TJ3940S-2.5V-3L 12507WR-08L

OPT
VIN 3 2 VOUT 300 mA R616
Vd=550mV 1
1 10K
R473
NON_CI_CAP GND
C432 1
2
0.1uF FOR LPB MODEL_L/DIM
LOCAL DIMMING
16V R612
33
C403 C440 3 L/DIM_SCLK
10uF 0.1uF
10V 16V
4
FOR LPB MODEL_L/DIM
R613
33
5 L/DIM_MOSI FOR LPB MODEL
R183
33
6
I2C_SCL

7
I2C_SDA
FOR LPB MODEL_L/DIM
R614 FOR LPB MODEL
33 R184
8 L/DIM_VS 33

9 FOR LPB MODEL_L/DIM

R617
4.7K

S7LR core 1.2V volt

+3.3V_Normal C447
R428 0.33uF
+12V/+15V 10K 16V

L401
+5V_USB 2000 mA +3.5V_ST C441 +1.10V_VDDC
R410 0.1uF
16V
10K
EP[GND]

VIN_3

PWRGD

BOOT

C405 C4075 +5V_USB +5V_Normal L413

EN

10uF 10uF
25V 25V L415
OPT
16

15

14

13

IC401 L406 L425 3.6uH

VIN_1 1 12 PH_3 +3.3V_Normal
3.6uH BLM18PG121SN1D
AOZ1051PI [EP]LX
NON_CI_CAP THERMAL
VIN_2 2 11 PH_2 NR8040T3R6N
C430 C431 17 C444
OPT OPT C453 C456
C420 C4074 10uF 0.1uF GND_1 PH_1 0.1uF OPT
PGND NC C492 10V 16V 3 IC403 10 22uF 22uF 16V
1 8 22uF 0.1uF R180 OPT
22uF TPS54319TRE 10V 10V 10K R181
16V 16V GND_2 SS/TR
THERMAL

16V 4 9 1K
OLP
VIN SS C488
9

OPT 2 7
5

C4073 3300pF C439

0.1uF C493 50V
R1
AGND

VSENSE

COMP

RT/CLK

16V AGND EN 0.01uF R432 R1 R442 100pF Not used :

3 6 50V 1/16W 330K 5% 27K
1/16W only for small(ready)
1%
R416 R609 R436 C448
56K 11K FB COMP 15K 3300pF
4 5
1% 1% 3A 50V
R608
12K
OPT R423 R2
12K C494 R441
C4072 R2 2200pF 56K
1%
100pF 50V 3A $ 0.165 1/16W
1%

Vout=0.8*(1+R1/R2) Vout=0.827*(1+R1/R2)=1.225V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2012/01/13
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER_LARGE 4

Copyright © 2012 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
 LVDS for large inch

[51Pin LVDS Connector]

(For FHD 60Hz) FOR FHD REVERSE(10bit) [30Pin LVDS Connector]
FHD Change in S7LR (For HD 60Hz_Normal)
P703
FI-RE51S-HF-J-R1500
MIRROR Pol-change
LVDS_SEL HD
RXA4+ RXA0+ RXA0-
1 P705
+3.3V_Normal RXA4- RXA0- RXA0+ FF10001-30
2
RXA3+ RXA1+ RXA1-
3 OPT
R705 RXA3- RXA1- RXA1+ 1
4 3.3K HD_GND_2pin
RXACK+ RXA2+ RXA2- 2
5
OPT SCANNING_EN RXACK- RXA2- RXA2+ 3 R713
6 R710 0
10K RXA2+ RXACK+ RXACK- 4
7 +3.3V_Normal
RXA2- RXACK- RXACK+ 5
8 PWM_DIM
PSU_T120_LGD OPT RXA1+ RXA3+ RXA3- 6
9 R703 RXA3+
R706
0 3.3K RXA1- RXA3- RXA3+ 7 RXA3-
10 OPC&SCANNING_CTRL
RXA0+ RXA4+ RXA4- 8
11 OPT
R704
RXA0- RXA4- RXA4+ 9
12 10K RXACK+
RXA4+
10 RXACK-
13 RXA4-
RXB4+ RXB0+ RXB0- 11
14 RXA3+
RXB4- RXB0- RXB0+ 12 RXA2+
15 RXA3-
RXB3+ RXB1+ RXB1- 13 RXA2-
16 RXACK+
RXB3- RXB1- RXB1+ 14
17 RXACK-
RXBCK+ RXB2+ RXB2- 15 RXA1+
18

RXBCK- RXB2- RXB2+ 16 RXA1-

19 RXA2+
RXB2+ RXBCK+ RXBCK- 17
20 RXA2- LVDS_SEL
RXB2- RXBCK- RXBCK+ 18 RXA0+
21
19 +3.3V_Normal
22 RXB1+ RXB3+ RXB3- RXA0-
RXA1+
RXB1- RXB3- RXB3+ 20
23 RXA1- OPT
21 R712
24 RXB0+ RXB4+ RXB4- 3.3K
RXA0+
RXB0- RXB4- RXB4+ 22
25 RXA0-
23 OPT
26 AUO_GND/LGD_NC R711
10K
24 PANEL_VCC
27
25
28 RXB4+ AUO_GND HD
R709 26 L701
29 RXB4- 10K 70-ohm
27 BLM18SG700TN1D
30 RXB3+
28
31 RXB3- FOR FHD REVERSE(8bit) OPT
C701
OPT
C702
HD
C703
29
32 RXBCK+ 10uF 1000pF 0.1uF

33 RXBCK-
Change in S7LR 30 16V 50V 16V

34 31
MIRROR Pol-change Shift
35 RXB2+
RXA4+ RXA4+ RXA4- RXA0-
36 RXB2-
RXA4- RXA4- RXA4+ RXA0+
37
RXA3+ RXA0+ RXA0- RXA1-
38 RXB1+
RXA3- RXA0- RXA0+ RXA1+
39 RXB1-
RXACK+ RXA1+ RXA1- RXA2-
40 RXB0+
RXACK- RXA1- RXA1+ RXA2+
41 RXB0-
RXA2+ RXA2+ RXA2- RXACK-
42
RXA2- RXA2- RXA2+ RXACK+
43
RXA1+ RXACK+ RXACK- RXA3-
44 PANEL_VCC
RXA1- RXACK- RXACK+ RXA3+
45
RXA0+ RXA3+ RXA3- RXA4-
46 FHD
L702 RXA0- RXA3- RXA3+ RXA4+
47 70-ohm

48
OPT OPT FHD
49 RXB4+ RXB4+ RXB4- RXB0-
C700 C709 C710
10uF 1000pF 0.1uF
50 RXB4- RXB4- RXB4+ RXB0+
16V 50V 16V
51 RXB3+ RXB0+ RXB0- RXB1-

RXB3- RXB0- RXB0+ RXB1+

52
RXBCK+ RXB1+ RXB1- RXB2-

RXBCK- RXB1- RXB1+ RXB2+

RXB2+ RXB2+ RXB2- RXBCK-

RXB2- RXB2- RXB2+ RXBCK+

RXB1+ RXBCK+ RXBCK- RXB3-

RXB1- RXBCK- RXBCK+ RXB3+

RXB0+ RXB3+ RXB3- RXB4-

RXB0- RXB3- RXB3+ RXB4+

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011/11/14
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS_LARGE 11

Copyright © 2012 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
 AVDD_DDR0 AVDD_DDR0 AVDD_DDR0 AVDD_DDR0

+1.5V_DDR AVDD_DDR0

R1227
R1201

R1224
R1204

1K 1%
1K 1%

OS

OS
1K 1%
1K 1%

L1202
CIC21J501NE

A-MVREFDQ B-MVREFCA B-MVREFDQ

0.1uF
A-MVREFCA

OS 1000pF
0.1uF

1000pF

0.1uF
OS 1000pF
OPT
0.1uF

1000pF

1%
1%

1%
1%

C1250

R1228

C1217

C1218

C1219

C1238

C1241
R1202

R1225

0.1uF

0.1uF

0.1uF
R1205

C1206

C1239

C1220
10uF
C1247

C1248

C1249

C1251

1uF

1uF

1uF

1uF

1uF
OS
OS
C1202
C1201

C1204

1K
C1203
1K

1K
OS

OS
1K

CLose to DDR3 CLose to Saturn7M IC CLose to Saturn7M IC CLose to DDR3

IC1201-*1 IC1202-*1
K4B1G1646G-BCH9 K4B1G1646G-BCH9

DDR_1333_SS_NEW DDR_1333_SS_NEW
N3 M8 N3 M8
A0 VREFCA A0 VREFCA
P7 P7
A1 A1
P3 P3
A2 A2
N2 H1 N2 H1
A3 VREFDQ A3 VREFDQ
P8 P8
A4 A4
P2 P2
A5 A5
R8 L8 R8 L8
A6 ZQ A6 ZQ
R2 R2
A7 A7
T8 T8
A8 A8
R3 B2 R3 B2
A9 VDD_1 A9 VDD_1
L7 D9 L7 D9
A10/AP VDD_2 A10/AP VDD_2
R7 G7 R7 G7
A11 VDD_3 A11 VDD_3
N7 K2 N7 K2
A12/BC VDD_4 A12/BC VDD_4
T3 K8 T3 K8
A13 VDD_5 A13 VDD_5
N1 N1
VDD_6 VDD_6
M7 N9 M7 N9
NC_5 VDD_7 NC_5 VDD_7
EAN61828901 R1 R1
VDD_8 VDD_8
M2 R9 M2 R9
EAN61828901 IC1202 N8
BA0 VDD_9
N8
BA0 VDD_9
IC1201 H5TQ1G63DFR-H9C M3
BA1
M3
BA1

H5TQ1G63DFR-H9C IC101 BA2

A1
BA2
A1
LGE2111A-T8 DDR_1333_HYNIX J7
VDDQ_1
A8 J7
VDDQ_1
A8
CK VDDQ_2 CK VDDQ_2
DDR_1333_HYNIX K7 C1 K7 C1
N3 M8 CK VDDQ_3 CK VDDQ_3
B-MA0 A0 VREFCA B-MVREFCA K9 C9 K9 C9

A-MVREFCA
M8
VREFCA A0
N3
P7
A-MA0
A11
S7LR2_DIVX_MS10 B23
B-MA1
P7
P3
A1
L2
CKE VDDQ_4
VDDQ_5
D2
E9 L2
CKE VDDQ_4
VDDQ_5
D2
E9
A1 A-MA1 A-MA0 A_DDR3_A[0] B_DDR3_A[0] B-MA0 B-MA2 A2 CS VDDQ_6 CS VDDQ_6
P3 C14 D25 N2 H1 K1 F1 K1 F1
A-MA2 A-MA1 B-MA1 B-MA3 B-MVREFDQ ODT VDDQ_7 ODT VDDQ_7
A2 A_DDR3_A[1] B_DDR3_A[1] A3 VREFDQ J3 H2 J3 H2
H1 N2 B11 F22 P8 RAS VDDQ_8 RAS VDDQ_8
A-MVREFDQ VREFDQ A3 A-MA3 A-MA2 A_DDR3_A[2] B_DDR3_A[2] B-MA2 B-MA4 A4 K3 H9 K3 H9
P8 F12 G22 P2 OS CAS VDDQ_9 CAS VDDQ_9
A-MA4 A-MA3 B-MA3 B-MA5 L3 L3
A4 A_DDR3_A[3] B_DDR3_A[3] A5 R1226 WE WE
P2 C15 E24 R8 L8 J1 J1
R1203 A5 A-MA5 A-MA4 A_DDR3_A[4] B_DDR3_A[4] B-MA4 B-MA6 A6 ZQ NC_1 NC_1
L8 R8 E12 F21 R2 T2 J9 T2 J9
ZQ A6 A-MA6 A-MA5 A_DDR3_A[5] B-MA5 B-MA7 A7 240 RESET NC_2 RESET NC_2
B_DDR3_A[5] L1 L1
240 R2 A14 E23 T8 1% AVDD_DDR0 NC_3 NC_3
A7 A-MA7 A-MA6 A_DDR3_A[6] B_DDR3_A[6] B-MA6 B-MA8 A8 L9 L9
AVDD_DDR0 1% T8 D11 D22 R3 B2 NC_4 NC_4
A-MA8 A-MA7 B-MA7 B-MA9 F3 T7 F3 T7
A8 A_DDR3_A[7] B_DDR3_A[7] A9 VDD_1 C1227 10uF DQSL NC_6 DQSL NC_6
B2 R3 B14 D24 L7 D9 G3 G3
VDD_1 A9 A-MA9 A-MA8 A_DDR3_A[8] B_DDR3_A[8] B-MA8 B-MA10 A10/AP VDD_2 DQSL DQSL
C1205 10uF D9 L7 D12 D21 R7 G7 OS C1228 0.1uF
VDD_2 A10/AP A-MA10 A-MA9 A_DDR3_A[9] B_DDR3_A[9] B-MA9 B-MA11 A11 VDD_3 C7 A9 C7 A9
C1207 0.1uF G7 R7 C16 C24 N7 K2 OS C1229 0.1uF DQSU VSS_1 DQSU VSS_1
VDD_3 A11 A-MA11 A-MA10 A_DDR3_A[10] B_DDR3_A[10] B-MA10 B-MA12 A12/BC VDD_4 B7 B3 B7 B3
C1208 0.1uF K2 N7 C13 C25 T3 K8 OS C1230 0.1uF DQSU VSS_2
E1
DQSU VSS_2
E1
VDD_4 A12/BC A-MA12 A-MA11 A_DDR3_A[11] B_DDR3_A[11] B-MA11 B-MA13 A13 VDD_5 VSS_3 VSS_3
C1210 0.1uF K8 T3 A15 F23 N1 OS C1231 0.1uF E7 G8 E7 G8
VDD_5 A13 A-MA13 A-MA12 A_DDR3_A[12] B_DDR3_A[12] B-MA12 VDD_6 DML VSS_4 DML VSS_4
C1211 0.1uF N1 E11 E21 M7 N9 OS C1232 0.1uF D3
DMU VSS_5
J2 D3
DMU VSS_5
J2
VDD_6 A-MA13 A_DDR3_A[13] B_DDR3_A[13] B-MA13 NC_5 VDD_7 J8 J8
C1212 0.1uF N9 M7 B13 D23 R1 OS C1233 0.1uF VSS_6 VSS_6
VDD_7 NC_5 A-MA14 A_DDR3_A[14] B_DDR3_A[14] B-MA14 VDD_8 E3 M1 E3 M1
C1213 0.1uF R1 M2 R9 OS C1234 0.1uF
F7
DQL0 VSS_7
M9 F7
DQL0 VSS_7
M9
VDD_8 B-MBA0 BA0 VDD_9 DQL1 VSS_8 DQL1 VSS_8
C1214 0.1uF R9 M2 B-MCK N8 OS C1235 0.1uF F2 P1 F2 P1
VDD_9 BA0 A-MBA0 A-MCK B-MBA1 BA1 DQL2 VSS_9 DQL2 VSS_9

OS
R1235

N8 F13 G20 M3 OS C1236 0.1uF F8 P9 F8 P9

56
R1237
C1215 0.1uF A-MBA1 A-MBA0 B-MBA0 B-MBA2 DQL3 VSS_10 DQL3 VSS_10
1%

BA1 A_DDR3_BA[0] B_DDR3_BA[0] BA2

1%
H3 T1 H3 T1
M3 B15 F24 OS C1240 A1
56

C1216 0.1uF DQL4 VSS_11 DQL4 VSS_11

BA2 A-MBA2 A-MBA1 A_DDR3_BA[1] B_DDR3_BA[1] B-MBA1 VDDQ_1 H8 T9 H8 T9
OS A1 C1209 E13 F20 J7 A8 DQL5 VSS_12 DQL5 VSS_12
A-MBA2 B-MBA2 G2 G2
VDDQ_1 A_DDR3_BA[2] B_DDR3_BA[2] 0.01uF CK VDDQ_2 DQL6 DQL6
R1236

A8 J7 K7 C1

56
R1238
50V H7 H7
0.01uF
1%

VDDQ_2 CK CK VDDQ_3 DQL7 DQL7

1%
OS
C1 K7 50V C17 G25 K9 C9 B1 B1
56

A-MCK B-MCK B-MCKE VSSQ_1 VSSQ_1

VDDQ_3 CK A_DDR3_MCLK B_DDR3_MCLK CKE VDDQ_4 D7 B9 D7 B9
C9 K9 A17 G23 B-MCKB D2 DQU0 VSSQ_2 DQU0 VSSQ_2
VDDQ_4 CKE A-MCKE A-MCKB A_DDR3_MCLKZ B_DDR3_MCLKZ B-MCKB VDDQ_5 C3 D1 C3 D1
D2 B16 F25 L2 E9 DQU1 VSSQ_3 DQU1 VSSQ_3
A-MCKB A-MCKE B-MCKE C8 D8 C8 D8
VDDQ_5 A_DDR3_MCLKE B_DDR3_MCLKE CS VDDQ_6 DQU2 VSSQ_4 DQU2 VSSQ_4
E9 L2 K1 F1 C2 E2 C2 E2
VDDQ_6 CS B-MODT ODT VDDQ_7 DQU3 VSSQ_5 DQU3 VSSQ_5
F1 K1 J3 H2 A7 E8 A7 E8
A-MODT AVDD_DDR0 B-MRASB DQU4 VSSQ_6 DQU4 VSSQ_6
VDDQ_7 ODT RAS VDDQ_8 A2 F9 A2 F9
H2 J3 E14 D20 K3 H9 DQU5 VSSQ_7 DQU5 VSSQ_7
VDDQ_8 RAS A-MRASB AVDD_DDR0 A-MODT A_DDR3_ODT B_DDR3_ODT B-MODT B-MCASB CAS VDDQ_9 B8 G1 B8 G1
H9 K3 B12 B25 L3 DQU6 VSSQ_8 DQU6 VSSQ_8
A-MCASB R1231 A-MRASB B-MRASB R1232 B-MWEB A3 G9 A3 G9
VDDQ_9 CAS A_DDR3_RASZ B_DDR3_RASZ WE DQU7 VSSQ_9 DQU7 VSSQ_9
L3 A12 B24 10K J1
WE A-MWEB 10K A-MCASB A_DDR3_CASZ B_DDR3_CASZ B-MCASB NC_1
J1 C12 A24 T2 J9
NC_1 A-MWEB A_DDR3_WEZ B_DDR3_WEZ B-MWEB OS B-MRESETB RESET NC_2
J9 T2 L1
NC_2 RESET A-MRESETB NC_3
L1 F11 E20 L9 IC1201-*2 IC1202-*2
NC_3 A-MRESETB A_DDR3_RESET B_DDR3_RESET B-MRESETB NC_4 NT5CB64M16DP-CF NT5CB64M16DP-CF
L9 F3 T7
NC_4 B-MDQSL DQSL NC_6 B-MA14
T7 F3 G3
A-MA14 NC_6 DQSL A-MDQSL B-MDQSLB DQSL DDR_1333_NANYA_NEW DDR_1333_NANYA_NEW
G3 B19 K24 N3 M8 N3 M8
DQSL A-MDQSLB A-MDQSL A_DDR3_DQSL B_DDR3_DQSL B-MDQSL A0 EAN61857201 VREFCA A0 EAN61857201 VREFCA
C18 K25 C7 A9 P7 P7
A-MDQSLB B-MDQSLB B-MDQSU A1 A1
A_DDR3_DQSLB B_DDR3_DQSLB DQSU VSS_1 P3 P3
A9 C7 B7 B3 A2 A2
VSS_1 DQSU A-MDQSU B-MDQSUB DQSU VSS_2 N2 H1 N2 H1
B3 B7 B18 J21 E1 A3 VREFDQ A3 VREFDQ
A-MDQSUB A-MDQSU B-MDQSU P8 P8
VSS_2 DQSU A_DDR3_DQSU B_DDR3_DQSU VSS_3 A4 A4
E1 A18 J20 E7 G8 P2 P2
VSS_3 A-MDQSUB A_DDR3_DQSUB B_DDR3_DQSUB B-MDQSUB B-MDML DML VSS_4 A5 A5
G8 E7 D3 J2 R8 L8 R8 L8
A-MDML B-MDMU A6 ZQ A6 ZQ
VSS_4 DML DMU VSS_5 R2 R2
J2 D3 E15 H24 J8 A7 A7
VSS_5 DMU A-MDMU A-MDML A_DDR3_DQML B_DDR3_DQML B-MDML VSS_6 T8 T8
J8 A21 L20 E3 M1 A8 A8
A-MDMU B-MDMU B-MDQL0 R3 B2 R3 B2
VSS_6 A_DDR3_DQMU B_DDR3_DQMU DQL0 VSS_7 A9 VDD_1 A9 VDD_1
M1 E3 F7 M9 L7 D9 L7 D9
VSS_7 DQL0 A-MDQL0 B-MDQL1 DQL1 VSS_8 A10/AP VDD_2 A10/AP VDD_2
M9 F7 D17 L23 F2 P1 R7 G7 R7 G7
A-MDQL1 A-MDQL0 B-MDQL0 B-MDQL2 A11 VDD_3 A11 VDD_3
VSS_8 DQL1 A_DDR3_DQL[0] B_DDR3_DQL[0] DQL2 VSS_9 N7 K2 N7 K2
P1 F2 G15 J24 F8 P9 A12 VDD_4 A12 VDD_4
VSS_9 DQL2 A-MDQL2 A-MDQL1 A_DDR3_DQL[1] B_DDR3_DQL[1] B-MDQL1 B-MDQL3 DQL3 VSS_10 T3 K8 T3 K8
P9 F8 B21 L24 H3 T1 NC_6 VDD_5 NC_6 VDD_5
A-MDQL3 A-MDQL2 B-MDQL2 B-MDQL4 N1 N1
VSS_10 DQL3 A_DDR3_DQL[2] B_DDR3_DQL[2] DQL4 VSS_11 VDD_6 VDD_6
T1 H3 F15 J23 H8 T9 M7 N9 M7 N9
VSS_11 DQL4 A-MDQL4 A-MDQL3 A_DDR3_DQL[3] B_DDR3_DQL[3] B-MDQL3 B-MDQL5 DQL5 VSS_12 NC_5 VDD_7 NC_5 VDD_7
T9 H8 B22 M24 G2 R1 R1
A-MDQL5 A-MDQL4 B-MDQL4 B-MDQL6 VDD_8 VDD_8
VSS_12 DQL5 A_DDR3_DQL[4] B_DDR3_DQL[4] DQL6 M2 R9 M2 R9
G2 F14 H23 H7 BA0 VDD_9 BA0 VDD_9
DQL6 A-MDQL6 A-MDQL5 A_DDR3_DQL[5] B_DDR3_DQL[5] B-MDQL5 B-MDQL7 DQL7 N8 N8
H7 A22 M23 B1 BA1 BA1
A-MDQL7 A-MDQL6 B-MDQL6 M3 M3
DQL7 A_DDR3_DQL[6] B_DDR3_DQL[6] VSSQ_1 BA2 BA2
B1 D15 K23 D7 B9 A1 A1
VSSQ_1 A-MDQL7 A_DDR3_DQL[7] B_DDR3_DQL[7] B-MDQL7 B-MDQU0 DQU0 VSSQ_2 VDDQ_1 VDDQ_1
B9 D7 C3 D1 J7 A8 J7 A8
A-MDQU0 B-MDQU1 CK VDDQ_2 CK VDDQ_2
VSSQ_2 DQU0 DQU1 VSSQ_3 K7 C1 K7 C1
D1 C3 G16 G21 C8 D8 CK VDDQ_3 CK VDDQ_3
VSSQ_3 DQU1 A-MDQU1 A-MDQU0 A_DDR3_DQU[0] B_DDR3_DQU[0] B-MDQU0 B-MDQU2 DQU2 VSSQ_4 K9 C9 K9 C9
D8 C8 B20 L22 C2 E2 CKE VDDQ_4 CKE VDDQ_4
A-MDQU2 A-MDQU1 B-MDQU1 B-MDQU3 D2 D2
VSSQ_4 DQU2 A_DDR3_DQU[1] B_DDR3_DQU[1] DQU3 VSSQ_5 VDDQ_5 VDDQ_5
E2 C2 F16 H22 A7 E8 L2 E9 L2 E9
VSSQ_5 DQU3 A-MDQU3 A-MDQU2 A_DDR3_DQU[2] B_DDR3_DQU[2] B-MDQU2 B-MDQU4 DQU4 VSSQ_6 CS VDDQ_6 CS VDDQ_6
E8 A7 C21 K20 A2 F9 K1 F1 K1 F1
A-MDQU4 A-MDQU3 B-MDQU3 B-MDQU5 ODT VDDQ_7 ODT VDDQ_7
VSSQ_6 DQU4 A_DDR3_DQU[3] B_DDR3_DQU[3] DQU5 VSSQ_7 J3 H2 J3 H2
F9 A2 E16 H20 B8 G1 RAS VDDQ_8 RAS VDDQ_8
VSSQ_7 DQU5 A-MDQU5 A-MDQU4 A_DDR3_DQU[4] B_DDR3_DQU[4] B-MDQU4 B-MDQU6 DQU6 VSSQ_8 K3 H9 K3 H9
G1 B8 A20 L21 A3 G9 CAS VDDQ_9 CAS VDDQ_9
A-MDQU6 A-MDQU5 B-MDQU5 B-MDQU7 L3 L3
VSSQ_8 DQU6 A_DDR3_DQU[5] B_DDR3_DQU[5] DQU7 VSSQ_9 WE WE
G9 A3 D16 H21 J1 J1
VSSQ_9 DQU7 A-MDQU7 A-MDQU6 A_DDR3_DQU[6] B_DDR3_DQU[6] B-MDQU6 NC_1 NC_1
C20 K21 T2 J9 T2 J9
A-MDQU7 B-MDQU7 RESET NC_2 RESET NC_2
A_DDR3_DQU[7] B_DDR3_DQU[7] L1 L1
NC_3 NC_3
L9 L9
NC_4 NC_4
F3 T7 F3 T7
DQSL NC_7 DQSL NC_7
G3 G3
DQSL DQSL

C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2
E1 E1
VSS_3 VSS_3
E7 G8 E7 G8
DML VSS_4 DML VSS_4
D3 J2 D3 J2
DDR_1600_SS DDR_1600_SS DDR_1600_HYNIX DDR_1600_HYNIX DDR_DVB_T2_2G DDR_DVB_T2_2G DDR_1600_MICRON DDR_1600_MICRON DMU VSS_5 DMU VSS_5
J8 J8
IC1201-*5 IC1202-*5 IC1201-*4 IC1202-*4 IC1201-*3 IC1202-*3 IC1201-*6 IC1202-*6 VSS_6 VSS_6
K4B1G1646G-BCK0 K4B1G1646G-BCK0 H5TQ1G63DFR-PBC H5TQ1G63DFR-PBC K4B2G1646C K4B2G1646C MT41J64M16JT-125:G MT41J64M16JT-125:G E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7
F7 M9 F7 M9
N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 DQL1 VSS_8 DQL1 VSS_8
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
F2 P1 F2 P1
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
DQL2 VSS_9 DQL2 VSS_9
N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 F8 P9 F8 P9
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
DQL3 VSS_10 DQL3 VSS_10
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
H3 T1 H3 T1
R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 DQL4 VSS_11 DQL4 VSS_11
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
H8 T9 H8 T9
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
DQL5 VSS_12 DQL5 VSS_12
R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 G2 G2
L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 DQL6 DQL6
R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 H7 H7
N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 DQL7 DQL7
T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
NC_6 VDD_5
K8 T3
NC_6 VDD_5
K8 B1 B1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1 VSSQ_1 VSSQ_1
M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
A15 VDD_7
N9 M7
A15 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
A15 VDD_7
N9 M7
A15 VDD_7
N9 D7 B9 D7 B9
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1 DQU0 VSSQ_2 DQU0 VSSQ_2
M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 C3 D1 C3 D1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
DQU1 VSSQ_3 DQU1 VSSQ_3
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
C8 D8 C8 D8
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1 DQU2 VSSQ_4 DQU2 VSSQ_4
J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 C2 E2 C2 E2
K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 DQU3 VSSQ_5 DQU3 VSSQ_5
K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 A7 E8 A7 E8
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2 DQU4 VSSQ_6 DQU4 VSSQ_6
L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 A2 F9 A2 F9
K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 DQU5 VSSQ_7 DQU5 VSSQ_7
J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 B8 G1 B8 G1
K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9