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Ascend AI Processor Architecture and

Programming
st Edition
Principles and Applications of CANN
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Author: Xiaoyao Liang
Paperback ISBN: 9780128234884
Imprint: Elsevier
Published Date: 28th August 2020
Page Count: 220

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Description
Ascend AI Processor Architecture and Programming: Principles and Applications of CANN   o ers in-depth
AI applications using Huawei’s Ascend chip, presenting and analyzing the unique performance and
attributes of this processor. The title introduces the fundamental theory of AI, the so ware and
hardware architecture of the Ascend AI processor, related tools and programming technology, and
typical application cases. It demonstrates internal so ware and hardware design principles, system
tools and programming techniques for the processor, laying out the elements of AI programming
technology needed by researchers developing AI applications.

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Chapters cover the theoretical fundamentals of AI and deep learning, the state of the industry,
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including the current state of Neural Network Processors, deep learning frameworks, and a deep
learning compilation framework, the hardware architecture of the Ascend AI processor, programming
methods and practices for developing the processor, and nally, detailed case studies on data and
algorithms for AI.

Key Features
• Presents the performance and attributes of the Huawei Ascend AI processor
• Describes the so ware and hardware architecture of the Ascend processor
• Lays out the elements of AI theory, processor architecture, and AI applications
• Provides detailed case studies on data and algorithms for AI
• O ers insights into processor architecture and programming to spark new AI applications

Readership
System designers, programmers, application developers, and system so ware developers; Researchers
in academia and industry specializing in arti cial intelligence

Table of Contents
1 Basic Theory
1.1 Brief History of Arti cial Intelligence
1.2 Introduction to Deep Learning
1.3 Neural Network Theory

2 Industry Background
2.1 Current Status of the Neural Network Chips
2.2 Neural Network Chip Acceleration Theory
2.3 Deep learning framework
2.4 Deep Learning Compilation Framework – TVM View more >

Details
No. of pages:

Language: English

Copyright: © Elsevier

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Published: th August
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Imprint: Elsevier

Paperback ISBN:

About the Author

Xiaoyao Liang
Liang Xiaoyao is a Professor, Supervisor and Academic Leader in the Department of Computer Science
and Engineering at Shanghai Jiaotong University, in China. He graduated from Harvard University in
the USA, and has held roles at a number of international companies. His research interests include
computer architecture, integrated circuit design, general graphics processors, and arti cial
intelligence chip architecture. He has published over 80 papers, and is a leader in the eld.

Affiliations and Expertise

Professor, Supervisor and Academic Leader, Department of Computer Science and
Engineering, Shanghai Jiaotong University, China

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