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Kozhemyak O.A.
K58 Computer aided design of electronic devices: study aid / O.A.
Kozhemyak, D.N. Ogorodnikov; Tomsk Polytechnic University. –
Tomsk: TPU Publishing House, 2014. – 130 p.
This textbook focuses on the basic notions, history, types, technology and
applications of computer-aided design. Methods of electronic devices simulation,
automated design of power electronic devices and components, constructive-
technological design are considered and discussed. Some features of the popular
electronics CADs are also shown. There are a lot of practical examples using
CADs of electronics.
The textbook is designed at the Department of Industrial and Medical
Electronics of TPU. It is intended for students majoring in the specialty
„Electronics and Nanoelectronics‟.
UDC 621.38(075.8)
BBC 31.2
Reviewer
Cand.Sc, Head of Laboratory,
Tomsk State University of Control Systems and Radioelectronics
Aleksandr V. Osipov
2
Introduction. CAD around Us ...........................................................................5
What is CAD?................................................................................................5
Overview .......................................................................................................6
History ...........................................................................................................7
Uses ...............................................................................................................9
Types ...........................................................................................................10
Technology ..................................................................................................11
Electronic Design Automation ....................................................................12
Modern EDA Software ................................................................................15
Chapter 1 General Information on Design......................................................28
1.1 Definition of Design ..............................................................................28
1.2 The description of the automated designing process ............................31
1.3 Process Approach in Electronic Design Automation ............................33
1.4 Structure of CAD systems .....................................................................35
1.4 General Description of CAD .................................................................38
1.5 Decision-making in CAD. Choosing the Criterion of Optimality ........42
1.6 Application of Experiments Planning Methods in CAD ......................45
Chapter 2 Simulation of Electronic Devices ...................................................48
2.1 Methods of Electronic Devices Simulation ...........................................48
2.2 Kinds of simulation on design stages of electronic devices ..............51
2.3 Circuit Simulation .................................................................................55
2.4 Functional-logic Simulation of Digital Devices ...................................61
Chapter 3 Automated Designing of Power Electronic Devices and
Components ....................................................................................................62
3.1 Designing Devices of Power Electronics ..............................................62
3.2 Modeling example of rectifier designing ..............................................65
3.3 Methods of formation of static models elements of power electronics 68
Chapter 4 Designing of Low-Current Electronic Devices..............................73
4.1 Methods and Algorithms of Designing .................................................73
4.2 Automated Synthesis of Control Systems .............................................77
4.3 Procedures of Minimization at the Design of Electronic Devices ........79
4.5 Reliability Control of the Developed Electronic Device ......................81
Chapter 5 Constructive-Technological Designing .........................................83
5.1 Constructive-technological designing ...................................................83
5.2 The Design Analysis of Electromagnetic Compatibility of Electronic
Devices ........................................................................................................84
Chapter 6 Design of DC-DC Buck Converter ................................................86
6.1 Technical project ...................................................................................86
6.2 Analysis of the technical project ...........................................................86
3
6.3 Calculation of DC-DC converter...........................................................90
6.4 Designing and calculation of circuit components .................................91
6.4.1 Calculation of smoothing inductor .....................................................91
6.4.2 Calculation of power transistors .........................................................93
6.4.3 Calculation of electrolytic capacitors for smoothing filter circuits ...96
6.4.4 Calculation of diode blocks ................................................................98
6.4.5 Calculation of circuit parameters .......................................................99
6.4.6 Calculation of load parameters .........................................................100
6.4.7 Calculation of control circuit parameters .........................................100
6.4.8 Calculation of converter‟s efficiency and weight ............................101
6.5 Simulation............................................................................................102
6.5.1 Simulation circuit and conditions .....................................................102
6.5.2 Current and voltage waveforms .......................................................103
6.5.3 Testing protocol ................................................................................108
Conclusion ....................................................................................................111
Bibliography .................................................................................................112
Appendix A ...............................................................................................114
Appendix B ................................................................................................116
4
Introduction.
CAD around Us
This chapter focuses on the basic notions, history, types, technology and
applications of computer-aided design systems. It is general information
about CADs.
What is CAD?
Overview
6
designers to layout and develop work on screen, print it out and save it for
future editing, saving time on their drawings.
History
7
It is argued that a turning point was the development of the
SKETCHPAD system at MIT by Ivan Sutherland (who later created a
graphics technology company with Dr. David Evans). The distinctive feature
of SKETCHPAD was that it allowed the designer to interact with his
computer graphically: the design can be fed into the computer by drawing on
a CRT monitor with a light pen. Effectively, it was a prototype of graphical
user interface, an indispensable feature of modern CAD. Sutherland
presented his paper Sketchpad: A Man-Machine Graphical Communication
System in 1963 at a Joint Computer Conference having worked on it as his
PhD thesis paper for a few years. Quoting, “For drawings where motion of
the drawing, or analysis of a drawn problem is of value to the user, Sketchpad
excels. For highly repetitive drawings or drawings where accuracy is
required, Sketchpad is sufficiently faster than conventional techniques to be
worthwhile. For drawings which merely communicate with shops, it is
probably better to use conventional paper and pencil.” Over time efforts
would be directed toward the goal of having the designers drawings
communicate not just with shops but with the shop tool itself. This goal
would be a long time arriving.
The first commercial applications of CAD were in large companies in
the automotive and aerospace industries, as well as in electronics. Only large
corporations could afford the computers capable of performing the
calculations. Notable company projects were at GM (Dr. Patrick J.Hanratty)
with DAC-1 (Design Augmented by Computer) 1964; Lockheed projects;
Bell GRAPHIC 1 and at Renault (Bézier) – UNISURF 1971 car body design
and tooling.
One of the most influential events in the development of CAD was the
founding of MCS (Manufacturing and Consulting Services Inc.) in 1971 by
Dr. P. J. Hanratty, who wrote the system ADAM (Automated Drafting And
Machining) but more importantly supplied code to companies such as
McDonnell Douglas (Unigraphics), Computervision (CADDS), Calma,
Gerber, Autotrol and Control Data.
As computers became more affordable, the application areas have
gradually expanded. The development of CAD software for personal desktop
computers was the impetus for almost universal application in all areas of
construction.
Other key points in the 1960s and 1970s would be the foundation of
CAD systems United Computing, Intergraph, IBM, Intergraph IGDS in 1974
(which led to Bentley Systems MicroStation in 1984)
CAD implementations have evolved dramatically since then. Initially,
with 3D in the 1970s, it was typically limited to producing drawings similar
8
to hand-drafted drawings. Advances in programming and computer hardware,
notably solid modeling in the 1980s, have allowed more versatile
applications of computers in design activities.
Key products for 1981 were the solid modelling packages - Romulus
(ShapeData) and Uni-Solid (Unigraphics) based on PADL-2 and the release
of the surface modeler CATIA (Dassault Systemes). Autodesk was founded
1982 by John Walker, which led to the 2D system AutoCAD. The next
milestone was the release of Pro/ENGINEER in 1988, which heralded greater
usage of feature-based modeling methods and parametric linking of the
parameters of features. Also of importance to the development of CAD was
the development of the B-rep solid modeling kernels (engines for
manipulating geometrically and topologically consistent 3D objects)
Parasolid (ShapeData) and ACIS (Spatial Technology Inc.) at the end of the
1980s and beginning of the 1990s, both inspired by the work of Ian Braid.
This led to the release of mid-range packages such as SolidWorks in 1995,
Solid Edge (then Intergraph) in 1996 and Autodesk Inventor in 1999.
Uses
9
CAD is also used for the accurate creation of photo simulations that are
often required in the preparation of Environmental Impact Reports, in which
computer-aided designs of intended buildings are superimposed into
photographs of existing environments to represent what that locale will be
like were the proposed facilities allowed to be built. Potential blockage of
view corridors and shadow studies are also frequently analyzed through the
use of CAD.
CAD has been proven to be useful to engineers as well. Using four
properties which are history, features, parameterization, and high level
constraints. The construction history can be used to look back into the
model's personal features and work on the single area rather than the whole
model. Parameters and constraints can be used to determine the size, shape,
and other properties of the different modeling elements. The features in the
CAD system can be used for the variety of tools for measurement such as
tensile strength, yield strength, electrical or electro-magnetic properties. Also
it‟s stress, strain, timing or how the element gets affected in certain
temperatures, etc.
Types
There are several different types of CAD, each requiring the operator to
think differently about how to use them and design their virtual components
in a different manner for each.
There are many producers of the lower-end 2D systems, including a
number of free and open source programs. These provide an approach to the
drawing process without all the fuss over scale and placement on the drawing
sheet that accompanied hand drafting, since these can be adjusted as required
during the creation of the final draft.
3D wireframe is basically an extension of 2D drafting (not often used
today). Each line has to be manually inserted into the drawing. The final
product has no mass properties associated with it and cannot have features
directly added to it, such as holes. The operator approaches these in a similar
fashion to the 2D systems, although many 3D systems allow using the
wireframe model to make the final engineering drawing views.
3D "dumb" solids are created in a way analogous to manipulations of
real world objects (not often used today). Basic three-dimensional geometric
forms (prisms, cylinders, spheres, and so on) have solid volumes added or
subtracted from them, as if assembling or cutting real-world objects. Two-
dimensional projected views can easily be generated from the models. Basic
10
3D solids don't usually include tools to easily allow motion of components,
set limits to their motion, or identify interference between components.
3D parametric solid modeling requires the operator to use what is
referred to as “design intent”. The objects and features created are adjustable.
Any future modifications will be simple, difficult, or nearly impossible,
depending on how the original part was created. One must think of this as
being a “perfect world” representation of the component. If a feature was
intended to be located from the center of the part, the operator needs to locate
it from the center of the model, not, perhaps, from a more convenient edge or
an arbitrary point, as he could when using “dumb” solids. Parametric solids
require the operator to consider the consequences of his actions carefully.
Some software packages provide the ability to edit parametric and non-
parametric geometry without the need to understand or undo the design intent
history of the geometry by use of direct modeling functionality. This ability
may also include the additional ability to infer the correct relationships
between selected geometry (e.g., tangency, concentricity) which makes the
editing process less time and labor intensive while still freeing the engineer
from the burden of understanding the models. These kinds of non-history
based systems are called Explicit Modellers or Direct CAD Modelers.
Top end systems offer the capabilities to incorporate more organic,
aesthetics and ergonomic features into designs. Freeform surface modeling is
often combined with solids to allow the designer to create products that fit
the human form and visual requirements as well as they interface with the
machine.
Technology
12
simulation. Probably the best known digital simulators are those based on
Verilog and VHDL. The most well-known analog simulator is SPICE.
SPICE (Simulation Program with Integrated Circuit Emphasis) is a
general-purpose, open source analog electronic circuit simulator. It is a
powerful program that is used in integrated circuit and board-level design to
check the integrity of circuit designs and to predict circuit behavior.
Circuit simulation programs, of which SPICE and derivatives are the
most prominent, take a text netlist describing the circuit elements (transistors,
resistors, capacitors, etc.) and their connections, and translate this description
into equations to be solved. The general equations produced are nonlinear
differential algebraic equations which are solved using implicit integration
methods, Newton's method and sparse matrix techniques.
SPICE was developed at the Electronics Research Laboratory of the
University of California, Berkeley. SPICE1 was first presented at a
conference in 1973. SPICE1 was coded in FORTRAN and used nodal
analysis to construct the circuit equations. SPICE1 had relatively few circuit
elements available and used a fixed-timestep transient analysis. The real
popularity of SPICE started with SPICE2 in 1975. SPICE2, also coded in
FORTRAN, was a much-improved program with more circuit elements,
variable timestep transient analysis using either the trapezoidal (second order
Adams-Moulton method) or the Gear integration method, equation
formulation via modified nodal analysis. SPICE became popular because it
contained the analyses and models needed to design integrated circuits of the
time, and was robust enough and fast enough to be practical to use. As an
early open source program, SPICE was widely distributed and used. Its
ubiquity became such that “to SPICE a circuit” remains synonymous with
circuit simulation.
SPICE inspired and served as a basis for many other circuit simulation
programs, in academia, in industry, and in commercial products. The first
commercial version of SPICE was ISPICE, an interactive version on a
timeshare service, National CSS. The most prominent commercial versions
of SPICE include HSPICE (originally commercialized by Shawn and Kim
Hailey of Meta Software, but now owned by Synopsys) and PSPICE (now
owned by Cadence Design Systems). The academic spinoffs of SPICE
include XSPICE, developed at Georgia Tech, which added mixed
analog/digital “code models” for behavioral simulation, and Cider
(previously CODECS, from UC Berkeley/Oregon State Univ.) which added
semiconductor device simulation. The integrated circuit industry adopted
SPICE quickly, and until commercial versions became well developed many
IC design houses had proprietary versions of SPICE. Today a few IC
13
manufacturers, typically the larger companies, have groups continuing to
develop SPICE-based circuit simulation programs. Among these are ADICE
at Analog Devices, LTspice at Linear Technology (available to the public as
freeware), Mica at Freescale Semiconductor, and TINA at Texas Instruments.
The birth of SPICE was named an IEEE Milestone in 2011; the entry
mentions that SPICE “evolved to become the worldwide standard integrated
circuit simulator”.
17
Unlike other EDA program, AutoTRAX DEX integrated all of the
schematic and PCB design into a single XML project file. It uses parametric
parts which define the parts schematic symbols, PCB footprint and 3D
package models using numeric parameters. This allow a simple parametric
model to be quickly changed to represent an of a family of similar parts, e.g.
DIP and BGAs.
AutoTRAX Design Express (DEX) has now replaced AutoTRAX EDA.
It is based on Microsoft .NET 4 and has both a Microsoft Office 2007 and
2010 interface as well as a classic Dropdown menu with toolbars.
Unlike the Protel version, AutoTRAX DEX uses the Microsoft
Windows platform and runs on Windows XP, Windows Vista and Windows
7. The file format is open and viewable with any text editor as it is XML
based, and the XML schema is fully documented.
18
CircuitLogix was first launched in 2005, and its popularity has grown
quickly since that time. In 2012, it reached the milestone of 250,000 licensed
users, and became the first electronics simulation product to have a global
installed base of a quarter-million customers in over 100 countries.
CircuitLogix was developed by Dr. Colin Simpson, an electronics
professor at George Brown College, in Toronto, Canada, and John (Bud)
Skinner, a computer programmer. The electronics program has won awards
including the Award of Excellence from the Association of Canadian
Community Colleges (ACCC). CircuitLogix is used exclusively as the
electronic circuit simulation tool for the George Brown College Electronics
Technician distance education program, which is the largest Electronics
technician program in the world with over 4,000 students in 37 countries.
The professional version of CircuitLogix (CircuitLogix Pro) includes
over 10,000 device models, as well as 8 virtual instruments. It also includes
3DLab, which is a software product that combines an interactive 3-
dimensional learning environment and electronic devices and tools to
enhance the user's comprehension of electronics. 3DLab virtual components
include batteries, switches, motors, lamps, resistors, inductors, capacitors and
instruments including oscilloscopes, Signal generators, and frequency
counters.
19
Figure 0.5. DipTrace window
20
Figure 0.6. SmartSpice window
21
Figure 0.7. Micro-Cap window
The name Micro-Cap was derived from the term Microcomputer Circuit
Analysis Program. The forerunners to the Micro-Cap simulator were the
Logic Designer and Simulator. Released in June 1980, this product was the
first integrated circuit editor and logic simulation system available for
personal computers. Its primary goal was to provide a “circuit creation and
simulation” environment for digital simulation.
23
OrCAD is a proprietary software tool suite used primarily for electronic
design automation. The software is used mainly by electronic design
engineers and electronic technicians to create electronic schematics and
electronic prints for manufacturing printed circuit boards.
The name OrCAD is a portmanteau, reflecting the company and its
software's origins: Oregon+CAD.
24
OrCAD PSpice models for all the power and logic semiconductors, since
PSpice is the most used circuit simulator. Intel offers reference PCBs
designed with Cadence PCB Tools in the OrCAD Capture format for
embedded and personal computers.
25
TopSpice is a true analog/digital/behavioral mixed-mode circuit
simulator for the PC. It offers the most advanced SPICE simulator in its price
range, compatibility, and an easy to use integrated design environment from
schematic capture to graphical waveform analysis.
With TopSpice you have the choice to design from schematic drawings,
text netlist (SPICE) files or both. All design and simulation functions are
available from either the schematic or netlist editor front-ends.
27
Chapter 1
General Information on Design
Intermediate decisions
Key parameters (functions)
1 2 3 4
A X
B X
C X
The designing process should cover all stages of product life cycle:
1. The formation of requirements to the system and development of the
requirement description.
2. Designing.
3. Manufacturing, test and operational development of pre-production
models.
4. Serial production.
5. Operation and target application.
6. Recycling.
30
Real parameters of elements of the circuit are taken into account;
loading remains idealized.
All elements of the circuit are replaced by real models with real
parameters.
5. During designing the account of interrelations between design procedures
(the strategy is not always linear) is carried out.
Level of systems
34
Control
Call Resources
Requirements to documents:
1. Systematization (references)
2. Functionality (completeness)
3. Adequacy (correspondence to the standard)
4. Identification (by kinds of documents)
5. Addressing (for whom)
6. Simplicity
7. Urgency (the account for changes)
Restrictions
Designing documentation
36
devices for data preparation and data entry (keyboard, magnetic
media, scanners, digitizers, digital photo cameras and
telecameras),
data transmission facilities (repeaters, hubs, switches, modems,
multiplexers, NICs),
data processing facilities (computer, processor),
data display and documentation facilities (alphanumeric and
graphic displays (monitors, terminals), printers, plotters,
magnetic media devices, devices for special purposes
(photoplotters),
archive facilities of design solutions - set of tools for storage,
monitoring, restoration and reproduction of data; includes all the
devices listed above devices.
Soft Soft
Special
User I/O Data transform Monitor hardware-
software
means
Database
CAD includes both problem and object oriented subsystems and base
program methodical complexes.
Subsystems of CAD for electronic devices:
1. A subsystem of calculation of circuits of electronic devices and
components designing.
2. A subsystem of simulation (PSPICE).
38
3. The automated system of reliability maintenance.
4. A subsystem of designing of printed-circuit-boards (PCAD).
5. A subsystem of release of the design documentation.
2. A subsystem of development and release of the technological
documentation, including programs for technological automatic
devices.
The subsystem of reliability maintenance can include:
1. A subsystem of reliability calculation.
2. Information-search system of the choice of elements.
3. A subsystem of thermal calculations.
Information connection of subsystems is based on the principle of one-
time entering of the information.
39
Enterprise
standard Circuit Diagram
List of wires
Technical
task To design Enterprise
the circuit standard
40
Figure 1.6. CAD structure diagram for a design engineer
41
1.5 Decision-making in CAD. Choosing the Criterion of Optimality
42
1. The additive criterion - is formed by addition of the normalized values
of simple criteria.
n
Fi x
F x Ci , (1.1)
i 0 F0i x
where:
Ci – weight factor (determines the degree of importance of the criterion),
F0 – a normalizing divider of the criterion (a base parameter).
2. The multiple criterion
m
F x Fi Ci x , (1.2)
i 1
Fi x
Ci K. (1.3)
F0i x
n 1 i
Ci . (1.4)
n n 1
1
Ci . (1.5)
n
C
i 1
i 1. (1.6)
43
Let's consider the example of optimization of independent system of
power supply by the criterion of total weight minimum.
PL 1000 W
ISS 25kg kW
WL
– power efficiency.
M ISS М conv
М Р Рconv ISS
1. М1 25 5 10 40kg
2. М 2 25 2.5 11 38.5kg – preferable variant.
At designing the converter of electric energy they use the concept of the
resulted weight including own weight of the converter and the attached
weight of the initial source.
MTotal М conv М Р
М Total min – criterion.
1. М Total1 5 10 15kg
2. МTotal 2 2.5 11 13.5kg – preferable variant.
F1 x M conv ; F2 x Рconv
It is possible to show, that at 85% by the criterion of the resulted
weight mi Pi ISS min it is possible to project not only the converter,
44
but also its separate components. Thus the uncertainty interval does not
exceed of 5%.
Kinds of experiments
N l1 l2 l3 .
Number of
X1 X2 X3
experiment
1 0 0 0
2 0 0 1
3 0 1 0
4 0 1 1
5 1 0 0
6 1 0 1
7 1 1 0
8 1 1 1
46
6. The orthogonal plan.
Its graphic interpretation:
N 2 K 2 K 1.
Tops – 8; sides – 6; the center – 1 ( level 3; N 15 ).
Example of planning
The power supply. Control Vout. Two factors: Vps, Iload.
Vps Iload
Max. (+1) (+1)
Nom. (0) (0)
Min. (-1) (-1)
47
Chapter 2
Simulation of Electronic Devices
2.1 Methods of Electronic Devices Simulation
MDA AS
PhM ADCS
Electrical Computer
modeling simulation
SNM DC
NE ММ
Experi-
ment Theory
MM – mathematical simulation.
DC – digital computers.
ADCS – analog-digital computing systems.
AC – analog computers.
MDA – model of direct analogy.
PhM – physical models (prototype).
SNM – subnatural model.
NE – natural experiment.
First four kinds of simulation are computer simulations. The others four
kinds are electrical modeling. The mathematical model of a technical object
is the set of mathematical objects (numbers, variables, matrixes, etc.) and
48
relations between them (mathematical circuits) which adequately reflect
properties of the technical object.
There are two terms:
Mathematical modeling – the process of model drawing up.
Simulation – the process of realization of the mathematical description
with the help of technical means and process of research on a model.
The basic methods of research of mathematical models are:
1. Analytical research.
2. Imitating simulation.
Analytical (symbolical) models are those models in which only formulas
(symbols) are used for representation of the process. The analytical model
gives the decision in the closed kind (formula). Thus analytical simulation is
a theoretical research of an object or its characteristics.
Imitating model is the description of objects including algorithm forms,
thus it is reflected both the structure of the system, and the process of
functioning of the structure in time, i.e. the sequence of events. Imitating
models are not capable to form the decision in that kind as in analytical
model, and can serve only as a tool for the analysis of system, i.e. imitating
simulation is not the theory, but methodology of the decision of a problem
(the means of virtual experiment).
Example
Distortion factor calculation:
1. By an analytical method (with an assumption about ideal fronts of
switching)
U
i 2
2
D
THDF , (2.1)
U1
So, we have
UD 1
4
U D1
2
U D2 U D2 1 1 8 2 2 8
THDF 48%
U D2 1 8 2 8
U 2
D
THDF i 2
,
U12
Functional simulation
51
Divider Amplifier
x
2R
R
R
G y-?
U1
R
R 2R R
U1 y U1
R 2R R/2
if G
3
R *3R 3
X ( R) 3
R R; U 4 X;
R 3R 4 3
R R 7
4
3 2R 2 Y 3 3
U1 X( ) X ; U1 Y
7 3R 7 7
2 7
2
3 2 2
Y X; Y X
7 7 3
If Rout ( D) Rin ( A) , Y X .
Circuit simulation
52
At circuit simulation the componential dynamic elements are used. The
decision of the equations of balance and the componential equations is
required. For the analysis of logic and digital devices functional – logic
simulation is used (PSpice A/D).
Examples of models
IG
It is Volt-Ampere characteristic of the tunnel diode.
VG
1
The model of the tunnel diode:
GR 10 TABLE {V (GR) = (0,0)… (U1, I1)…}
GR
0
The Equation System
x1 0.5 x1 x 2
x 2 0.25 4 x1 0.6 x 2
x1 0 0
x 2 0 0.4
54
The model of the equation system
1 2
R1 GX2
GX1 C1 C2
R2
0
1 dU C x1 U C1
С
UC iC dt iC С
dt x2 UC 2
55
5. The spectral analysis of currents and voltage with the help of Fourier
transformation
6. The statistical analysis at which casual value of each parameter is
calculated under the formula:
x xnom (1 ) . (2.3)
Key parameters:
BF – forward common-emitter current gain.
BR – reverse common emitter current gain.
RC – ohmic resistance of collector.
RB – ohmic resistance of base.
CJC – capacity of collector junction.
CJE – capacity of emitter junction.
TF – time constant of capacities diffusion of emitter junction.
56
TR – time constant of capacities diffusion of collector junction.
For calculation of resistance of base points of current and voltage are
chosen under the input characteristic of the transistor in the circuit with
common emitter at U ce 0 10V .
Ib
Ube
BR BF e ,
I
(2.4)
Ic
BF
TF 2f c , (2.5)
h21
tS
TR tS , (2.6)
I b1 I b 2
ln
I b 2 I c BF
57
Model of a field-effect transistor
I SN
BETA , (2.7)
UZIO
2
Model of an inductance
L
r0
Rs
Model of a transformer
58
r01 2 r02
1 3 4
Rc W1 W2
0 0
Model of a capacitor
rc
Rc
C
59
Models of controlled sources
E F
+
±
-
H
G
Simulation programs:
• MultiSIM (Workbench)
• Pspice
• Circuit Maker
60
• Micro-Cap
• Matlab-Simulink
• SystemViev
• Workview Office
• Labview
61
Chapter 3
Automated Designing of Power Electronic Devices and
Components
3.1 Designing Devices of Power Electronics
gi x1, x 2, ... xn 0,
(3.1)
x j1 x j x j 2 ,
63
Begin
End
65
Choice of the rectifier circuit (stage of structural synthesis)
Procedure of synthesis of the circuit of the rectifier can be reduced to a
choice of the proper circuit from the typical topologies that are known. This
procedure can be formalized having created an expert system based on the
specific knowledge on power electronics.
When it is impossible to choose the suitable circuit of the rectifier from
among known, it is required to create a new circuit or update the design
assignments of the rectifier.
By the results of analysis of basic circuits of rectifiers of single-phase
and three-phase voltage the summary table is completed (Table 3.1). In view
of multidimensionality of a vector of properties of each circuit, formed in the
parameters of columns of the table, the choice of the circuit at designing of
new rectifier with required target parameters is ambiguous.
Therefore the algorithm of choice of the rectifier circuit based on three
output parameters of the rectifier ( Pd 0 ,U d 0 , I d ) is necessary. The algorithm
specifies also the usage of power switches with the maximum value of
reverse voltage up to 1000 … 1500 V and the voltage margin of 1.5…2.
The algorithm of a choice of the rectifier circuit is represented below
(see Fig. 3.2).
Table 3.1. Parameters of basic rectifier circuits
Rectifier
Circuit qm2
Ud0 Id
K п (1)
K т / U1 K т / I1 THD F
m1 1, m2 2, q 1
With center-tapped 2 0.9 1.11 0.9 0.667 0.24
transformer
m1 m2 1, q 2
2 0.9 1.11 0.9 0.667 0.24
Bridge rectifier
m1 m2 3, q 1
3 1.17 1.21 0.79 0.25 0.06
Delta–star
m1 m2 3, q 1
3 1.17 1.48 0.83 0.25 0.06
Star–zig-zag
m1 3, m2 6, q 1
With smoothing 6 1.17 2.56 0.955 0.057 0.0067
inductor
m1 m2 3, q 2
6 2.34 1.28 0.955 0.057 0.0067
Larionov's circuit
66
Table 3.1. (continued)
Switches Transformer
Circuit Кf
I a* Ка U *
b max S 2* S1* S т*
m1 1, m2 2, q 1
With center-tapped 0.5 2 2 3.14 1.57 1.11 1.34
transformer
m1 m2 1, q 2
0.5 2 2 1.57 1.11 1.11 1.11
Bridge rectifier
m1 m2 3, q 1
0.33 3 3 2.09 1.48 1.21 1.345
Delta–star
m1 m2 3, q 1
0.33 3 3 2.09 1.71 1.21 1.46
Star–zig-zag
m1 3, m2 6, q 1
1.26
With smoothing 0.166 3 6 2.09 1.48 1.045
+0,07
inductor
m1 m2 3, q 2
0.33 3 3 1.045 1.045 1.045 1.045
Larionov's circuit
m – number of phases;
q – number of half-cycles;
mq – pulse number;
THDF – harmonic factor in a DC part of the circuit;
ka – amplitude factor of anode current;
kf – form factor of anode current;
– power factor of the rectifier;
Ub max – maximum reverse voltage across the switches.
67
Figure 3.2. Intellectual algorithm of a choice of the circuit of the rectifier
4. Taking into account that K m of the transformer is more than unity, but
rather close to it (step-down transformer), the variant of power supply
for rectifiers directly from the network is possible (without the
transformer of the rectifier).
Thus, for the designer an expert system offers three alternative
solutions, and by results of detailed calculation and modeling it is necessary
to choose one.
UVD U 0 i rd
69
B ic , q
U be ic , q
U ce ic , q
ic
ib q
B
B t C . (3.4)
1
VT
2f c
ton VT , q
toff VT , q
tS VT , q
log PC 0 a b log f
. (3.5)
tg a0 a1 f a2 H a3 Hf
z, tg f , T
. (3.6)
I leak T ,U C
70
Uc
Lc Ul
Urc
U
rс
Rleak
δ
С
φ
ic
Let's simplify: LC 0 .
tg rC C
z
XC z cos
1 tg 2
z tg . (3.7)
rC z sin
1 tg 2
1
XC
C
z f ,T
Initial ratio:
tg f , T
71
φ
V1
Rs
V2
+
Gin G2
- =
UV 2 Rs
zf
UV 1
. (3.8)
f
2
72
Chapter 4
Designing of Low-Current Electronic Devices
4.1 Methods and Algorithms of Designing
73
The designing criterion is determined according to the basic concept of
designing as follows: the device should reproduce with demanded accuracy
the circuit functions at minimum quantity of functional converters and
correcting and concordance parts.
For estimation of accuracy of functional converters it is not always
simple to generate integrated criterion. There are tasks of approximation of
the characteristics set on points, tasks of achievement of the extreme and
others. In such cases cad software should include modules of processing of
target characteristics and functions of quality calculation.
For example, for minimization of monotonous transients it is possible to
use a linear integrated estimation:
S0 Yn (t )dt , (4.1)
0
THDF U
2
* 2
v , (4.2)
U
where U * is relative value n-th harmonic.
U1
74
Table 4.1
Type of
Type of conversion Note
element
x y Example:
Analogue-to-
f y = f(x)
analogue
x y Example:
Analogue-to-
f = f(x(t))
pulse
x y Example:
Pulse-to-
f y = kA(t)
analogue
x y Example:
Analogue-to-
f N(t) = kx(t)
digital N(t)
x y Example:
Digital-to-
f y(t) = kN(t)
analogue N(t)
x y Example:
Analogue-to-
f y = 0.5 ; 1 ; 1.5
logical
Logical-to- x y y ={y1 , y2 , y3
analogue f - levels}
x y Example:
Digital f Nx Ny Ny = f(Nx)
x y Example:
Logical L x1 , x2 y y = L(x1 , x2)
x y Example:
Logical-to-
L x1 , x2 N N = L(x1 , x2)
digital
x y Example:
Logical-to- if
pulse L x1 , x2 L(x1 , x2) = 1
75
Start
Analyzing block
Satisfies Ye
condition
s
description?
No
Possibilities of Ye
PS are
s
finished?
Possibilities
of PSS are
No
finished?
Parametrical synthesis
Ye
block
s
No
Block of partial structural
synthesis (PSS)
End
76
4.2 Automated Synthesis of Control Systems
Nyquist criterion
Re
-1, 0 Im
Bode criterion
1. System that has positive phase margin in a cross point of the phase-
frequency characteristic and a circle of single radius is stable, whereas
system with negative phase margin is unstable
78
2. For stability of the system rate of change of an open-loop gain should be
20 dB per decade in the vicinity of cut-off frequency at which the
complex factor of transfer function of an open-loop systems is equal to 1.
80
60 дБ
дек
20 20 дБ
дек 4 CP
0.5 CP CP
-20 40 дБ
дек
low
0.5
c
high
4
c
79
conditions of operation when elements are subjected to the accelerated
ageing.
y Y x1 , x2 xi xi , xn Y x1 , x2 , xn
, (4.3)
xi xi
R2
R1 R1 1 R1
K0 , (4.4)
R2 R2 1 R 2
y
xP xH sign xi (4.5)
xi
80
where – random variable from the range (–1, 1).
Qe 1 Pe P .
K
(4.7)
1 1 1 1
Tnfo 1 ... . (4.8)
2 3 m 1
82
Chapter 5
Constructive-Technological Designing
5.1 Constructive-technological designing
83
5.2 The Design Analysis of Electromagnetic Compatibility of Electronic
Devices
The port is a border between the electronic device and the external
electromagnetic environment (a clip, a socket, the plug, a joint, etc.).
The port of the case – physical border of the electronic device through
which electromagnetic fields can be radiated or external electromagnetic
fields can penetrate.
Ports of power supplies can be input and output.
Ports of input-output – ports of data transmission, control, etc.
Through the ports of power supplies conductive interferences circulate.
These are interferences which circulate on wires.
On power ports indirect conductive interference can circulate.
Zn
Using programs OrCAD and POLUSE, design auxiliary power supply. Initial
data are given below.
In order to enable the widening of the search area for the solution of the
project problem, i.e. the generation of the great variety of possible structures
of the designed object, we will use the morphological card (Table 6.1) during
the drawing of which:
The basic parameters and functions of the goods are determined.
The possible decisions, i.e. alternative ways of each function
implementation are described.
The sequence of decisions which gives possibility to get the highest
quality of the designed project according to the set categories is chosen.
Table 6.1.
Conversion
Functions Variants
type
86
(common) (complex)
Control System
87
D0
L1 R2
Q1 Vout
V1 R1 C1
R3 R5
EU D1 R4
V2
Vout
C2 R9 C3
PWM Comp.
Rd1
VP+
R6 Error
Amp. R12
R10
Rd2 X1
R7
R11 X2
EU
VOP R8
VP-
EPOLY
VGPN
88
Figure 6.3. POLUSE programme demonstration
89
6.3 Calculation of DC-DC converter
Initial data:
Choose the next action:
1. Input of initial data
2. Exit :1
Predicted efficiency of power circuit = 0.9
Operating frequency of pulse device (Hz): f = 25000
Output voltage (V) : Vout = 27
Maximum rating amplitude of output voltage ripples (V):
Kr 1%
Vout _ ripple 2 Vout 2 27 0.54
100% 100%
INPUT DATA
.900 158.771
25000.000 27.000 .270 .540 40.000 30.000 100.000 70.000
.000
CALCULATION RESULTS
Initial data:
Choose the next action:
1. Input of initial data
2. Exit :1
Input the data for inductor design:
Select the type of inductor:
1. Smoothing inductor
2. AC inductor :1
Number of cores :2
Core material:
1. ОСТЧ-60
2. ОСТЧ-32
3. МП-140
4. МП-160 :3
Type of the wire:
1. ПЭВ-2
2. ПСДКТ-Л
3. ПЭТВ-2
4. ПЭТ-155
91
5. ПНЭТ-ИМИД
6. ПЭВШО-ОС
7. ПЭТВШО-С-ОС :1
Ambient temperature (degree Celsius) : 25
Permissible overheating (degree Celsius) : 50
Operating frequency of pulse device (Hz) : f =25000
Required inductance (Henry) : L = 0.000068
I L
Ripples amplitude of inductor current (A): I Lripple = 2.592595
2
Load current (A) : Iload = 3.70370
INPUT DATA
-----------------------------------------------------------------------------------------
CALCULATION RESULTS
Initial data:
Choose the next action:
93
1. Input of initial data
2. Exit :1
Calculation of the power transistor blocks
Design or checking (0 or 1) :0
There are transistor‟s models in library:
1. 2T808
2. 2T808-2T630
3. 2T862Д
4. 2T828A
Select the number of the transistor : 1
Specify the type of the transistor : 2T808
Specify the type of a bypass diode
(0 – no diode, 1 – 2Д212, 2 – 2Д213) : 0
Power factor : 1 (means active load)
Select the method of transistor control
(active switching off – 1, passive switching off – 0) :1
Maximum collector-emitter voltage (V): VVToff = 40
RMS collector current (A): ICrms = 3.70370
Average collector current (A): ICav = 3.70370
Maximum collector current (A): ICmax = 6.29630
Switch-on transistor current (A): IVTon = 1.2
Switch-off transistor current (A): IVToff = 6.29630
Transistor operating frequency (Hz): f = 25000
Specific weight of the 1 cm2 of a heat sink (gram): 3
Specify overheating (degree Celsius) : 40
Set the coefficient of current overlap : 1
Duty cycle (max) : 0.945
How many cycles do we have?
(single-cycle – 1, two-cycle – 2) :1
Minimum case temperature (degree Celsius): 10
Specific added mass (gram/watt) :0
INPUT DATA
CALCULATION RESULTS
MINIMUM WEIGHT
FOR N = 4 AND FOR Q = 2.40
MINIMUM AREA FOR HEAT SINK (ST) 96.789310 CM2
RELATED VALUE OF HEAT SINK AREA (STO) 25.000000 CM2 /W
OVERALL SQUARE OF N TRANSISTORS (SG) 36.000000 CM2
TOTAL LOSS (PS) 3.8052 W
SWITCHING LOSS (PTD) 1.7391 W
STATIC LOSS (PCT) 1.4464 W
RESISTANCE OF TRANSISTOR BASE CIRCUIT (RB) 9.7543 Ω
POWER LOSSES OF RB (PR) .6197 W
RMS VALUE OF COLLECTOR CURRENT 1.06481 A
AVERAGE VALUE OF COLLECTOR CURRENT 1.06481 A
MAXIMUM COLLECTOR CURRENT 1.81019 A
BASE CURRENT .12964 A
CUT-ON AND CUT-OFF TRANSISTOR CURRENT .3450 A, 1.8102
A
CONTROL SIGNAL VOLTAGE (UC) 2.10765 V
AVERAGE VALUE OF FREE-WHEELING DIODE CURRENT .000000
A
TOTAL WEIGHT (G) 378.3680 GRAMMS
HEAT SINK WEIGHT (GT) 290.3680 GRAMMS
TRANSISTOR WEIGHT (GTP) 88.0000 GRAMMS
TRANSISTOR PARAMETERS: IKO = .0030A
B = 13.9627
95
UBASE = .8431 A
UC_E = .1767 V
ROUT = .0690 Ω
TON = .000000506 SEC
TOFF = .000000442 SEC
TS = .000002602 SEC
UC = .250139 V
Initial data:
INPUT DATA
OPTIMUM ALTERNATIVE
Initial data:
Choose the next action:
1. Input of initial data
2. Exit :1
Calculation of the diode blocks
Design or checking (0 or 1) :0
There are diode‟s models in library:
1. 2D212A
2. 2D212B
3. 2D213A
4. 2D213B
5. 2D2997A
Select the number of the diode : 3
Specify the type of the diode : 2D213A
How many cycles do we have?
(single-cycle – 1, two-cycle – 2): 1
RMS diode current for pulse advance interval (A) : IVD = 3.70370
Average diode current for pulse advance interval (A) : IVDav = 3.70370
Maximum diode current (A) : IVDmax = 6.29630
Switch-on diode current (A) : IVDon = 6.29630
Switch-off diode current (A) : IVDoff = 1.2
Reverse diode voltage (V) : VVDoff = 40
10 10
Pulse time of maximum diode current (sec): tVD max = 0.0004
f 25000
Operating frequency (Hz) : f = 25000
2
Specific weight of the 1 cm of a heat sink (gram): 3
Specify overheating (degree Celsius) : 40
Duty cycle : γ = 1– γmin = 1- 0.675 = 0.325
Specific added mass (gram/watt) :0
INPUT DATA
DIODE TYPE 2D213A
REVERSE DIODE VOLTAGE 40.00000 V
RMS DIODE CURRENT 3.70370 A
AVERAGE DIODE CURRENT 3.70370 A
98
MAXIMUM DIODE CURRENT 6.29630 A
CUT-ON DIODE CURRENT 6.29630 A
CUTOFF DIODE CURRENT 1.20000 A
NUMBER OF CIRCUIT CYCLES 1
PULSE WEIGHT OF MAXIMUM DIODE CURRENT .0004000 SEC
OPERATING FREQUENCY 25000.00000 HZ
WEIGHTS OF 1 SQUARE CENTIMETER HEAT SINK 3.0000
GRAM
DIODE OVERHEATING 40.000 DEGREES CELSIUS
DUTY CYCLE .3250
RELATED VALUE OF THE ATTACHED WEIGHT, GRAM/W .00
-----------------------------------------------------------------------------------------
CALCULATION RESULTS
MINIMUM WEIGHT
DIODE NUMBER M=2
DIODE: TD = .00000030 SEC
UD = .68667 V
RD = .03000 Ω
U0 = .62000 V
MAXIMUM DIODE CURRENT 3.77778 A
RMS DIODE CURRENT 2.22222 A
AVERAGE DIODE CURRENT 2.22222 A
CUT-ON DIODE CURRENT 3.77778 A
CUTOFF DIODE CURRENT .72000 A
TOTAL WEIGHT 68.64882 GRAMS
MINIMUM REQUIRED HEAT SINK AREA 20.21627 CM 2
STATIC LOSSES OF M DIODES .92441 W
SWITCHING LOSSES OF M DIODES .08640 W
TOTAL DISSIPATION POWER 1.01081 W
OVERALL SQUARE (AREA) OF M DIODES 7.84000 CM 2
L1 = 68 µH
R1 = RB/N = 9.7543/4 = 2.43 Ω, where N is the number of transistors in
parallel
R2 = 29.7 mΩ
R3 = 3.5 kΩ
R4 = 0.28 Ω
99
C1 = 320 µF
V2 (Direct Current) = 1 V
Eu = V2 + Uy = 1 + 2.1 = 3.1 V
K = Eu 3.1 0.31
10 10
Maximum load resistance (): Rload_max = Vout2/ Pload min = 272/70 = 10.4
Minimum load resistance (): Rload_min = Vout2/ Pload max = 272/100 = 7.29
V 1 V 2
R8 R9 K FB R6 Vm _ VGPN R6 = 74.5 k
Emin
100
6.4.8 Calculation of converter’s efficiency and weight
Efficiency:
Pload max
Pload max PS DPC DPM PP
100 100
0.948
100+3.8052+ (0.0263546+1.01081) +0.644 105.486
Weight of the device Gtotal can be calculated as sum of all circuit element
weights.
We also used the coefficient allowing the design features: Kd = 1.5
101
6.5 Simulation
R2 L1
Q1
R12 R3
R4
Vin
R1
D1
R5
C1
R13
0
V+
C3
V-
C2 R9
0
R21
11
11
R6 R10
5 4
V+
+ + V+
X1 X2 R14
10 12
R7 OUT R11 OUT
4 5 3
V-
V-
- - G
R22
6
0
R8 EU
VOP VSVG +
-
Setting the zero initial conditions in the circuit, the system is run and the
waveforms and the tables below shows the results of the simulation in the
static and dynamic modes of operation.
102
6.5.2 Current and voltage waveforms
30A
(98.438u,24.733)
20A
10A
(1.6768m,3.0939)
0A
-10A
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms
I(L1)
Time
Figure 6.5. Inductor current (minimum load and minimum input voltage)
30A
(107.951u,24.872)
20A
10A
(1.5574m,3.0738)
0A
-10A
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms
I(D1)
Time
Figure 6.6. Diode current (minimum load and maximum input voltage)
103
30V
8.250u,28.931) (1.2810m,28.922)
20V
10V
0V
(1.3574m,-1.1392)
-10V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms
V(D1:2)
Time
Figure 6.7. Diode voltage (minimum load and maximum input voltage)
40V
(100.051u,32.373)
(1.7579m,30.139)
30V
20V
10V
(1.7957m,32.270m)
0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms
V(V1:+,Q1:e)
Time
Figure 6.8. Collector-emitter transistor voltage (minimum load maximum input
voltage)
104
30A
(98.388u,25.579)
20A
10A
(1.5930m,3.4351)
0A
(1.5178m,202.610n)
-10A
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms
IC(Q1)
Time
Figure 6.9. Transistor collector current (minimum load and minimum input
voltage)
30V
(1.9166m,27.119)
20V
10V
0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms
V(R4:2)
Time
Figure 6.10. Output voltage (minimum load and minimum input voltage)
105
30V
(1.6365m,27.119)
20V
10V
0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms
V(R4:2)
Time
Figure 6.11. Output voltage (maximum load and minimum input voltage)
30V
(1.9564m,27.123)
20V
10V
0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms
V(R4:2)
Time
Figure 6.12. Output voltage (minimum load and maximum input voltage)
106
30V
(1.7965m,27.119)
20V
10V
0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms
V(R4:2)
Time
Figure 6.13. Output voltage (maximum load and maximum input voltage)
107
6.5.3 Testing protocol
Table 6.2.
Where:
Vin - input voltage Vout - maximum
RL - load resistance Vout - minimum
t s - transient time RF - ripple factor
Vout .av - average output voltage VOV - overvoltage
V - output voltage ripple amplitude - tolerance
Useful formulas:
108
Table 6.3.
Measured value
Circuit Calculated Steady –
Parameter Start Limit
component value state
mode
mode
Table 6.4.
Efficiency 0.948 – –
110
Conclusion
This textbook focuses on the basic notions, history, types, technology
and applications of computer-aided design. Methods of electronic devices
simulation, automated design of power electronic devices and components,
constructive-technological design are considered and discussed. Some
features of the popular electronics CADs are also shown. There are a lot of
practical examples using CADs of electronics.
The textbook is designed at the Department of Industrial and Medical
Electronics of TPU. It is intended for students majoring in the specialty
210100 „Electronics and Nanoelectronics‟. Authors hope their work will help
students who choose electronics for future.
111
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113
Appendix A
114
p P-region of a semiconductor
q, Q Instantaneous value of charge, Charge coulomb
R D.C. resistance of a resistor ohm
r Slope resistance, small-signal resistance ohm
RF Ripple factor dimensionless
r.m.s. Root-mean square value of current or voltage
Rin, Rout Input, output resistance of a circuit ohm
RL Load resistance connected to a circuit ohm
S Source of a MOSFET or JFET
SF Stabilization factor dimensionless
SR Slew rate volt per second
t Time second
T Period (Total time) second
V Voltage: d.c. value or amplitude or r.m.s. value volt
of a.c. voltage
V Instantaneous value of voltage volt
Vav , v Average value (of voltage or current)
VCC Supply voltage (continuous current) volt
VF Forward voltage drop for a diode volt
VP Pinch-off voltage of a JFET volt
VR Reverse voltage for a diode volt
V ref Reference voltage volt
VS Source voltage volt
VZ Zener voltage volt
X Reactance ohm
Z Impedance Ohm
Efficiency dimensionless
Damping ratio dimensionless
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Appendix B
EDA Glossary
A
analog simulator
An EDA software tool which simulates the behavior of analog signals.
analysis tools
EDA software tools or tool suites which may display simulator output for
analysis (as in waveform analyzers) or which may analyze the reliability,
electromagnetic interference, metal migration, signal integrity, or thermal
characteristics of a design. The tools in this category may work at any level
of abstraction – behavioral, register-transfer-level (RTL), gate-level, or with
the physical layout of an IC device or electronic system.
application
A computer program which is intended to perform a specific task. An
application includes an executable file which is invoked to run the desired
program. See also tool.
B
behavioral modeling
System-level modeling consisting of a functional specification plus modeling
of the timing of an implementation. A behavioral model consist of an HDL
description of a device or component which is expressed at a relatively high
level of abstraction (higher than the register-transfer level or gate level). It
uses underlying mathematical equations to represent the functional behavior
of the component. See also functional modeling.
benchmark
A design test case which is used to measure the capabilities, limitations, and
breakthroughs reported for newly proposed and existing algorithms and tools.
block
A group of interconnected cells. A block may contain instances of other
blocks.
bottom-up design
A design methodology whereby the designer starts with the most basic or
primitive components and incrementally builds up the system into higher-
level components.
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breadboard
A printed circuit board on which experimental electronic circuits can be
developed; so-called from the time when radios were constructed at home on
a breadboard.
C
CAD (Computer-Aided Design)
The electronic design automation of projects that were previously under
manual methods considered to be drafting functions; typically refers to PCB
layout, wire harness design, or mechanical design.
chip
Semiconductor components which provide the memory, logic, and virtually
all other intelligence functions in an electronic system. Also known as a
microchip, chip, integrated circuit or IC. See also IC.
convergence
Achievement of a final design solution in which all design constraints have
been successfully met. Often this involves balancing and trading off two or
more requirements that are in opposition with one another, such as timing
delay versus area.
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D
design cycle
The period of time required to complete an electronic design of any type,
from concept to production.
design entry
The process of creating a new design of any type – chip, board, module, or
system – using textual and/or graphical tools such as schematic capture or
other high-level graphical methods, hardware description languages, Boolean
equations, or other methods. Also referred to as design capture.
design flow
A series of connected processes for performing a complete design cycle.
design management
EDA software tools which automatically manage design data and the design
process by controlling the operation of one or more EDA tools.
design specification
A summary of the features and performance targets that are intended for a
new electronic product. This specification drives the requirements and/or
constraints that must be met during the design and manufacturing processes.
E
EDA (Electronic Design Automation)
The industry which is involved in developing and supplying highly
specialized software- and hardware-based tools for the automated design of
electronic products of all kinds. EDA products and services are essential for
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the design of electronic products that enable many other high-tech sectors of
the economy, such as computers, communications, consumer, industrial,
military/aerospace, semiconductors, and transportation.
embedded system
An application-specific computing system that is designed into a product so
invisibly it is not apparent to end users that they are using a computer.
Examples are found in automotive anti-lock braking systems, microwave
ovens, and automatic dishwashers. The computing processor inside an
embedded system typically makes use of a real-time operating system which
does not require a waiting period to boot up.
emulation
The process by which a device under development and its native software is
prototyped before its manufacture.
emulators
A class of EDA products which includes both specialized computing
hardware and software. Emulators are used to prototype a design and exercise
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its native software prior to its manufacture. Many emulators can also be used
to perform hardware acceleration of simulation runs.
encapsulation
1) The preparation of a tool for integration into design frameworks without
any changes to the source code for the tool. 2) The preparation of a block of
SIP for integration into systems without any changes to the source code for
the SIP.
equivalency checking
A formal verification technique which verifies the integrity of each design
step by proving the functional equivalence between two implementations.
event-driven simulator
An EDA software tool that simulates the behavior of a logic design which
has been described at some level of abstraction (behavioral, RTL, or gate-
level), considers timing information in the simulation process, and thus must
schedule events and evaluate signals between clock cycles.
F
formal verification
Use of various types of formal methods (abstract calculus) to verify the
correctness of IC logic or system interactions. Equivalency checking is the
most common formal verification method, which is used to compare the
design that is being created against a design that is already proven accurate.
Model checking is another method that ascertains the behavior of a specific
signal at a certain time. Semi-formal is a newer method which combines
formal verification and simulation.
framework
A computing architecture for integrating products from multiple vendors
which includes data representation, design data management, methodology
management, a user interface, an extension language, and inter-tool
communication.
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functional modeling
System modeling that specifies input/output behavior without specifying its
timing. See also behavioral modeling.
G
GDSII
A term often used in a generic sense to refer to graphical IC or PCB layout
data in an interchange format. In the generic sense, the term GDSII is
frequently used even if the source data format is GDSIV or other graphical
format.
H
hardware modeling
The process of defining the functionality of a component using an actual chip
rather than a software description. Often employed in the early life of a chip
when physical prototypes are available, but a software model is not.
hardware/software co-design
Software tools that perform or support hardware/software partitioning,
performance evaluation, and design entry for system-level designs that are
comprised of both hardware and software elements, as in embedded systems.
Includes tools and interfaces that link the design and evaluation steps with
code compilation models.
hierarchical design
A design methodology where portions of large designs are divided into
manageable sections or sub-blocks that may be created, represented
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symbolically, designed, and then connected together when completed. This
methodology allows different parts of the design to be worked on in parallel.
I
implementation
The result of the design synthesis process, in which an abstract description of
a design entity is converted into gates and the electrical connections between
them (signals). An implementation is rendered using components from the
foundry-specific design library that represents the target semiconductor
process technology. Many of the physical analysis algorithms that were
previously found only in standalone physical analysis tools are now being
integrated into the implementation flow to help drive the synthesis process.
instance
A copy of a library cell or block which has been called into a design and
made specific by naming it and connecting it to other logic in the design.
This process is known as instantiation.
I/O (Input/Output)
An input, output, or bidirectional buffer cell used to connect design interface
signals directly to package pins.
L
layout
For ICs, the process of floorplanning, implementing, and verifying the
location of transistors and their connections within a chip design. For PCBs,
the process of entering, placing, routing, and verifying the location of
physicial components and their connections within a board design.
layout verification
The process of verifying that the layout topology of circuits which have
undergone placement, routing, and compaction does not violate any
fabrication process rules. Includes Design Rule Checkers (DRS), Electrical
Rule Checkers (ERC), and Layout-Versus-Schematic Checkers (LVS).
library
A collection of design objects that are related in some way, such as
simulation models, symbols, or footprints. The objects may be part of a
single design, in which case it would be a design library. The objects could
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be standard-cell elements for IC design, or components for PCB design, in
which case it would be a reference library.
M
mixed-signal simulators
Software tools that simulate the behavior of mixed analog and digital
portions of a design. Includes interface packages for linking analog and
digital signals.
model
A functional representation of a device or system that is delivered in object
code format. This software representation contains the basic structure and
characteristics of a design object which is used to perform design
verification. During the development of an electronic system, models are
exercised along with signals entering from the outside environment (vectors)
to simulate the behavior of the system in software and ensure that it will
operate properly before being manufactured in hardware.
model checking
A formal verification technique which compares the functionality of a design
to a set of user-specified properties or characteristics. Determines whether a
set of conditions or properties hold true or are contained within a given
implementation of a design. Also referred to as property checking.
module generators
Tools used exclusively to generate SIP from regular parameterizable physical
structures that are based on a fixed set of base leaf cells. Includes tools to
create integration views for SIP blocks created by the Module Generator.
Module generators (which are also termed target compilers) produce physical
blocks from a set of design parameters that are based on physical and
electrical design rules.
N
netlist
A textual file representing an ASIC design as a set of library-specific cells
along with their interconnections.
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O
optimization
Use of a computing algorithm to achieve the most efficient design of a
product. Various types of optimization are performed by different tools in the
design flows for chips, boards, and systems.
P
parameter
A means by which an application or user can customize the behavior or
characteristics of a model instance when it is created. A parameter is set to a
constant value during design entry.
pattern
An arrangement of services that collectively model a communication path
from sender to receiver. Patterns support the modeling of communication
between software and hardware, hardware and software, software and
software, or hardware and hardware.
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PCB libraries and library tools
Descriptions of design elements used for designing PCBs or larger systems.
Includes component models for simulation or analysis, symbols, component
information systems, library development tools, library management tools,
and design libraries for PCB or system-level design.
performance model
A model that estimates one or more physical or temporal characteristics such
as signal delay, power usage, area, temperature, electromagnetic interference,
etc.
placement rules
User-defined rules which force a special placement group. May be defined
for a given technology library or a specific netlist.
ports
Objects in design description that allow the model and the application to
interact during simulation. Ports may be of the types Input, Output, or I/O
(bidirectional).
primitive
An instance of a cell at the lowest logic level on a circuit. Multiple instances
of the same cell may exist in a design.
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production test
The process of verifying that a device has been manufactured correctly
before it leaves the manufacturing facility.
property checking
A formal verification technique which verifies that a design does or does not
conform to a specified property under all possible sets of legal input
conditions. See model checking.
Q
quality conformance inspection
Sample tests performed on a periodic basis that determine conformance of
quality and reliability standards and ensure a continuing level of quality for
the device type under test.
R
random logic
Components and signals which exist at a low level of hierarchy, outside of
the major blocks of logic in a design. Sometimes referred to as glue logic
because its function may be to connect the major hierarchical blocks. See
also primitive.
routability
The level of effort required to automatically route the connections (or nets) in
a design based on the available routing resources, such as space between
components, grid width, numbers of layers, etc.
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S
schematic capture
A graphical design entry process used to create gate-level schematics which
represent logic in a design.
simulation
The process of verifying an electronic design using EDA software which
reads in models and input/output vectors, exercises the device under test, and
records the resulting behavior and timing for the purpose of identifying and
debugging any incorrect or unexpected behavior.
symbol
A graphical representation of a component that contains information about
the ports of the component. Each symbol has a corresponding textual
interface file that contains the same information as the graphical
representation. Both the symbol and interface files are views of the
component.
synthesis
An EDA process which reads a high-level electronic design description and
implements it at a lower level of abstraction. Synthesis tools typically include
algorithms for logic optimization and technology retargeting. Legacy
synthesis tools produce a gate-level implementation, at which point the
design netlist is handed off to the IC layout process. More recent
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developments have synthesis becoming more tightly integrated with the IC
layout process in order to better achieve convergence of goals such as timing.
T
technology flow
A specific manufacturing line from design, fabrication, assembly, packaging,
through to test in a given technology.
testbench
A custom model of the system environment used during the verification of a
design to provide simulation inputs and respond to simulated outputs from
the design under test.
timing-driven design
A methodology to achieve circuit performance goals, encompassing tools
across the entire design flow.
tool
In the electronic design automation industry, a shorthand term for an EDA
product. Generally consists of a software application, but in some cases may
include specialized hardware, as in emulation, hardware acceleration, and
rapid prototyping systems.
U
user
A person who uses application software and who is not the system
administrator. In EDA, this person is generally an electronic engineer or a
layout designer.
V
VC (Virtual Component)
A reusable block of semiconductor intellectual property (SIP). VCs may be
soft (synthesizable), firm (parameterizable), or hard (where the layout is
fixed, with only the I/Os visible to the design tools).
verification
The process of verifying the functional and performance requirements of a
design, be it a chip, board, or system. Many different kinds of verification
tools are in use today, including simulation, formal verification, various types
of physical analysis tools, emulation, and rapid prototyping. Most design
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verification strategies employ many or all of these approaches to assure the
reliability of the final product prior to its manufacture.
W
workstation
A desktop computer which has sufficient capabilities to run as a standalone
system, but which is typically connected to a network to gain access to other
computing resources, peripherals, and communications.
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Educational Edition
Национальный исследовательский
Томский политехнический университет
АВТОМАТИЗИРОВАННОЕ ПРОЕКТИРОВАНИЕ
ЭЛЕКТРОННЫХ УСТРОЙСТВ
Учебное пособие
Издательство Томского политехнического университета, 2014
На английском языке
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