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Addressing Modes

The term addressing modes refers to the way in which the operand of an instruction is specified. Information contained in
the instruction code is the value of the operand or the address of the result/operand. Following are the main addressing
modes that are used on various platforms and architectures.
Addressing Modes
Here are some examples of the allowed addressing modes:
xor cx, [59507] ; Direct mode (XOR CX with word at DS:E873 )
push word [bx] ; Register-indirect mode (Push word at DS:BX onto stack)
mov ax, [bp-4] ; Base mode (Move word at SS:(BP-4) into AX)
sub [si+2], bx ; Indexed mode (Subtract BX from word at DS:(SI+2) )
not byte [bp+di] ; Base-indexed mode (Invert bits of byte at SS:(BP+DI) )
add [bx+si+2], dx ; Base-indexed mode with dispacement (Add DX to word at DS:(BX+SI+2) )
The five addressing modes available are outlined more precisely for your reference below:
Direct Mode: [constant] constant: 16-bit unsigned value
Register-Indirect Mode: [register] register: bx, si, or di Note: bp technically isn't allowed. If used, assembler will generate
[bp+0] instead.
Base Mode: [constant + baseReg] constant: 8-bit or 16-bit signed value baseReg: bp or bx
Indexed Mode: [constant + indexReg] constant: 8-bit or 16-bit signed value indexReg: si or di
Base-Indexed Mode: [baseReg + indexReg] baseReg: bp or bxindexReg: si or di
Base-Indexed Mode with Displacement: [constant + baseReg + indexReg] constant: 8-bit or 16-bit signed value baseReg:
bp or bxindexReg: si or di
1) Immediate Mode
The operand is an immediate value is stored explicitly in the instruction:
Immediate addressing means that the data to be used is hard-coded into the instruction itself.
This is the fastest method of addressing as it does not involve main memory at all.
For example, you want to add 2 to the content of the accumulator
The instruction is:
ADC 2
Nothing has been fetched from memory, the instruction simply adds 2 to the accumulator immediately.
Immediate Addressing is very useful to carry out instructions involving constants (as opposed to variables). For example
you might want to use 'PI' as a constant 3.14 within your code.
Example: SPIM ( opcodedest, source)
li $11, 3 // loads the immediate value of 3 into register $11
li $9, 8 // loads the immediate value of 8 into register $9
Example : (textbook uses instructions type like, opcode source, dest)
move #200, R0; // move immediate value 200 in register R0
2) Index Mode
Indexed addressing is the addressing by adding an offset(index) to a base address to get a specific location.
It is also known as direct addressing mode.
An index is a sort of a pointer. When used in this context it points to a storage location, typically a place(i.e. address) in
memory.
many Microprocessors have an implicit Base register for storing the base address of the memory segment, and an implicit
register for the index value too.So if BX denotes the base address, and X register holds the index value,then-
Effective address EA = BX + (X).
It can also be clubbed along with Base realtive addressing and PC relative addressing.
Index Mode is used to access an array whose elements are in successive memory locations. The content of the instruction
code, represents the starting address of the array and the value of the index register, and the index value of the current
element. By incrementing or decrementing index register different element of the array can be accessed.
Index addressing is fast and is excellent for manipulating data structures such as arrays as all you need to do is set up a
base address then use the index in your code to access individual elements.
Another advantage of indexed addressing is that if the array is re-located in memory at any point then only the base
address needs to be changed. The code making use of the index can remain exactly the same.
Example: SPIM/SAL - Accessing Arrays
.data array1: .byte 1,2,3,4,5,6 .text __start: move $3, $0 # $3 initialize index register with 0 add $3, $3,4 # compute the
index value of the fifth element sb $0, array1($3) # array1[4]=0
# store byte 0 in the fifth element of the array
# index addressing mode done
3) Indirect Mode
The effective address of the operand is the contents of a register or main memory location, location whose address
appears in the instruction. Indirection is noted by placing the name of the register or the memory address given in the
instruction in parentheses. The register or memory location that contains the address of the operand is a pointer. When an
execution takes place in such mode, instruction may be told to go to a specific address. Once it's there, instead of finding
an operand, it finds an address where the operand is located.p
The format of Indirect Addressing Mode is :OpcodeReference_to_Effective_Address_of_Operand
In Indirect addressing mode the reference for effective address of the operand is given in the instruction .In indirect
addressing mode the operand part tells where the effective address of the operand is stored in memory.It is the slowest
addressing mode. It is generally used for accessing local variables(eg: Arrays,Pointers)
The indirection in Indirect Addressing mode can be of varied level, For example Single Indirection,Double indirection
etc.
Single Indirection : The format is OpcodeReference_to_Effective_Address_of_Operand
Double Indirection : The format is OpcodeReference_to_Reference_to_Effective_Address_of_Operand
Indirect addressing means that the address of the data is held in an intermediate location so that the address is first 'looked
up' and then used to locate the data itself.
Many programs make use of software libraries that get loaded into memory at run time by the loader. The loader will
most likely place the library in a different memory location each time.
So how does a programmer access the subroutines within the library if he does not know the starting address of each
routine?
Answer: Indirect Addressing

1. A specific block of memory will be used by the loader to store the starting address of every subroutine within the
library. This block of memory is called a ' vector table '. A vector table holds addresses rather than data. The application is
informed by the loader of the location of the vector table itself.
2. In order for the CPU to get to the data, the code first of all fetches the content at RAM location 5002 which is part of
the vector table.
3. The data it contains is then used as the address of the data to be fetched, in this case the data is at location 9000
A typical assembly language instruction would look like
MOV A, @5002
This looks to location 5002 for an address. That address is then used to fetch data and load it into the accumulator. In this
instance it is 302.
NOTE:
Two memory accesses are required in order to obtain the value of the operand (fetch operand address and fetch operand
value).
Example: (textbook) ADD (A), R0
(address A is embedded in the instruction code and (A) is the operand address = pointer variable)
Example: SPIM - simulating pointers and indirect register addressing
The following "C" code:
int *alpha=0x00002004, q=5; *alpha = q;
could be translated into the following assembly code :
alpha: .word 0x00002004 # alpha is and address variable # address value is 0x00002004 q: .word 5 .... lw $10,q # load
word value from address q in into $10
# $10 is 5 lw $11,alpha # $11 gets the value 0x0002004
# this is similar with a load immediate address value sw $10,($11) # store value from register $10 at memory location
# whose address is given by the contents of register $11
# (store 5 at address 0x00002004)
Example: SPIM/SAL - - array pointers and indirect register addressing
.data array1: .byte 1,2,3,4,5,6 .text __start: la $3, array1 # array1 is direct addressing mode add $3, $3,4 # compute the
address of the fifth element sb $0, ($3) # array1[4]=0 , byte accessing
# indirect addressing mode done
4) Absolute (Direct) Mode
The format of Direct Addressing Mode is :OpcodeEffective_Address_of_Operand
In Direct Addressing mode the effective address of the operand is given directly in the instruction. So it require one extra
memory reference to access the operand. The direct addressing mode is slow compared to immediate addressing mode. It
is generally used to access static variables.
The address of the operand is embedded in the instruction code.
This is a very simple way of addressing memory - direct addressing means the code refers directly to a location in
memory
For example
SUB (3001)
In this instance the value held at the absolute location 3001 in RAM is subtracted from the accumulator.
The good thing about direct addressing is that it is fast (but not as fast as immediate addressing) the bad thing about direct
addressing is that the code depends on the correct data always being present at same location.
It is generally a good idea to avoid referring to absolute memory addresses in order tohave 're-locatable code' i.e. code that
does not depend on specific locations in memory.
You could use direct addressing on computers that are only running a single program. For example an engine
management computer only ever runs the code the car engineers programmed into it, and so direct memory addressing is
excellent for fast memory access.
Example: (SPIM)
beta: .word 2000
lw $11, beta # load word (32 -bit quantity) at address beta into register $11
# address of the word is embedded in the instruction code
# (register $11 will receive value 2000)
5) Register Mode
If the resister is used as operand, this is called resister mode. The name (the number) of the CPU register is embedded in
the instruction. The register contains the value of the operand. The number of bits used to specify the register depends on
the total number of registers from the processor set.
Example (SPIM)
add $14,$14,$13 # add contents of register $13 plus contents of
# register $14 and save the result in register $14
No memory access is required for the operand specified in register mode.
6) Displacement Mode
Similar to index mode, except instead of a index register a base register will be used. Base register contains a pointer to a
memory location. An integer (constant) is also referred to as a displacement. The address of the operand is obtained by
adding the contents of the base register plus the constant. The difference between index mode and displacement mode is
in the number of bits used to represent the constant. When the constant is represented a number of bits to access the
memory, then we have index mode. Index mode is more appropriate for array accessing; displacement mode is more
appropriate for structure (records) accessing.
Example: SPIM/SAL - Accessing fields in structures
.data student: .word 10000 #field code .ascii "Smith" #field name .byte # field test .byte 80,80,90,100 # fields
hw1,hw2,hw3,hw4 .text __start: la $3, student # load address of the structure in $3
# $3 base register add $17,$0,90 # value 90 in register $17
# displacement of field "test" is 9 bytes
# sb $17, 9($3) # store contents of register $17 in field "test"
# displacement addressing mode done
7) Autoincrement /Autodecrement Mode
A special case of indirect register mode. The register whose number is included in the instruction code, contains the
address of the operand. Autoincrement Mode = after operand addressing , the contents of the register is incremented.
Decrement Mode = before operand addressing, the contents of the register is decrement.
Example: SPIM/SAL - - simulating autoincrement/autodecrement addressing mode
( MIPS has no autoincrement/autodecrement mode)
lw $3, array1($17) #load in reg. $3 word at address array1($17) addi $17,$17,4 #increment address (32-bit words) after
accessing
#operand this can be re-written in a "autoincrement like mode": lw+ $3,array1($17) # lw+ is not a real MIPS instruction
subi $17,$17,4 # decrement address before accessing the operand lw $3,array1($17)
NOTE: the above sequence can be re-rewritten proposing an "autodecrement instruction",

6. Relative Addressing
Quite often a program only needs to jump a little bit in order to jump to the next instruction. Maybe just a few memory
locations away from the current instruction.
A very efficient way of doing this is to just add a small offset to the current address in the program counter. (Remember
that the program counter always points to the next instruction to be executed). This is called ' relative addressing '
DEFINITION :
Relative addressing means that the next instruction to be carried out is an offset number of locations away, relative to the
address of the current instruction.
Consider this bit of pseudo-code
jump +3 if accumulator == 2
code executed if accumulator is NOT = 2 jmp +5 (unconditional relative jump to avoid the next line of code) acc:
(code executed if accumulator is = 2)
carryon:
In the code snippet above, the first line of code is checking to see if the accumulator has the value of 2 in it. If it is has,
then the next instruction is 3 lines away. This is called a conditional jump and it is making use of relative addressing.
Another example of relative addressing can be seen in the jmp +5 instruction. This is telling the CPU to effectively avoid
the next instruction and go straight to the 'carryon' point.
The Instruction Pointer in 8086
The code segment register holds the upper 16 bits of the starting address of the segment from which the BIU is currently
fetching the instruction code byte.
A register that holds the 16 bit offset, of the next code byte within the code segment ,while BIU is currently fetching an
instruction code.
The value contained in the IP is referred to as the offset because this value must be “offset” from(added to)the segment
base address in code segment to produce the required 20 bit physical address sent out by the BIU. Get it?? No. Then let’s
repeat again.
Address given to processor(16 bit) – but processor smart – see it adds lower 4bits to the 16 bit to attain 20 bit physical
address – to comprehend its smartness they created an oversmartpersonalty called IP – this oversmart guy stores the 16 bit
number that when added to last known instruction address gives us a new instruction address – as BIU is IP’s boss so he
goes away with the credit leaving a super smart IP high and dry.
See example.
Say an instruction 16 bit address is 3432H.
The smart processor guess that instruction is at address 34320H. Voila he is right. But he doesn’t know where is the next
address.
Here enters our hero IP. He is so smart that he knows next instruction is at 45431H. so what he does is stores 1111H in his
memory.
So when asked by BIU (his boss) where is the next instruction. He gives him the value that needed to be added to get
45431H. yes he gives 1111H.
Segment resister
There are four memory segments used in 8086, code segment, data segment, stack segment and extra segment.
Segment registers are used to contain 16 bit base addresses of the corresponding segments in the memory.
The memory address of 8086 up is 20 bit wide .so to access any location in a segment within memory, 16 bit value of
segment register is converted into 20 bit base address by shifting 4 bits to the left ( equivalent to multiplying by 10H) and
then adds the 16 bit offset from the base of the segment in the memory.
The memory of 8086 microprocessor is divided into sixteen parts or segments. In the given diagram we will take or use
only four segments that are
Code Segment
Data Segment
Stack Segment
Extra Segment.
These segments store the specific data. Four segments registers are used to store or hold the initial address or base
address. Each of the segment stores 64 KB. Which means that another register is required in which the memory locations
address change. We know that basically there is no change in the base address so, the address on the special purpose
registers are added with the base address of the segment register.
Code Segment
The code segment is that section of memory that stores the different codes used by the microprocessor. The code segment
register is used for this segment to store the starting address of the code segment. Its length is 64 KB.

General Registers :All general registers of the 8086 microprocessor can be used for arithmetic and logic operations. The
general registers are:
1. AX (Accumulator): This is accumulator register. It gets used in arithmetic, logic and data transfer instructions. In
manipulation and division, one of the numbers involved must be in AX or AL.
2. BX (Base Register): This is base register. BX register is an address register. It usually contain a data pointer used for
based, based indexed or register indirect addressing.
3. CX (Count register): This is Count register. This serves as a loop counter. Program loop constructions are facilitated by
it. Count register can also be used as a counter in string manipulation and shift/rotate instruction.
4. DX (Data Register): This is data register. Data register can be used as a port number in I/O operations. It is also used in
multiplication and division.
5. SI - source index register:
Can be used for pointer addressing of data
Used as source in some string processing instructions
Offset address relative to DS
DI - destination index register:
Can be used for pointer addressing of data
Used as destination in some string processing instructions
Offset address relative to ES
BP - base pointer:
Primarily used to access parameters passed via the stack
Offset address relative to SS
SP - stack pointer:
Always points to top item on the stack
Offset address relative to SS
Always points to word (byte at even address)
An empty stack will had SP = FFFEh

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