NOT Recommended For New Designs Refer TO MP1477

MP1471
High-Efficiency, 3A Peak,
16V, 500kHz Synchronous,
Step-Down Converter In a 6-Pin TSOT 23
The Future of Analog IC Technology
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DESCRIPTION FEATURES
P1 S FO
The MP1471 is a high-frequency, synchronous, • Wide 4.7V-to-16V Operating Input Range
rectified, step-down, switch-mode converter • 150mΩ/70mΩ Low-RDS(ON) Internal Power
with internal power MOSFETs. It offers a very MOSFETs
compact solution to achieve a 3A peak output • Proprietary Switching-Loss–Reduction
current over a wide input supply range, with
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Technology
excellent load and line regulation. The MP1471 • High-Efficiency Synchronous-Mode
has synchronous-mode operation for higher Operation
efficiency over the output current-load range. • Fixed 500kHz Switching Frequency
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Current-mode operation provides fast transient • Internal AAM Power-Save Mode for High
response and eases loop stabilization. Efficiency at Light Load
•
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Internal Soft-Start
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Protection features include over-current
•
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Over-Current Protection and Hiccup
protection and thermal shutdown.
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• Thermal Shutdown
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The MP1471 requires a minimal number of • Output Adjustable from 0.8V
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readily-available, standard, external • Available in a 6-pin TSOT-23 package
components and is available in a space-saving
6-pin TSOT23 package. APPLICATIONS
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• Game Consoles
• Digital Set-Top Boxes
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•
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Flat-Panel Television and Monitors

• General Purposes
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All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
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TYPICAL APPLICATION
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VIN
3 6
IN BST
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U1 100
3.3V 95
GND SW 2 VOUT 90
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MP1471 R1 85
40.2k 80
5 R3
EN EN FB 4 75
40.2k 70
GND R2
65
1 13k
60
55
50
0.01 0.1 1 10
MP1471 Rev. 1.01 www.MonolithicPower.com 1

8/27/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
MP1471 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
ORDERING INFORMATION
Part Number* Package Top Marking
MP1471GJ TSOT23-6 AEJ
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* For Tape & Reel, add suffix –Z (e.g. MP1471GJ–Z);
P1 S FO
PACKAGE REFERENCE
TOP VIEW
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GND 1 6 BST
MP1471
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SW 2 5 EN
7
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IN 3 4 FB
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ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance

(4)
θJA θJC
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VIN ..................................................-0.3V to 17V TSOT-23-6............................. 100 ..... 55... °C/W
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VSW ...................................................................... Notes:

-0.3V (-5V for <10ns) to 17V (19V for <10ns) 1) Exceeding these ratings may damage the device.
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VBS ......................................................... VSW+6V 2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
All Other Pins ...................................–0.3V to 6V ambient thermal resistance θJA, and the ambient temperature
(2)
Continuous Power Dissipation (TA = +25°C) TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
........................................................... 1.25W (MAX)-TA)/θJA. Exceeding the maximum allowable power
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Junction Temperature ...............................150°C dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
Lead Temperature ....................................260°C shutdown circuitry protects the device from permanent
Storage Temperature................. -65°C to 150°C damage.
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3) The device is not guaranteed to function outside of its

(3)
Recommended Operating Conditions operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Supply Voltage VIN ...........................4.7V to 16V
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Output Voltage VOUT ......................0.8V to 0.9VIN

Operating Junction Temp. (TJ). -40°C to +125°C
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ELECTRICAL CHARACTERISTICS (5)

VIN = 12V, TA = 25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
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Supply Current (Shutdown) IIN VEN = 0V 1 μA
Supply Current (Quiescent) Iq VEN = 2V, VFB = 1V 0.83 mA
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HS Switch-On Resistance HSRDS-ON VBST-SW=5V 150 mΩ
LS Switch-On Resistance LSRDS-ON Vcc=5V 70 mΩ
Switch Leakage SWLKG VEN = 0V, VSW =12V 1 μA
Current Limit (5) ILIMIT 3.5 4.2 A
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Oscillator Frequency fSW VFB=0.75V 400 490 580 kHz
Maximum Duty Cycle DMAX VFB=700mV 88 92 %
Minimum On Time(5) τON_MIN 90 ns
Feedback Voltage VFB 776 800 824 mV
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EN Rising Threshold VEN_RISING 1.4 1.5 1.6 V
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EN Falling Threshold VEN_FALLING 1.23 1.32 1.41 V
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VEN=2V 1.6 μA
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EN Input Current IEN
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VEN=0 0 μA
VIN Under-Voltage Lockout
INUVVth 3.85 4.2 4.55 V
Threshold, Rising
VIN Under-Voltage Lockout
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INUVHYS 340 mV
Threshold Hysteresis
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Soft-Start Period τSS 1 ms
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Thermal Shutdown(5) 150 °C

Thermal Hysteresis(5) 20 °C
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Notes:
5) Guaranteed by design.
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TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 12V, VOUT = 3.3V, L = 6.5µH, TA = +25°C, unless otherwise noted.
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P1 S FO
100 100 100
95 95 95
90 90
90
85 85
85 80 80
80 75 75
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75 70 70
65 65
70
60 60
65 55 55
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60 50 50
0.01 0.1 1 10 0.01 0.1 1 10 0.01 0.1 1 10
7
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100 5.0 50
45
90 4.5
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40
PEAK CURRENT (A)
4.0 35
80
E
30
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70 3.5 25
20
60 3.0 15
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10
50 2.5
5
40 2.0 0
0.01 0.1 1 10 0% 20% 40% 60% 80% 100% 0.0 0.5 1.0 1.5 2.0 2.5
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870 50 2.9
45
860 2.7
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40
850 35 2.5
30
840 2.3
25
830 20 2.1
820 15
1.9
10
810 1.7
5
800 0 1.5
4 6 8 10 12 14 16 4 6 8 10 12 14 16 0 1.0 2.0 3.0 4.0 5.0

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

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1 1
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0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0 0
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-0.2 -0.2
-0.4 -0.4
-0.6 -0.6
-0.8 -0.8
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-1 -1
0 0.5 1 1.5 2 2.5 4 6 8 10 12 14 16
7
N
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Startup through Shutdown through Startup through
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Input Voltage Input Voltage Input Voltage
IOUT = 0A IOUT = 0A IOUT = 3A
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VOUT VOUT VOUT
2V/div. 2V/div. 2V/div.
VIN VIN VIN
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VSW VSW VSW
IL IL
500mA/div. 200mA/div. IL
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2A/div.
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Shutdown through Startup through Enable Shutdown through Enable
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Input Voltage IOUT = 0A IOUT = 0A
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IOUT = 3A
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VOUT VOUT VOUT

VIN
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10V/div.
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VEN VEN
2V/div. 2V/div.
VSW VSW VSW
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IL IL
IL 500mA/div. 500mA/div.
2A/div.
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Startup through Enable Shutdown through Enable Input/Output Ripple

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IOUT = 3A IOUT = 3A IOUT = 3A

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VOUT/AC
20mV/div.
VOUT VOUT
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2V/div. 2V/div.
VIN/AC
500mV/div.
VEN VEN
5V/div. 5V/div.
VSW VSW VSW
IL IL IL
2A/div. 2A/div. 2A/div.

TYPICAL PERFORMANCE CHARACTERISTICS

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PIN FUNCTIONS
Package
Name Description
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Pin #
System Ground. Reference ground of the regulated output voltage: requires extra care
1 GND
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during PCB layout. Connect to GND with copper traces and vias.
2 SW Switch Output. Connect using wide a PCB trace.
Supply Voltage. The MP1471 operates from a 4.7V-to-16V input rail. Requires C1 to
3 IN
decouple the input rail. Connect using a wide PCB trace.
Feedback. Connect to the tap of an external resistor divider from the output to GND to set
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the output voltage. The frequency fold-back comparator lowers the oscillator frequency
4 FB
when the FB voltage drops below 140mV to prevent current-limit runaway during a short
circuit fault.
EN=HIGH to enable the MP1471. For automatic start-up, connect EN to VIN using a 100kΩ
5 EN
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resistor.
Bootstrap. Connect a capacitor and a resistor between SW and BS pins to form a floating
6 BST
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supply across the high-side switch driver. Use a 1µF BST capacitor.
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BLOCK DIAGRAM
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IN
+
-
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VCC RSEN
Currrent Sense
Regulator
Amplifer
Bootstrap
Regulator BST
Oscillator HS
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Driver
+
SW
- Comparator
1.2pF On Time Control VCC
Current Limit Logic Control
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47pF
Comparator
EN Reference 500k
LS
1MEG
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6.5V Driver
+
+
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20k
FB -
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Error Amplifier GND
G Figure 1: Functional Block Diagram

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OPERATION
The MP1471 is a high-frequency, synchronous, In light-load condition, the value of VCOMP is low.
rectified, step-down, switch-mode converter When VCOMP is less than VAAM and VFB is less
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with internal power MOSFETs. It offers a very than VREF, VCOMP ramps up until it exceeds VAAM.
compact solution to achieve a 3A peak output During this time, the internal clock is blocked,
P1 S FO
current over a wide input supply range, with thus the MP1471 skips some pulses for PFM
excellent load and line regulation. (Pulse Frequency Modulation) mode and
achieves the light load power save.
The MP1471 operates in a fixed-frequency,
peak-current–control mode to regulate the Clock
output voltage. An internal clock initiates the
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VOUT
1.2pF
PWM cycle to turn on the integrated high-side HS_driver + VAAM
47pF 500k
Q S
power MOSFET. This MOSFET remains on - R1
VCOMP 20k
until its current reaches the value set by the R
- VFB
COMP voltage. When the power switch is off, it + R2
TO SI D
- VREF
remains off until the next clock cycle starts. If VIL sense
+
the current in the power MOSFET does not
7
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reach the COMP set current value within 90% Figure 2: Simplified AAM Control Circuit
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of one PWM period, the power MOSFET is When the load current is light, the inductor peak
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forced to turn off. current is set internally to about 340mA for
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Internal Regulator VIN=12V, VOUT=3.3V, and L=6.5μH. Figure 3
The 5V internal regulator powers most of the shows the inductor peak current vs. inductor
internal circuits. This regulator takes VIN and value curve.
operates in the full VIN range. When VIN
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exceeds 5.0V, the regulator output is in full

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regulation. When VIN falls below 5.0V, the 1.2
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output decreases.
Error Amplifier
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The error amplifier compares the FB voltage

against the internal 0.8V reference (REF) and
outputs a current proportional to the difference
between the two. This output current charges or
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discharges the internal compensation network

to form the COMP voltage, which is used to
control the power MOSFET current. The
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optimized internal compensation network

minimizes the external component counts and Figure 3: Inductor Peak Current vs. Inductor
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simplifies the control-loop design. Value

AAM Operation Enable
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The MP1471 has AAM (Advanced

EN is a digital control pin that turns the
Asynchronous Modulation) power-save mode
regulator on and off: Drive EN HIGH to turn on
for light load. The AAM voltage is set at 0.5V
the regulator, drive it LOW to turn it off. An
internally. Under the heavy load condition, the
internal 1MΩ resistor from EN to GND allows
VCOMP is higher than VAAM. When the clock goes
EN to float to shut down the chip.
high, the high-side power MOSFET turns on
and remains on until VILsense reaches the value The EN pin is clamped internally using a 6.5V
set by the COMP voltage. The internal clock series-Zener-diode as shown in Figure 4.
resets every time when VCOMP exceed VAAM. Connecting the EN input pin through a pullup

resistor to the VIN voltage limits the EN input Thermal Shutdown

current to less than 100μA. Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
For example, with 12V connected to Vin,
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When the silicon die temperature exceeds
RPULLUP≥ (12V-6.5V) ÷ 100μA =55kΩ
150°C, it shuts down the whole chip. When the
Connecting the EN pin directly to a voltage temperature falls below its lower threshold
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source without any pullup resistor requires (typically 130°C) the chip is enabled again.
limiting the amplitude of the voltage source to ≤
Floating Driver and Bootstrap Charging
6V to prevent damage to the Zener diode.
An external bootstrap capacitor powers the
floating power MOSFET driver. This floating
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EN driver has its own UVLO protection, with a
rising threshold of 2.2V and a hysteresis of
Zener EN LOGIC
6.5V-typ
150mV. VIN regulates the bootstrap capacitor
GND
voltage internally through D1, M1, R4, C4, L1
and C2 (Figure 5). If (VIN-VSW) exceeds 5V, U2
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Figure 4: 6.5V Zener Diode
will regulate M1 to maintain a 5V BST voltage
across C4.
7
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Under-Voltage Lockout (UVLO)
M N
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D1
Under-voltage lockout (UVLO) protects the chip
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VIN
from operating at an insufficient supply voltage.
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U2
The MP1471 UVLO comparator monitors the M1
output voltage of the internal regulator, VCC. R4

The UVLO rising threshold is about 4.2V while 5V
U1
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its falling threshold is consistently 3.85V. C4

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Internal Soft-Start VOUT
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Soft-start prevents the converter output voltage SW L1

C2
from overshooting during startup. When the
chip starts, the internal circuit generates a soft-
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start voltage (SS) that ramps up from 0V to Figure 5 : Internal Bootstrap Charging Start-Up
1.2V: When SS falls below the internal and Shutdown Circuit
reference (REF), SS overrides REF so that the If both VIN and EN exceed their respective
error amplifier uses SS as the reference; when thresholds, the chip starts. The reference block
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SS exceeds REF, the error amplifier resumes starts first, generating a stable reference
using REF as its reference. The SS time is voltage and currents, and then the internal
internally set to 1ms. regulator is enabled. The regulator provides a
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Over-Current-Protection and Hiccup stable supply for the remaining circuits.

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The MP1471 has a cycle-by-cycle over-current Three events can shut down the chip: EN low,
limit for when the inductor current peak value VIN low, and thermal shutdown. The shutdown
exceeds the set current-limit threshold. First, procedure starts by initially blocking the
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when the output voltage drops until FB falls signaling path to avoid any fault triggering. The
below the Under-Voltage (UV) threshold COMP voltage and the internal supply rail are
(typically 140mV) to trigger a UV event, the then pulled down. The floating driver is not
MP1471 enters hiccup mode to periodically subject to this shutdown command.
restart the part. This protection mode is
especially useful when the output is dead-
shorted to ground. This greatly reduces the
average short-circuit current to alleviate thermal
issues and to protect the regulator. The
MP1471 exits hiccup mode once the over-
current condition is removed.

APPLICATION INFORMATION
Setting the Output Voltage Under light-load conditions (below 100mA), use
The external resistor divider sets the output a larger inductance for improved efficiency.
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voltage. The feedback resistor R1 also sets the
Selecting the Input Capacitor
feedback-loop bandwidth through the internal
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The input current to the step-down converter is
compensation capacitor (see the Typical
discontinuous, and therefore requires a
Application circuit). Choose R1 around 10kΩ,
capacitor to both supply the AC current to the
and R2 by:
step-down converter and maintain the DC input
R1
R2 = voltage. Use low ESR capacitors for the best
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VOUT performance, such as ceramic capacitors with
−1
0.8V X5R or X7R dielectrics of their low ESR and
Use a T-type network for when VOUT is low. small temperature coefficients. A 22µF
capacitor is sufficient for most applications.
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The input capacitor (C1) requires an adequate
ripple current rating because it absorbs the
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input switching. Estimate the RMS current in
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Figure 6: T-Type Network the input capacitor with:
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Table 1 lists the recommended T-type resistors VOUT ⎛⎜ VOUT ⎞
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I C1 = ILOAD × × 1− ⎟
value for common output voltages. VIN ⎜⎝ VIN ⎟
⎠
Table 1—Resistor Selection for Common Output The worst-case condition occurs at VIN = 2VOUT,
Voltages
where:
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VOUT R1 R2 Rt LOUT COUT

(V) (kΩ) (kΩ) (kΩ) (μH) (μF) ILOAD
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IC1 =
1.05 10 32.4 150 2.2 44 2
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1.2 20.5 41.2 120 2.2 44 For simplification, choose an input capacitor
1.8 40.2 32.4 75 3.3 44 with an RMS current rating greater than half the
EC
2.5 40.2 19.1 59 4.7 44 maximum load current.

3.3 40.2 13 40.2 6.8 44 The input capacitor can be electrolytic, tantalum,
5 40.2 7.68 24.9 6.8 44 or ceramic. Place a small, high-quality, ceramic
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capacitor (0.1μF) as close to the IC as possible

Selecting the Inductor when using electrolytic or tantalum capacitors.
Use a 1µH-to-10µH inductor with a DC current When using ceramic capacitors, make sure that
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rating of at least 25% percent higher than the they have enough capacitance to provide
maximum load current for most applications. sufficient charge to prevent excessive input
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For highest efficiency, select an inductor with a voltage ripple. Estimate the input voltage ripple
DC resistance less than 15mΩ. For most caused by the capacitance with:
designs, derive the inductance value from the ⎛ ⎞
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ILOAD V V
ΔVIN = × OUT × ⎜ 1 − OUT ⎟
following equation. fS × C1 VIN ⎝ VIN ⎠
VOUT × (VIN − VOUT )
L1 = Selecting the Output Capacitor
VIN × ΔIL × fOSC
Where ΔIL is the inductor ripple current. Choose The output capacitor (C2) maintains the DC
an inductor current approximately 30% of the output voltage. Use ceramic, tantalum, or low-
maximum load current. The maximum inductor ESR electrolytic capacitors. Use low ESR
peak current is: capacitors to limit the output voltage ripple.
ΔI L Estimate the output voltage ripple with:
IL(MAX ) = ILOAD +
2

PC Board Layout
VOUT ⎛ VOUT ⎞ ⎛ 1 ⎞
ΔVOUT = × ⎜1 − ⎟ × ⎜ RESR + ⎟ PCB layout is very important to achieve stable
fS × L1 ⎝ VIN ⎠ ⎝ 8 × fS × C2 ⎠ operation. For best results, use the following
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Where L1 is the inductor value and RESR is the guidelines and Figure 8 as reference.
equivalent series resistance (ESR) of the output 1) Keep the connection between the input
P1 S FO
capacitor. ground and GND pin as short and wide as
possible.
For ceramic capacitors, the capacitance
dominates the impedance at the switching 2) Keep the connection between the input
frequency and causes most of the output capacitor and IN pin as short and wide as
voltage ripple. For simplification, estimate the possible.
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output voltage ripple with: 3) Use short and direct feedback connections.
Place the feedback resistors and compensation
VOUT ⎛ V ⎞ components as close to the chip as possible.
ΔVOUT = × ⎜ 1 − OUT ⎟
8 × fS 2 × L1 × C2 ⎝ VIN ⎠
4) Route SW away from sensitive analog areas
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For tantalum or electrolytic capacitors, the ESR such as FB.
dominates the impedance at the switching
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frequency. For simplification, the output ripple
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C1
can be approximated with:
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GND
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C6
VOUT ⎛ V ⎞ VIN
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ΔVOUT = × 1 − OUT ⎟ × RESR
fS × L1 ⎜⎝ VIN ⎠ 3 2 1
C3
R5
The characteristics of the output capacitor also R4

4 5 6
affect the stability of the regulation system. The
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MP1471 can be optimized for a wide range of R2

R7
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R6 C5
capacitance and ESR values.
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C3
R1
External Bootstrap Diode R3
An external bootstrap (BST) diode can enhance

EC
the efficiency of the regulator given the

following applicable conditions:
z VOUT is 5V or 3.3V; and
C1A
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V
z Duty cycle is high: D= OUT >65% C1
VIN GND
C6
Connect the external BST diode from the output VIN
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of voltage regulator to the BST pin, as shown in 3 2 1

C4
Figure 7.
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R5
R4
4 5 6
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C7
R2
R6 C5
R7
R1
C3
R3
R8
Figure 7 : Optional External Bootstrap Diode

For most applications, use an IN4148 for the Figure 8: Sample Layout
external BST diode is IN4148, and a 1µF
capacitor for the BST capacitor.

Design Example
Below is a design example following the
application guidelines for the specifications:
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Table 2—Design Example
VIN 12V
P1 S FO
VOUT 3.3V
Io 2.5A
The detailed application schematic is shown in
Figure 9. The typical performance and circuit
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waveforms have been shown in the Typical
Performance Characteristics section. For more
device applications, please refer to the related
Evaluation Board Datasheets.
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TYPICAL APPLICATION CIRCUITS

R4
0
VIN 3 IN BST 6
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C1 C6
C4
GND 25V 25V
MP1471 SW
L1
P1 S FO
GND GND GND 5V VOUT
SW 2
R3 C3 C2 C2A
R5
100k NS NS
R7 R1 GND GND
24.9K 40.2K
5 EN FB 4
EN
GND
ED
R6 C5 R2
GND
1
NS 7.68K
NS
GND GND GND GND
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Figure 9: 12VIN, 5V/2.5A
R4
0
7
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VIN 3 IN BST 6
C1 C6
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C4
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GND 25V 25V SW
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L1
GND
MP1471 VOUT
GND
G
GND 3.3V
SW 2
R3 C3 C2 C2A
R5
100k NS NS
R7 R1 GND GND
40.2K
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40.2K
5 EN FB 4
EN
GND
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R6 C5 R2
GND
1
13K
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NS
NS
GND GND GND GND

EC
Figure 10: 12VIN, 3.3V/3A

R4
0
VIN 3 IN BST 6
C1 C6
C4
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GND 25V 25V SW

MP1471 L1
GND GND GND 2.5V VOUT

SW 2
R3 C3 C2 C2A
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R5
100k NS NS
R7 R1 GND GND
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59K 40.2K
5 EN FB 4
EN
GND
R6 C5 R2
GND
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NS 19.1K
NS
GND GND GND GND

R4
0
VIN 3 IN BST 6
C1 C6
C4
GND 25V 25V
MP1471 SW
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L1
GND GND GND 1.8V VOUT

SW 2
C3
P1 S FO
R3 C2 C2A
R5
100k NS NS
R7 R1 GND GND
75K 40.2K
5 EN FB 4
EN
GND
R6 C5 R2
GND
1
32.4K
ED
NS
NS
GND GND GND GND

R4
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0
VIN 3 IN BST 6
C1 C6
C4
7
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GND 25V 25V SW
MP1471 L1
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GND GND VOUT
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GND 1.2V
2
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SW
R3 C3 C2 C2A
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R5
100k NS NS
R7 R1 GND GND
120K 20.5K
5 EN FB 4
EN
GND
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R6 C5 R2
GND
1
NS 41.2K
NS
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GND GND GND GND

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PACKAGE INFORMATION
TSOT23-6
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P1 S FO
See note 7
EXAMPLE
TOP MARK
IAAAA
ED
PIN 1 ID
TO SI D
7
TOP VIEW RECOMMENDED LAND PATTERN
N
M N
47
ER D ME
G SEATING PLANE
EF W M
SEE DETAIL''A''
E
R NE O
FRONT VIEW SIDE VIEW

EC
NOTE:
R
1) ALL DIMENSIONS ARE IN MILLIMETERS.

2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH ,
PROTRUSION OR GATE BURR.
T
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH

OR PROTRUSION.
O
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING)

SHALL BE 0.10 MILLIMETERS MAX.
5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AB.
N
6) DRAWING IS NOT TO SCALE.

7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK
FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK)
DETAIL "A"
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.

NOT Recommended For New Designs Refer TO MP1477

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MP1471

Flat-Panel Television and Monitors

MP1471 Rev. 1.01 www.MonolithicPower.com 1

ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance

VSW ...................................................................... Notes:

3) The device is not guaranteed to function outside of its

Output Voltage VOUT ......................0.8V to 0.9VIN

MP1471 Rev. 1.01 www.MonolithicPower.com 2

ELECTRICAL CHARACTERISTICS (5)

Thermal Shutdown(5) 150 °C

MP1471 Rev. 1.01 www.MonolithicPower.com 3

TYPICAL PERFORMANCE CHARACTERISTICS

MP1471 Rev. 1.01 www.MonolithicPower.com 4

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

MP1471 Rev. 1.01 www.MonolithicPower.com 5

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

VOUT VOUT VOUT

Startup through Enable Shutdown through Enable Input/Output Ripple

IOUT = 3A IOUT = 3A IOUT = 3A

MP1471 Rev. 1.01 www.MonolithicPower.com 6

TYPICAL PERFORMANCE CHARACTERISTICS

MP1471 Rev. 1.01 www.MonolithicPower.com 7

MP1471 Rev. 1.01 www.MonolithicPower.com 8

G Figure 1: Functional Block Diagram

MP1471 Rev. 1.01 www.MonolithicPower.com 9

output voltage. An internal clock initiates the

exceeds 5.0V, the regulator output is in full

The error amplifier compares the FB voltage

discharges the internal compensation network

optimized internal compensation network

simplifies the control-loop design. Value

The MP1471 has AAM (Advanced

MP1471 Rev. 1.01 www.MonolithicPower.com 10

resistor to the VIN voltage limits the EN input Thermal Shutdown

output voltage of the internal regulator, VCC. R4

its falling threshold is consistently 3.85V. C4

Soft-start prevents the converter output voltage SW L1

Over-Current-Protection and Hiccup stable supply for the remaining circuits.

MP1471 Rev. 1.01 www.MonolithicPower.com 11

VOUT R1 R2 Rt LOUT COUT

2.5 40.2 19.1 59 4.7 44 maximum load current.

capacitor (0.1μF) as close to the IC as possible

MP1471 Rev. 1.01 www.MonolithicPower.com 12

The characteristics of the output capacitor also R4

MP1471 can be optimized for a wide range of R2

An external bootstrap (BST) diode can enhance

the efficiency of the regulator given the

of voltage regulator to the BST pin, as shown in 3 2 1

Figure 7 : Optional External Bootstrap Diode

MP1471 Rev. 1.01 www.MonolithicPower.com 13

MP1471 Rev. 1.01 www.MonolithicPower.com 14

TYPICAL APPLICATION CIRCUITS

GND GND GND GND

GND GND GND GND

Figure 10: 12VIN, 3.3V/3A

GND 25V 25V SW

GND GND GND 2.5V VOUT

GND GND GND GND

Figure 81: 12VIN, 2.5V/3A

MP1471 Rev. 1.01 www.MonolithicPower.com 15

GND GND GND 1.8V VOUT

GND GND GND GND

Figure 92: 12VIN, 1.8V/3A