Colour Television Chassis

VES2.2E
LA

Contents Page
1. Revision List 2
2. Technical Specs, Diversity, and Connections 2
3. Precautions, Notes, and Abbreviation List 5
4. Mechanical Instructions 9
5. Service Modes, Error Codes, and Fault Finding 12
6. Alignments 15
7. Circuit Descriptions 16
8. IC Data Sheets 19
9. Block Diagrams
Wiring diagram 3000 series 32" 21
Block diagram 3000 series 22
10. Circuit Diagrams and PWB Layouts Drawing PWB
A 17ips19-5 26" to 40" LED Slim Integrated Power
Supply 23 25-26
B 17mb95s-2 SSB 27 36-37
J 17LD141-2 IR/LED 38
11. Styling Sheets
3000 series 32" 39

Published by SAR/SC 1363 Quality Printed in the Netherlands Subject to modification EN 3122 785 19420
2013-Mar-15

©
2013 TP Vision Netherlands B.V.
All rights reserved. Specifications are subject to change without notice. Trademarks are the
property of Koninklijke Philips Electronics N.V. or their respective owners.
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
earlier supplies accordingly.
PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
 EN 2 1. VES.2.2E LA Revision List

1. Revision List
Manual xxxx xxx xxxx.0
• First release.

2. Technical Specs, Diversity, and Connections

Index of this chapter:
2.1 Technical Specifications
2.2 Directions for Use
2.3 Connections
2.4 Chassis Overview

Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the links in. Here is
product information available, as well as getting started, user
manuals, frequently asked questions and software & drivers.

Table 2-1 Described Model Numbers:

Model Number Styling Published in

32PFL3008H/12 3000 3122 785 19420
32PFL3008K/12 3000 3122 785 19420
32PFL3008T/12 3000 3122 785 19420
32PFL3018H/12 3000 3122 785 19420
32PFL3018K/12 3000 3122 785 19420
32PFL3018T/12 3000 3122 785 19420
32PFL3028H/12 3000 3122 785 19420

Note: The given Model Numbers are subject to change.

2.2 Directions for Use

Directions for use can be downloaded from the following
websites:
http://www.philips.com/support
http://www.p4c.philips.com

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 Technical Specs, Diversity, and Connections VES.2.2E LA 2. EN 3

2.3 Connections

8
2
1

9 3

4
10
5 Optional
6
11

MO DE
o 19420_100_130312.eps
130312

Figure 2-1 Connection overview (Thriller styling)

Note: The following connector colour abbreviations are used Wh - Audio - L 0.5 VRMS / 10 k jq
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Rd - Audio - R 0.5 VRMS / 10 k jq
Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.
2.3.2 Rear Connections
2.3.1 Side Connections
6 - TV ANTENNA - In
1 - Common Interface Signal input from an antenna, cable or satellite.
68p - See figure 10-2-3 jk
7 - HDMI 2: Digital Video, Digital Audio - In
2 - USB2.0
19 1
18 2

1 2 3 4 10000_017_090121.eps
090428
10000_022_090121.eps
090121
Figure 2-3 HDMI (type A) connector
Figure 2-2 USB (type A)
1 - D2+ Data channel j
1 - +5V k 2 - Shield Gnd H
2 - Data (-) jk 3 - D2- Data channel j
3 - Data (+) jk 4 - D1+ Data channel j
4 - Ground Gnd H 5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
3 - Cinch: Video CVBS - In, Audio - In
8 - Shield Gnd H
Ye - Video CVBS 1 VPP / 75  jq
9 - D0- Data channel j
Rd - Audio R 0.5 VRMS / 10 k jq
10 - CLK+ Data channel j
Wh - Audio L 0.5 VRMS / 10 k jq
11 - Shield Gnd H
12 - CLK- Data channel j
4 - Head phone (Output) 13 - Easylink/CEC Control channel jk
Bk - Head phone 80 - 600  / 10 mW ot 14 - n.c.
15 - DDC_SCL DDC clock j
5 - EXT2: Video YPbPr - In, Audio - In 16 - DDC_SDA DDC data jk
Gn - Video - Y 1 VPP / 75 W jq 17 - Ground Gnd H
Bu - Video - Pb 0.7 VPP / 75 W jq 18 - +5V j
Rd - Video - Pr 0.7 VPP / 75 W jq 19 - HPD Hot Plug Detect j

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 EN 4 2. VES.2.2E LA Technical Specs, Diversity, and Connections

20 - Ground Gnd H 8 - Ground Blue Gnd H

9 - +5VDC +5 V j
8 - HDMI 1: Digital Video, Digital Audio - In 10 - Ground Sync Gnd H
11 - Ground Red Gnd H
19
18 2
1
12 - DDC_SDA DDC data j
13 - H-sync 0-5V j
10000_017_090121.eps
090428 14 - V-sync 0-5V j
15 - DDC_SCL DDC clock j
Figure 2-4 HDMI (type A) connector
10 - Cinch: S/PDIF - Out
1 - D2+ Data channel j Bk - Coaxial 0.4 - 0.6VPP / 75 ohm kq
2 - Shield Gnd H
3 - D2- Data channel j 11 - EXT1: Video RGB/YC - In, CVBS - In/Out, Audio - In/Out
4 - D1+ Data channel j 20 2
5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j 21 1
8 - Shield Gnd H 10000_001_090121.eps
090121

9 - D0- Data channel j

10 - CLK+ Data channel j Figure 2-6 SCART connector
11 - Shield Gnd H
12 - CLK- Data channel j 1 - Audio R 0.5 VRMS / 1 k k
13 - Easylink/CEC Control channel jk 2 - Audio R 0.5 VRMS / 10 k j
14 - ARC Audio Return Channel k 3 - Audio L 0.5 VRMS / 1 k k
15 - DDC_SCL DDC clock j 4 - Ground Audio Gnd H
16 - DDC_SDA DDC data jk 5 - Ground Blue Gnd H
17 - Ground Gnd H 6 - Audio L 0.5 VRMS / 10 k j
18 - +5V j 7 - Video Blue/C-out 0.7 VPP / 75  jk
19 - HPD Hot Plug Detect j 8 - Function Select 0 - 2 V: INT
20 - Ground Gnd H 4.5 - 7 V: EXT 16:9
9.5 - 12 V: EXT 4:3 j
9 - PC IN:VGA 9 - Ground Green Gnd H
1 5 10 - n.c.
6
10
11 - Video Green 0.7 VPP / 75  j
11 15
12 - n.c.
10000_002_090121.eps 13 - Ground Red Gnd H
090127
14 - Ground P50 Gnd H
Figure 2-5 VGA connector 15 - Video Red/C 0.7 VPP / 75  j
16 - Status/FBL 0 - 0.4 V: INT
1 - 3 V: EXT / 75  j
1 - Video Red 0.7 VPP / 75 W j
17 - Ground Video Gnd H
2 - Video Green 0.7 VPP / 75 W j
18 - Ground FBL Gnd H
3 - Video Blue 0.7 VPP / 75 W j
19 - Video CVBS 1 VPP / 75  k
4 - n.c.
20 - Video CVBS/Y 1 VPP / 75  j
5 - Ground Gnd H
21 - Shield Gnd H
6 - Ground Red Gnd H
7 - Ground Green Gnd H

2.4 Chassis Overview

Refer to 9. Block Diagrams for PWB/CBA locations.

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 Precautions, Notes, and Abbreviation List
3. Precautions, Notes, and Abbreviation List
Index of this chapter:
3.1 Safety Instructions
3.2 Warnings
3.3 Notes
3.4 Abbreviation List
3.1 Safety Instructions
Safety regulations require the following during a repair:
• Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
• Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.
Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:
• Route the wire trees correctly and fix them with the
mounted cable clamps.
• Check the insulation of the Mains/AC Power lead for
external damage.
• Check the strain relief of the Mains/AC Power cord for
proper function.
• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 M and 12 M.
4. Switch “off” the set, and remove the wire between the
two pins of the Mains/AC Power plug.
• Check the cabinet for defects, to prevent touching of any
inner parts by the customer.
3.2 Warnings
• All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
• Be careful during measurements in the high voltage
section.
• Never replace modules or other components while the unit
is switched “on”.
• When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.
3.3 Notes
3.3.1 General
• Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for
NTSC (channel 3).
• Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.
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VES.2.2E LA 3. EN 5
3.3.2 Schematic Notes
• All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 k).
• Resistor values with no multiplier may be indicated with
either an “E” or an “R” (e.g. 220E or 220R indicates 220 ).
• All capacitor values are given in micro-farads (  10-6),
nano-farads (n  10-9), or pico-farads (p  10-12).
• Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
• An “asterisk” (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
• The correct component values are listed on the Philips
Spare Parts Web Portal.
3.3.3 Spare Parts
For the latest spare part overview, consult your Philips Spare
Part web portal.
3.3.4 BGA (Ball Grid Array) ICs
Introduction
For more information on how to handle BGA devices, visit this
URL: http://www.atyourservice-magazine.com. Select
“Magazine”, then go to “Repair downloads”. Here you will find
Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile.
Where applicable and available, this profile is added to the IC
Data Sheet information section in this manual.
3.3.5 Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
• Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
• Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
– To reach a solder-tip temperature of at least 400°C.
– To stabilize the adjusted temperature at the solder-tip.
– To exchange solder-tips for different applications.
• Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.
3.3.6 Alternative BOM identification
It should be noted that on the European Service website,
“Alternative BOM” is referred to as “Design variant”.
The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
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 EN 6 3. VES.2.2E LA Precautions, Notes, and Abbreviation List

result in sets which have the same CTN (Commercial Type 6 = play 16 : 9 format, 12 = play 4 : 3
Number; e.g. 28PW9515/12) but which have a different B.O.M. format
number. AARA Automatic Aspect Ratio Adaptation:
By looking at the third digit of the serial number, one can algorithm that adapts aspect ratio to
identify which B.O.M. is used for the TV set he is working with. remove horizontal black bars; keeps
If the third digit of the serial number contains the number “1” the original aspect ratio
(example: AG1B033500001), then the TV set has been ACI Automatic Channel Installation:
manufactured according to B.O.M. number 1. If the third digit is algorithm that installs TV channels
a “2” (example: AG2B0335000001), then the set has been directly from a cable network by
produced according to B.O.M. no. 2. This is important for means of a predefined TXT page
ordering the correct spare parts! ADC Analogue to Digital Converter
For the third digit, the numbers 1...9 and the characters A...Z AFC Automatic Frequency Control: control
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be signal used to tune to the correct
indicated by the third digit of the serial number. frequency
AGC Automatic Gain Control: algorithm that
Identification: The bottom line of a type plate gives a 14-digit controls the video input of the feature
serial number. Digits 1 and 2 refer to the production centre (e.g. box
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. AM Amplitude Modulation
code, digit 4 refers to the Service version change code, digits 5 AP Asia Pacific
and 6 refer to the production year, and digits 7 and 8 refer to AR Aspect Ratio: 4 by 3 or 16 by 9
production week (in example below it is 2010 week 10 / 2010 ASF Auto Screen Fit: algorithm that adapts
week 17). The 6 last digits contain the serial number. aspect ratio to remove horizontal black
bars without discarding video
information
ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA
ATV See Auto TV
Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
AV External Audio Video
AVC Audio Video Controller
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz
BDS Business Display Solutions (iTV)
BLR Board-Level Repair
BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
10000_053_110228.eps countries
110228 B-TXT Blue TeleteXT
C Centre channel (audio)
Figure 3-1 Serial number (example) CEC Consumer Electronics Control bus:
remote control bus on HDMI
3.3.7 Board Level Repair (BLR) or Component Level Repair connections
(CLR) CL Constant Level: audio output to
connect with an external amplifier
If a board is defective, consult your repair procedure to decide CLR Component Level Repair
if the board has to be exchanged or if it should be repaired on ComPair Computer aided rePair
component level. CP Connected Planet / Copy Protection
If your repair procedure says the board should be exchanged CSM Customer Service Mode
completely, do not solder on the defective board. Otherwise, it CTI Color Transient Improvement:
cannot be returned to the O.E.M. supplier for back charging! manipulates steepness of chroma
transients
CVBS Composite Video Blanking and
3.3.8 Practical Service Precautions
Synchronization
DAC Digital to Analogue Converter
• It makes sense to avoid exposure to electrical shock. DBE Dynamic Bass Enhancement: extra
While some sources are expected to have a possible low frequency amplification
dangerous impact, others of quite high potential are of DCM Data Communication Module. Also
limited current and are sometimes held in less regard. referred to as System Card or
• Always respect voltages. While some may not be Smartcard (for iTV).
dangerous in themselves, they can cause unexpected DDC See “E-DDC”
reactions that are best avoided. Before reaching into a D/K Monochrome TV system. Sound
powered TV set, it is best to test the high voltage insulation. carrier distance is 6.5 MHz
It is easy to do, and is a good service precaution. DFI Dynamic Frame Insertion
DFU Directions For Use: owner's manual
3.4 Abbreviation List DMR Digital Media Reader: card reader
0/6/12 SCART switch control signal on A/V DMSD Digital Multi Standard Decoding
board. 0 = loop through (AUX to TV), DNM Digital Natural Motion

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 Precautions, Notes, and Abbreviation List VES.2.2E LA 3. EN 7

DNR Digital Noise Reduction: noise The SDI signal is self-synchronizing,

reduction feature of the set uses 8 bit or 10 bit data words, and has
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
DRM Digital Rights Management with a minimum bandwidth of 135
DSP Digital Signal Processing MHz.
DST Dealer Service Tool: special remote iTV Institutional TeleVision; TV sets for
control designed for service hotels, hospitals etc.
technicians LS Last Status; The settings last chosen
DTCP Digital Transmission Content by the customer and read and stored
Protection; A protocol for protecting in RAM or in the NVM. They are called
digital audio/video content that is at start-up of the set to configure it
traversing a high speed serial bus, according to the customer's
such as IEEE-1394 preferences
DVB-C Digital Video Broadcast - Cable LATAM Latin America
DVB-T Digital Video Broadcast - Terrestrial LCD Liquid Crystal Display
DVD Digital Versatile Disc LED Light Emitting Diode
DVI(-d) Digital Visual Interface (d= digital only) L/L' Monochrome TV system. Sound
E-DDC Enhanced Display Data Channel carrier distance is 6.5 MHz. L' is Band
(VESA standard for communication I, L is all bands except for Band I
channel and display). Using E-DDC, LPL LG.Philips LCD (supplier)
the video source can read the EDID LS Loudspeaker
information form the display. LVDS Low Voltage Differential Signalling
EDID Extended Display Identification Data Mbps Mega bits per second
(VESA standard) M/N Monochrome TV system. Sound
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
Programmable Read Only Memory MHEG Part of a set of international standards
EMI Electro Magnetic Interference related to the presentation of
EPG Electronic Program Guide multimedia information, standardised
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
EU Europe Experts Group. It is commonly used as
EXT EXTernal (source), entering the set by a language to describe interactive
SCART or by cinches (jacks) television services
FDS Full Dual Screen (same as FDW) MIPS Microprocessor without Interlocked
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
FLASH FLASH memory microprocessor
FM Field Memory or Frequency MOP Matrix Output Processor
Modulation MOSFET Metal Oxide Silicon Field Effect
FPGA Field-Programmable Gate Array Transistor, switching device
FTV Flat TeleVision MPEG Motion Pictures Experts Group
Gb/s Giga bits per second MPIF Multi Platform InterFace
G-TXT Green TeleteXT MUTE MUTE Line
H H_sync to the module MTV Mainstream TV: TV-mode with
HD High Definition Consumer TV features enabled (iTV)
HDD Hard Disk Drive NC Not Connected
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
Protection: A “key” encoded into the Audio Multiplexing. This is a digital
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
data piracy. If a source is HDCP coded NTC Negative Temperature Coefficient,
and connected via HDMI/DVI without non-linear resistor
the proper HDCP decoding, the NTSC National Television Standard
picture is put into a “snow vision” mode Committee. Color system mainly used
or changed to a low resolution. For in North America and Japan. Color
normal content distribution the source carrier NTSC M/N= 3.579545 MHz,
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
enabled for HDCP “software key” VCR norm, it is not transmitted off-air)
decoding. NVM Non-Volatile Memory: IC containing
HDMI High Definition Multimedia Interface TV related data such as alignments
HP HeadPhone O/C Open Circuit
I Monochrome TV system. Sound OSD On Screen Display
carrier distance is 6.0 MHz OAD Over the Air Download. Method of
I 2C Inter IC bus software upgrade via RF transmission.
I2D Inter IC Data bus Upgrade software is broadcasted in
I2S Inter IC Sound bus TS with TV channels.
IF Intermediate Frequency OTC On screen display Teletext and
IR Infra Red Control; also called Artistic (SAA5800)
IRQ Interrupt Request P50 Project 50: communication protocol
ITU-656 The ITU Radio communication Sector between TV and peripherals
(ITU-R) is a standards body PAL Phase Alternating Line. Color system
subcommittee of the International mainly used in West Europe (colour
Telecommunication Union relating to carrier = 4.433619 MHz) and South
radio communication. ITU-656 (a.k.a. America (colour carrier
SDI), is a digitized video format used PAL M = 3.575612 MHz and
for broadcast grade video. PAL N = 3.582056 MHz)
Uncompressed digital component or PCB Printed Circuit Board (same as “PWB”)
digital composite signals can be used. PCM Pulse Code Modulation

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 EN 8 3. VES.2.2E LA Precautions, Notes, and Abbreviation List

PDP Plasma Display Panel SWAN Spatial temporal Weighted Averaging

PFC Power Factor Corrector (or Noise reduction
Pre-conditioner) SXGA 1280 × 1024
PIP Picture In Picture TFT Thin Film Transistor
PLL Phase Locked Loop. Used for e.g. THD Total Harmonic Distortion
FST tuning systems. The customer TMDS Transmission Minimized Differential
can give directly the desired frequency Signalling
POD Point Of Deployment: a removable TS Transport Stream
CAM module, implementing the CA TXT TeleteXT
system for a host (e.g. a TV-set) TXT-DW Dual Window with TeleteXT
POR Power On Reset, signal to reset the uP UI User Interface
PSDL Power Supply for Direct view LED uP Microprocessor
backlight with 2D-dimming UXGA 1600 × 1200 (4:3)
PSL Power Supply with integrated LED V V-sync to the module
drivers VESA Video Electronics Standards
PSLS Power Supply with integrated LED Association
drivers with added Scanning VGA 640 × 480 (4:3)
functionality VL Variable Level out: processed audio
PTC Positive Temperature Coefficient, output toward external amplifier
non-linear resistor VSB Vestigial Side Band; modulation
PWB Printed Wiring Board (same as “PCB”) method
PWM Pulse Width Modulation WYSIWYR What You See Is What You Record:
QRC Quasi Resonant Converter record selection that follows main
QTNR Quality Temporal Noise Reduction picture and sound
QVCP Quality Video Composition Processor WXGA 1280 × 768 (15:9)
RAM Random Access Memory XTAL Quartz crystal
RGB Red, Green, and Blue. The primary XGA 1024 × 768 (4:3)
color signals for TV. By mixing levels Y Luminance signal
of R, G, and B, all colors (Y/C) are Y/C Luminance (Y) and Chrominance (C)
reproduced. signal
RC Remote Control YPbPr Component video. Luminance and
RC5 / RC6 Signal protocol from the remote scaled color difference signals (B-Y
control receiver and R-Y)
RESET RESET signal YUV Component video
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling
data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
SCL Serial Clock I2C
SCL-F CLock Signal on Fast I2C bus
SD Standard Definition
SDA Serial Data I2C
SDA-F DAta Signal on Fast I2C bus
SDI Serial Digital Interface, see “ITU-656”
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mémoire.
Colour system mainly used in France
and East Europe. Colour
carriers = 4.406250 MHz and
4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a
4-wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
SSC Spread Spectrum Clocking, used to
reduce the effects of EMI
STB Set Top Box
STBY STand-BY
SVGA 800 × 600 (4:3)
SVHS Super Video Home System
SW Software

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 Mechanical Instructions VES.2.2E LA 4. EN 9

4. Mechanical Instructions
Index of this chapter: Notes:
4.1 Cable Dressing • Figures below can deviate slightly from the actual situation,
4.2 Service Positions due to the different set executions.
4.3 Assembly/Panel Removal
4.4 Set Re-assembly

4.1 Cable Dressing

19420_101_130312.eps
130312

Figure 4-1 Cable dressing (32" 3000 series)

4.2 Service Positions to the SSB and PSU boards. Those need to be released
For easy servicing of a TV set, the set should be put face down before taking the cover off completely.
on a soft flat surface, foam buffers or other specific workshop
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
display. Caution: Failure to follow these guidelines can
seriously damage the display!
Ensure that ESD safe measures are taken.

4.3 Assembly/Panel Removal

Instructions below apply to the 32PFL3606H/12, but will be
similar for other models.

4.3.1 Rear Cover

Refer to Figure 4-2 for details.

Warning: Disconnect the mains power cord before removing
the rear cover.
1. Remove the screw [1] that secures the power cable.
2. Remove the screws [2] that fixate the stand and remove
the stand.
3. Unscrew all the remaining screws [3] and [4].
4. At the indicated areas [5] the cover is secured by clips. Be
careful with releasing those.
5. Lift the rear cover from the TV. Make sure that wires are not
damaged while lifting the rear cover from the set. Be very
careful while lifting the cover as there are cables connected

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 EN 10 4. VES.2.2E LA Mechanical Instructions

3 3 3 3
1
4 × 12

2
M4 × 12
5
3 3
5 3
M4 × 6

4
4 4
3 3 × 12

1
3
3
2 2 3

3 2 2 3

19420_201_130312.eps
130312

Figure 4-2 Rear cover removal

4.3.2 Speakers 6. Take out the SSB together with its shielding.
7. Remove the screw near the L/R audio connectors.
1. Release the tapes which fixate the cabling. 8. The SSB can now be shifted from the side connector cover,
2. Remove the screws of the speakers. then lifted and taken out of the shielding.
3. Take the speakers out.
When defective, replace the both units. 4.3.5 IR/LED Board

4.3.3 Power Supply Unit (PSU) 1. Remove the speakers as described earlier.
2. Remove the stand as described earlier.
Caution: it is mandatory to remount all different screws at their 3. Release the clamps that hold the boards cable.
original position during re-assembly. Failure to do so may result 4. Remove the fixation screws that secure the LCD panel with
in damaging the PSU. the bezel.
1. Release the Power board cables from their clamps. 5. Lift the LCD Panel from the bezel.
2. Unplug power connectors from the SSB, as it is not 6. Gently release the clips that hold the board and take it out
unplug-able at the PSU itself (soldered connector). from the bezel.
3. Unplug all other connectors from the PSU. 7. Unplug both the connectors from the IR/LED board.
4. Remove all fixation screws from the PSU. When defective, replace the whole unit.
5. The PSU can be taken out of the set now.

4.3.4 Small Signal Board (SSB)

Caution: it is mandatory to remount all different screws at their

original position during re-assembly. Failure to do so may result
in damaging the SSB.
1. Release the clips from both the LVDS Flat Foil connectors
that connect with the SSB.
Caution: be careful, as these are very fragile connectors!
Take the flat foils out of their connectors.
2. Release the clamps and unplug all other connectors.
3. Remove the fixation screw from the clamp near the bottom
of the SSB, and take the clamp out.
4. Release the tape near the bottom side of the set from the
LCD panel.
5. Remove all other fixation screws from the SSB.

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 Mechanical Instructions VES.2.2E LA 4. EN 11

4.3.6 LCD Panel

1. Remove the SSB as described earlier.

2. Remove the PSU as described earlier.
3. Remove the stand as described earlier.
4. Release the IR/LED board cable from its clamps and
unplug the IR/LED board cable.
5. Remove the fixation screws, that secure the LCD panel
with the bezel.
6. Lift the LCD Panel from the bezel.
7. Remove the fixation screws that secure the panel with the
metal subframe.
8. Release the clips from both the LVDS Flat Foil connectors
that connect with the LCD panel.
Caution: be careful, as these are very fragile connectors!
Take the flat foils out of their connectors.
When defective, replace the whole unit.

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse
order.

Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position. See Figure 4-1.
• Pay special attention not to damage the EMC foams on the
SSB shields. Ensure that EMC foams are mounted
correctly.

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 EN 12 5. VES.2.2E LA Service Modes, Error Codes, and Fault Finding
5. Service Modes, Error Codes, and Fault Finding
Index of this chapter:
5.1 Test Points
5.2 Service Modes
5.3 Software Upgrading
5.4 Error Codes
5.5 Fault Finding and Repair Tips
5.1 Test Points
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. However, several key
ICs are capable of generating test patterns. In this way it is
possible to determine which part is defective.
Perform measurements under the following conditions:
• Service Default Mode.
• Video: Colour bar signal.
• Audio: 3 kHz left, 1 kHz right.
5.2 Service Modes
The Service Mode feature is split into two parts:
• Service Alignment Mode (SAM).
• Customer Service Mode (CSM).
SAM offer features, which can be used by the Service engineer
to repair/align a TV set. Some features are:
• Display information (“Service Menu” (SAM) indication in
upper right corner of screen, error buffer, software version,
operating hours, options and option codes, sub menus).
The CSM is a Service Mode that can be enabled by the
consumer. The CSM displays diagnosis information, which the
customer can forward to the dealer or call centre. In CSM
mode, “CSM”, is displayed in the top right corner of the screen.
The information provided in CSM and the purpose of CSM is to:
• Increase the home repair hit rate.
• Decrease the number of nuisance calls.
• Solved customers’ problem without home visit.
Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old “MENU”
button is now called “HOME” (or is indicated by a “house” icon).
5.2.1 General
Next items are applicable to all Service Modes or are general.
Life Timer
During the life time cycle of the TV set, a timer is kept (called
“TV Life Time”). It counts the normal operation hours (not the
Stand-by hours). The actual value of the timer is displayed in
SDM and SAM in a decimal value. Every two soft-resets
increase the hour by + 1. Stand-by hours are not counted.
Software Identification, Version, and Cluster
The software ID, version, and cluster will be shown in the main
menu display of SAM, and CSM.
The screen will show: “AAAAAB-XX.YY”, where:
• AAAAA is the chassis name: VES11E_2.1.4n.
• B is the region indication: E = Europe, A = AP/China, U =
NAFTA, L = LATAM.
• XX is the main version number: this is updated with a major
change of specification (incompatible with the previous
software version). Numbering will go from 01 - 99 and
AA - ZZ.
- If the main version number changes, the new version
number is written in the NVM.
- If the main version number changes, the default settings
are loaded.
• YY is the sub version number: this is updated with a minor
change (backwards compatible with the previous
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versions). Numbering will go from 00 - 99.
- If the sub version number changes, the new version
number is written in the NVM.
- If the NVM is fresh, the software identification, version,
and cluster will be written to NVM.
5.2.2 Service Alignment Mode (SAM)
Purpose
• To modify the NVM.
• Change and test video settings.
• View options.
• TV life time
• SW number
• Factory reset
• Diagnose features
Specifications
• Operation hours counter (maximum five digits displayed).
• Software version, error codes, and option settings display.
• Option settings.
• Software alignments (White Tone).
• NVM Editor.
How to Activate SAM
To activate SAM, use one of the following methods:
• Press menu button firstly. While main menu is on screen
press 4725 consecutively. Do not allow the display to time
out between entries while keying the sequence.
After entering SAM, the following items are displayed,
with “SAM” in the upper right corner of the screen to indicate
that the television is in Service Alignment Mode.
19420_202_130313.eps
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Figure 5-1 Example of SAM
How to Navigate
• In the SAM menu, select menu items with the UP/DOWN
keys on the remote control transmitter. The selected item
will be indicated. When not all menu items fit on the screen,
use the UP/DOWN keys to display the next/previous menu
items.
• With the “LEFT/RIGHT” keys, it is possible to:
– Test certain values and turn them off.
– Change the value of the selected menu item.
How to Store SAM Settings
All the changes which have been made are stored
automatically. It is suffice to enter the new value and just exit.
How to Exit SAM
Use one the following method:
• Switch the set to STANDBY by pressing the mains button
on the remote control transmitter or the television set.
Note: When the TV is switched “off” by a power interrupt while
in SAM, the TV will show up in “normal operation mode” as
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 Service Modes, Error Codes, and Fault Finding VES.2.2E LA 5. EN 13

soon as the power is supplied again. The error buffer will not be 5.3 Software Upgrading
cleared.
5.3.1 Description
5.2.3 Customer Service Mode (CSM)
It is possible for the user to upgrade the main software via the
Purpose USB port. This allows replacement of a software image in a
The Customer Service Mode shows error codes and stand alone set. A description on how to upgrade the main
information on the TVs operation settings.The call centre can software can be found in the DFU or on the Philips website.
instruct the customer (by telephone) to enter CSM in order to
identify the status of the set.This helps the call centre to 5.3.2 Introduction
diagnose problems and failures in the TV set before making a
service call.
Philips continuously tries to improve its products, and it’s
The CSM is a read-only mode; therefore, modifications are not
recommend that the TV software is updated when updates are
possible in this mode. available. Software update files can be obtained from the
dealer or can be downloaded from the following websites:
Specifications http://www.philips.com/support
• Ignore “Service unfriendly modes”.
• Line number for every Preparing a portable memory for software upgrade
line (to make CSM language independent).
The following requirements have to be met:
• Set the screen mode to full
1. A personal computer connected to the Internet.
screen (all contents on screen is visible). 2. An archive utility that supports the ZIP-format (e.g. Win Zip
• After leaving the Customer Service Mode, the original
for Windows or Stufflt for Mac OS).
settings are restored.
3. A USB flash drive (preferably empty).
• Possibility to use “CH+” or “CH-” for channel surfing, or
enter the specific channel number on the RC.
Note:
1. Only FAT/DOS-formatted flash drives are supported.
2. Only use software update files that can be found on the
http://www.philips.com/support web site.

5.3.3 Check the current TV software version

Before starting the software upgrade procedure, it is advised to

check that what the current TV software:
1. Press the Menu button followed by “1 2 3 6 5 4” buttons
consecutively on the remote control.
2. Use the up/down cursor keys to find the software version.
If the current software version of the TV is the same as the
latest update file found on http://www.philips.com/support, it is
not necessary to update the TV software.
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5.3.4 Download the latest software
Figure 5-2 CSM Menu
1. Point the web browser to http://www.philips.com/support.
How to Activate CSM 2. Find information and software related to the TV.
Press the Menu button followed by “123654” buttons 3. Select the latest software update file and download it to the
consecutively. PC.
4. Insert a USB flash drive into one of the USB ports of the
Note: Activation of the CSM is only possible if there is no (user) PC.
menu on the screen! 5. Decompress the downloaded ZIP file and copy the
“autorun.upg” to the root directory of the USB flash drive.

5.3.5 Update the TV software

Contents of CSM
1. Unplug the mains power cord from your TV.
• USB Logging 2. Insert the USB flash drive that contains the software
• Video Settings update files.
• Audio Settings 3. Press and hold the OK button.
• Options 1 Note: If the USB flash drive is not detected after power up,
• Options 2 disconnect it and re-insert it.
• Options 3 4. Plug the mains power cord back in while holding the OK
• Tuning Settings button.
• Source Settings 5. The led light will start to flash and blink.
• Diagnostic 6. The first time installation menu will appear.
• USB Operations 7. Restart your TV. Your TV has now been updated.

How to Navigate
By means of the “CURSOR-DOWN/UP” knob (or the scroll
wheel) on the RC-transmitter, can be navigated through the
menus.

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 EN 14 5. VES.2.2E LA Service Modes, Error Codes, and Fault Finding

Note: be tested in TP50 in main board. See figure 10-2-1 B01,

• Do not remove the USB flash drive during the software HDMI/GPIO protection.
update.
• If a power failure occurs during the update, do not remove 5.5.4 No Picture via HDMI input
the USB flash drive from the TV. The TV will continue the
software update as soon as the power comes up again. Check if HDCP key is valid. This can be done in CSM.
• If an error occurs during the update retry the procedure or
contact the dealer.
5.5.5 TV Will Not Start-up from Stand-by
• We do not recommend downgrading to an older version.
• Once the upgrade is finished, use the PC to remove the TV
software from the USB portable memory. Possible Stand-by Controller failure. Re flash the SW.

5.3.6 How to Copy NVM Data to/from USB 5.5.6 CI Module Problem

Copy to USB
There are two steps and both are independent of each other.
Copy the updated welcome image to USB as “hotel_wel.png”
Copy from USB
There are two steps and both are independent of each other. If
there is file named “hotel_wel.png” in directory
“welcome_image”. It is copied to TV to use as welcome image.
Copy from USB device data to NVRAM. Just the reverse
operation done by copy to USB call. Previously copied NVRAM
files (Flashx.bin) are copied into TV. If there is no flash file or
some of them are available on USB, the available ones are
copied. If no USB is connected, nothing happens.
Note: For Clone function USB stick (Copy to USB - Copy from
USB) must be formatted to FAT32. If USB is not formatted to
FAT32 the other TVs will not accept cloned data and
performance issues will result
5.4 Error Codes
This chassis does not contain error codes.
Supply, supply control pin, detect pins, mechanical positions of
pins.CI supply should be 5V when CI module inserted. If it is not
5V please check CI_PWR_CTRL, this pin should be low. See
figure 10-2-7 B07, Audio, Headphone.
5.5.7 CSM
When CSM is activated and there is a USB memory stick
connected to the TV, the software will dump the complete CSM
content to the USB memory stick. The file (Csm.txt) will be
saved in the root of the USB memory stick.
5.5.8 Loudspeakers
Make sure that the volume is set to minimum during
disconnecting the speakers in the ON-state of the TV. The
audio amplifier can be damaged by disconnecting the speakers
during ON-state of the set!
5.5.9 Display Option Code

5.5 Fault Finding and Repair Tips Attention: In case the SSB is replaced, always check the Panel
Note:
Code in CSM, even when picture is available. Performance
• It is assumed that the components are mounted correctly
with the incorrect display option code can lead to unwanted
with correct values and no bad solder joints. side-effects for certain conditions.
• Before any fault finding actions, check if the correct options
are set.
5.5.10 Staying in Stand-by Mode

5.5.1 NVM Editor

In some cases, it can be convenient if one directly can change
the NVM contents. This can be done with the “NVM Editor” in
SAM mode. With this option, single bytes can be changed.
This problem indicates a short on VCC voltages. Protect pin
should be logic high while normal operation. When there is a
short circuit protect pin will be logic low. If you detect logic low
on protect pin, unplug the TV set and control voltage points with
a multi-meter to find the shorted voltage to ground.

Caution:
5.5.11 IR Problem
• Do not change these, without understanding the function of
each setting, because incorrect NVM settings may
seriously hamper the correct functioning of the TV set! Check LED card supply on MB95 chassis.
• Always write down the existing NVM settings, before
changing the settings. This will enable you to return to the 5.5.12 No Signal Problem
original settings, if the new settings turn out to be incorrect.
Check tuner supply voltage; 5V_VCC, 3V3_TUNER and
5.5.2 Load Default NVM Values 1V8_TUNER. Check tuner options are correctly set in Service
menu. Check AGC voltage at IF_AGC pin of tuner.
It is possible to upload the default values to the NVM with
ComPair in case the SW is changed, the NVM is replaced with
a new (empty) one, or when the NVM content is corrupted.
After replacing an EEPROM (or with a defective/no EEPROM),
default settings should be used to enable the set to start-up and
allow the Service Default Mode and Service Alignment Mode to
be accessed.

5.5.3 No Backlight Problem.

Backlight pin, dimming pin, backlight supply, stby on/off pin

BACKLIGHT_ON/OFF pin should be high when the backlight is
ON. R119 must be low when the backlight is OFF. If it is a
problem, please check Q10 and the panel cables. Also it can

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 Alignments VES.2.2E LA 6. EN 15

6. Alignments
Index of this chapter:
6.1 General Alignment Conditions
6.2 Hardware Alignments
6.3 Software Alignments
6.4 Reset of Repaired SSB

6.1 General Alignment Conditions

Perform all electrical adjustments under the following
conditions:
• Power supply voltage: 90 - 264 VAC, 50/ 60  3 Hz.
• Connect the set to the mains via an isolation transformer
with low internal resistance.
• Allow the set to warm up for approximately 15 minutes.
• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heat sinks as ground.
• Test probe: Ri > 10 M, Ci < 20 pF.

6.2 Hardware Alignments

Not applicable.

6.3 Software Alignments

Put the set in SAM mode (see Chapter 5. Service Modes, Error
Codes, and Fault Finding). The SAM menu will now appear on
the screen. Select RGB Align and go to one of the sub menus.
The alignments are explained below.
The following items can be aligned:
• White point

To store the data:

• Press OK on the RC before the cursor is moved to the
left.
• Select “Store” and press OK on the RC.
• Switch the set to stand-by mode.

For the next alignments, supply the following test signals via a
video generator to the RF input:
• EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz
• US/AP-NTSC models: an NTSC M/N TV-signal with a
signal strength of at least 1 mV and a frequency of
61.25 MHz (channel 3).
• LATAM models: an NTSC M TV-signal with a signal
strength of at least 1 mV and a frequency of
61.25 MHz (channel 3).

6.4 Reset of Repaired SSB

A very important issue towards a repaired SSB from a Service
repair shop (SSB repair on component level) implies the reset
of the NVM on the SSB.
A repaired SSB in Service should get the service Set type
“00PF0000000000” and Production code “00000000000000”.
Also the virgin bit is to be set. To set all this, you can use the
ComPair tool or use the “NVM editor” and “Dealer options”
items in SAM (do not forget to “store”).

After a repaired SSB has been mounted in the set (set repair
on board level), the type number (CTN) and production code of
the TV has to be set according to the type plate of the set. For
this, you can use the NVM editor in SAM. The loading of the
CTN and production code can also be done via ComPair
(Model number programming).

In case of a display replacement, reset the “Operation hours

display” to “0”, or to the operation hours of the replacement
display.

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 EN 16 7. VES.2.2E LA Circuit Descriptions

7. Circuit Descriptions
Index of this chapter: 7.1 Introduction
7.1 Introduction VES2.2E LA main board is driven by MStar SOC. This IC is a
7.2 Power Supply single chip IDTV solution that supports channel decoding,
7.3 Power Management MPEG decoding, and media-centre functionality enabled by a
7.4 Circuit Description high performance AV CODEC and CPU.
• Combo Front-End Demodulator
Notes: • A multi-standard A/V format decoder
• Only new circuits (circuits that are not published recently) • The MACEpro video processor
are described. • Home theatre sound processor
• Figures can deviate slightly from the actual situation, due • Internet and Variety of Connectivity Support
to different set executions. • Dual-stream decoder for 3D contents
• For a good understanding of the following circuit • Multi-purpose CPU for OS and multimedia
descriptions, please use the wiring, block (see chapter • Peripheral and power management
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary, 7.1.1 VES2.2E LA Architecture Overview
you will find a separate drawing for clarification.
For details about the chassis block diagrams refer
to chapter 9. Block Diagrams.

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 Circuit Descriptions VES.2.2E LA 7. EN 17

7.1.2 SSB Cell Layout

DC-DC

CI Socket

NAND Flash

LVDS Sockets

USB

Serial Flash
Main IC

VGA
Supplies

Tuner Supplies

DDR

HDMI

Side Sockets

Tuner

Audio Amp

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Figure 7-1 SSB layout cells (top view)

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 EN 18 7. VES.2.2E LA Circuit Descriptions

7.2 Power Supply The output voltages to the chassis are:

• +5V / +3V3 / 12 V- STANDBY
7.2.1 Power Supply Unit • +5 V / +12V (on-mode)
• +24V for audio circuit, (on-mode)
Before checking other parts first check whether fuse on the
PSU is not broken. Always replace a defective fuse with one 7.2.2 USB Interface
with the correct specifications! This part is available in the
regular market. The SOC has two input port for USB, therefore air mouse,
Consult the Philips Service web portal for the order codes of the internal wi-fi interface and USB2 are combined with HUB. This
boards. property is optional. If air mouse and wi-fi interfaces are not
aligned, two USB are connected directly to main IC.

7.3 Power Management

The on-board DC/DC converters receive the following voltages
from the PSU (depending on set execution):
• +3.3 VSB, for standby mode.
• +5 VSB, for standby mode.
• +12 VSB, for standby mode.
• +3.3 V, for on mode.
• +5 V, for on mode.
• +24 V, for on mode, audio power.

7.4 Circuit Description

7.4.1 System power

The main board power is received at connector CN2 from

power board, to receive the power and signals from the PSU.
19420_206_130315.eps
See Figure 7-2 for the correct pining. 130315

Figure 7-3 USB Interface

CN2 power cable

2 1

3V3_VCC 4 3 3V3_VCC

3V3_STBY 6 5 24V_VCC_AU

12V_STBY 8 7 12V_STBY

5V_VCC 10 9 5V_VCC

12V_STBY 12 11 5V_STBY

14 13 DIMMING

16 15 BACKLIGHT_ON/OFF

18 17 power_pin3

20 19 power_pin1

19420_205_130315.eps
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Figure 7-2 Connector CN2 overview

7.4.2 System power

The main board power is received at connector CN2 from

power board, to receive the power and signals from the PSU.
See Figure 7-2 for the correct pining.

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 IC Data Sheets VES.2.2E LA 8. EN 19

8. IC Data Sheets
This chapter shows the internal block diagrams and pin electrical diagrams (with the exception of “memory” and “logic”
configurations of ICs that are drawn as “black boxes” in the ICs).

8.1 Diagram 10-2-4 B04, Tuner, USB, WiFi, Si2156 (U18)

Block diagram

ANTENNA Si2156 I DSP

AGC
DTV
INPUT PGA DLIF

INTERFACE
RF_IP ADC DSP DEMOD

OUTPUT
FILTER
Balun RF_IN
AGC
Q ATV
FILTER ATV
PGA ALIF
ADC DEMOD DEMOD

RSTB
RF IF
0 / 90 LOW-IF INTB

INTERFACE
AGC AGC

CONTROL
SDA AV
1.8 V SoC
FREQ SCL
3.3 V LDO XOSC
SYNTH ADDR
XTAL_O

XTAL_I

XOUT

BCLK

GPIO

Pinning information
RF_SHLD

RF_SHLD

XTAL_O
XTAL_I
VDD_H
VDD_H
RF_IN
RF_IP

24 23 22 21 20 19 18 17
GND 25 16 XOUT

GND 26 15 BCLK

GND 27 14 VDD_L

GPIO1 28 13 DLIF_P
GND_PAD
INTB/GPIO2 29 12 DLIF_N

RSTB 30 11 ALIF_P

GND 31 10 VDD_H

VDD_IO 32 9 ALIF_N
1 2 3 4 5 6 7 8
VDD_S

SCL

SDA

DLIF_AGC
VDD_D

GND
ADDR
ALIF_AGC

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Figure 8-1 Internal block diagram and pin configuration

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 EN 20 8. VES.2.2E LA IC Data Sheets

8.2 Diagram 10-2-7 B07, Audio, Headphone, TAS5719 (IC U35)

Block diagram

OUT_A
2 HB
th FET Out
Serial 4 OUT_B
SDIN Audio S Order
Port R Noise
(DAP) C Shaper
and OUT_C
PWM 2 HB
FET Out
OUT_D

Protection
Logic

MCLK
Control
SCLK Autodetect
LRCLK

Microcontroller
SDA Serial Based
Control System
SCL Control

HPL_IN HPL_OUT

HPR_IN HPR_OUT

Pinning information
PHP Package
HP_PWMR
HP_PWML

PGND_CD
PGND_AB
PVDD_AB

OUT_C

OUT_D
OUT_A

OUT_B

BST_C
BST_A

BST_B

48 47 46 45 44 43 42 41 40 39 38 37
HPL_IN 1 36 BST_D
HPL_OUT 2 35 PVDD_CD
HPR_OUT 3 34 GVDD_OUT
HPR_IN 4 33 HP_SD
HPVSS 5 32 SSTIMER
CPN 6 TAS5717 31 VREG
CPP 7 (TAS5719) 30 AGND
HPVDD 8 29 GND
AVSS 9 28 DVSS
PLL_FLTM 10 27 DVDD
PLL_FLTP 11 26 STEST
VR_ANA 12 25 RESET
13 14 15 16 17 18 19 20 21 22 23 24
LRCLK
MCLK

PDN

SCL
VR_DIG

SDIN
SDA
OSC_RES
DVSSO
AVDD
A_SEL

SCLK

19420_301_130315.eps
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Figure 8-2 Internal block diagram and pin configuration

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 Block Diagrams VES2.2E LA 9. EN 21

9. Block Diagrams
9.1 Wiring diagram 3000 series 32"

Board Level Repair

Component Level Repair

Only for authorized workshops

CI

PL200

PL1
20P
20P
B SSB
(M2)

to panel
A MAIN POWER SUPPLY
(M3)
USB

TV ANTENNA CVBS
VGA
R/L Audio

SPDF OUT
L 2P N
2P
PL100 PL500
(RGB/CVBS)
2P SCART 2P
CN27 CN15

M7

RIGHT SPEAKER LEFT SPEAKER

J IR/LED BOARD
(M6) 5P

10000_000_A3_very_first page_120130.eps
120130

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 Block Diagrams VES2.2E LA 9. EN 22

9.2 Block diagram 3000 series

1V5_VCC 2x6W

POWER DDR3 RAM

(64Mx16bit or
BLOCK 128Mx16bit)
(1600 MT/s)
3V3_VCC LM1117 1V8_VCC_TUNER 24V_VCC
TAS5719
Audio Amp (6W) &
5V_VCC LM1117 3V3_VCC_TUNER 2Vrms Amp

SC_L/R_OUT
1V2_VCC

SPDIF OUT
TPS6251

I2S AUD_OUT
12V_VCC 1V5_VCC

3V3_VCC 3V3_VCC
2V5_VCC
1V5_VCC
3V3_VCC APL5910 2V5_VCC 3V3_STBY
1V2_VCC

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
5V_STBY AP2111H 3V3_STBY
A
LINE I2S SPDIF
SPI
RAM INTERFACE POWER GPIO I/O ETHERNET SPI (16Mbit)
3V3_STBY
OUT I/O B
FLASH
C
USB Host
TPS5428 Interface D
12V_STBY 5V_STBY USB1
E
12V_STBY FDC642P 12V_VCC IRIN IR_IN LED
F
5V_STBY FDC642P 5V_VCC

GPIO
G
5V_STBY 5V_VCC
H TPS2553
USB Power
J Supply Switch
I2C I2C
HW K
Reset RESET
24V_VCC 3V3_STBY AZ099-4S
CIRCUIT
12V_VCC HP_DETECT Block L ESD
Protection
3V3_VCC_TUNER SHORT CCT PROTECT
PROTECT
1V8_VCC_TUNER PROTECTION M
5V_VCC KEYBOARD
N
3V3_VCC Dimming MSD8WB9BX
BACKLIGHT_DIMMING Dimming Dimming Main
Circuitry P

GPIO
R

HDMI INTERFACE
SC_Pin8
Polarizer (Passive) Glass T
DVD_SENSE
U

HDMI 2
12V_VCC TMDS_2
HDMI2_5V
DISPLAY 2D V
I2C_2

Panel Vcc W
SW I2C_1

HDMI 1
Y
HDMI1_5V
TMDS_1

LVDS INTERFACE
LVDS AA ARC
(SINGLE & DUAL)
AB
XIN/ XTAL
XOUT AC (24 Mhz)
AD
NAND CI TS0 TS1 HP Front-End ANALOG AUDIO/VIDEO AE
FLASH INTERFACE Input I/O OUT INTERFACE

SAV/VGA/YPbPr Audio_In
HP_L/R
MST_TS0

I/O_TS1

CVBS_IN .
RGB/HS/VS

SC1 CVBS_OUT
NAND_CONTROL

DIGITAL IF_T/C
HP_DETECT
MB95S Block Diagram
PCM/NAND_DATA

SC AUDIO_IN
SC CVBS_IN
SC RGB/FB
PCM_ADDRESS

CI_TS0

VGA
CI_TS1

NAND Flash
3V3_VCC (128Mx8bit / VIDEO
256Mx8bit) AMP.

SI2156
Silicon Tuner

RESET_TUN
I2C_TUNER
AGC_MAIN

SCART

SC_Pin8
3V3_VCC_TUNER
1V8_VCC_TUNER
SC AUDIO_OUT
XTAL
(24 Mhz)

19420_401_130314.eps
130314

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 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 23

10. Circuit Diagrams and PWB Layouts

10.1 A 17ips19-5 26" to 40" LED Slim Integrated Power Supply
10-1-1 A01

A01 26" to 40" Slim Integrated Power Supply

A01

3 2011-05-02

26" to 40" Slim Integrated

2722 171 9032
Power Supply

19420_500_130311.eps
130311

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 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 24

10-1-2 A02

A02 26" to 40" Slim Integrated Power Supply

A02

5 2012-08-06

26" to 40" Slim Integrated

17IPS19-5
Power Supply

19420_501_130311.eps
130311

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 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 25

10-1-3 Layout top

5 2012-08-06

PSU Layout Top

17ips19-5

19420_502_130311.eps
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 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 26

10-1-4 Layout bottom

5 2012-08-06

PSU Layout Bottom

17ips19-5

19420_503_130311.eps
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 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 27

10.2 B 17mb95s-2 SSB

10-2-1 B01, HDMI/GPIO protection

B01 HDMI/GPIO protection

B01
CN6 HDMI0_5V
21
20 HDMI0_RX0N M1 RXA0N CN5
R62 R82
1 1
HDMI0_RX2P HDMI0_HPDIN 1 2
HDMI0_RX0P N3 RXA0P RXC0N R1 21
10R 2
1k
2 HDMI0_RX1N N1 RXA1N RXC0P T3 20
R69 R97
3 1 2
HDMI0_RX2N HDMI0_RX1P N2 RXA1P RXC1N T1 1 1
HDMI2_RX2P
10R 10R

R10
P3 RXC1P T2

1k2
4 1
10R 2
HDMI0_RX1P HDMI0_RX2N RXA2N 2 R141
5 R67 HDMI0_RX2P P2 RXA2P RXC2N U3 3 1 2
HDMI2_RX2N
R70 3 10R
6 HDMI0_RX1N HDMI0_CLKN M3 RXACKN RXC2P U2 4 10R HDMI2_RX1P
HDMI1

1 2
10R R83 1

7 10R HDMI0_RX0P Q2 2 1 2
HDMI0_CLKP M2 RXACKP RXCCKN R3 5 R112
2
1
1k R158
BC848B V5 RXCCKP R2
8 R68 HDMI0_SCL DDCDA_CK
HDMI / USB 6 HDMI2_RX1N

HDMI3
1 2
R66 10R
9 1 2
HDMI0_RX0N
1
HDMI0_SDA V4 DDCDA_DA DDCDC_CK V6 7 10R HDMI2_RX0P
10R 2

10R C14 AD1 DDCDC_DA W6 8 R124

HDMI2_5V
10 1
2
HDMI0_CLKP HOTPLUGA R106
11 R65 HDMI0_ARC N4 ARC0 3 HOTPLUGC AD4 9 1 2
HDMI2_RX0N
R71 10R
12 1
10R
2
HDMI0_CLKN 10 10R HDMI2_CLKP
1u J1 F1
1

HDMI1_RX0N U4 11 R100

HDMI1_5V
13 CEC 6V3 RXB0N RXD0N HDMI2_RX0N R160
14 HDMI1_RX0P K3 RXB0P RXD0P G3 12 1 2
HDMI2_CLKN
R64 HDMI2_RX0P 10R
K1 G1
15 1
10R
2
HDMI0_SCL HDMI1_RX1N
K2
RXB1N MSD8WB9BX RXD1N
G2
HDMI2_RX1N 13 CEC
16 1
10R 2
HDMI0_SDA HDMI1_RX1P RXB1P RXD1P HDMI2_RX1P R39 14 R99 HDMI0_ARC
17 R63 HDMI1_RX2N L3 RXB2N RXD2N H3 2 1
HDMI2_HPDIN 15 1 2
HDMI2_RX2N 1k 10R HDMI2_SCL
18 HDMI1_RX2P L2 RXB2P RXD2P H2 16 10R
HDMI0_5V HDMI2_RX2P 1
2
HDMI2_SDA
19 10R HDMI1_HPDIN HDMI1_CLKN J3 RXBCKN RXDCKN F3 17 R98
1 2 HDMI0_HPDIN R85 HDMI2_CLKN

R33
J2 F2

1k2
R72 1 2
HDMI1_CLKP RXBCKP RXDCKP 18

GPIO55/LED[0]

GPIO56/LED[1]
1k HDMI2_CLKP HDMI2_5V
2

HDMI1_SCL U5 DDCDB_CK DDCDD_CK R6 19 10R

HDMI2_SCL 3 1 2 HDMI2_HPDIN
R19

R25

R14

U6 T4
47k

47k

47k

HDMI1_SDA DDCDB_DA DDCDD_DA HDMI2_SDA R40 R166

2
T5 R5 Q4

1k2
R8
2
HOTPLUGB HOTPLUGD 2 1

DM_P0

DM_P1
1k

DP_P0

DP_P1

R31

R30

R32
BC848B

47k

47k

47k
1

3
R86
T6

RN
RP
TN

TP
R84 CEC 100R CEC 1

CN4 Q5 2

1
1 2
1k
BC848B

AD12
AC13
21 3V3_VCC

D1
D2

C5
C4
C6
B5
B4

A6
1
20 R61
1 1
10R HDMI1_RX2P

R130

R125
5k1

5k1
2 R54
3 1
10R
2
HDMI1_RX2N ETH_RXN

USB2_DN

USB1_DN
USB2_DP

USB1_DP
4 1
10R HDMI1_RX1P ETH_RXP
5 R53 R56 ETH_YEL
6 HDMI1_RX1N
HDMI2

1 2
10R ETH_TXP
7 2
10R HDMI1_RX0P ETH_GRN
8 R57 R55 ETH_TXN
9 1
10R
2
HDMI1_RX0N
10 10R HDMI1_CLKP

R116

R122
1

5k1

5k1
11 R52 R58
12 1
10R
2
HDMI1_CLKN
13 CEC
14 R59
15 1
10R
2
HDMI1_SCL
16 1
10R 2
HDMI1_SDA
17 R60
18 HDMI1_5V
19 1
10R 2 HDMI1_HPDIN
R51
2

2
R23

R24

R22
47k

47k

47k
1

3V3_STBY
R107
15k 12V_VCC

3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
2

R258

3V3_STBY
R13
4k7

220R 5V_VCC
R611
1

U28 2 1
24V_VCC_AU
33k
MAX809LTR
3
C626 C562

BAW56
10k
R108

VCC
10k

1 2
1u 100n

D26
RST GND R188
2

16V 16V
10k 12V_VCC
R129

R123

R142

2 1 330k
4k7

4k7

4k7
R5
1 2

R185
10k
2

1 2
1

R186
R128

R110

R144

3V3_STBY
R12
4k7

4k7

4k7

4k7

AUX_RESET
R192
1

C7 K5
2
10k
1
1
10k 2 3V3_VCC_TUNER
USB_ENABLE1 GPIO36 GPIO6 PROTECT R712
E3 M5

PROTECT
USB_ENABLE2 GPIO37 GPIO7/PM_UART1_TX LED1

BAW56
DVD_IR_ON/OFF F5 GPIO38 GPIO8 K6

D24
LED2
PCM_CD1 B6 GPIO39 GPIO12/CSZ1 L5 SPI_CS
E2 J4 5V_VCC

TP7
GPIO40 GPIO10 STBY_ON/OFF_NOT 10k
D5 M4 BC858B 3V3_VCC
EXT_RESET GPIO41 GPIO11/PM_UART1_RX 4k7 DVD_WAKEUP
1 2

B7 M7
1 2
Q35R191 R195
GPIO42 GPIO13 PC_DET R11 1 2
10k
4k7 M6 10k 1 2
3V3_STBY 1 2 GPIO14 FLASH_WP R194
AMP_MUTE R126 D4 GPIO43/UART2_TX GPIO15 K4 R114

2
TOUCHPAD_SCL
E4 D3 C52

R183
GPIO44/UART2_RX GPIO16 100R AUX_RESET 2

10k
D7 L6 100n R190
HP_DETECT GPIO45 GPIO17 R261 TOUCHPAD_SDA 1

D6 N6 10V 1
10k
2

3D_ENABLE GPIO46 GPIO18 100R HP_MUTE

1
B8 Q8 R343
CI_PWR_CTRL GPIO47/UART4_TX R127
A8 BC848B 100R
R697 GPIO48/UART4_RX 1
4k7
2
3V3_STBY
F7 Q7
1k GPIO49 9

2
A9 N24 BC848B R342 1V8_VCC_TUNER

R189
R715 GPIO51 PWM0 PWM0

10k
PANEL_VCC 2k7 F4 GPIO52 U4 PWM1 N25 PWM1
100R
P23 Q36
R168 MSD8WB9BX PWM2

1
C3 N23 BC848B
3V3_VCC HDMI2_5V 18k R662 GPIO58 PWM3 BACKLIGHT_DIM
A3 F6
HDMI1_5V
HDMI0_5V
R663
18k
18k
B3
GPIO61
GPIO62 GPIO PWM_PM PWM_OUT_LED3
2

1V2 - 1V25 -1V5 - 2V5 - 3V3 FROM ICs POWER GOOD PINS
BACKLIGHT_ON/OFF

R121

AA18
4k7

TUNER_RST GPIO131
U22 G5
PANEL_VCC_ON/OFF
AB22
GPIO132 SAR0
H5 KEYBOARD SHORT CCT PROTECTION
1

R119 S27 NC GPIO133 SAR1

T22 H6
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1
NC_0

4k7 GPIO134 SAR2 SC_PIN8

W21 GPIO135 SAR3 J6 DVD_SENSE
33R R737
33R R738

Q10
AE25
AE1

2 1
U23

4k7
A25
T25
T24
T23

A1
R614

R613

R214

R111

R260

R109

R143

BC848B
33k

33k

33k

4k7
4k7

4k7

4k7

R120
2

2
R140
4k7
C5V6
D19

3V3_VCC
3V3_VCC
1

3V3_STBY
2

3V3_VCC
4k7

4k7
R4

R3
USB_OCD1

USB_OCD2
3V3_VCC

2 2012-12-17

HDMI/GPIO protection
17mb95s

19420_504_130312.eps
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 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 28

10-2-2 B02, MStar, DDR3

B02 MStar, DDR3

B02
1V5_VCC 1V5_VCC

C257 C258 C259 C260 C261 C262 C264 C265 C266 C268
1k DDR0_VREFCA 1k DDR1_VREFDQ 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n
R410 R408 F12 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1V5_VCC 1V5_DDR0

R411

C247

C323

R409

C246

C322
16V

50V

16V

50V
60R

100n

100n
1k

1k
C213 C248 C249 C250 C251 C252 C253 C254 C255 C256

1n

1n
10u 100n 100n 100n 100n 100n 100n 100n 100n 100n
1V5_VCC 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1V5_VCC

1k DDR0_VREFDQ
R414 1k DDR1_VREFCA
R413
R415

C267

C325
16V

50V
100n
1k

1n

R412

C263

C324
16V

50V
100n
1k
C278 C279 C280 C281 C282 C283 C284 C285 C286 C287

1n
100n 100n 100n 100n 100n 100n 100n 100n 100n 100n
F13 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1V5_VCC 1V5_DDR1
60R C214 C269 C270 C271 C272 C273 C274 C275 C276 C277
10u 100n 100n 100n 100n 100n 100n 100n 100n 100n PL1
10V 16V 16V 16V 16V 16V 16V 16V 16V 16V

GROUND TERMINALS
PL4

PL3

PL2

1V5_DDR0
U4 1V5_DDR1
MSD8WB9BX
DDR0_A00 A11 A_DDR3_A0 B_DDR3_A0 B23 DDR1_A00
C14 1 D25
DDR0_A01 A_DDR3_A1 B_DDR3_A1 DDR1_A01
B11 F22
G7
D9

N1
N9
R1
R9

C1
C9
D2

H2
H9
B2

K2
K8

A1
A8

E9
F1

DDR0_A02 A_DDR3_A2 B_DDR3_A2 DDR1_A02

F12 G22

G7
D9

N1
N9
R1
R9

C1
C9
D2

H2
H9
B2

K2
K8

A1
A8

E9
F1
DDR0_A03 A_DDR3_A3 B_DDR3_A3 DDR1_A03
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

N3 C15 E24
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

DDR0_A00 A0 DDR0_A04 A_DDR3_A4

DDR3 B_DDR3_A4 DDR1_A04

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
P7 E12 F21 N3

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
DDR0_A01 A1 DDR0_A05 A_DDR3_A5 B_DDR3_A5 DDR1_A05 DDR1_A00 A0
DDR0_A02 P3 A2 DDR0_A06 A14 A_DDR3_A6 B_DDR3_A6 E23 DDR1_A06 DDR1_A01 P7 A1
DDR0_A03 N2 A3 DDR0_A07 D11 A_DDR3_A7 B_DDR3_A7 D22 DDR1_A07 DDR1_A02 P3 A2
DDR0_A04 P8 A4 VREF_DQ H1 DDR0_VREFDQ DDR0_A08 B14 A_DDR3_A8 B_DDR3_A8 D24 DDR1_A08 DDR1_A03 N2 A3
DDR0_A05 P2 A5 VREF_CA M8 DDR0_VREFCA DDR0_A09 D12 A_DDR3_A9 B_DDR3_A9 D21 DDR1_A09 DDR1_A04 P8 A4 VREF_DQ H1 DDR1_VREFDQ
DDR0_A06 R8 A6 DDR0_A10 C16 A_DDR3_A10 B_DDR3_A10 C24 DDR1_A10 DDR1_A05 P2 A5 VREF_CA M8 DDR1_VREFCA
DDR0_A07 R2 A7 DQL0 E3 DDR0_DQL0 DDR0_A11 C13 A_DDR3_A11 B_DDR3_A11 C25 DDR1_A11 DDR1_A06 R8 A6
DDR0_A08 T8 A8 DQL1 F7 DDR0_DQL1 DDR0_A12 A15 A_DDR3_A12 B_DDR3_A12 F23 DDR1_A12 DDR1_A07 R2 A7 DQL0 E3 DDR1_DQL0
DDR0_A09 R3 A9 DQL2 F2 DDR0_DQL2 DDR0_A13 E11 A_DDR3_A13 B_DDR3_A13 E21 DDR1_A13 DDR1_A08 T8 A8 DQL1 F7 DDR1_DQL1
DDR0_A10 L7 A10/AP DQL3 F8 DDR0_DQL3 B13 A_DDR3_A14 B_DDR3_A14 D23 DDR1_A09 R3 A9 DQL2 F2 DDR1_DQL2
DDR0_A11 R7 A11 DQL4 H3 DDR0_DQL4 DDR1_A10 L7 A10/AP DQL3 F8 DDR1_DQL3
DDR0_A12 N7 A12/BC DQL5 H8 DDR0_DQL5 DDR0_DQL0 D17 A_DDR3_DQL0 B_DDR3_DQL0 L23 DDR1_DQL0 DDR1_A11 R7 A11 DQL4 H3 DDR1_DQL4
DDR0_A13 T3 A13 DQL6 G2 DDR0_DQL6 DDR0_DQL1 G15 A_DDR3_DQL1 B_DDR3_DQL1 J24 DDR1_DQL1 DDR1_A12 N7 A12/BC DQL5 H8 DDR1_DQL5
DQL7 H7 DDR0_DQL7 DDR0_DQL2 B21 A_DDR3_DQL2 B_DDR3_DQL2 L24 DDR1_DQL2 DDR1_A13 T3 A13 DQL6 G2 DDR1_DQL6
J1 NC1 DDR0_DQL3 F15 A_DDR3_DQL3 B_DDR3_DQL3 J23 DDR1_DQL3 DQL7 H7 DDR1_DQL7
L1 NC2 DQU0 D7 DDR0_DQU0 DDR0_DQL4 B22 A_DDR3_DQL4 B_DDR3_DQL4 M24 DDR1_DQL4 J1 NC1
M7 NC3 DQU1 C3 DDR0_DQU1 DDR0_DQL5 F14 A_DDR3_DQL5 B_DDR3_DQL5 H23 DDR1_DQL5 L1 NC2 DQU0 D7 DDR1_DQU0
L9 C8 A22 M23 M7 C3
U7
DDR0_CKB

NC4 DQU2 DDR0_DQU2 DDR0_DQL6 A_DDR3_DQL6 B_DDR3_DQL6 DDR1_DQL6 NC3 DQU1 DDR1_DQU1
DDR0_CK

T7 C2 D15 K23 L9 C8
U8

DDR1_CKB
NC5 DQU3 DDR0_DQU3 DDR0_DQL7 A_DDR3_DQL7 B_DDR3_DQL7 DDR1_DQL7 NC4 DQU2 DDR1_DQU2

DDR1_CK
J9 A7 T7 C2
NC6 H5TQ2G63BFR-PB DQU4
A2
DDR0_DQU4
G16 G21 J9
NC5 DQU3
A7
DDR1_DQU3
M2
DQU5
B8
DDR0_DQU5 DDR0_DQU0
B20
A_DDR3_DQU0 B_DDR3_DQU0
L22
DDR1_DQU0 NC6 H5TQ2G63BFR-PB DQU4
A2
DDR1_DQU4
DDR0_BA0 BA0 DQU6 DDR0_DQU6 DDR0_DQU1 A_DDR3_DQU1 B_DDR3_DQU1 DDR1_DQU1 DQU5 DDR1_DQU5
DDR0_BA1 N8 BA1 DQU7 A3 DDR0_DQU7 DDR0_DQU2 F16 A_DDR3_DQU2 B_DDR3_DQU2 H22 DDR1_DQU2 DDR1_BA0 M2 BA0 DQU6 B8 DDR1_DQU6
DDR0_BA2 M3 BA2 DDR0_DQU3 C21 A_DDR3_DQU3 B_DDR3_DQU3 K20 DDR1_DQU3 DDR1_BA1 N8 BA1 DQU7 A3 DDR1_DQU7
DQSL_0 F3 DDR0_DQSL DDR0_DQU4 E16 A_DDR3_DQU4 B_DDR3_DQU4 H20 DDR1_DQU4 DDR1_BA2 M3 BA2
J7 CK_0 DQSL_1 G3 DDR0_DQSLB DDR0_DQU5 A20 A_DDR3_DQU5 B_DDR3_DQU5 L21 DDR1_DQU5 DQSL_0 F3 DDR1_DQSL
K7 CK_1 DDR0_DQU6 D16 A_DDR3_DQU6 B_DDR3_DQU6 H21 DDR1_DQU6 J7 CK_0 DQSL_1 G3 DDR1_DQSLB
DQSU_1 B7 DDR0_DQSUB DDR0_DQU7 C20 A_DDR3_DQU7 B_DDR3_DQU7 K21 DDR1_DQU7 K7 CK_1
DDR0_CKE K9 CKE DQSU_0 C7 DDR0_DQSU DQSU_1 B7 DDR1_DQSUB
R321

R322
56R

56R

DDR0_CASB A12 A_DDR3_CASZ B_DDR3_CASZ B24 DDR1_CASB DDR1_CKE K9 CKE DQSU_0 C7 DDR1_DQSU

R323

R324
56R

56R
L2 CS DML E7 DDR0_DML DDR0_RASB B12 A_DDR3_RASZ B_DDR3_RASZ B25 DDR1_RASB
DMU D3 DDR0_DMU DDR0_WEB C12 A_DDR3_WEZ B_DDR3_WEZ A24 DDR1_WEB L2 CS DML E7 DDR1_DML
DDR0_RASB J3 RAS DDR0_DML E15 A_DDR3_DML B_DDR3_DML H24 DDR1_DML DMU D3 DDR1_DMU
DDR0_CASB K3 CAS ODT K1 DDR0_ODT DDR0_DMU A21 A_DDR3_DMU B_DDR3_DMU L20 DDR1_DMU DDR1_RASB J3 RAS
C342

16V

L3 E14 D20 K3 ODT K1

10n

DDR0_WEB WE DDR0_ODT A_DDR3_ODT B_DDR3_ODT DDR1_ODT DDR1_CASB CAS DDR1_ODT

C343
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

16V
F13 G20 L3
VSS_10
VSS_11
VSS_12

10n
DDR0_BA0 A_DDR3_BA0 B_DDR3_BA0 DDR1_BA0 DDR1_WEB WE
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
T2 B15 F24

VSS_10
VSS_11
VSS_12
DDR0_RESETB RESET DDR0_BA1 A_DDR3_BA1 B_DDR3_BA1 DDR1_BA1

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
R418 L8 ZQ DDR0_BA2 E13 A_DDR3_BA2 B_DDR3_BA2 F20 DDR1_BA2 DDR1_RESETB T2 RESET
240R DDR0_RESETB F11 A_DDR3_RESET B_DDR3_RESET E20 DDR1_RESETB R421 L8 ZQ
B16 F25
M1
M9
G8

G1
G9
D1
D8
A9
B3
E1

P1
P9

B1
B9

E2
E8
T1
T9

F9
J2
J8

DDR0_CKE A_DDR3_CKE B_DDR3_CKE DDR1_CKE 240R

C17 G25

M1
M9

G1
G9
G8

D1
D8
A9
B3
E1

P1
P9

B1
B9

E2
E8
T1
T9

F9
J2
J8
DDR0_CK A_DDR3_MCLK B_DDR3_MCLK DDR1_CK
DDR0_CKB A17 A_DDR3_MCLKZ B_DDR3_MCLKZ G23 DDR1_CKB
DDR0_DQSL B19 A_DDR3_DQSL B_DDR3_DQSL K24 DDR1_DQSL
DDR0_DQSLB C18 A_DDR3_DQSLB B_DDR3_DQSLB K25 DDR1_DQSLB
DDR0_DQSU B18 A_DDR3_DQSU B_DDR3_DQSU J21 DDR1_DQSU
DDR0_DQSUB A18 A_DDR3_DQSUB B_DDR3_DQSUB J20 DDR1_DQSUB

2 2012-12-17

MStar, DDR3
17mb95s

19420_505_130312.eps
130312

2013-Mar-15 back to
div. table
 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 29

10-2-3 B03, CI, Ethernet, Nand

B03 CI, Ethernet, Nand

Place these resistors C21
B03
NAND_ALE R21 NF_ALE PCM_D[0]/NF_AD[0] V20 PCMNANDD0 close to MSTAR 100n

Ethernet lines must be 100ohm differential pairs

R169

R170
47R

47R
1 NC1 NC29 48 NAND_WPZ W20 NF_WPZ PCM_D[1]/NF_AD[1] AD22 PCMNANDD1 16V
Y20 AB21

3V3_NAND
NAND_CEZ NF_CEZ PCM_D[2]/NF_AD[2] PCMNANDD2 CN10
2 NC2 NC28 47 NAND_CLE AC21 NF_CLE PCM_D[3]/NF_AD[3] AE17 PCMNANDD3
NAND_REZ P21 NF_REZ PCM_D[4]/NF_AD[4] AC18 PCMNANDD4 ETH_TXP 1 TD+
3 NC3 NC27 46 NAND_WEZ P22 NF_WEZ PCM_D[5]/NF_AD[5] AE18 PCMNANDD5
NAND_RBZ Y21 NF_RBZ PCM_D[6]/NF_AD[6] AA19 PCMNANDD6 ETH_TXN 2 TD-
4 NC4 NC26 45 P20 NF_CEZ1 PCM_D[7]/NF_AD[7] AD18 PCMNANDD7 Place these capacitors
R883 close to transformer 3 TCT
5 NC5 I/O7 44 75R PCM_NAND_D7 PCM_A[0] AA21 PCMA0 speed nets, except for the
R574 Y22 chassis ground. 4
3k9 CI/NAND
R882 PCM_A[1] PCMA1 ETH_RXP RD+
6 NC6 I/O6 43 75R PCM_A[2] R20 PCMA2 Also keep traces short and
PCM_NAND_D6
R881 4 PCM_A[3] W19 PCMA3 route as matched length ETH_RXN 5 RD-
7 42 T20
NAND_RBZ RB I/O5 75R PCM_NAND_D5 PCM_A[4] PCMA4 differential pairs. Do not place
AA22 6
R880 U4 PCM_A[5] PCMA5 any parts or traces under the RCT

R171

R172
47R

47R
8 R I/O4 41 75R PCM_A[6] V21 PCMA6
NAND_REZ PCM_NAND_D4 transformer.
AB16 7
9 40
MSD8WB9BX PCM_A[7]
W22
PCMA7
Place these resistors
NC1
NAND_CEZ E NC25 PCM_A[8] PCMA8
SPI_CLK A2 SPI_CK PCM_A[9] AE20 PCMA9 close to MSTAR C22
8 NC2
10 NC7 NC24 39 SPI_DI B2 SPI_DI PCM_A[10] AD19 PCMA10 100n
B1 SPI_DO PCM_A[11] AB17 PCMA11 16V ETH_GRN 510R 9 GR+
SPI_DO
11 NC8 NC23 38 C2 TEST1 PCM_A[12] AB20 PCMA12 R134
C1 AC20 10
12
U13 SPI_CZ PCM_A[13]
AE21
PCMA13 F52 TP32 GR-
3V3_NAND VDD1 VDD2 37 3V3_NAND PCM_A[14] PCMA14 2V5_VCC

R240
60R 11

10k
NAND128-A 1u C127 C20ETH_YEL 510R YL+
13 VSS1 VSS2 36 PCM_IRQA_N Y19 100n R137
PCMIRQA
PCM_OE_N AD20 PCMOE 16V 16V 12 YL-
14 NC9 NC22 35 PCM_IORD_N AC19 PCMIORD
PCM_CE_N AB18 PCMCE 13 SHLD1
15 NC10 NC21 34 PCM_WE_N AD21 PCMWE

3V3_STBY
PCM_CD_N AB19 14 SHLD2
PCMCD2
16 CL NC20 33 PCM_RST T21 PCMRST
NAND_CLE
R879 PCM_REG_N AA20 PCMREG
17 AL I/O3 32 75R PCM_IOWR_N Y18 PCMIOWR
NAND_ALE PCM_NAND_D3
U21

TP64
BSH103
R878 PCM_WAIT_N PCMWAIT

10p C451
18 W I/O2 31 75R
NAND_WEZ PCM_NAND_D2

Q30
R877

50V
19 WP I/O1 30 75R F15
NAND_WPZ PCM_NAND_D1

1
R876
MSTAR SPI FLASH 5V_VCC CI_PWR R586

C101
2

100n
20 29 60R

10V
NC11 I/O0 75R PCM_NAND_D0 C3 C99 C100 TS0CLK 33R TS0_CLK

C149
6V3
2 2

220u
1N5819 10u 100n 100n

1
TP113
21 28 10V
1 1

C1197
2

1
NC12 NC19 3V3_STBY 10V 10V R504

10V
10u
3V3_STBY D5 TS1CLK 33R TS1_CLK
22 NC13 NC18 27 C98

TP114
C44810p R590

R153
23 26

4k7
NC14 NC17 6V3 R316 R317 33R
100n 22u 8 1
10V 12V_VCC 1
47k
2 1
47k
2
50V TS0D3 R1 TS0_D3
24 NC15 NC16 25 R507
U10
33R
MX25L512 3
7 R2 2 TS0_D4
SPI_CS C4 R242 TS0D4
R506 1 CS# VCC 8 R808 CI_PWR_CTRL 1 2 2
Q31
10k
33R 2 SO HOLD# 7 4k7 R509 BC847B 6 R3 3 TS0_D5
SPI_DO TS0D5
3 WP# SCLK 6 33R
1

SPI_CLK R585
F51 3V3_NAND TP115 4 GND SI 5 TP110 33R 5 R4 4 TS0_D6
1
TS0D6
3V3_VCC TP116 8 1 TS1_D5
TS1D5 R1
60R 6V3 R505 TP117 R508
100n C291 100n C292 R589
7 R2 2
C210
22u 16V 16V
FLASH_WP 33R

R152 1
33R

TP109
SPI_DI
RESET TS0VLD

TS1D7
6 R3 3
TS0_VLD

TS1_D7
TS0D7
8
33R
R1
7 R2 2
1 TS0_D7

3V3_STBY 4k7 TS1SYNC TS1_SYNC

5 R4 4 TS1_D6
S221 TS1D6
R331 6 R3 3 TS1_D0
TS1D0
3V3_STBY 1k
5 R4 4 TS1_D1
3V3_VCC TS1D1

C103
2

10V
100n
R510

1
PCMCD2 33R PCM_CD2 C394 R587 R588

R243
10k
22u 33R 33R
R577 R584 CN9 16V TS0SYNC
8
R1
1 TS0_SYNC TS1D2
8
R1
1 TS1_D2
33R 33R R503 35 1 RESET
1 8 PCM_NAND_D2 1 8 PCM_A6 PCM_CD1 33R 36 2 7 R2 2 TS0_D0 7 R2 2 TS1_D3
PCMNANDD2 R1 PCMA6 R1 PCM_NAND_D3 TS0D0 TS1D3

1N4148
TS0_D3 37 3 PCM_NAND_D4 C102

R245
2 R2 7 2 R2 7 2
6 R3 3 6 R3 3

10k
D3
PCMNANDD1 PCM_NAND_D1 PCMA7 PCM_A7 TS0_D4 38 4 PCM_NAND_D5 100n TS0D1 TS0_D1 TS1D4 TS1_D4
1

TS0_D5 39 5 PCM_NAND_D6 10V

3 R3 6 PCM_NAND_D0 PCMIRQA 3 R3 6 40 6 5 R4 4 TS0_D2 5 R4 4 TS1_VLD
PCMNANDD0 PCM_IRQA TS0_D6 PCM_NAND_D7 TS0D2 TS1VLD
3V3_VCC 4k7 TS0_D7 41 7 PCM_CE

C390

50V
4 R4 5 4 R4 5

33p
PCMA0 PCM_A0 PCMA12 PCM_A12 R76 42 8 PCM_A10 TP211
4k7 43 9 PCM_OE RESET 2
100R 1

R184 44 10 R361 N5 RESET TS1_D[0] AC14 TS1D0

R578 PCM_IORD PCM_A11 CI_PWR
33R 45 11 24MHz TS1_D[1] AD14 TS1D1
R583 PCM_IOWR PCM_A9
1 8 PCM_NAND_D6 33R 4k7 46 12 TS1_D[2] AE14 TS1D2
PCMNANDD6 R1 3V3_VCC TS1_SYNC PCM_A8

R154

R395
1 8 3 2 AE3 AD15

1M
4k7
PCMWE R1 PCM_WE R716 TS1_D0 47 13 PCM_A13 XIN TS1_D[3] TS1D3
2 R2 7 4 1 AE2 AC15
PCMNANDD5 PCM_NAND_D5 3V3_VCC 4k7 TS1_D1 48 14 PCM_A14 XOUT TS1_D[4] TS1D4

33p C391
2 R2 7 PCM_A14 R735 49 15 X10 TS1_D[5] AD16 TS1D5
PCMA14 TS1_D2 PCM_WE S65
3 R3 6 PCM_NAND_D4 50 16 PCM_IRQA TS1_D[6] AD17 TS1D6
PCMNANDD4 TS1_D3

50V
3 R3 6 PCM_A13 51 17 100R G4 IRIN TS1_D[7] AC17 TS1D7
PCMA13 CI_PWR CI_PWR IR_IN 2 1

4 R4 5 PCM_NAND_D3 52 18 R362 D36 8 TS1_CLK AC16 TS1CLK

PCMNANDD3
4 R4 5 PCM_A8 53 19
1 2
TS1_VLD AE15 TS1VLD
PCMA8 TS1_D4 TS1_VLD
AD13
R579 C37810p TS1_D5 54 20 TS1_CLK R150 C5V6 U4 TS1_SYNC TS1SYNC
33R R582 TS1_D6 55 21 PCM_A12 3V3_STBY 4k7
1 8 C392 Y16
3V3_STBY MSD8WB9BXTS0_D[0]
12p
PCMA1 R1 PCM_A1 33R 50V TS1_D7 56 22 PCM_A7 50V 4k7 TS0D0
1 8 PCM_A9 57 23 R151 TS0_D[1] AA17 TS0D1
PCMA9 R1 TS0_CLK PCM_A6
2 R2 7 PCM_A2 58 24 nc UART-RX-SC P5 DDCA_CK/UART0_RX TS0_D[2] AA16 TS0D2
PCMA2 PCM_RST PCM_A5
2 R2 7 PCM_IOWR PCM_WAIT 59 25 UART-TX-SC R4 DDCA_DA/UART0_TX TS0_D[3] Y13 TS0D3
PCMIOWR PCM_A4
3 R3 6 PCM_A3 60 26 R23 UART3_RX/GPIO64 TS0_D[4] AA13 TS0D4
PCMA3 PCM_A3
3 R3 6 PCM_A11 61 27 P24 UART3_TX/GPIO65 TS0_D[5] AA14 TS0D5
PCMA11 PCM_REG PCM_A2
R155

4 R4 5 AB14
4k7

PCMREG PCM_REG TS0_VLD 62 28 PCM_A1 TP209 TS0_D[6] TS0D6

4 R4 5 PCM_OE 63 29 TP210 TS0_D[7] AA15 TS0D7
PCMOE TS0_SYNC PCM_A0
64 30 TS0_CLK AB15 TS0CLK
R580 TS0_D0 PCM_NAND_D0
33R CI_PWR 65 31 SYS_SCL R24 DDCR_CK TS0_VLD Y15 TS0VLD
R581 TS0_D1 PCM_NAND_D1
PCMWAIT 1 8 33R 66 32 SYS_SDA R25 DDCR_DA TS0_SYNC Y14 TS0SYNC
R1 PCM_WAIT TS0_D2 PCM_NAND_D2
1 8 PCM_IORD PCM_CD2 67 33 4k7
PCMIORD R1 CI_PWR

1
2 R2 7 PCM_A4 68 34 R320
PCMA4

R157

R156
2 R2 7

4k7

4k7
PCMA10 PCM_A10
R244

3 R3 6
10k

PCMA5 PCM_A5
3 R3 6

2
PCMCE PCM_CE
4 R4 5 PCM_RST 3V3_VCC
PCMRST
4 R4 5 PCM_NAND_D7
PCMNANDD7 3V3_VCC

2 2012-12-17

CI, Ethernet, Nand

17mb95s

19420_506_130312.eps
130312

2013-Mar-15 back to
div. table
 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 30

10-2-4 B04, Tuner, USB, WiFi

B04 Tuner, USB, WiFi

B04
220n
C566 C113 L5
RF_IN_P

2
47p 120p S87

180R
F67
JK11 4 3 50V 50V

270n
ESD0P8RFL

L4
S84

3
RF_IN_N F86
USB & WIFI

390n
D8

1k

L1
L6 3V3_VCC
30067048 60R R333 1 TP96

C112

C110
220n

50V

10V
120p

100n
R797 60R
1 2
9k1 IF_AGC 4 1 2

F6
3
1 TP91 R74
R307 2 6 IO4 IO1 1 1 2

S100 10R USB2_DP

24 MHz IF_AGC 100R D_IF_AGC TP92 U1
27MHzCRYSTAL
1

1
1 2
USB1_VCC 5 VDD GND 2

C162

C159
RF_IN_N

3V3_VCC_SI

3V3_VCC_SI
RF_IN_P

16V

10V
C12 330R

100n
AZ099-04S

22n
C143 USB1_VCC R311

1
2 3 4 IO3 3
CN17 10u 10u F69 IO2 1
10R
2
USB2_DN
1 4

TP97
10V 10V
X1 Close To Concept IC Close To SI2156 R309
1 2

60R 10R USB1_DN

1 2 R310
4 1 TP98 F5 1
10R
2
USB1_DP

RF_SHLD1 24
23

22

RF_SHLD 21

VDD_H2 20

VDD_H1 19
18

XTAL_O 17
4 1 TP100
SH1 3

RF_IN
3 TP101
RF_IP

XTAL_I
1

25 GND1 XOUT 16 2

2
2 F70 330R
26 GND2 BCLK 15 1
1 2
USB2_VCC
1 C114 F11 330R

1
27 VDD_L 14 CN18
TUNER
1 2
GND3 1V8_VCC_SI 10u C115 5V_VCC
CN19

TP99
S99 10V 10u F50 330R
28 13
50V
12p
GPIO U18 DLIF_P DIGITAL_IF_P 10V 1 2
3V3_VCC

C158

10V
29 12
SI2156

100n
INTB DLIF_N R308
NC
C1 470R S98
TUNER_RST 30 RSTB ALIF_P 11 DIGITAL_IF_N 16V
R187
33R 100n C160 16V

R312
820R
750R
31 VDD_H 10
DLIF_AGC
ALIF_AGC

R196 GND4
10k 3V3_VCC_SI
VDD_D
VDD_S

C161 100n
ADDR

3V3_VCC_SI 32 VDD_IO ALIF_N 9 R73 5V_VCC 1 IN OUT 6 5V_VCC 1 IN OUT 6

GND

USB1_VCC USB2_VCC
SDA
SCL

470R U22 U2
2 GND ILIM 5 560R 2 GND ILIM 5 560R
C6 TPS2553-1 R267 TPS2553-1 R193
1

S83 3 EN
TUNER_SCL USB_ENABLE1 FAULT 4 560R USB_ENABLE2
3 EN FAULT 4 560R
12p 3V3_VCC_SI S92 D_IF_AGC R259 R75
1V8_VCC_SI

NC:1100000(R:1,W:0)
S89 S69
TUNER_SDA 3V3_VCC_SI
12p C10

S82

F65
1 2

1V8_VCC_SI
1V8_VCC_TUNER60R C156 C155 C165
1n2 1n2 100n OPTIONAL RESISTORS
U14 50V 50V 16V
LM1117
F164 TP111 1

1 2 3 IN OUT 2 3V3_VCC_TUNER F68 3V3_VCC_SI

3V3_VCC 1V8_VCC_TUNER

2
pin14 pin4

OPTIONAL
60R

R556

R557

R558
1 2

75R

75R

75R
C15

2
ADJ VOUT
C449

C435
2
6V3

6V3

60R
100u

R560
10u

100n

75R
C157 C163 C164 C144 C153 C154
R603
100R

1 4 16V 16V C188 R596

1n2 4n7 100n 1n2 1n2 1n2 47n Y3 Y5

1
50V 50V 50V 50V 50V 68R RIN0M VCOM 68R
C186 16V47n W2 47n

1
VGA_R R595 33R RIN0P R513
Y4 16V C187
1

R606 S75 C196 16V W1 SC_CVBS_IN

1 2 68R R519 GIN0M CVBS0 33R R517
1
47R
2
pin20 pin19 pin10 pin32 pin1 C185 47n W3 W5 47n C195
VGA_G R594 33R GIN0P CVBS1 R520 33R SAV_CVBS
C184 16V V2 W4 C197
68R R512 BIN0M CVBS2 33R R518 SC_R
R593 33R
C183 47n V3 BIN0P CVBS3 AB5 47n 16V C198 33R
U6 VGA_B S66 C182 16V 47n DVD_CVBS
LM1117 R511 V1 SOGIN0
F165 TP112 VGA_G
1
C326 1n AC1 HSYNC0
1 2 3 IN OUT 2 VGA_HSNC CVBS0_OUT
5V_VCC 3V3_VCC_TUNER AC2 VSYNC0 CVBSOUT1 AA4 C106
VGA_VSNC
10V

60R C29 50V S70

ADJ VOUT CVBSOUT2 AB4
C624

C440

DIGITAL_IF_P
2

6V3
100u

100n 47n AB2

R604
100R

1 4 16V 68R RIN1M 5 100n

10u

C190 16V47n AB1 AE6

SC_R R597 33R RIN1P IP 10V
68R R514
C189 16V AB3 GIN1M U4 IM AD6
1

R609 C191 47n AA1

2
100R 1 68R SC_G R598 33R
C192 16V AA3
GIN1P MSD8WB9BX AD7
C107 S71
R407 68R R515 BIN1M VIFP 10V DIGITAL_IF_N
C193 47n Y2 AC7
SC_B
SC_CVBS_IN
R599
S68 33R
R516
C194 16V
C329 1n
AA2
AC3
BIN1P
SOGIN1
HSYNC1
VIDEO VIFM

SIFP AC8
100n

SC_FB AC4 VSYNC1 SIFM AD8

47n AA8
68R RIN2M IFAGC AC5 IF_AGC
C200 16V47n Y7
PR_IN R600 33R RIN2P RFAGC AD5 R364
C199 16V AA7
68R R521 GIN2M 100R
C201 47n Y6 nc
Y_IN R601 33R GIN2P
C202 16V AB6 AD3
68R R522 BIN2M TGPIO0/GPIO73
C203 47n AA6 AD2
PB_IN R602
S67 33R BIN2P TGPIO1/GPIO74
C204 16V AA5 AC6
Y_IN R523 SOGIN2 TGPIO2/GPIO75 TUNER_SCL
AB8 HSYNC2 TGPIO3/GPIO76 AE5
1n TUNER_SDA
C327

1
R161

R162
4k7

4k7
2

2
3V3_VCC

2 2012-12-17

Tuner, USB, WiFi

17mb95s

19420_507_130312.eps
130312

2013-Mar-15 back to
div. table
 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 31

10-2-5 B05, Power

B05 Power
B05
30069495 AP2111 ???
LDO1

C477

C473
BTB U21

50V

50V
4n7

4n7
TP72 1

LM1117
3 IN OUT 2
20 19
5V_STBY 3V3_STBY
R822 DC/DC1

C1213

C1214
ADJ VOUT C119

R647

R646
6V3

6V3
3V3_STBY
2

20k

20k
50V 50V

22u

22u
100n 560R
3V3_VCC 18 17 3V3_VCC 1 4 1

10V 4n7 4n7

50V

FB1

FB3
R821

R658
390k
3V3_STBY 24V_VCC_AU 4n7

18k
16 15

12V_STBY 14 13 12V_STBY C1207

C475
R394
100k
C472
R644
120k 50V
4n7
DC/DC3
FB1
5V_VCC 12 11 5V_VCC

10

1
C1208

C478

R255

ROSC
CMP1

SYNC

CMP3
50V
5V_STBY

10k

SS1

SS3
FB1

FB3
12V_STBY 10 9

RLIM1

RLIM3
4n7
C1187 C460
10u 10u 16V EN1 EN3 16V
11 40
8 7 DIMMING
VIN1 16V 16V 47n 47n

6 5 BACKLIGHT_ON/OFFS33
VDDC
S85 F53 C205
12 BST BST3 39
C207 60R
VIN3
STBY_ON/OFF 12V_VCC
1 2
VIN1 VIN3 12V_VCC

C1212
power_pin3 13 38 2 1

6V3
4 3
VOUT1 60R

22u
F60

C1209
C1210
nc

6V3

6V3
22u

22u
S32 14 LX1_0 LX3_1 37
2 1 power_pin1 STBY_ON/OFF_NOT L39 L38
S25 F1 60R 3V3_VCC
CN3
1V2_VCC
10u 15 LX1_1 TPS65251 LX3_0 36 4u7
1 2

S8 TP105 TP90
24V_VCC_AU
16 LX2_0 U19 GND_2 35 C463 C1191

R167
5k6
TP106 L40 10u 10u
1V5_VCC 17 LX2_1 VIN_2 34 16V 16V
4u7

C1211
VOUT3

6V3
VOUT2

22u
18 VIN2 VIN_1 33
C206
60R
BST2 VIN_0 12V_VCC
19 32

R257

C483
power cable
2 1

50V
C1206

PGOOD

10k
COMP2

LOW_P

4n7
CN2 F58
INVERTER SOCKET

GND_0
47n

RLIM2

AGND
EN2 GND_1 31
!
1V5_DDR0 16V

SS2

V7V

V3V
FB2
20
2 1 S86 C1188 C461 C1189 C1190
CN8 4n7
S5 10u 10u 50V 10u FB3

C479

R256
50V
3V3_VCC

10k
4 3 3V3_VCC 12V_VCC
DC/DC2

21

22

23

24

25

26

27

28

29

30
4n7
1 16V 16V 16V 10u 16V

2
TP38 R645

R335
60R
F59
3V3_STBY 24V_VCC_AU

4k7
6 5 2 FS4 120k
12V_INV C488
FB2

FB2
12V_STBY 8 7 12V_STBY C480 10u

1
3 R652

1
7A/32VDC

S216
16V
TP51 220R
!

R651
5V_VCC
VIN2

7k5
5V_VCC 10 9 4 C30
4n7

12V_VCC
50V 4u7

R648
5V_STBY

20k
12V_STBY 12 11 5 DIMMING R101 10V
560R
14 13 DIMMING

PROTECT
6 BACKLIGHT_ON/OFF

C481
50V
16 15 BACKLIGHT_ON/OFF

4n7
TP37
TP50

18 17 power_pin3

TP52
20 19 power_pin1 NC
S91

LDO2 2V5_VCC STBY_ON/OFF

S90 5V_VCC
S81 R290 R2 R288 STBY_ON/OFF_NOT MOSFET_CONTROL 5V_STBY C137
1 POK GND 8

6
PROTECT 22k 100R 220u
U5 6V3

FDC642P
R45 C152 R289 R197

1
5V_VCC 2 EN FB 7 47k R1 STBY_ON/OFF

Q32
2 1 1 2
10k 3V3_STBY 10k

C135

R217
2

220n

33k
60R APL5910 100n 25V
C24

6V3

3V3_VCC 3 VIN VOUT 6 10V 2V5_VCC

1
1 2
22u R198

5V_VCC

2
F63 TP108 STBY_ON/OFF_NOT 1
10k
2

C25

6V3
4 VCNTL NC 5

1
22u
5V_VCC 2 1
Q11 R174
S6 BC848B 1 2
C151 47R

C5V6
D20
10u

R42
10V
SW2

1k
3V3_VCC
2

Q47 R176 R47

R139

Q22
10k

TPS_ENABLE 1
10k
2
STBY_ON/OFF MOSFET_CONTROL
2
10k
1

R284 BC848B
R164
1

5V_STBY BC848B 12V_STBY

1
10k
2
3k9
2
10k 1 R282
R884 1
10k
2
STBY_ON/OFF_NOT
C1228

6V3

TP89
10k
22u
2 1
S15
4

R163 Q46
BC848B
FDC642P

2k2
ADAPTER SOCKET R77 S10 FS2
Q27

12V_VCC
1
F4
2

DC/DC4 12V_STBY 7A/32VDC

12V_VCC

6
60R
4A
0R
6

FDC642P
F3

1
TP33

1 2
FDC642P

C139 22p 50V

Q29
12V_STBY

C134

R216
2

25V
220n

33k
60R VFB
12V_VCC
Q43

C131 C130 C55

1
R49 22u 22u 100n R96 R15 R38
W_ADAPTER
4

16V 16V 16V

2
12V_VCC
2
10k
1
120k 4k7 22k R173

2
3

1
TP48

FDC642P

5 12V_STBY
2
10k
1
F14 1
47R
2
1

SW1
1 2
R48 5V_VCC
Q28

1
60R F62
TP36

!
4 TPS_ENABLE

R215
1 EN 8

33k
1 2
VIN
3 U9 C92 L3 10u F7 60R
JK2 2 VFB VBST 7
3

1 2

2
TP35 R44 FS1 VFB 16V 5V_STBY
R37

R36
6

60R
22k

22k

1
10k
2
12V_STBY TPS54528 100n C132 C133
2 3 VREG5 SSW 6
FDC642P

TP34 7A/32VDC 22u 22u F10 R46

6V3 6V3
1 2
Q21
Q44

2 1

1 MOSFET_CONTROL 10k
12V_INV 4 VSS GND 5 60R BC848B
R41 C128
1
1k
2 Q19 1u C1229
C129

BC848B
50V
30049469 1.13k

16V
8n2

22u
1

C5
12V_STBY 6V3
R34

R35

Q6
TPS54528
1k2

2k2

220n 10V

BC848B

2 2012-12-17

Power
17mb95s

19420_508_130312.eps
130312

2013-Mar-15 back to
div. table
 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 32

10-2-6 B06, LVDS

B06 LVDS
B06
OPTIONS TABLE PANEL SUPPLY SWITCH
FHD 50Hz 3D FFC S40

TP53
3D_EN 2 1
F30 C140

C96

16V
100n
1 2
R239 100u

OP_PIN43
OP_PIN42

OP_PIN27

OP_PIN11
OP_PIN10
3V3_VCC

OP_PIN9
OP_PIN8
OP_PIN7
OP_PIN6
OP_PIN5
PANEL_VCC 33k OP_PIN5 60R 16V
R89 F29

1
TX_2_CLK_N

TX_1_CLK_N
1 2

TX_2_CLK_P

TX_1_CLK_P
1 2
10k 12V_VCC PANEL_VCC
60R

TX_2_4_N

TX_2_3_N

TX_2_2_N

TX_2_1_N

TX_2_0_N

TX_1_4_N

TX_1_3_N

TX_1_2_N

TX_1_1_N

TX_1_0_N
TX_2_4_P

TX_2_3_P

TX_2_2_P

TX_2_1_P

TX_2_0_P

TX_1_4_P

TX_1_3_P

TX_1_2_P

TX_1_1_P

TX_1_0_P

6
R236 F16

2
PANEL_VCC OP_PIN6 1 2

FDC642P
33k 5V_VCC

C136

R249
2

25V
60R

220n

33k

Q33
R88

1
1 2
10k

1
PANEL_VCC R235

1
PANEL_VCC 33k OP_PIN7 3V3_VCC R175
1 2
R81 47R

CN11
1 2
10k

1
LG BASED 30070519
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

R253

C104
S39

16V
100n
33k
1 2
MEGA_DCR_IN

R283

R94
10k

10k
R221
OP_PIN45
OP_PIN44
OP_PIN43
OP_PIN42
OP_PIN41
OP_PIN40

PANEL_VCC OP_PIN8

2
33k

2
R80
1
10k
2 NC R95
3

S57 Q23
PANEL_VCC 1 2 2
10k
1 2

BC848B
S56 3

MEGA_DCR_OUT
2 1
OP_PIN9 R93
1

Q24

CN12
2
R220 PANEL_VCC_ON/OFF
2
10k
1
C141
BC848B
SAM BASED 30070519 PANEL_VCC OP_PIN9
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
33k 1n

9
8
7
6
5
4
3
2
1
R79
1
50V
1 2
10k

R241
PANEL_VCC 33k OP_PIN10
R87
19" TO 22" DOUBLE LVDS FFC OPTIONS 1
10k
2

LVDS OUT
R248
PANEL_VCC

PANEL_VCC OP_PIN11 U4
TX_2_CLK_N

TX_1_CLK_N
TX_2_CLK_P

TX_1_CLK_P
33k
OP_PIN9

MSD8WB9BX
TX_2_3_N

TX_2_2_N

TX_2_1_N

TX_2_0_N

TX_1_3_N

TX_1_2_N

TX_1_1_N

TX_1_0_N
R91
TX_2_3_P

TX_2_2_P

TX_2_1_P

TX_2_0_P

TX_1_3_P

TX_1_2_P

TX_1_1_P

TX_1_0_P
1 2
10k
6 LVB0P V23 TX_2_0_P
R238 LVB0N U24 TX_2_0_N
PANEL_VCC 33k OP_PIN27 LVB1P V25 TX_2_1_P
R90 LVB1N V24 TX_2_1_N
1
10k
2
LVB2P W25 TX_2_2_P

FFC
LVB2N W23
CN13

TX_2_2_N TX_1_0_N TP88 TX_2_0_N TP80

LVBCKP Y23 TX_2_CLK_P TX_1_0_P
10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30
TP87 TX_2_0_P TP78
1

S54
OP_PIN40 LVBCKN W24 TX_2_CLK_N TX_1_1_N TX_2_1_N
1 2

12V_VCC TP86 TP77

S53 LVB3P AA23 TX_2_3_P TX_1_1_P TP85 TX_2_1_P TP76
OP_PIN41 LVB3N Y24 TX_2_3_N TX_1_2_N
1 2

12V_VCC TP84 TX_2_2_N TP75

LVB4P AA25 TX_2_4_P TX_1_2_P TP83 TX_2_2_P TP74
WXGA FFC 15.6"
3D_EN 2
S35 1
LVB4N AA24 TX_2_4_N
TX_1_CLK_N
TX_1_CLK_N
TX_1_CLK_P

R219 TP82 TX_2_CLK_N TP79

PANEL_VCC 33k OP_PIN42 LVA0P AB25 TX_1_0_P TX_1_CLK_P TP81 TP73
OP_PIN11

OP_PIN27

TX_1_3_N

TX_1_2_N

TX_1_1_N

TX_1_0_N

OP_PIN10
TX_2_CLK_P
PANEL_VCC

TX_1_3_P

TX_1_2_P

TX_1_1_P

TX_1_0_P
OP_PIN7

OP_PIN8

OP_PIN9

OP_PIN6

OP_PIN5
LVA0N AB23 TX_1_0_N
R78
1 2
LVA1P AC25 TX_1_1_P TX_1_3_N TP71 TP67
10k TX_2_3_N
LVA1N AB24 TX_1_1_N TX_1_3_P TP70 TP66
S42 TX_2_3_P
1 2
LVA2P AD25 TX_1_2_P TX_1_4_N TP68 TP57
12V_VCC TX_2_4_N
AC24
SAM PANEL_VCC
R218
33k OP_PIN43
LVA2N
LVACKP AE24
TX_1_2_N
TX_1_CLK_P
TX_1_4_P TP69 TX_2_4_P TP62

LVACKN AD24 TX_1_CLK_N

R50

PANEL_VCC
1 2
LVA3P AE23 TX_1_3_P
10k
LVA3N AC23 TX_1_3_N
FFC

AC22
10_BIT PANEL
CN14

LVA4P TX_1_4_P
S41 AD23
OP_PIN44 TX_1_4_N
10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

1 2

BACKLIGHT_ON/OFF LVA4N
1

S55 S217 S220

DIMMING
1 2
OP_PIN45 1 2
TX_1_4_N 1
2
TX_2_4_N
S218 S219
R246
1 2
TX_1_4_P 1
2
TX_2_4_P
PANEL_VCC 33k

FFC
CN16

R92
LG
10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30
1 2
10k
1

DIMMING 3V3_VCC

R18
1 2 Q34
4k7 2
BC858B
2
R43

C124 3
1k

MEGA_DCR_OUT 1 2 R254
1

220p 100R
8 1
50V R1
S58

7 R2 2
3

S60 R17 DIMMING

BACKLIGHT_DIM 1 2 2
Q25 6 R3 3
4k7
BC848B
C123 1 5 R4 4
S61 3

MEGA_DCR_IN 1 2 R16 C142

1
4k7
2 2
Q26 10u
220p BC848B
50V 16V
C122 1

1 2
2 2012-12-17
220p 50V
LVDS
17mb95s

19420_509_130312.eps
130312

2013-Mar-15 back to
div. table
 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 33

10-2-7 B07, Audio, Headphone

B07 Audio, Headphone

B07
TP93 1 1
S28 S29 2
U4 DSP_MAIN_L_OUT MAIN_L HP_L
CLOSE TO MSTAR IC
MSD8WB9BX 6
C453 TP94 1

R607
200k
LINEIN_L0 Y12 3n3 C1200 R653
7 AA12 50V 3
LINEIN_R0 DSP_SC_L_OUT 5k6 SC_L_OUT HP_R
LINEIN_L2 AA11
1u C548

2
LINEIN_R2 AB11 C586 1n C1226 4
S31 S30 6V3 C1227

R707

R205

R206
AE8 C587

8k2

10k

10k
LINEIN_L3 SC_AUD_L_IN DSP_MAIN_R_OUT MAIN_R 50V 10n 10n TP95 1

AC9 C591 SC_AUD_R_IN 16V 5 JK1

LINEIN_R3 2u2 16V
Y8 C590 SAV_L_IN

1
LINEIN_L4 2u2 C454

R608
200k
LINEIN_R4 Y9 SAV_R_IN 3n3 7
AA10 2u2 C1201
LINEIN_L5 2u2 50V R654
LINEIN_R5 AB9 5k6 R329
DSP_SC_R_OUT SC_R_OUT
1u C549 HP_DETECT 1k 4k7 1 3V3_VCC
EAR_OUTL AA9 OUT_HP_L R202 6V3 1n R147

C5V6
R708

D28
EAR_OUTR Y10

8k2
OUT_HP_R SAV_AUD_L_IN 10k SAV_L_IN 50V
HEADPHONE OUTPUT

TP8
LINEOUT_L0 AC12 SAV_AUD_R_IN 10k SAV_R_IN
DSP_SC_L_OUT
LINEOUT_R0 AE12 R201
DSP_SC_R_OUT
LINEOUT_L2 AC11
DSP_MAIN_L_OUT C501 C502 C599 C598

R398

R397
AD10 C618 C619

12k

12k
LINEOUT_R2 DSP_MAIN_R_OUT 330p 330p 560p 560p L21 L22
LINEOUT_L3 AD11 50V 50V 50V 50V OUT_HP_L HP_L OUT_HP_R HP_R
LINEOUT_R3 AE11 10u 10u
100u 100u
16V 16V

R803
220R

R804
220R
AUVRP AD9 R265 R266
AUVAG AC10 680R Q41 680R Q42
AUVRM AE9 C53 HP_MUTE BC848B HP_MUTE BC848B
C554 C27 C209

10V

10V
1u 4u7 10u 100n Layoutta ust ustte yerlestirilecek...

R262

R263
C1170

C1171
E6

10k

10k
SPDIF_IN DVD_SPDIF 50V 10V 10V 10V
E5

10u

10u
SPDIF_OUT SPDIF_OUT

1N4148
3V3_VCC

VDD_AUDIO

3V3_STBY

R717
S36

3V3_VCC
C8

10k
D1
1 2
I2S_IN_BCK F28 60R
I2S_IN_SD D8
D9 S38 16V
I2S_IN_WS 12V_VCC 1 2

2
R703 100u

R207
B10 S37

10k
I2S_OUT_BCK R709 22R 5V_VCC 1 2 2 1

I2S_OUT_MCK C9 22R R710

I2S_OUT_BCK
I2S_OUT_MCK C546
OPTINAL FOR LINE_OUT

2
C10

1
I2S_OUT_WS R711 22R I2S_OUT_WS C147 C148

R208
NC NC

2
B9 1 14

10k
I2S_OUT_SD 22R I2S_OUT_SD 180p INR_P INL_P 180p

R718

R212

R213
15k

10k

10k
C23 R274 50V R269 R268 50V R275 C19
2 13
POP NOISE CIRCUIT SC_R_OUT C145 C146 SC_L_OUT
50V 22p

50V 22p

50V 22p

50V 22p

1
AUBCK_OUT 15k 47k INR_N INL_N 47k 15k
C614

C615

C616

C617

1
1u 16V R280 R279 16V 1u
30k 47p 50V 3 OUTR OUTL 12 47p 50V 30k
BC858B
Q37 SC_AUD_R_OUT C9 U16 R270 SC_AUD_L_OUT
AMP_EN 4 GND UVP 11 47k

2
R27110u DRV632 R277

R210
2
5 GND1 10

10k
C888 R209 AMP_EN 1
10k
2
MUTE 1
1k
2

R573
Q12

3k9
2 1
R211 100n 10k
AMP_MUTE Q13 BC848B 6 9 NCR281

1
1
10k
2
10V R264 VSS VDD

R278
BC848B

3k3
1
2
10k
1
27k VDD_AUDIO
7 CN CP 8
C18

2
CLOSE TO PIN46 1u F2

R393
100k
C17

1N4148
S2 S4 CLOSE TO PIN35 16V 3V3_VCC

D23
12V_VCC VDD_AUDIO 60R

C7

C8
10u

10u
1
100u 100u C54 C31 1u
S1 D18 C561 C563 10u 10u HP_MUTE
24V_VCC_AU 10V 10V

AUDIO_AVDD
35V 35V
S3 SK24

SC_AUD_R_OUT
C467

SC_AUD_L_OUT
5V_VCC
8W 30067972
2w5 30069845 C466 10k

LINE_R_IN

LINE_L_IN
C181 4n7
2 1

50V R199
470k SC_R_OUT R655 C520 SC_AUD_R_OUT
C1804n7 R696 5k6
50V 47n
470k 16V C612 C613 220p 2
10k 1

47n R695 1u LINE_R_IN 50V R200

C521 CN15
16V 50V 50V SC_L_OUT R656 SC_AUD_L_OUT
1u 5k6 R_AUDIO_P 1

C594
100n
50V
VR_ANA 12

11

10
AUDIO_AVDD TP177 1

4
HPR_OUT 3

1
220p
LINE_L_IN 50V R_AUDIO_N 2

HPVDD

HPL_OUT
HPVSS
CPN
AVSS

CPP
PLL_FLTM

HPR_IN
PLL_FLTP

HPL_IN
TP176 1

3V3_VCC 4k7 13 AVDD HP_PWML 48 L_AUDIO_P 3

C1217
R145 VDD_AUDIO TP178 1

C556
ADRES SECIMI 50V

50V

50V
4k7 14 A_SEL HP_PWMR 47 L_AUDIO_N 4

1u

1u
U12 PT2333 R146 330p R802 F54 60R TP175 1

I2S_OUT_MCK 15 MCLK PVDD_AB 46 18R

GNDA

GNDB
OUTN

VDDA

OUTP
VDD1

LEFT R798 C607 L2 15u

SDB

C611
INN
INP

18k2 16 OSC_RES BST_A 45 L_AUDIO_P

33n 50V A_OUT1A F56 60R
C1

C2

C3
A1

A2

A3

B1

B2

B3

17 DVSSO OUT_A 44
C118 R21 A_OUT1B L13 15u
MAIN_L 4k7 18 VR_DIG TAS5719 PGND_AB 43
C610
L_AUDIO_N
A_OUT1A C28 C242 R801
AMP_EN

220n
R26

U35
4k7

10V 4u7 100n AMP_EN 19 PDN OUT_B 42 18R

C13 10V 16V C606 33n 330p

C558

C555 50V

50V 50V
C1218
2

A_OUT1B

1u

1u
100n 20 LRCLK BST_B 41 50V
1

C1220
10V I2S_OUT_WS
C111

10V
220n

50V

50V
I2S_OUT_BCK 21 SCLK BST_C 40

1u

1u
VDD_AUDIO C60533n 330p R800 F55 60R
I2S_OUT_SD 22 SDIN OUT_C 39 18R
L12 15u

GVDD_OUT
C609

PVDD_CD
SYS_SDA 100R SDA PGND_CD 38 R_AUDIO_P

SSTIMER
AUDIO AMP for <=24" 23
RESETN

R351 A_OUT2A F57 60R

HP_SD
STEST

BST_D
AGND
DVDD

VREG
DVSS

SYS_SCL 100R 24 SCL GND OUT_D 37

U3 PT2333 R350 C604 A_OUT2B L11 15u
33n R_AUDIO_N
GNDA

GNDB
OUTN

VDDA

OUTP
VDD1

RIGHT 50V C608

25

26

27

28

29

30

31

32

33

34

35

36
F8 R799
SDB
INN
INP

3V3_VCC AUDIO_DVDD 18R

60R C597 C244 EXT_RESET 100R C245 C1202 330p

C557

50V

50V
C1219
C1

C2

C3
A1

A2

A3

B1

B2

B3

1u

1u
10u 100n R349 C547 100n 1u 50V
6V3 16V
AUDIO_DVDD

C125 R20 1n 16V 16V C240

MAIN_R 4k7 50V C537 100n
A_OUT2A 2n2 50V
AMP_EN

220n
R225
4k7

10V F71 50V

C16 3V3_VCC
VDD_AUDIO
AUDIO_AVDD
A_OUT2B 10V
2
330R C596 C243 C595 C241
1

100n 10u 100n 10u 100n

AUDIO AMP for >=26"
C116

10V

I2C Address**pin A_SEL=Low

220n

6V3 16V 6V3 16V AMP_EN

0x54
VDD_AUDIO
I2C Address**pin A_SEL=High
0x56
2 2012-12-17

Audio, Headphone
17mb95s

19420_510_130312.eps
130312

2013-Mar-15 back to
div. table
 10-2-8

3V3_STBY
B08

VDDC
D163

TP102
K12 G10

30067087
C5V6 AVDDLV_USB GND_20

E2
S22
G9 VDDC_0 GND_21 G11
CN26 H9 G12
R182 TP6 VDDC_1 GND_22

TP2
4 K10 G13
10k 1 VDDC_2 GND_23

F41

60R

3V3_STBY
3V3_STBY
TP5 K11 VDDC_3 GND_24 G14
G4 3

TOUCH_PAD_OPTION
L10 G17

+
2 VDDC_4 GND_25
M12 VDDC_5 GND_26 G18
G3 C M13 G19
TP104 3 VDDC_6 GND_27
N12 G24

SW1
2k VDDC_7 GND_28

F45
F46
G2 T

60R
60R
P14 H8

10u
R701 4 VDDC_8 GND_29

6V3
SOURCE

C443
R706 TP4 P15 VDDC_9 GND_30 H10
G1 2 R10 H11

1
470R 5 VDDC_10 GND_31
B08, MST supply, keyboard

TP3 R14 VDDC_11 GND_32 H12

1

-
6 R15 VDDC_12 GND_33 H13

10V
C69

47R
100n

R793
D17 T10 VDDC_13 GND_34 H14

10V
10V

E1
C74
C75

2
1 2

100n
100n
P10 AVDD12 GND_35 H15
C5V6 H16

1k
C5V6 GND_36

KEYBOARD_ONBOARD

F137
R16 H17

1k
AU33
2 1
AVDDL_MOD GND_37

10V
C70
100n

F140

MAGIC BUTTON

TP103
D162 GND_38 H18
H19

1k
GND_39

F138
P19 J5

1k
FB_CORE GND_40

AVDD_EAR33

F139
MST supply, keyboard

J7

VDDC
GND_41
F32 GND_42 J8

AVDD_DVI
L11 AVDD_LAN12 GND_43 J9
60R J10

1
2
F33 GND_44
M14 DVDD_DDR GND_45 J11

2
2
60R GND_46 J12

3V3_STBY
10V

KEYBOARD_ONBOARD
3V3_STBY
3V3_STBY

100n
C630
V8 AVDD_ADC25_0 GND_47 J13
ADC2P5

D35
D34
3V3_STBY
W7 J14

C5V6
C5V6
AVDD_ADC25_1 GND_48

1
1
W8 AVDD_ADC25_2 GND_49 J15
W9 AVDD_REF25 GND_50 J16
AVDD25_REF
GND_51 J18

F44
F43

60R
60R

KEYBOARD
W14 AVDD_LAN25 GND_52 J19
AVDD25_LAN
F42

60R
GND_53 J25
V16 AVDD_MOD_0 GND_54 K9
AVDD_MOD
W16 K13

TOUCHPAD_SCL

TOUCHPAD_SDA
AVDD_MOD_1 GND_55
GND_56 K14
W11 AVDD_PGA25 GND_57 K18

10V
10V
AVDD25_PGA

C73
C72

KEYBOARD
100n
100n
W12 PGA_COM GND_58 K19
10V

PGA_VCOM
C71
100n

GND_59 K22
GND_60 L9
Circuit Diagrams and PWB Layouts

N7 AVDD_ALIVE GND_61 L12

AVDD_NODIE
GND_62 L13
K7 L14
AVDD_MPLL

AVDD_DVI AVDD_DVI_USB_0 GND_63

AVDD_NODIE
L7 AVDD_DVI_USB_1 GND_64 L18
AVDD_DMPLL

M8 AVDD_MPLL GND_65 L19

6V3

AVDD_MPLL
C11
220u

P6 AVDD_DMPLL GND_66 M9
AVDD_DMPLL
M10
1V5_VCC

GND_67

LED2
M19 BYPASS GND_68 M11
GND_69 M15
1u

M16

1
GND_70
16V

C5V6
D165 T7 AVDD_AU33 GND_71 M18
C1203

AU33
R7 AVDD_EAR33 GND_72 M20
AVDD_EAR33

10k
F49

60R

1V2_VCC

R227
GND_73 M21

2
GND_74 M22

5V_STBY
VES2.2E LA

3V3_STBY
M25

2
GND_75
R19 VDDP_0 GND_76 N10
VDD33

1
3
T19 VDDP_1 GND_77 N11
F31

60R

CN27 1
CN1 N13

1
1
22u
22u

TP181 GND_78
6V3
6V3

C401
C400

1 1 GND_79 N14

Q17
1 N15
R272 TP182 GND_80

S49
S48
W17 N16

BC848B
1
10k 2 150R 2 2 AVDD_LPLL AVDD_LPLL_0 GND_81

2
2
1 W18 N17
R229
10u
10u

TP183 AVDD_LPLL_1 GND_82

6V3
6V3
6V3
10.

220u
C399
C447
C446

N19

2
3 3 GND_83
1
2 N20

BC858B
TP184 GND_84

1
3
1
220R 2 1
220R 2 4 4 GND_85 N21
U4 N22
R721 R722

1
10u

GND_86
6V3
10V
10V

C87
C81

100n
100n

C441

P7

Q39
27p
5 5 MSD8WB9BX GND_87

2
C419
GND_88 P8

Q38
V19 P9

1
3
1
220R 2 1
220R 2 6 VDD33 VDDP_2 GND_89

50V
R720 R719 P11

1k
TP13 GND_90
10V
10V
10V
EN 34

C56
C86
C80

1
S50 2
100n
100n
100n

F143

2
TOUCHPAD_SCL 7 GND_91 P12
1
10k 2 GND_92 P13
1
S51TP12 2 P16

BC858B
R228 TOUCHPAD_SDA 8 GND_93
J17 AVDD_DDR0_0 GND_94 P17
10V
10V
10V

AVDD_DDR0
C57
C91
C85

1
S45 2
100n
100n
100n

9 K15 AVDD_DDR0_1 GND_95 P18

2013-Mar-15 back to
K16 R8

div. table
AVDD_DDR0_2 GND_96
L15 R9

Q18
BC848B
1k

10 AVDD_DDR0_3 GND_97
F144

R11

1
3
GND_98
10V
10V
10V

C58
C90
C84

1
S46 2
100n
100n
100n

11 GND_99 R12

2
K17 AVDD_DDR1_0 GND_100 R13
L16 R17

1
12 AVDD_DDR1_1 GND_101
IR_IN
L17 AVDD_DDR1_2 GND_102 R18
10V
10V

C89
C83

100n
100n

M17 AVDD_DDR1_3 GND_103 T8

10k
R226
GND_104 T9

2
GND_105 T11
D164

T12
C5V6

LED1 GND_106
10V
10V

C88
C82

100n
100n

GND_107 T13
R222
2 1 E9 T14
1k
1k

2V5_VCC 10k TEST2 GND_108

VDDC

F146
F147

GND_109 T15
GND_110 T16
GND_111 T17
T18
Q16
BC848B
AVDD_DDR0
AVDD_DDR0

GND_112
U7
1
3

GND_113
2V5_VCC

GND_114 U8
2

D166 A5 GND_0 GND_115 U9

5V_STBY

A23 U10
2

C420 GND_1 GND_116

3V3_STBY

LED&VFD&RF

B17 U11
2

1 2 C5V6 GND_2 GND_117

1
3

C11 U12
1

27p GND_3 GND_118

2V5_VCC

C19 GND_4 GND_119 U13

S7

50V C22 U14

Q1

GND_5 GND_120
10k
1

R224

C23 GND_6 GND_121 U15

2

D14 U16
BC848B

GND_7 GND_122
D18 GND_8 GND_123 U17
F38
F36
F35

60R
60R
60R

D19 GND_9 GND_124 V9

E8 GND_10 GND_125 V10
E17 GND_11 GND_126 V11
KEYBOARD

E18 GND_12 GND_127 V12

E19 GND_13 GND_128 V14
E22 V15
10u

GND_14 GND_129
6V3
10V
C65
100n

C442

F8 GND_15 GND_130 V17

F17 GND_16 GND_131 V18
PWM_OUT_LED3

F18 GND_17 GND_132 W10

F19 GND_18 GND_133 W13
10V
C67
100n
PGA_VCOM

G8 GND_19 GND_134 W15

R138
2 1
4k7
AVDD25_PGA
3V3_VCC

D167
3V3_VCC

R131
3V3_VCC
AVDD25_LAN 2V5_VCC
2V5_VCC

2 1
5V_VCC

4k7 C5V6
PWM_OUT_LED3
2V5_VCC
3V3_VCC

2
2
2
F48
F47

60R
60R

4k7
4k7
4k7
F34
F37

60R
60R

R118
R115
R117

C445
1
1
1

BC848B
Q9
F40
F39

60R
60R

AUBCK_OUT

1
3

R132 R133 22u

2 1 2 1
3V3_VCC
10V

4k7 4k7
C78

6V3
100n

2
NC

NC
10V
10V

C63
C66

S26
100n
100n
10V
10V
10V

C68
C79
C77

100n
100n
100n

nc
10V
C64
100n

R135
16V
I2S_OUT_MCK

100n

MST supply, keyboard

2 1
C239
10V

4k7
C76

AVDD25_REF
100n

100R
R346
AVDD_MOD

ADC2P5
AVDD_LPLL

MSTAR BOOT CONFIG

PWM1
VDD33

R136
2 1
4k7
3D_EN
PWM0

3D_ENABLE

17mb95s
2
B08

2012-12-17

130313
19420_511_130313.eps
 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 35

10-2-9 B09, Audio/video I/O, DVD

B09 Audio/video I/O, DVD

B09
INDIA OPTION
SC_CVBS_IN 4 R419 5V_VCC
YEL
SCART 1 12V_VCC 220R

5
CDA4C16GTH
C854 TP43

BAV70
1

D32
SCART_AUD_L_IN

8
CDA4C16GTH

CDA4C16GTH
3 10u
VGA INPUT

R728
390R

R730
WHT JK4

68k
16V C97

2
D6
2

C383 100n

R230

R231

R232
D29

1
SCART_AUD_R_IN

D4

10k

10k

10k
1

33p 2 10V VGA_DDC_5V

R533
BC858B

75R
50V 1 RED Q40 24C02 option

4
50V

1
21 8 1

1
33p C211 10k

2
1 TP63 15 R688 2 1 VCC A0
SC_CVBS_IN Q20 CVBS0_OUT 100R R693 U34
20 BC848B 8 1 7 2
1 TP26 C385 10u 14 R1 WP A1
SC_CVBS_OUT R416 10V ST24LC21
19 SC_CVBS_OUT 7 R2 2 6 3
1 TP25 68R 100R 13 SCL A2
50V R794
18 6 R3 3 5
33p 12 SDA GND 4

R618

R355
100R

R619
C809

33k

33k
75R

1
2 1
17 R531 5 R4 4
C386 11

TP39
TP40
TP41

TP42
2
47R 1 SC_FB 100p R237
16 R373
1 TP24 50V 10 1 2
1
10k
2

50V S59 F160 VGA_DDC_5V R569

15 SC_R
1 TP23 33p 9 510R VGA_VSNC
75R
1 2 2
75R 1 UART-TX-SC 1 1k R570
14 R534 R532
C382 8 TP47 510R VGA_HSNC
2
75R 1
50V R731
13 33p
SCART LT1

R535 7 2k4
SC1

BAV70
D170
12
1 TP14 C384 6 10k PC_DET

27p 50V

27p 50V

27p 50V
SC_G R818

C1178
11

10V
100n
1 TP15 5

C425

C427

C426
2

2
75R

2
2 1 UART-RX-SC 1 TP46
10 R530 30069137

1
1 TP16 R723 4
2
75R 1 22k SC_PIN8 F163
9 R538 R725 3 VGA_B
4k7 TP49 F161 1k

C15V
1
8

D33
1 TP17 2 VGA_G
SC_B C95 1 TP44 F162 1k
7 50V
1 TP19 1 TP18 2 1
1 VGA_R
33p 1 TP45 1k
6 100n
10V CN29

1
C503

2 NUP4004M5
C381

R545

R546

R547
5

75R

75R

75R
1
3

4
5
330p VIN SPDIF_COAX
3
50V SCART_AUD_L_IN

D7
4

IR1

2
F148 R353 VCC 2
1
100R
2
SC_AUD_L_OUT
3 1k
1 TP20 GND 1
2
1 TP21
SCART_AUD_R_IN C468
SPDIF OUT INTERFACE
50V
4n7 F9
1 5V_VCC
1 TP22
60R

SPDIF_COAX
C504 C328
YPBPR INPUT

5
330p F150 R354 10u

CDA4C16GTH
2
50V 1
100R
2
SC_AUD_R_OUT 10V

R148
1k

4k7

D31
C469 3

C94 50V

1
R352
SPDIF_OUT 2 1 2
Q14 220p
4n7 100R 2 1
BC848B

4
2 1

50V F152 NC

C523
100n

2
50V
220p
10V
1

C522 PR_IN

R149
1k

4k7
C93100n

2
S43 TP9
2 1 TP54
3 2 1 2 1
S44 3

1
R223 10V JK3
2
Q15 1
AMP_MUTE 10k R330
SCART AUDIO FILTER 1
BC848B 2
1k
1

2
R233
SCART_AUD_L_IN 10k SC_AUD_L_IN TP56 F154
4 1

PB_IN
SCART_AUD_R_IN 10k SC_AUD_R_IN TP55 1k
6 1

R234
3
C508 C507 C600 C601
R402

R401
12k

12k

330p 330p 560p 560p 7

50V 50V 50V 50V
5
JK15
BC848B DVD_IR
Q3 1
R9
IR_IN 2
4k7
1
3V3_VCC F155
1 3
220n
Y_IN
2 1k L23

2
50V

50V

50V
50V

27p

27p

27p

75R

75R

75R
2

4p7

4k7
R7
50V

C430

C429

C428

R548

R550

R549
2

2
R29
47k

22p
SLIM SIDE AV

1
2

1
C493 C620
1

DVD_IR_ON/OFF
2
C5V6
C526

R551
D21

75R
2

50V
220p

1
1
TP61
DVD CONNECTION
1

1
TP60 F159
2
1k C513
SAV_CVBS S106 OPTIONAL
R203 TP11 FS3
6 75R CN7
1 2
5V_VCC GASGET POSITIONS
1
TP59 F158 330p R177 4A/24VDC
3
TP10

50V SAV_AUD_L_IN DVD_CVBS 180R 1 2 GS1

4
F156

1k
1k

R27 TP27
3 4
C26
10u
16V
!
FS5
GS2
1

JK10 5
DVD_SENSE
1
100R
2
5 6 1 2
12V_VCC GS3
100n 10V

F157 TP28 TP29 4A/24VDC

1

7 7 8
SAV_AUD_R_IN GS4
C5V6

C5V6
C120

1 2
D15

D13
2

1k C514 S21
4k7
R6

DVD_WAKEUP
NC
1

1
TP58 9 10 DVD_IR GS5
2

330p TP31 TP30

C126
2
50V

50V
27p

50V
220p
1

R28 2 2012-12-17
DVD_SPDIF 1
100R
2

Audio/video I/O, DVD

C121 17mb95s

19420_512_130313.eps
130313

2013-Mar-15 back to
div. table
 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 36

10-2-10 Layout top

CN26
D23 CN12

PL3
5C

033R

Q27
Q28
Q15
Q14

44S
39C

53R

44R
91Q
14R

902R
393R

702R
717R
63S

CN11
32D

721C
82Q 72Q 1D

25F
Q6 63R

823C
83S

51Q

362C
423C
214R

PL1
73Q

9F
41Q 462R

162R
34S 645C 21NC

6Q
D1 73S

3LP

43R
73R

1LP
Q19 817R

21Q
225C
312R 012R 802R

721R
C546

325C

253R
322R
841R 941R

D20
49C
62NC
Q44 212R Q12 962C 11NC

731R

52S
314R 8S

1SF
831F D35 375R Q13 682C

31Q
CN1 821R 888C 872C 782C 45S 3NC 2NC
412C 31F

FS1
Q17
912S

022S
901R

397R
931F

44Q
35S Q11

22S
027R 772C 482C

452R

9021C

0121C
71Q L40

801R 265C

852R
701R

621R
036C CN2

53D
83Q
172C CN3

02D
272R 917R 804R 19S

Q32
D165

33S
23S
561D 124R
72NC

112R CN13 11Q

3KJ
Q1

1RI
822R 582C 904R
922R

791R
891R
09S
672C 24S

1Q
227R 722R 642C 321R

34Q
323R

343C
626C
01NC
L39

93L
8U

2KJ
23Q

24R 471R
93Q 82U

64R
74R
041F 241R 223C

C11
423R
11C
81Q

024C 382C 31NC 671R 461R 04L

712R
261D

572C
472C
Q16

731C

95F
422R Q43 02C

831R
952C 282R 482R

411R
CN27

31R
622R 441R 61Q 282C

U28
7S

531C
D162 842C 12Q

041C
341F 263R 441F 372C 182C
JK3

28C
38C
18C
914C 752C 004C 272C 082C
IR1 232R
1NC

63D 662C
CN16 602C
127R 072C 972C 22Q 35F

396R
05S Q21

032R 132R

79C

CN10
162C 88C 94F 744C 502C

C137
JK2
94S
84S

15S 453R 1121C

964C
Q22 8811C
43D 262C 19C 7811C

U8
54S 051F 98C

886R
562C 58C 644C 41NC 61NC

01S

51S
09C
64S 731F 921R 3021C C140

7021C
312C
164C 064C

21F
841F 432R 106C
353R 705C 104R
462C 48C
741F 431R 852C
D36 104C 58S

D170
062C 08C 6021C
552C U9

031R
521R
611R
641F D34 921C 68S 574C 874C

864C 405C
493R

062R
341R
651R
751R
78C

862C

632R
071D 3L 546R

88R
CN14

932R
142R
68C 517R 832R 642R 812R 912R 774C 552R

821C
55S

53S

532R
842R
084C

184C
3121C
78R
221R

19R

18R
165C 652R 746R 128R
153R 796R 09R 29R 05R 87R
8711C 846R

837R
531R 974C

818R

91U
228R

3R
053R

9U
5R 631R U21 856R

C399
C563 83R 156R 612S
006C 014R 646R 374C

101R
5NC 84R
C561 993C 29C 884C 274C

323C
414R
305C

332R
204R
805C

L3
6D
86C 94R 8021C 446R
812S 712S 55C 931C
052C

51R
331R
897R 231R

291R 03C
82C

17F 95S 523C 69R

365C

U19
D164
541R 452C 544C 76C Q35 364C 256R 533R

D6

12U
191R

74F

93F

04F

83F
762C

4121C
652C 33F 461D 384C

911C
641R

144C
Q8

42C
061F 9811C

66C

13F
77C

67C
695C 514R 244C

36F
1911C

92NC
752R

54R
18S
942C
152C
242C 342C
D33
061R 001R 23F 53Q 981R
CN5

65C

75C
85C
761R
181C 696R

56C 222R
702C

23D
527R 327R

595C 73F 0911C

25C
601R 421R 761D 091R 8Q
7U 223R

243C
33D
6S

63F

53F

D166
011R

661D

2121C
081C 851R 211R
596R

123R 43F 85F

59C

97C
87C
943R 664C D32 84F

Q7
141R 79R 012C 15F

151C
814R
U13

7Q
745C 764C 36C 46C

CN29
111R 5U 06F 83L
252C

491R
591R

681R
581R
881R
116R
442C 142C 235R

U5
D167

4U

L38
53U

14CKSJ

542C 535R 352C 388R 343R

92D

216C

U4

52C
735C 483C 288R

742C
114R
4NC 1021C 456R 945C 737R
807R 475R 188R 63Q 42D 62D
316C 356R 845C 4R 251C 882R
D29
035R

835R
183C

0021C 707R 088R

U7
2021C

716C 117R 982R 092R 1F

025C 82S 706R
991R 556R

354C 92S

D26
616C 017R

31U
292C 192C

243R
381R

217R
Q36

D24
D4

13S 806R
406C

656R 454C 03S

125C

335R 516C 907R 22C 271R 978R

U35 002R
997R

383C 683C 416C 307R 131R 171R 878R

042C

902C

455C
35C
25R
806C

72C

82F
CN4 85R
506C

778R

785C

685C
706C

135R 75R 12C 961R

55R
4D

373R 071R 678R 941C

35R
606C

SH1 65R
208R

45R 701C 17S 002C

805R
905R
042R
116C CN6 16R
C149

593R 463R
006R 844C

CN7
8F

283C 601C 07S

154C
405R
293C
435R 302C 206R
016C
108R

JK

008R 261C

623C

691C
281C
381C

481C

291C
581C

681C
491C

981C
923C
906C

56S
X10
795C

442R
015R
U12

685R
873C
11

001S

051R
151R
21U
U3

875R 095R 185R 285R 985R 385R 885R 485R 585R 085R 975R 775R 785R

7NC
3U

6NC

395R

495R

595R
215R

915R

615R

515R
415R
115R

66S

093C
86S
01X
17R 56R
111C
62R
12R
31C

CN9
522R
611C
02R
61C

66R 855R 755R 655R

86R 193C
47C

793R
893R

205C
105C
521C 07R 76R
11
L2

1HS
SC1 JK4

811C 96R 095C

J

26R 075R 41C 89R 99R

137R
202R 102R
D8

U6 54F

D5

U10
C440 965R 03R 13R

906R
406R 704R
C618 995C 895C
L12

5
251FL 195C
68R 33R

732R

861R
412R
0221C 122S 57C 64F
8D 04R

745R 524C
2S

4S
1S
425LF

81D 9NC
86F

202C
723C
402C
991C
102C
891C
5D
555C 816C 361F 93R 505R

CN8
6U
1L 92C 161F 661R 251R

C619
044C 4Q

065R

225R

325R
125R
106R
815R
D18

01U

76S
7121C 495C 3S 724C 23R 605R
916C
665C

426C

808R
645R 705R 451R

001C

023R
551R
305R
342R

99C
Q4

537R
617R
481R
13C
X1

67R
655C 211C 89C 351R 101C
951C

163R
791C
591C

391C
091C
781C
881C

191C
561F
497R 553R

241C
Q26

51F
112C

6221C
7221C

3C
5LF

4L 713R
502R

602R
71

551C
351C

29S

7D Q34
1

45C 95R 06R 36R 46R 62Q

261F
855C 9121C 97R Q47 613R

542R
025R

695R
995R
795R
895R
715R
315R
311C

8NC
306R 606R
651C
37R

851C
57S
35
6 1FL 1X 32R 42R 52R 91R 022R 61R

4C

3D
816R 614R 39R 69C
308R 362R 662R 562R 262R

916R 803R 703R

Q9

9Q
Q41

8R 266R 01R 366R 61F 26F

Q30
99S
89S

8121C 755C 122R 221C 031C

493C

Q46
D7
14Q

583C 908C 75S 49R

545R
624C
74Q

D3
96S 48R 316R 38R 416R 64Q 03Q
411C 56F 08R 421C

Q24
L11 43Q 382R
391R

Q31
1711C

57R

L13 02Q 751C 213R 92F 41F

U2
76F

932C 643R 81R

27R
58R

28R
15R
4F

93S
65S
28S

201C 601S

FS4
51C
914R

41U
Q42

511C 534C 133R 711R 62S 34R 488R 621C 77R

931R
Q5
451C
Q20

42Q
5Q 2Q
037R

C394

7911C
6L

24Q

4SF
81U

22R 41R 301C 03F 01F

811R 04S 3F 9R 361R
561C

261R
161R
944C

161C

85S
16S
827R 13Q 62C
01C
51NC

48S

8221C
F67

6C

408R 07F
2F 7C 71C 07C Q2 113R 511R 98R
78S 2U 52Q 631C 7F

344C
CN15

1U 22U
U18

461F
458C

96C 47R 952R 131C

98S
38S

37C

17C
5L

92R
04Q 0711C 14S 06S
22L

242R 3SF

7R
81C 11F 942R 3Q
8C C8 27C 762R 33Q 231C
691R
781R

461C
441C
361C

U14 C435 911R

321C
L5

71R
1C

571R

612R
512R
D19
U1U22

5S
Q3
12L
172R

061C

Q25

Q33
72S

31D
431C
05F

91D

92Q
182R 872R 9C Q40 43U

341C

352R
401C
34F

44F

24F

96F
14F

21C
331C 72R 121C

903R

013R
021R 5SF

141C 59R
772R 072R
61U

371R
945R

026C
824C

6R 82R

U34
CN18 CN17

041R
121R
082R 32L 01Q

32Q
972R

51D
D21

315C 021C 21R

68F
251F 034CD28

FS2
FS5
13D

82D 751F 415C 6F

333R
797R
962R 741C
JK10

841C 862R

D13
2SF 302R 11R
651F

851F

055R 845R 361D

451F

572R 641C 541C 472R 394C 551F

924C JK1 741R 923R Q10 011C 771R 12S
D31 5F
U16 D163 Q23 Q29

D15
91C 32C
D17

12D
71D

JK15
607R
107R

281R
SW1

951F

PL2
625C
155R
4LP

2LP
91NC
CN19

81NC 71NC
1WS 51KJ 1KJ 01KJ
PL4

2 2010-11-22

SSB Layout Top

17mb95s

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 19420_514_130313.eps
130313
2010-11-22

31PT 012PT 902PT

281PT 771PT
2

21PT
671PT
871PT
17mb95s

3PT
381PT
571PT
181PT
481PT

4SG
201PT
4PT
5PT
SSB Layout Bottom

12PT 401PT
2PT 301PT
34PT
6PT
91PT
71PT 32PT
22PT 51PT 52PT 55PT
02PT 81PT
43PT 42PT 65PT
36PT 41PT
74PT 61PT 62PT
45PT
64PT
9PT
24PT 59PT
1
94PT 44PT
84PT 39PT
54PT 8PT
49PT
95PT
14PT
93PT
04PT

16PT
85PT
06PT
99PT
23PT
5SG
89PT
1SG
011PT

div. table
2013-Mar-15 back to
311PT
EN 37

53PT 112PT
901PT
75PT
101PT 79PT
67PT 33PT
10.

611PT 29PT
26PT 97PT 37PT 511PT
TP66

76PT 001PT
411PT 19PT
47PT
VES2.2E LA

711PT 57PT 28PT 601PT

69PT
77PT 17PT
38PT
07PT
96PT
18PT 08PT 87PT 48PT
86PT
68PT 58PT 3SG
78PT 88PT
27PT
Circuit Diagrams and PWB Layouts

25PT 73PT 09PT

35PT
2FG
05PT
7PT
211PT
501PT 46PT
801PT
111PT
Layout bottom

82PT 11PT
63PT 15PT 13PT 72PT
1FG 03PT 83PT 98PT
92PT 01PT
10-2-11

2SG
 Circuit Diagrams and PWB Layouts VES2.2E LA 10. EN 38

10.3 J 17LD141-2 IR/LED

10-3-1 IR/LED

J LED/IR
J

R1
100R

220R
C1

C2

C3

R4
1u

1u

1u
OUT GND VS
IR_TSOP5823

100n

100n
MD1

50V

50V
C6
C5
2

5
1

3
V BC30034

100n
50V
C4
D1

2
R2
22R
1
PL2

2 2012-03-05

LED/IR
17LD141-2

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 Styling Sheets VES2.2E LA 11. EN 39

11. Styling Sheets

11.1 3000 series 32"

3000 series 32"

M3

M2

M12

M14

M6

M9

M5

M1
Pos No. Description Remarks
M1 LCD panel
M2 SSB (Small Signal Board)
M3 PSU (Power Supply Unit)
M5 Loudspeaker
M6 IR Board
M8 Front Cabinet
M9 Back Cabinet
M8 M10 Remote Control Not displayed
M11 Detachable AC Cord Not displayed
M12 Stand (Neck)
M14 Stand (Base)

FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9

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