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Effect of Wafer Back Grinding on the Mechanical Behavior of
Multilayered Low-k for 3D-Stack Packaging Applications
V. N. Sekhar*, Lu Shen#, Aditya Kumar, T. C. Chai, Lee Wen Sheng Vincent, Wang Xin Lin Sandy,
Xiaowu Zhang , C. S. Premchandran, V. Kripesh, John H. Lau
Institute of Microelectronics
11, Science Park Road, Science Park II, Singapore 117685
Institute of Materials Research and Engineering
3, Research Link, Singapore 117602
E-mail: vasarla@ime.a-star.edu.sg , Tel: +65-67705383, Fax: +65-67745747
available for directly producing the ultra-thin wafers [2]. That
is why in the recent past years, many wafer thinning methods,
To study the effect of back grinding on the mechanical
such as mechanical grinding, chemical mechanical polishing
properties of the active side of the die, low-k stacked wafers
(CMP), wet etching and atmospheric downstream plasma
were grinded to four different thicknesses of 500 µm, 300
(ADP), dry chemical etching (DCE) have been evolved.
µm, 150 µm, and 75µm by using a commercial grinding
Usually all commercially available grinding systems perform
process. Nanoindentation and nanoscratch tests were
thinning action in two stages as 1) coarse grinding using 350-
performed using the Nanoindenter XP (MTS Corp. USA) on
500 grits and 2) subsequent fine grinding using 2000-3000
both the normal (no back grinding) and back grinded samples
grits [2]. There are some problems associated with thinned
to analyze the failure loads, modulus, hardness and
wafers like, thin wafer handling and low die strength and to
adhesive/cohesive strength, of the low-k stack. It is found
date no concrete solution has been established to avoid these
that the back grinding process enhances the mechanical
problems. Poor die strength of the thinned wafers is mainly
integrity of low-k stack as the back grinded low-k stack
due to the scratches, crystal defects, and stresses formation
exhibited in terms of the higher failure load and cohesive
during mechanical back grinding [3]. So far many researchers
and/or adhesive strength of grinded low-k stack than the
have extensively studied wafer thinning/back grinding
normal low-k stack. The TEM cross-section analysis showed
processes in terms of die strength by assessing the quality of
that the interfaces in the low-k stack of normal sample are
the grinded surface [4-6]. Besides the degradation of die
wavy, whereas the interfaces in the low-k stack of back
strength due to small thickness of the thinned wafer, some
grinded samples are even, especially at the Black Diamond
researchers have found sub-surface damage due to back
region. Significant densification of BD films is observed in
grinding [7]. Blech et al have studied the effect of backside
the case of back grinded sample. Based on these results, it is
mechanical grinding on the wafer deformation [10]. Hoh
believed that the thermo-mechanical stresses applied and/or
Huey Jiun et al studied the die fracture strength by
generated during wafer back grinding process affect the
considering the surface roughness of the thinned surface and
microstructure and enhance the mechanical strength of the
the amount of removal thickness by stress relief methods [6].
low-k stack.
In addition to surface roughness of the thinned wafer,
1. Introduction grinding direction has significant effect on the die strength
Wafer back grinding is one of the key technologies which [11]. Singulation of thinned wafers always pose problem as it
paving the way to high performance three-dimensional (3D) induces the chipping and rough edges on the chip during the
electronic packages. The, 3D packaging is getting more and dicing processes. Chen et al have found dicing before
more popular because of its innovativeness, high performance grinding (DBG) method as a good solution for ultra-thin chip
and functionality, and smaller in size of the final product. The applications and it enhanced chip strength around 10-15% [5].
major applications of the 3-D packaging include digital and In back grinding processes it is impractical to retain its native
mixed-signal electronics, wireless, electro-optical, MEMS and die strength, but it can be controlled to some extent by
other integration technologies. At this juncture, the key employing the stress relief methods after grinding processes.
technologies supporting the 3-D packaging, are as: through The commonly used stress relieving methods include wet
silicon vias (TSVs), wafer thinning/back grinding, precision chemical etching, dry or plasma etching, dry polishing and
alignment of wafer to wafer or chip to wafer, and wafer to chemical mechanical polishing (CMP) [8-9].
wafer or chip to wafer bonding [1]. Among these key In the recent years, many researchers have extensively
technologies, wafer thinning plays vital role in 3D packaging assessed the quality of the back grinding processes via die
integration, as it allows to accommodates or stack more dies strength evaluation. Die strength of the thinned wafer can be
in one package and ultimately results in the reduction of evaluated by using the different techniques like three point
package size. Besides the reduction of package size, the bend test, four point bend test, ball on ring test, ball breaker
stacking of thinner chips provides many other advantages, tests and ring-on-ring tests. And it greatly influenced by
such as, more functionality per package and improved heat several parameters like surface roughness/finish, degree of
dissipation. Electronic packaging industry has to put a lot of thinning, stress relief processes, quality of the dicing edge [5-
R&D efforts and spend millions of dollars on the wafer 10]. But the literature/studies available related to the effect of
thinning technologies as there is no manufacturing technology the grinding processes on the active side of the die/chip is
almost nil/very scarce, and this necessitates a focused study

978-1-4244-2231-9/08/$25.00 ©2008 IEEE 1517 2008 Electronic Components and Technology Conference
on the effect of wafer back grinding on the active side of chip. interest whose mechanical properties are unknown with the
For the first time we have studied the effect of the back another material (called as indenter) whose properties are
grinding processes on the mechanical behavior of the active known. The unique advantage of nanoindentation technique
side of the low-k stack by using the nanoindentation and over conventional hardness technique is that both hardness
nanoscratch techniques combined with TEM (Transmission and modulus can be easily extracted from the nanoindentation
Electron Microscopy) analysis. Usually active side of the chip curve [13]. Besides these properties it can also determine
is a few microns in thickness, and it can not be studied using residual stresses, elastic-plastic behavior, creep, relaxation
those methods which are being used for conventional die properties, fatigue and fracture toughness. In this study,
strength evaluation. Therefore, we have chosen sophisticated nanoindentation tests were performed on Nano Indenter® XP
methods like nanoindentation and nanoscratch techniques for (MTS Corp. USA) with continuous stiffness measurement
the present study. Nanoindentation and nanoscratch tests have (CSM) attachment and Berkovich indenter. This CSM
been carried out on both normal (no back grinding) and back attachment has unique advantage of providing mechanical
grinded stacks, to study the failure loads, modulus, hardness properties as a function of penetration depth. In
and adhesive/cohesive strength. Generally after back grinding nanoindentation experiment it is carried out by applying a
process it is observed that the die strength of the thinned chip harmonic force at relatively high frequency (45 Hz) to
decreases significantly. However in the present study, we increase load without complete separate unloading cycles.
have noticed an improvement in the mechanical behavior of The high frequency used in the CSM method allow avoiding
the back grinded low-k stack. Thus, we can believe that the obscure effects of the tested samples like creep,
back grinding process lowers the die strength in one way, but viscoelasticity and thermal drift.
on the other hand it improve the mechanical integrity of the
low-k stack.

2 Experimental
2.1 Test vehicle fabrication
Test vehicles used in this study is a multilayered low-k
stack of 15 different thin films comprising SiN, USG, Blok
(SiC), BD (Black Diamond TM, low-k), as shown in Fig. 1. All
samples were prepared on 8” Si(100) wafer in a
semiconductor processing clean room of class 1000
environment. Test structure employed in this study is ~3.4µm
exclusively designed to study the BD (low-k) integrity and it
resembles the Cu/low-k structure of the three metallizations.
So the structure having three BD low-k layers at different
levels according to the BEOL (Back End of the Line)
interconnect design specifications and it does not have any
copper metal lines. The total thickness of the multilayered
low-k stack in test vehicle is around 3400 nm. The main
intention in preparing the test vehicle without metal line is
that in the reality low-k stack regions are more vulnerable
than the regions with metal lines. Hence present study gives
an outlook about the response of the low-k test structures
during back grinding process.
2.2 Backgrinding process
Wafer thinning of the low-k stacked wafers were carried Fig. 1 Multilayered (15 layers) low-k stack test vehicle.
out by using commercial back grinding system (Disco Corp. In nanoindentation test method load applied on the sample
Japan). In thinning process, first the coarse grinding was done and corresponding indentation depth is continuously
by using grit #300, then fine grinding was done by using monitored and recorded as load-displacement curve. Without
#2000 and finally the dry-polishing was carried out to remove imaging the hardness impression on the tested sample, both
the subsurface damages. The dry polishing was a special hardness and elastic modulus can be directly extracted from
stress relief process developed by Disco Corp. Japan, by load-displacement curve by using the Oliver and Pharr
using grit #8000 without using any chemicals. The main method [13]. Three important parameters of the load-
objective of employing this method is to offer superlative displacement curve play vital role in assessing the mechanical
stability to back grinded wafers [12]. properties and they are as; 1) the maximum load, Pmax, 2) the
2.3 Nanoindentation testing maximum displacement, hmax and 3) contact stiffness from
Nanoindentation is a powerful mechanical initial loading curve S=dP/dh. The accuracy and repeatability
characterization technique which is similar to conventional of the properties depend mainly on the how well these values
hardness testing method, but it is performed on much smaller are measured during nanoindentation tests. The hardness (H)
scale using the special equipment called Nanoindenter. This and elastic modulus (E) can be determined by using the
method involves essentially of indenting the material of following equation developed by Oliver and Pharr [13],

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E π 1 dP ‘P’ is the applied load and ‘h’ is the displacement in to sample
= (1) surface.
1 −ν 2
2 Amax dh
and a
H= (2)
υ = poisson’s ratio,
dP/dh = intial slope of the indentation unloading curve,
Pmax = maximum load, and
Amax =projected contact area at the maximum load.
For a perfect Berkovich indenter, projected area A can be
calculated by
A = 24.56hc2 (3)
Where, hc is true contact depth.
2.4 Nanoscratch testing
Adhesion strength of film-substrate system is mainly
defined by the interfacial bond strength and solely depends on b
the interfacial properties. The interactions at the interface of
film-substrate system may be chemical, electrostatic or vander
waals type. Empirically, adhesion strength is the stress/load
required to detach the thin film from the substrate. Till today,
numerous techniques have been developed for the
measurement of the adhesion of the film-substrate system
[14], but among them nanoscratch technique is widely being
used technique to determine the adhesion/cohesion strength of
the thin film -substrate system [15]. In the present study all
nanoscratch tests have been performed on the Nano
Indenter® XP by using the nanoscratch attachment. A
diamond stylus has been used as the scratch indenter and it
has been scratched over the low-k stack system under ramp
loading condition until some well defined failure is observed.
The load at which system fails is termed as the critical load
(Lc) and in the current study adhesion/cohesion strength is c
reported in terms of the well defined critical load, Lc. For
each sample, at least five tests have been conducted and all
tests showed good repeatability. For scratch test, conical
diamond indenter of 5 µm was used as it has uniform facing
to all directions. The main advantage of using the conical
diamond indenter is that it is symmetrical at all alignments,
which removes directionality effect imposed by the pyramid
type tips [17]. The diamond stylus is scratched over the low-k
stack for a length of 500 um, under ramp loading condition
from 0 to 250 mN. All tests were performed with a constant
scratch velocity of 1µm/s.
Fig.2 (a) Typical load-displacement curves for all samples
3. Results and Discussion (b) schematic of specimen surface geometry in indentation
3.1 Failure load, Hardness (H) and Elastic modulus (E) testing (c) Nanoindentation loads at different contact depths
In this study, failure loads, hardness (H) and elastic for normal and back grinded stacks
modulus (E) is computed by analyzing the nanoindentation
load-displacement curves. Fig. 2a shows the nanoindentation At least ten nanoindentation tests were performed on each
load-displacement curves of normal (no back grinding) and sample system and all are exhibiting good repeatability. The
back grinded low-k stacks (BG-500, 300, 150 &75 µm). A Poisson’s ratio of the low-k stack systems is maintained
typical deformation pattern of an elastic-plastic sample during around 0.2. From Fig. 2a, it is obvious that the normal stack
and after nanoindentation testing is shown in Fig. 2b, where showing pop-in event (failure load/fracture strength of the
stack) at lower loads and indentation depths, when compared

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to the back grinded stacks. These pop-in events in the pressure and thermal stresses during back grinding action.
nanoindentation curve are resulting from the film cracking These back grinding pressures or loads may improve the
and delamination of the stack in the form of blisters [16]. adhesion, especially Vander walls forces at the multilayered
Normal stack failed at ~ 456.25 mN load and 2422.41 nm interfaces and cause the densification of the individual films
indentation depth, whereas back grinded stacks failed in the of the stack. It is being investigated by many researchers in
range of 482-661mN load and 2405-2979 nm indentation the packaging field that the back grinding processes are
depth. The fracture load and depth values of all types of deteriorating the die strength, but this is not the same
samples have been summarized in the Table. 1 and Fig. 7. phenomenon with the active side of the chip stack.
Fig. 3 shows the optical images of the residual
nanoindentation impressions of the normal and back grinded a b
stacks. From the nanoindentation curves and optical imaging
analysis it is clearly evident that the nanoindentation response
of the normal and back grinded stacks is different in terms of
failure load and depth. Normal stack and BG-500µm show
extensive delamination and chipping, whereas other back
grinded stacks (BG 300, 150, 75 µm) show delamination
blister and this behavior is in good agreement with the
nanoindentation pop-in event. BG-500µm exhibits the mixed d
response as it shows chipping-off during nanoindentation and
moderate pop-in failure load of 482.17 mN and this might due
to the moderate degree of back grinding. In case of the other
back grinded stacks (BG 300, 150, 75 µm), even higher
nanoindentation loads are not able to damage/chip-off the
low-k stack and cause interfacial delamination only. Fig. 2c
shows the nanoindentation loads at different indentation
depths as a function of wafer thickness (normal and back
grinded stacks).Indentation loads at different contact depths e
200, 500, 1000, 1500 and 2000 nm before the failure of the
stack have been compared mainly to understand the
deformation behavior of the low-k stack for normal and back
grinded samples. No significant difference in nanoindentation
loads at different contact depths observed mainly due to that
the low-k stack is highly brittle and exhibits huge elastic
deformation before failure of the stacks. However from Fig. Fig. 3 Optical images of residual nanoindentation
2a, significant difference is observed in case of the failure impressions of (a) normal and (b), (c), (d), (e) back grinded
loads (as pop-in events) of the normal and back grinded samples.
Fig. 4 a-b shows the hardness and elastic modulus as a
One common feature is observed among the normal and
function of the indentation depth for normal and back grinded
back grinded stacks is that the failure of the stack is occurring
stacks measured by using the nanoindentation CSM
in the low-k region. Normal stack and BG-500 µm exhibit
technique. Properties of the all samples are not constant, but
failure at the middle low-k region, BD2 (~2400nm) and other
strongly depend on the contact depth and this is mainly due to
back grinded stacks fail at the bottom low-k region, BD1
the presence of the different types of thin films with diverse
(2800-2900 nm). No significant difference in fracture strength
physical properties and 15 interfaces. From Fig. 4, it is clear
(pop-in event) is observed among BG-300, 150, and 75 µm
that initially all samples exhibit high hardness and modulus
back grinded stacks and all these grinded stacks are show
values due to the presence of the SiN layer on top of the
higher facture strength than the normal stack and BG-500µm.
stack. However, back grinded stacks show higher hardness
Accordingly the increase in failure load depends on the
values throughout the indentation depth and this difference is
degree of the back grinding, but not much difference is
significant till ~1500 nm. Even though BG-500 µm samples
observed when the wafers have been grinded to 300, 150 and
shows moderate failure load values when compared to other
75 µm. The main reasons for similar failure load for all the
back grinded stacks, still it shows higher mechanical
other back grinded stacks could be a) not much change during
properties than normal stack. There is no difference in
back grinding processes for BG-300, 150, and 75 µm, b)
hardness values among the back grinded stacks. In case of the
nanoindentation equipment resolution may not be capable of
elastic modulus, the overall trend is mixed, in which initially
sensing small differences among the back grinded stacks, c)
back grinded stacks exhibit high values and from 1000 nm
back grinding process may occur at constant loads for higher
depth, BG-150 µm stack follows the trend of normal stack
degree of back grinding. After back grinding, the strength of
and BG-75 & 300 µm stacks show lower modulus values. The
the low-k stack is enhanced, mainly in terms of
mixed trend of modulus values of all samples is mainly due to
nanoindentation load and indentation depth and this increase
that, the elastic modulus is highly sensitive and intrinsic
is understood mainly due to the application of mechanical
property. Elastic modulus is greatly influenced by the beneath

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k region. This might be due to that back grinding
a loads/pressures influencing the interfaces and causing the
densification of the films, especially in the low-k region. In
this study the fracture/failure strength, hardness and elastic
modulus of the normal and grinded stacks are analyzed and
compared at gross level as the nanoindentation analysis is
very complicated and not well established for the multilayered

Fig. 4 Hardness and elastic modulus as a function of

displacement for normal and back grinded samples.
layers of the testing films and substrate. In the case of
hardness, the difference between normal stack and back
grinded stacks is very quite clear when compared with the
modulus values. The minima values of the hardness and
modulus values from the property plots can represent the low-
k (Black Diamond, BD) region as it is known that the Black
Diamond TM (low-k) has lower mechanical strength when Fig. 5, (a) Hardness (b) Elastic modulus at different
compared to the other constituents of the stack (viz. SiN, contact depths (100, 200, 500, 1000, 1500 and 2000 nm) for
USG, Blok). So minima region for the hardness is around normal and back grinded stacks
2000 nm, which is middle of the low-k region and for
modulus the minima region is found to be at around 500 nm. Fig. 5 a-b shows the hardness and modulus at different
The mechanical properties at this minima region (2000nm for contact depths (100-2000 nm) as a function of wafer
H and 500nm for E) are as H= 4.27 GPa and E= 41.81 GPa thickness. These plots will be very useful to compare the
for the normal stack and in the range of H= 4.94-5.10 GPa properties of a particular sample thickness at different contact
and E=49.75-51.55 GPa for the back grinded stacks. These depths. From Fig. 5a, hardness shows significant difference
values actually represent the properties of the low-k stack as with respect to contact depth for different thickness samples.
summarized in Table 1 and compared in Fig.7. In case of Whereas in case of modulus from Fig. 5b, only shallow
modulus physical contact depths can not be followed as it is contact depths (100-500 nm) exhibit trend as the back grinded
sensitive and always exerts its effect much before the original samples are stronger than the normal sample. Incase of the
contact depth due to continuous stiffness measurements. As a higher contact depths modulus values are fluctuating, might
whole, back grinded stacks exhibit the higher hardness and be due to that modulus is highly sensitive and greatly
elastic modulus values, and this trend is quite clear in the low- influenced by the low-k stack failures and substrate effect.

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This analysis provides the quantitative comparison of the
mechanical properties of a samples at different contact depths a
and will be very useful to study how back grinding forces are
influencing the throughout the stack thickness.
3.2 Adhesion/Cohesion strength
Adhesion/Cohesion strength of the normal and back
grinded stacks is reported in terms of the critical normal load
(Lc), where first abrupt decrease in scratch depth is observed.
Fig. 6a shows the nanoscratch profiles as scratch depth vs.
normal load for all samples and Fig. 6b shows the scratch
loading at different scratch depths as a function of wafer
thickness. As in nanoindentation contact depths analysis, in
scratch tests also it is noticed that the lower contact depths
(200-1500 nm) did not show any variation in scratch loading
with respect to wafer thickness. However at the deeper
scratch depths (1500-2000 nm) back grinded stacks exhibit
higher scratch loads than the normal stacked sample. This is
mainly due to the presence of the low-k layer at the deeper b
dimensions (1800-2850 nm). From Fig. 6a, critical load (Lc)
of the normal and back grinded stacks is well defined where
the stack fully chipped-off (delaminated) from the substrate
and it can be verified from the corresponding optical images
(Fig. 7). In Fig. 7a-d, optical images of the both the normal
and grinded stacks have been captured at three different
locations, beginning, middle and end of the scratch track
profile. Before reaching the critical load minor damage to the
stacks is observed in terms of crack and it can be seen on
scratch profile as a small kink just before reaching the critical
load (Lc) point. Arrows over the scratch track of all samples
indicate the critical load (Lc) where significant
delamination/chip-ff of the stack is started. From that critical
load (Lc) point it is observed that the sudden increase of the
scratch depth as the indentation tip is abruptly hitting the
silicon substrate, which was associated with catastrophic
chip-off failure of the whole stack as well as significant Fig. 6 (a) typical nanoscratch depth profiles as a function
plowing of the tip into the silicon substrate. This plowing of normal load (b) scratch load at different depths, for normal
action associated with the delamination chip-off of whole and back grinded samples.
stack and it is sustained till end of the scratch track. Similar to
the nanoindentation tests, in nanoscratch tests also, the back
grinded stacks exhibit higher critical loads (100.73-96.30 Table 1 Summary of nanomechanical properties of normal
mN) than the normal stack (72.80 mN). Moreover, no and back grinded samples
significant difference in critical loads is observed among the
back grinded stacks (BG 500=98.65, BG 300=100.73, BG
150=96.00, BG 75µm=96.30 mN), and these results have
been summarized in Table 1 and compared in Fig 8. In
nanoscratch tests, both normal and back grinded stacks
exhibit significant adhesive failure and this failure can be
observed in nanoscratch profile at the point where the scratch
tip abruptly hits the silicon substrate at the critical load (Lc)
point and in the optical images of chipping-off the stack as
debris around the scratch track especially after the critical
load (Lc). Though the extent of the back grinded effect over
the low-k stack may be different for the different back
grinding thicknesses, but nanoscratch test was not able to
sense this difference as all the grinded stacks showed nearly
same results.

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analysis of the normal and grinded stacks, it is observed that
there are some significant structural changes at the interfaces
of the low-k region and the interfaces of other regions look
almost the same. Low-k interfaces in the normal stack are
wavy (Fig. 9 a), whereas low-k interfaces in the grinded
(a) Normal Stack stacks of BG 75 and 150 um (Fig. 9 b and c) are smooth. This
suggests that the force employed during back grinding
processes influences the low-k interfaces. Moreover, a
significant densification in the low-k layers (BD 1, 2, and 3)
is observed in the back grinded stacks as compared to the
normal stack as shown in the Fig. 8. The densification in the
(b) BG 300um low-k layers of the grinded stacks is in the range of 2-13% as
compared to the normal stack and it is expected mainly due to
the weaker physical and mechanical strength of the low-k

(c) BG 150 um

(d) BG 75um
Fig. 7 Optical micrographs of scratch tracks made on the
multilayered low-k stack. Arrows over the image indicate the
critical load (Lc) point, where significant delamination and
chip-off started.

(a) Normal Sample

(b) BG 75um

Fig. 8 Failure load, Adhesion/Cohesion strength, Elastic

modulus (E), and Hardness (H) as a function of wafer

3.3 TEM analysis

As discussed before, both nanoindentation and
nanoscratch test results indicate that the mechanical integrity
of low-k stack is enhanced after the back grinding processes. (c) BG 150um
To ascertain the effect of back grinding process on the low-k Fig. 9 TEM cross-section analysis of (a) normal sample, (b)
stack, TEM cross-section analysis has been conducted on both BG 75 and (c) BG 150 um. Low-k region has been zoomed in
the normal and back grinded stacks (BG 75 and 150 µm), as for densification analysis.
shown in Fig. 9 a, b and c. From cross-sectional TEM

1523 2008 Electronic Components and Technology Conference

4. Conclusions Pte. Ltd., Agere Systems Singapore Pte. Ltd., ASM
In this work, nanomechanical characterization of the Technology Singapore pte. Ltd., Cookson Semiconductor
normal and back grinded low-k stacks were carried out by Packaging Materials, DISCO Hi-Tec Singapore Pte. Ltd.,
using nanoindentation and nanoscratch techniques. Effect of Infineon Technologies Asia Pacific Pte. Ltd., Philips
the back grinding process is determined by analyzing of the Semiconductor, Sumitomo Bakelite Singapore Pte. Ltd.,
failure load (pop-in event in nanoindentation), hardness, Institute of Microelectronics (IME), Singapore Institute of
elastic modulus and adhesion/cohesion strength of the low-k Manufacturing Technology, Institute of High Performance
stack for both normal and back grinded samples. After back Computing and Institute of Materials Research &
grinding processes, the mechanical integrity of low-k stack is Engineering. The authors are grateful to members of EPRC
enhanced and thus the back grinded stacks exhibit higher VIII Project 3 as well as IME staffs who had contributed and
nanomechanical properties than the normal stacks. This can made this work possible.
be attributed mainly to the straightening of the low-k
interfaces and densification of the BD (low-k) layers during References
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Acknowledgments properties of low to ultraz dielectric constant SiOCH films”
This work is the result of a project initiated by the 8th IME J. Mater. Res., Vol. 20, No.8, Aug 2005, 2080-2093.
Electronic Packaging Research Consortium (EPRC VIII), the 17. N. Tayebi, A. A. Polycarpou and T. F. Cony, J. Mater. Res.,
members of which are Advanced Interconnect Tech (AIT) Vol. 19, No. 6, (2004).

1524 2008 Electronic Components and Technology Conference