5 4 3 2 1

3V3 J7

3
2 6
BANK14_T9 R19 1K 1 Q5 3
1 11
S9014 4
5

2
R34 4.7K 1K 1K 1K 6
BANK34_L4 1 8 BANK35_H5 1 8 BANK35_H1 1 8 7
3V3 2 7 2 7 2 7 8
3 6 3 6 3 6 9
BANK35_K2 4 5 BANK35_L2 4 5 BANK35_H2 4 5 10

22
21
20
19
18

3
U5 11
BANK14_P10 R20 1K 1 Q6 RN1 RN2 RN3 12

NC11
NC10
NC9
NC8
NC7
6 S9014 U3 BANK35_G1 R66 100R 13
VDD 9 12 BANK35_G2 R67 100R 14
10
15
RST DIG_1

2
C35 9 2K 2K 2K 15 5
8 DIG_2 BANK34_N3 1 8 BANK35_J3 1 8 BANK35_J1 1 8
D
100nF 3V3 DIG_3 2 7 2 7 2 7 GND D

16

17
BANK14_T10 R22 330R 11 BANK34_M4 3 6 BANK35_H4 3 6 BANK35_K1 3 6 CONN_VGA
3 23 BANK14_K13 R23 330R 7 SEG_A 4 5 4 5 4 5
GND CTS SEG_B

3
29 24 BANK14_P11 R24 330R 4
GND_TP RTS 26 BANK14_T15 BANK14_T8 R21 1K 1 Q7 BANK14_R11 R25 330R 2 SEG_C RN5 RN4 RN6
GND TXD 25 BANK14_T14 S9014 BANK14_R10 R26 330R 1 SEG_D
RXD BANK14_N9 R27 330R 10 SEG_E 2K 2K 2K C39
SEG_F

2
GND BANK14_K12 R28 330R 5 BANK34_N2 1 8 BANK35_H3 1 8 BANK35_L3 1 8 100nF
C36 BANK14_P9 R29 330R 3 SEG_G 2 7 2 7 2 7
J4 4.7uF DP 3 6 3 6 3 6
9 8 28 4 5 4 5 4 5 GND
G4 1 7 VBUS DTR 12 2352B
8 Vcc 2 5 REGIN SUSPEND 11 RN8 RN7 RN9
G3 D- 3 4 D- SUSPEND 2
7 D+ 4 D+ RI 1 2K
G2 ID 5 DCD 27 BANK35_K3 1 8
GND DSR

NC1
NC2
NC3
NC4
NC5
NC6
6 2 7
G1 3 6
MINI_USB 10 CP2102-GM 4 5
13
14
15
16
17
RN10

2K
GND 1 8
2 7
3 6
GND 4 5

RN11

3V3
J2 L3 4.7uH
REG_OUT AVDD10 DVDD10
1 2
3.3V 3 4 3.3V
BANK14_M12 5 6 BANK14_N13 C43 C42 C45 C44
BANK14_N14 7 8 BANK14_N16 4.7uF 100nF 4.7uF 100nF
BANK14_P15 9 10 BANK14_P16
C C
BANK14_R15 11 12 BANK14_R16
BANK14_T14 13 14 BANK14_T15
BANK14_P13 15 16 BANK14_P14 3V3 3V3
BANK14_T13 17 18 BANK14_R13 3V3 GND GND GNDGND
BANK14_T12 19 20 BANK14_R12

REG_OUT
BANK14_L13 21 22 BANK14_N12

DVDD10
DVDD10
AVDD10
AVDD10
AVDD10
BANK14_K12 23 24 BANK14_K13 PHY Address[2:0] = 001b
BANK14_P10 25 26 BANK14_P11
BANK14_N9 27 28 BANK14_P9 R48 R65
AN[1:0]=11b, NWay, advertise all capabilities
BANK14_T10 29 30 BANK14_R11 1.5K 0R
BANK14_T9 31 32 BANK14_R10 RXDLY:2nS, TXDLY:2nS
BANK14_T8 33 34 BANK14_R8 U6

64

10
60

20
26
37
49

13
59

33
48
35 36 SELRGV:1, 3.3V IO

7
BANK14_T7 BANK14_R7
BANK14_T5 37 38 BANK14_R6 BANK35_G4 53
COL/Mode:0, GMII Interface

REG_OUT
VDDREG

AVDD33_1
AVDD33_2

DVDD33_1
DVDD33_2
DVDD33_3
DVDD33_4

AVDD10_1
AVDD10_2
AVDD10_3

DVDD10_1
DVDD10_2
BANK14_P6 39 40 BANK14_R5 BANK35_G5 54 MDC 3V3

10
15
16
BANK14_N6 41 42 BANK14_M6 MDIO HR911130A
BANK34_L5 43 44 BANK34_P5 BANK35_B2 R61 100R 34 4.7K R57 14
3V3

SHLD1
SHLD2
SHLD3
BANK34_T4 45 46 BANK34_T3 BANK35_C2 35 GTX_CLK R43 530R 13 Yellow_LED+
BANK34_R3 47 48 BANK34_T2 BANK35_A4 42 TXEN 50 12 Yellow_LED-
49 50 TXCLK LED0_PHYAD0 GND Green_LED-
BANK34_R2 BANK34_R1 GND R60 4.7K BANK35_C7 47 51 4.7K R56 GND 11
BANK34_M5 51 52 BANK34_N4 TXER LED1_PHYAD1 52 R44 530R Green_LED+
BANK34_P4 53 54 BANK34_P3 BANK35_C3 36 LED2
BANK34_N1 55 56 BANK34_P1 BANK35_D4 39 TXD0 15 9 3V3
BANK34_M2 57 58 BANK34_M1 BANK35_A3 40 TXD1 MDI[3]- 14 8 MDI_3-
59 60 BANK35_B4 41 TXD2 MDI[3]+ MDI_3+
61 62 BANK35_A5 43 TXD3 12 6
63 64 BANK35_D5 44 TXD4 MDI[2]- 11 5 MDI_2-

R75

R76

R8

R9

R10
HDR_32X2 BANK35_D6 45 TXD5 MDI[2]+ MDI_2+
BANK35_C6 46 TXD6 9 7
TXD7 MDI[1]- 8 4 MDI_1-
R55 4.7K BANK35_F3 18 RTL8211EG MDI[1]+ MDI_1+
GND RXDV/PHY_AD2
BANK35_F5 24 6 3

1K

1K

1K

1K

1K
R54 4.7K BANK35_B1 30 RXCLK MDI[0]- 5 2 MDI_0-
3V3 RXER_AN1 MDI[0]+ MDI_0+
C12 22pF 1
GND BANK35_F4 19 TCT
BANK35_E1 21 RXD0 61 3 C40 P1
BANK35_F2 22 RXD1 CKXTAL1 4 100nF
B
BANK35_E5 23 RXD2 Y2 1 2 BANK14_R6 B
J3 R50 4.7K BANK35_D3 25 RXD3 25MHz D1
3V3 RXD4/SELRGV
3V3 R51 4.7K BANK35_E3 27 2
1 2 R52 4.7K BANK35_D1 28 RXD5/TXDLY 62 1 GND 1 2 BANK14_T5
3V3 3 4 3V3 3V3 RXD6/RXDLY CKXTAL2
3V3 R53 4.7K BANK35_E2 29 D2
BANK35_B7 5 6 BANK35_A7 RXD7_AN0 C11 22pF
7 8 GND
BANK35_B6 BANK35_B5 GND R47 4.7K BANK35_C1 31 1 1 2 BANK14_R7
BANK35_E6 9 10 BANK35_K5 R59 4.7K BANK35_A2 32 COL/Mode CLK125 D3
11 12 3V3 CRS
BANK35_J5 BANK35_J4 55 R46 4.7K
13 14 PMEB
GND_TP

BANK35_G5 BANK35_G4 BANK35_C4 38 57 R45 4.7K 1 2 BANK14_T7

3V3
GND_1
GND_2
GND_3

BANK35_C7 15 16 BANK35_C6 PHYRSTB ENSWREG D4

17 18
NC1
NC2

BANK35_D6 BANK35_D5 3V3 R58 4.7K 56 58 R42 2.49K GND

BANK35_A5 19 20 BANK35_A4 INTB RSET 1 2 BANK14_R8
BANK35_B4 21 22 BANK35_A3 D5
23 24
2
4
63

65

16
17

BANK35_D4 BANK35_C4
BANK35_C3 25 26 BANK35_C2
BANK35_B2 27 28 BANK35_A2
BANK35_C1 29 30 BANK35_B1
BANK35_E2 31 32 BANK35_D1
BANK35_E3 33 34 BANK35_D3
BANK35_F5 35 36 BANK35_E5
BANK35_F2 37 38 BANK35_E1 GND 3V3 3V3 3V3 3V3 3V3
BANK35_F4 39 40 BANK35_F3 J11
BANK35_G2 41 42 BANK35_G1 J9
BANK35_H2 43 44 BANK35_H1 BANK14_M12 1 7 BANK14_N13
BANK35_K1 45 46 BANK35_J1 BANK14_N14 2 8 BANK14_N16 R74 4.7k BANK35_J4 1 R6 R7 R78 R77 R80
BANK35_L3 47 48 BANK35_L2 BANK14_P15 3 9 BANK14_P16 R73 4.7k BANK35_J5 2 DAT2 4.7k 4.7K 4.7k 4.7K 4.7k
BANK35_H5 49 50 BANK35_H4 BANK14_R15 4 10 BANK14_R16 R72 4.7k BANK35_K5 3 CD/DAT3
BANK35_J3 51 52 BANK35_H3 5 11 4 CMD
53 54 GND GND 3V3 VDD
BANK35_K3 BANK35_K2 6 12 R71 DNP BANK35_E6 5 BANK35_B7 BANK14_M6 BANK14_N6 BANK14_R5 BANK14_P6
55 56 3.3V 3.3V CLK
BANK34_L4 BANK34_M4 6
57 58 GND VSS
BANK34_N3 BANK34_N2 R70 4.7k BANK35_B5 7 2 2 2 2 2
59 60 PMOD R69 4.7k BANK35_B6 8 DAT0
61 62 DAT1 SW1 SW2 SW3 SW4 SW5
63 64 4.7k BANK35_A7 9

GND1
GND2
GND3
GND4
R68
HDR_32X2 CD

A Micro SD_2 A

10
11
12
13
J10 1 1 1 1 1

BANK14_P13 1 7 BANK14_P14
BANK14_T13 2 8 BANK14_R13 GND
JP1 BANK14_T12 3 9 BANK14_R12 GND GND GND GND GND
BANK14_L13 4 10 BANK14_N12
3.3V 1 2 GND
R63 4.7K BANK34_M1 BANK34_M2 4.7K R64 5 11 MH1 MH2 MH3 MH4
3.3V 3 4 3.3V GND GND
BANK34_P1 BANK34_N1 6 12
5 6 3.3V 3.3V
BANK34_P3 BANK34_P4
BANK34_N4 7 8 BANK34_M5
BANK34_R1 9 10 BANK34_R2 PMOD Title
BANK34_T2
BANK34_T3
11
13
12
14
BANK34_R3
BANK34_T4 GND GND GND GND
QMTECH_DB_XC7A35T_DDR3_V02
BANK34_P5 15 16 BANK34_L5 Size Document Number Rev
17 18 C <Doc> 02
HDR_9X2
Date: Sunday, January 06, 2019 Sheet 1 of 1
5 4 3 2 1