Академический Документы
Профессиональный Документы
Культура Документы
COURSE OUTCOMES
CO 1: realize the role of functional units and various architectural features (K2)
CO 3: identify the factors that degrade the pipeline performance and its counter measures (K4)
CO 5: To learn the different ways of communication with I/O devices and interfaces. (K2)
Fixed point arithmetic- Addition and subtraction of signed numbers –multiplication of positive
Numbers- signed operand multiplication and fast multiplication –restoring and non-restoring division
algorithm. Fundamental concepts – Execution of a complete instruction – Multiple bus organization
– Hardwired control – Micro programmed control.
A Basic MIPS implementation – Building a Data path – Control Implementation Scheme – Pipelining –
Pipelined data path and control – Handling Data Hazards & Control Hazards – Exceptions.
Basic concepts – Semiconductor RAM – ROM – Speed – Size and cost – Cache memories –Improving
cache performance – virtual memory, Flynn‘s classification – SISD, MIMD, SIMD, SPMD, and Vector
Architectures – Hardware multithreading – Multi-core processors and other Shared Memory
Multiprocessors.
UNIT V I/O SYSTEMS 9
Accessing I/O Devices – Interrupts – Direct Memory Access – Bus structure – Bus operation –
Arbitration – Interface circuits – USB. Input/output system, programmed I/O, DMA and interrupts,
I/O processors.
TEXT BOOKS:
1. David A. Patterson and John L. Hennessy, Computer Organization and Design: The
Hardware/Software Interface, Fifth Edition, Morgan Kaufmann / Elsevier, 2014.
2. Carl Hamacher, Zvonko Vranesic, Safwat Zaky and Naraig Manjikian, Computer Organization and
Embedded Systems, Sixth Edition, Tata McGraw Hill, 2012.
REFERENCES:
1. William Stallings, Computer Organization and Architecture – Designing for Performance, Eighth
Edition, Pearson Education, 2010.
2. John P. Hayes, Computer Architecture and Organization, Third Edition, Tata McGraw Hill, 2012.