Name:Fahmida Ahmed Kona

ID:C191244
Experiment-01
Experiment name: Implementation of basic AND, OR, NOT gate
(2 input & 3 input)
1.2 input And gate
• Electronic workbench
• Trainer board.
Requirement:

• Trainer board
• Chip(AND)
• Wire(Input+output)
1.2 input And gate
• 1.Draw Symbol: • 2.Truth Table:

A B Y
0 0 0
0 1 0
1 0 0
1 1 1
Circuit Diagram of 2input AND gate:
• 2 input AND gate:

AND
 2.2 input OR gate
electronic workbench
trainor board
1.Draw symbol 2.Truth table

A B Y
0 0 0
0 1 1
1 0 1
1 1 1
Requirement:
1.trainor board
2,chip(or)
3.wire(input +outout)
• Circuit Diagram of 2input OR gate:
• 2 input OR gate:

OR
 3.NOT gate
electronic workbench
trainor board
1.Draw symbol 2.Truth table

A Y
0 1
1 0
Requirement:
1.trainor board
2,chip(NOT)
3.wire(input +outout)
• Circuit Diagram of NOT gate:
• NOT gate:

NOT
 4.3 input AND gate
electronic workbench
trainor board
1.Draw symbol 2.Truth table
Requirement:
1.trainor board
2,chip(AND)
3.wire(input +outout)
• Circuit Diagram of 3 input AND gate:
• 3 input AND gate:

AND
 5.3 input OR gate
electronic workbench
trainor board
1.Draw symbol 2.Truth table
Requirement:
1.trainor board
2,chip(OR)
3.wire(input +outout)
• Circuit Diagram of 3 input OR gate:
• 3 input OR gate:

OR
 Experiment-02
Experiment name: Implementation of universal gate(2 input and 3 input)
(2 input & 3 input)
1.2 input NAND & NOR gate
• Electronic workbench
• Trainer board.
• 1.Draw Symbol • 2.Truth table
A B X Y
0 0 1 1
0 0 1 0
1 1 1 0
1 1 0 0
Requirement:
1.trainor board
2,chip(NAND NOR)
3.wire(input +outout)
• Circuit Diagram of 2 input NAND & NOR gate:
• 3 input NAND & NOR gate:

NAND

NOR
 2.3 input NAND & NOR gate
• Electronic workbench
• Trainer board.

• 1.Draw Symbol • 2.Truth table

A B c x Y
0 0 0 1 1
0 0 1 1 0
0 1 0 1 0
0 1 1 1 0
1 0 0 1 0
1 0 1 1 0
1 1 0 1 0
1 1 1 0 0
Requirement:
1.trainor board
2,chip(NAND NOR)
3.wire(input +outout)
• Circuit Diagram of 3 input NAND & NOR gate:
• 3 input NAND & NOR gate:

NAND

NOR
 Experiment-03
Experiment name: Implementation of De Morgan's Law
1.(A.B)'=A'+B'
• Electronic workbench
• Trainer board.

• 1.Draw Symbol • 2.Truth table

A (AB)'=X A'+B'=Y
A B A' B' B
0 1 1
0 0 1 1
0 1 1
0 1 1 0
0 1 1
1 0 0 1
1 0 0
1 1 0 0
Requirement:
1.trainor board
2,chip(NAND NOT OR)
3.wire(input +outout)
• Circuit Diagram of (A.B)'=A'+B':
• (A.B)'=A'+B':

NAND

NOT

NOR
NOT
 2.(A+B)'=A'.B'
• Electronic workbench
• Trainer board.

• 1.Draw Symbol • 2.Truth table

A B A' B' A+B (AB)'=X A'+B'=Y

0 0 1 1 0 1 1
0 1 1 0 1 0 0
1 0 0 1 1 0 0
1 1 0 0 1 0 0
Requirement:
1.trainor board
2,chip(NAND NOT OR)
3.wire(input +outout)
• Circuit Diagram of (A+B)'=A'.B':
• (A+B)'=A'.B':

NOR

NOT

AND
NOT
 Experiment-04
Experiment name: BCD code to Excess-03
• 1.Draw Symbol
2.Truth table:

Decimal A B C D W X Y Z
0 0 0 0 0 0 0 1 1
1 0 0 0 1 0 1 0 0
2 0 0 1 0 0 1 1 1
3 0 0 1 1 0 1 1 0
4 0 1 0 0 0 1 0 1
5 0 1 0 1 1 0 0 0
6 0 1 1 0 1 0 0 1
7 0 1 1 1 1 0 1 0
8 0 0 0 0 1 0 1 1
9 1 0 0 1 1 1 0 0
Requirement:
1.trainor board
2,chip(AND NOT OR X-OR)
3.wire(input +outout)
• Circuit Diagram of BCD code to Excess-03 :
BCD code to Excess-03
OR
AND
OR

X-OR

NOT
X-OR

NOT
 Experiment-05
Experiment name:Half adder & full adder
1.Half adder

1.Draw Symbol 2. Truth table

A B s c

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1
Requirement:
1.trainor board
2,chip(AND X-OR)
3.wire(input +outout)
• Circuit Diagram of a Half adder :
• Half adder:

Half adder
 1.Full adder

1.Draw Symbol 2. Truth table

A B c x y
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Requirement:
1.trainor board
2,chip(AND OR X-OR)
3.wire(input +outout)
• Circuit Diagram of a Full adder :
• Full adder:

Full adder