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632 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 57, NO. 3, MARCH 2010
A. DCO Model
(4)
The DCO can be modeled as a conventional VCO with a
quantized input control signal. The VCO output is given by
(5)
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NAMGOONG: OBSERVER-CONTROLLER DIGITAL PLL 633
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634 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 57, NO. 3, MARCH 2010
(25)
(26)
(24) (31)
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NAMGOONG: OBSERVER-CONTROLLER DIGITAL PLL 635
(33)
Since
(34)
(38)
the variance of as in (31) can be shown to be
where is the steady-state Kalman gain given in (32). The
first and second equalities are obtained by recursively expanding
to using (30). The third equality results from (22)
(35) and (23). The final equality is simply the sum of finite geometric
To better understand the effects of TDC noise , DCO noise series. From (31) and (35), we can readily compute
, and transport delay on the overall jitter performance, as , i.e.,
we make simplifying assumptions. If , the jitter
(39)
variance in (35) simplifies to
Combining (39) with (38), the steady-state auto-correlation
function of becomes
(36) (40)
As is clear from (36), output jitter is directly proportional to where the dependency on transport delay is buried in the
transport delay and is independent of when . phase noise jitter variance given in (35). Performing the
If , the jitter variance in (35) becomes Fourier transform on (40), the phase noise spectrum is given by
(37)
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636 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 57, NO. 3, MARCH 2010
(42)
(43)
(49)
(45)
Compared to the conventional loop filter given in (5), the pro-
portional–integral structure is the same. The only difference is
(46) that the fixed proportional gain and integral gain of the
conventional loop filter are replaced with Kalman gain values
and , respectively. Therefore, by appropriately
The DCO input can be determined from and selecting and , the steady-state jitter variance in (35)
using (16). The controller structure, which is shown in becomes equivalent for .
Fig. 6, operates on the observer state values and
to generate . The controller also gener-
V. OSCILLATOR PULLING
ates and to drive the observer.
The controller structure in Fig. 6 has a critical path corre- The proposed observer-controller approach to DPLL design
sponding to the time required to perform the series of additions, can be made more robust to oscillator pulling, which occurs in
the number of which increases with . As the cascaded delay many highly integrated modern transceivers. Oscillator pulling
elements and adders are basically of FIR/IIR direct-form real- generally refers to an aggressor signal operating at a nearby fre-
ization, the equivalent transposed form can be used to reduce quency coupling with the oscillator circuit via parasitic paths.
the critical path flow to one addition between delay elements This aggressor signal could be a sinusoidal signal from another
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NAMGOONG: OBSERVER-CONTROLLER DIGITAL PLL 637
oscillator or a data modulated signal such as from the power am- Linearizing about the estimate , the linear tran-
plifier (PA) output in a direct modulation transmitter. This paper sition matrix at time is
focuses on the oscillator pulling from a sinusoidal aggressor.
The effect of oscillator pulling on VCO (or DCO) is modeled as
in [16] and [17].
When a small sinusoidal signal (relative to oscillator output)
with frequency is injected to a VCO operating at frequency
, the excess phase in (1) can be described by the fol-
lowing differential equation (first derived by Adler [16] and al- (53)
ternatively derived by Razavi [17]):
Unlike in (17), the state transition matrix changes with
every time step. Estimation of is achieved
using (53) with the Kalman filter equations in (24)–(26) and the
(50) nonlinear prediction estimate in (52). These estimates can then
where is referred to as the “one-sided” lock range (in ra- be used to update the DCO as described earlier. In formulating
dians). The ideal PD output (i.e., no additive noise) in (13) and the nonlinear state transition equations in (52) and (53), we as-
(14) is then given by sumed exact knowledge of and . In practice,
they need to be estimated, which can be accomplished during
calibration by operating the PLL in open-loop mode. A poten-
tial calibration approach is to collect a large sample of PD output
(51) in (51) in open-loop mode then perform an FFT. The magnitude
and frequency of the largest non-dc tone are related to
where represents the phase uncertainty due to sampling offset and , respectively. To minimize the spectral leakage
and any random variations in . caused by noninteger number of sine wave cycles in the FFT
The sinusoidal term in (51) can be viewed as a DCO additive input, can be slightly adjusted and/or a windowing func-
noise centered at frequency . In a conventional PLL, tion can be applied.
the effect of the injected sinusoidal noise is suppressed if the In the presence of transport delay and assuming a deadbeat
loop filter bandwidth is sufficiently wide compared to . system, the SVF operates on the predicted state value, i.e.,
Increasing the loop bandwidth to mitigate oscillator pulling is
not always possible, since the loop may no longer be stable. (54)
Even if it were stable, the loop may be too wide to adequately at-
tenuate the TDC noise, greatly degrading the output phase noise where is a vector of zeros. The -step prediction is given by
performance. Unlike the conventional loop filter, however, the
proposed loop filter can be designed to suppress the injected si-
nusoidal noise while maintaining low phase noise. (55)
In the proposed observer-controller loop filter, the Kalman
filter as described earlier cannot be used, since the sine operation A. Implementation Structure
makes the difference equation in (51) nonlinear. Instead, the ex-
tended Kalman filter (EKF) is employed to estimate the excess To determine the observer structure, (52) is expanded then
phase. EKF operates by linearizing the nonlinear state transition rearranged to obtain
function around the current state estimate then employing stan-
dard linear Kalman filter equations on the linearized transition
matrices.
The nonlinear state transition estimate used in EKF is repre-
sented by
(56)
(57)
where (58)
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638 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 57, NO. 3, MARCH 2010
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NAMGOONG: OBSERVER-CONTROLLER DIGITAL PLL 639
Fig. 9. Phase noise output jitter standard deviation versus number of trans- Fig. 11. Phase noise output jitter standard deviation versus . Conven-
port delays N . Conventional loop bandwidth is set to minimize assuming tional loop bandwidth is set to minimize assuming number of transport
=04 : and =4
. Jitter analysis is based on (11) and (35). delay N =5 and =04 : . Jitter analysis is based on (11) and (35).
Fig. 12. Transient response of conventional and proposed loop filters assuming
Fig. 10. Phase noise output jitter standard deviation versus . Conven- N =5 , and frequency step of 10 kHz is applied at time step 10. The conven-
tional loop bandwidth is set to minimize assuming number of transport tional loop bandwidth is set to the maximum allowed, as shown in Fig. 3.
delay N =5 and . Jitter analysis is based on (11) and (35).=4
the state feedback is a deadbeat system, the response time to an
however, decreases with increasing TDC noise. Therefore, the input stimulus is the number of poles in the system. Since the la-
proposed loop filter is most effective compared to the conven- tency is five cycles and the plant introduces additional two poles,
tional loop filter when , while the jitter performance seven cycles are needed to converge after an input frequency
advantage diminishes as TDC noise becomes more significant step.
compared to the DCO noise. Figs. 13 and 14 plot the phase noise spectrum of the con-
In Fig. 12, the transient response of the conventional and pro- ventional and proposed loop filter, respectively, with oscillator
posed loop filters are shown when a step input frequency of 10 pulling. The two figures assume , , ,
kHz is applied at the tenth time step. Fig. 12 plots in de- , and . To best suppress
grees as a function of discrete time increments of inter- the effect of the oscillator pulling, the conventional loop band-
vals, where is assumed to be 26 MHz. As in earlier simu- width in Fig. 13 is set to the maximum allowed, as specified
lations, a transport delay of is assumed. The conven- in Fig. 3, for . When the conventional loop filter is em-
tional loop bandwidth is set at the maximum allowed as shown ployed, the phase noise spectrum has a tone at 1 MHz offset,
in Fig. 3 for . The response time of the conventional as shown in Fig. 13. By contrast, the injected tone interferer is
loop filter is roughly the inverse of the loop bandwidth, which essentially removed from phase noise spectrum of the proposed
is approximately and corresponds to a response time of observer-controller loop filter in Fig. 14. Furthermore, as de-
approximately 100 cycles. In the proposed loop filter, seven cy- rived in Section III-C, the phase noise spectrum at low frequen-
cles are needed to stabilize the loop, as shown in Fig. 12. As cies of the proposed DPLL is that of a first-order lowpass filter.
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640 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 57, NO. 3, MARCH 2010
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NAMGOONG: OBSERVER-CONTROLLER DIGITAL PLL 641
[13] R. E. Best, Phase Locked Loops, Theory, Design and Applications. Won Namgoong (SM’08) received the B.S. degree
New York: McGraw-Hill, 1984. in electrical engineering and computer science from
[14] Applied Optimal Estimation, A. Gelb, Ed. Cambridge, MA: MIT the University of California at Berkeley, in 1993, and
Press, 1974. the M.S. and Ph.D degrees in electrical engineering
[15] L. Rabiner and B. Gold, Theory and Application of Digital Signal Pro- from Stanford University, Stanford, CA, in 1995 and
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[16] R. Adler, “A study of locking phenomena in oscillators,” IEEE Proc., He is currently an Associate Professor in the
vol. 61, no. 10, pp. 1380–1385, Oct. 1973. Electrical Engineering Department, the University
[17] B. Razavi, “A study of injection locking and pulling in oscillators,” of Texas at Dallas. Previously, he was with the
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[18] M. Lee and A. Abidi, “A 9 b, 1.25 ps resolution coarse-fine time-to- munications. His current research interests include
digital converter in 90 nm CMOS that amplifies a time residue,” IEEE signal processing systems and RF/analog circuits.
J. Solid-State Circuits, vol. 43, no. 4, pp. 769–777, Apr. 2008. Dr. Namgoong has received the National Science Foundation (NSF) Faculty
CAREER Award in 2002.
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