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Jitter
Jitter in technical terms is the deviation in or displacement of some aspect of the pulses in a high-frequency digital
signal. As the name suggests, jitter can be thought of as shaky pulses. The deviation can be in terms of amplitude,
phase timing, or the width of the signal pulse. Another definition is that it is "the period frequency displacement of
the signal from its ideal location." Among the causes of jitter are electromagnetic interference (EMI) and crosstalk
with other signals. Jitter can cause a display monitor to flicker; affect the ability of the processor in a personal
computer to perform as intended; introduce clicks or other undesired effects in audio signals, and loss of transmitted
data between network devices. The amount of allowable jitter depends greatly on the application.
Jitter is the time variation of a periodic signal in electronics and telecommunications, often in relation to a reference
clock source. Jitter may be observed in characteristics such as the frequency of successive pulses, the signal
amplitude, or phase of periodic signals. Jitter is a significant, and usually undesired, factor in the design of almost all
communications links (e.g., USB, PCI-e, SATA, OC-48). In clock recovery applications it is called timing jitter.[1]
Jitter can be quantified in the same terms as all time-varying signals, e.g., RMS, or peak-to-peak displacement. Also
like other time-varying signals, jitter can be expressed in terms of spectral density (frequency content).
Jitter period is the interval between two times of maximum effect (or minimum effect) of a signal characteristic that
varies regularly with time. Jitter frequency, the more commonly quoted figure, is its inverse. Generally, very low
jitter frequency is not of interest in designing systems, and the low-frequency cutoff for jitter is typically specified at
1 Hz.
Sampling jitter
In conversion between digital and
analog signals, the sampling frequency
is normally assumed to be constant.
Samples should be converted at regular
intervals. If there is jitter present on the
clock signal to the analog-to-digital
converter or a digital-to-analog
converter then the instantaneous signal
error introduced will be proportional to
the slew rate of the desired signal and
the absolute value of the clock error.
Various effects can come about
depending on the pattern of the jitter in
relation to the signal. In some In telecommunications circuit analysis an Eye diagram shows distortions caused by jitter.
This is a consideration in high-frequency signal conversion, or where the clock signal is especially prone to
interference.
Jitter 2
In networking, in particular IP networks such as the Internet, jitter can refer to the variation (statistical dispersion) in
the delay of the packets.
Types
Random jitter
Random Jitter, also called Gaussian jitter, is unpredictable electronic timing noise. Random jitter typically follows a
Gaussian distribution or Normal distribution. It is believed to follow this pattern because most noise or jitter in a
electrical circuit is caused by thermal noise, which does have a Gaussian distribution. Another reason for random
jitter to have a distribution like this is due to the central limit theorem. The central limit theorem states that
composite effect of many uncorrelated noise sources, regardless of the distributions, approaches a Gaussian
distribution. One of the main differences between random and deterministic jitter is that deterministic jitter is
bounded and random jitter is unbounded.
Deterministic jitter
Deterministic jitter is a type of clock timing jitter or data signal jitter that is predictable and reproducible. The
peak-to-peak value of this jitter is bounded, and the bounds can easily be observed and predicted. Determistic jitter
can either be correlated to the data stream (data-dependent jitter) or uncorrelated to the data stream (bounded
uncorrelated jitter). Examples of data-dependent jitter duty-cycle dependent jitter (also known as duty-cycle
distortion) and intersymbol interference. One example of bounded uncorrelated jitter is Periodic jitter.
Jitter 4
n BER
6.4 10−10
6.7 10−11
7 10−12
7.3 10−13
7.6 10−14
Total jitter
Total jitter (T) is the combination of random jitter (R) and deterministic jitter (D):
T = Dpeak-to-peak + 2× n×Rrms,
in which the value of n is based on the bit error rate (BER) required of the link.
A common bit error rate used in communication standards such as Ethernet is 10−12.
Testing
Testing for jitter and its measurement is of growing importance to electronics engineers because of increased clock
frequencies in digital electronic circuitry to achieve higher device performance. Higher clock frequencies have
commensurately smaller eye openings, and thus impose tighter tolerances on jitter. For example, modern computer
motherboards have serial bus architectures with eye openings of 160 picoseconds or less. This is extremely small
compared to parallel bus architectures with equivalent performance, which may have eye openings on the order of
1000 picoseconds.
Testing of device performance for jitter tolerance often involves the injection of jitter into electronic components
with specialized test equipment.
Jitter is measured and evaluated in various ways depending on the type of circuitry under test. For example, jitter in
serial bus architectures is measured by means of eye diagrams, according to industry accepted standards. A less
direct approach—in which analog waveforms are digitized and the resulting data stream analyzed—is employed
when measuring pixel jitter in frame grabbers.[4] In all cases, the goal of jitter measurement is to verify that the jitter
will not disrupt normal operation of the circuitry.
There are standards for jitter measurement in serial bus architectures. The standards cover jitter tolerance, jitter
transfer function and jitter generation, with the required values for these attributes varying among different
applications. Where applicable, compliant systems are required to conform to these standards.
Mitigation
Anti-jitter circuits
Anti-jitter circuits (AJCs) are a class of electronic circuits designed to reduce the level of jitter in a regular pulse
signal. AJCs operate by re-timing the output pulses so they align more closely to an idealised pulse signal. They are
widely used in clock and data recovery circuits in digital communications, as well as for data sampling systems such
as the analog-to-digital converter and digital-to-analog converter. Examples of anti-jitter circuits include
phase-locked loop and delay-locked loop. Inside digital to analog converters jitter causes unwanted high-frequency
distortions. In this case it can be suppressed with high fidelity clock signal usage.
Jitter 5
Jitter buffers
Jitter buffers or de-jitter buffers are used to counter jitter introduced by queuing in packet switched networks so that
a continuous playout of audio (or video) transmitted over the network can be ensured. The maximum jitter that can
be countered by a de-jitter buffer is equal to the buffering delay introduced before starting the play-out of the
mediastream. In the context of packet-switched networks, the term packet delay variation is often preferred over
jitter.
Some systems use sophisticated delay-optimal de-jitter buffers that are capable of adapting the buffering delay to
changing network jitter characteristics. These are known as adaptive de-jitter buffers and the adaptation logic is
based on the jitter estimates computed from the arrival characteristics of the media packets. Adaptive de-jittering
involves introducing discontinuities in the media play-out, which may appear offensive to the listener or viewer.
Adaptive de-jittering is usually carried out for audio play-outs that feature a VAD/DTX encoded audio, that allows
the lengths of the silence periods to be adjusted, thus minimizing the perceptual impact of the adaptation.
Dejitterizer
A dejitterizer is a device that reduces jitter in a digital signal. A dejitterizer usually consists of an elastic buffer in
which the signal is temporarily stored and then retransmitted at a rate based on the average rate of the incoming
signal. A dejitterizer is usually ineffective in dealing with low-frequency jitter, such as waiting-time jitter.
References
This article incorporates public domain material from websites or documents of the General Services
Administration (in support of MIL-STD-188).
[1] Wolaver, 1991, p.211
[2] Comer, Douglas E. (2008). Computer Networks and Internets (http:/ / books. google. co. in/ books?id=tm-evHmOs3oC& pg=PA476).
Prentice Hall. pp. 476. ISBN 9780136061274. .
[3] RFC 3393, IP Packet Delay Variation Metric for IP Performance Metrics (IPPM), IETF (2002)
[4] Khvilivitzky, Alexander (2008). "Pixel Jitter in Frame Grabbers" (http:/ / www. sensoray. com/ support/ pixjiter. htm). . Retrieved
2008-02-15.
Further reading
• Wolaver, Dan H. 1991. Phase-Locked Loop Circuit Design, Prentice Hall, ISBN 0-13-662743-9, pages 211-237
• Trischitta, Patrick R. and Varma, Eve L. 1989. Jitter in Digital Transmission Systems, Artech ISBN 089006248X
External links
• Jitter in VoIP - Causes, solutions and recommended values (http://www.en.voipforo.com/QoS/QoS_Jitter.
php)
• Jitter Buffer (http://searchenterprisevoice.techtarget.com/sDefinition/0,,sid66_gci906844,00.html)
• Definition of Jitter in a QoS Testing Methodology (ftp://ftp.iol.unh.edu/pub/mplsServices/other/
QoS_Testing_Methodology.pdf)
• An Introduction to Jitter in Communications Systems (http://www.maxim-ic.com/appnotes.cfm/an_pk/1916/
CMP/WP-34)
• Jitter Specifications Made Easy (http://www.maxim-ic.com/appnotes.cfm/an_pk/377/CMP/WP-35) A
Heuristic Discussion of Fibre Channel and Gigabit Ethernet Methods
• Jitter in Packet Voice Networks (http://www.cisco.com/en/US/tech/tk652/tk698/
technologies_tech_note09186a00800945df.shtml)
• Clock and data recovery/Introduction/Definition of (phase) jitter (http://en.wikibooks.org/wiki/
Clock_and_data_recovery/Introduction/Definition_of_(phase)_jitter)
Jitter 6
• Zamek, Iliya. SOC-System Jitter Resonance and Its Impacet on Common Approach to the PDN Impedence (http:/
/www.altera.com/literature/cp/cp-01048-jitter-resonance.pdf). Presented at International Test Conference
2008.
• Li, Mike P. Jitter and Signal Integrity Verification for Synchronous and Asynchronous I/Os at Multiple to 10
GHz/Gbps (http://www.altera.com/literature/cp/cp-01049-jitter-si-verification.pdf). Presented at
International Test Conference 2008.
• Li, Mike P. A New Jitter Classification Method Based on Statistical, Physical, and Spectroscopic Mechanisms
(http://www.altera.com/literature/cp/cp-01052-jitter-classification.pdf). Presented at DesignCon 2009.
• Liu, Hui, Hong Shi, Xiaohong Jiang, and Zhe Li. Pre-Driver PDN SSN, OPD, Data Encoding, and Their Impact
on SSJ (http://www.altera.com/literature/cp/cp-01055-impact-ssj.pdf). Presented at Electronics Components
and Technology Conference 2009.
• Phabrix SxE - Hand-held Tool for eye and jitter measurement and analysis (http://www.phabrix.com)
• Miki, Ohtani, and Kowalski Jitter Requirements (https://mentor.ieee.org/802.11/dcn/04/
11-04-1458-00-000n-jitter-requirements.ppt) (Causes, solutions and recommended values for digital audio)
Article Sources and Contributors 7
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