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(EE124‐01) Lecture 19
HIU‐YUNG WONG
APR. 8, 2020
hiuyung.wong@sjsu.edu, Office: ENG363
http://www.sjsu.edu/people/hiuyung.wong/index.html
SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 1
Outline
Frequency Response
◦ MOSFET Cap
◦ Frequency response of single stage amplifier
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Announcements
Assignment 3 solution posted.
Assignment 4 posted. Due date: 4/12, NO late submission option.
Mid‐term 2: Apr 13, Ch 9, 10, 11 (cascode, differential amplifier, frequency response)
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Article of the Day
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What did we learn in the last lecture?
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High Frequency Model of MOSFET
MOSFET Capacitance Analysis is complicated.
We only need to know the capacitance in saturation (Why?)
Draw the carrier distribution:
Btw, what is body/well/bulk?
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MOSFET HF Model
If not mentioned, assume Body is grounded (DC 0V or VDD) in EE124. But in reality, not always.
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Exercise
Identify all capacitances and simplify
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Transit Frequency fT of transistor
Transit/cut‐off frequency: small‐signal current gain falls to 1
A measure of how fast a transistor is
Draw the relevant capacitance but ignore CGD
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Frequency Response of CS stage
Now we combine bias capacitors (important for low
frequency, short for high frequency) and MOSFET intrinsic
capacitors together (open for low frequency, important for
Chapter 11 high frequency)
Frequency Response
Our goal is to plot the Bode plot of the amplifier
Mid‐term up to slide 9. But understanding the following slides
help your mid‐term (just application of what you have learnt!)
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Frequency Response Analysis
No worry, this is a map, refer to it when needed
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LF Response of CS Amplifier
Vx/Vin
This is how we usually bias CS Amplifier
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LF Response of CS Amplifier
Vout/Vx
This is how we usually bias CS Amplifier
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LF Response of CS Amplifier
This is how we usually bias CS Amplifier
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Midband Gain of CS Stage
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High Frequency Response of CS
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High Frequency Response of CS
Include Voltage Source Resistor (Rsource)
CS stage suffers from Miller Effect!
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Input Impedance
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