Solid-State Electronics 45 (2001) 963±976

Field emission displays: a critical review

A.A. Talin *, K.A. Dean, J.E. Jaskie
Advanced Display Technologies Laboratory, Motorola Inc., MD AZ83/ML26, 7700 S. River Pkwy, Tempe, Arizona 85284, USA
Received 23 October 2000

Abstract
The goal of making attractive ¯at panel displays (FPDs) based on arrays of cold cathodes has now become a reality.
Pixtech and Futaba have begun commercial production of low voltage, monochrome ®eld emission displays (FEDs).
Moreover, public response to the high voltage, full color, VGA FED prototypes shown by Candescent and Motorola at
various technical meetings and exhibits has been extremely positive and encouraging. Yet, the future of the FED in-
dustry is uncertain. The tremendous improvements in visual quality and reduction in manufacturing cost of liquid
crystal displays, as well as the formidable progress made in other FPD technologies has raised the standard for FEDs.
In this article, we ®rst review the status of FEDs based on the Spindt microtip emitter. We focus on the scalability of the
Spindt process to large substrates, phosphor selection, high voltage stability, and display lifetime. Second, we discuss in
detail the recent advances made in alternate cold cathode technology, including carbon nanotubes and composite
materials, and their potential advantages for FPD. This new technology o€ers a tremendous opportunity to lower
capital investment, to cut manufacturing costs and to challenge the existing ¯at panel industry. Ó 2001 Elsevier Science
Ltd. All rights reserved.

1. Introduction phones and digital cameras [1]. Given the magnitude

The global market for ¯at panel displays (FPDs) was
estimated at 18.5 billion dollars in sales in 1999 [1]. The
market is predicted to reach $70 billion by the year 2010,
with production totals for thin ®lm transistor (TFT)
liquid crystal displays (LCDs) alone to exceed that of
cathode ray tubes (CRTs) by the year 2007 [1]. The
tremendous growth in FPD popularity is due largely to
the improvements in quality and a€ordability of LCDs.
LCDs account for roughly 75% of the 1999 FPD mar-
ket, and are now extending their reach beyond the lap-
top to the desktop monitor applications. Other types of
FPDs are also increasingly ®nding their way to the
consumer showrooms. These include both plasma and
projection displays, aimed at the high-end, large area
(>40 in. diagonal) home entertainment and commercial
display systems, as well as organic light emitting dis-
plays, with high-volume mass market applications in cell
*
Corresponding author. Tel.: +1-480-755-5379; fax: +1-480-
755-5055.
E-mail address: A781AA@motorola.com (A.A. Talin).
0038-1101/00/$ - see front matter Ó 2001 Elsevier Science Ltd. All rights reserved.
PII: S 0 0 3 8 - 1 1 0 1 ( 0 0 ) 0 0 2 7 9 - 3
and growth potential of the display market, it is not
surprising that alternative FPD technologies continue to
attract investment because they hold the promise of
surpassing LCDs in price, performance, and scalability.
In this review article, we focus on one such technology,
the ®eld emission display (FED).
The FED is a vacuum electron device, sharing many
common features with the vacuum ¯uorescent display
(VFD) and the CRT (see Fig. 1). Just like in a VFD or a
CRT, the image in a FED is created by impinging
electrons from a cathode onto a phosphor coated screen.
In a CRT the electron source is made up of up to three
thermionic cathodes. A set of electromagnetic de¯ection
coils rasters the electron beam across a phosphor screen,
which is typically held at a potential of 15±30 kV. In a
FED the electron source consists of a matrix-addressed
array of millions of cold emitters. This ®eld emission
array (FEA) is placed in close proximity (0.2±2.0 mm) to
a phosphor faceplate and is aligned such that each
phosphor pixel has a dedicated set of ®eld emitters. In
addition to the anode and cathode, a FED contains
ceramic spacers to prevent the structure from collapsing
under atmospheric pressure, a frame coated on both
964 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976

Fig. 1. CRTs and FEDs share many common features, including a glass vacuum envelope, and phosphor coated anode, and a cathode
electron source. (a) In a CRT electrons from a triad of thermionic emitters are scanned across the phosphor screen with electro-
magnetic de¯ection coils. (b) In a FED electrons from an addressable array of cold cathode impinge onto a precisely aligned phosphor
anode; at a 1 mm gap and anode voltage of 5 kV, proximity focusing is sucient to produce color pixels with dimensions below 100
lm.

Fig. 2. SEMs of Spindt type ®eld emission tips manufactured at Motorola (a) a top down view of an array of nine tips and (b) a cross-
section of one emitter. 250 emitters such as the ones shown are used for one color subpixel in the Motorola panels.

sides with low-melting glass frit, a getter used to remove
residual gases inside the package, row and column
drivers, and an anode power supply.
The idea of a FED dates back to the 1960s, when Ken
Shoulders of the Stanford Research Institute (SRI)
proposed electron beam microdevices based on FEAs
[2]. The ®rst operating FEAs were demonstrated by
Capp Spindt, also of SRI, in 1968 [3]. Spindt successfully
applied semiconductor based manufacturing methods to
fabricating arrays of micron-sized, self-aligned metal
cones, each surrounded by a metal gate (a Motorola
Spindt-type ®eld emitter tip is shown in Fig. 2). How-
ever, FEDs did not receive serious commercial consid-
eration until 1985, when Robert Meyer and his team at
the Laboratoire dÕElectronique de Technologie et dÕIn-
strumentation (LETI) demonstrated the ®rst FED pro-
totype [4]. This technological breakthrough convinced
many industrial groups world wide to invest in FED
development. The FED was particularly attractive to
start-ups and to large companies not already involved in
LCD manufacturing. The rationale was that the FED,
with its promise of better performance at a lower cost,
would allow these companies to technologically Ôleap-
frogÕ the already established LCD manufacturers.
 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976
Presently, only two companies, the French start-up
Pixtech and the Japanese based Futaba, are producing
FEDs for commercial consumption. The products tar-
geted by these companies constitute small volume, highly
specialized applications, where FEDs have a distinct
advantage in performance to LCDs and where the cost
premium due to the small scale production of the FED is
less of a factor.
Many of the challenges associated with producing
FEDs with a desirable image quality and at a competi-
tive price were not fully appreciated [5]. The central
problem faced by FED companies has been either the
production of acceptable phosphors for low-anode volt-
age (Vanode < 1 kV) displays, or the arcing, spacer visi-
bility and cathode lifetime problems associated with
high-anode-voltage (Vanode < 1 kV) displays. In addition,
LCDs have improved dramatically in both quality and
cost. Nevertheless, interest in FEDs remains strong both
in industry and universities [5].
We begin with a review of the Spindt tip cathode
fabrication process. We then go on to analyze in detail
the status of low anode voltage monochrome FEDs
(LVFED), which are now making their market debut.
Next, we discuss the high-anode voltage FED design
(HVFED), and how the physics and chemistry of FEDs
are a€ected when the anode potential is raised to several
kilovolts. Finally, we describe the on-going research ef-
forts focused on the development of Ônext-generationÕ of
FEDs, such as those based on carbon cold cathodes.
While these new materials o€er exciting new possibilities
for making cheaper, larger, and more robust displays,
much of the physics which governs the operation of
Spindt-based FEDs remains unchanged. In other words,
technological hurdles such as long-term cathode reli-
ability and high voltage break down have to be ad-
dressed regardless of the type of ®eld emission cathode
used.
2. Fabrication of ®eld emission cathodes for display
application
In this section we discuss ®eld emission micro-cathode
array fabrication. We focus here on the Ôcone-in-a-wellÕ
emitter structure, also known as the Spindt tip. Many
other ®eld emission structures have been demonstrated
in recent years using various semiconductor micro-fab-
rication techniques. However, the Spindt tip continues
to be the structure of choice for current generation FED
applications. In this process metal cones with tip radii
less then 300 A  are deposited by electron beam evapo-
ration into emitter wells. The process is self-limiting,
self-aligned, and unlike many of the other FEA fabri-
cation schemes, does not require the use of single crystal
silicon [6]. Furthermore, many device features, such as
965
tip and well geometry and tip material, can be fabricated
using the same basic technique and equipment.
At Motorola, the FEA fabrication process begins with
a cleaning of the glass panel and a deposition of a SiO2 /
SiN stack (8000 A  total) which serves as a di€usion
barrier to alkali metals and water stored in the glass
substrate. Next, the amorphous Si ballast layer and the
column metal (Mo) are deposited by sputtering and are
then patterned. Next, the SiO2 gate dielectric is deposi-
ted by plasma enhanced chemical vapor deposition,
followed by the Mo gate electrode. The emitter wells are
formed in the next sequence of steps, where the gate
metal is ®rst dry etched up to the oxide with patterned
resist acting as a mask, and then the oxide is etched
down to the amorphous Si using a di€erent dry etch
chemistry. Finally, the emitter cones are formed by ®rst
angle evaporating an Al parting layer, followed by a
direct evaporation of Mo, and a phosphoric acid lift-o€.
The entire process is summarized in Fig. 3, together with
a cross section of a cathode shown just prior to lift-o€.
Despite the many advantages of the Spindt-type FEA
fabrication technique, scaling this method to large area
substrates (>400 mm on the side) is still a major chal-
lenge. Such scale up is necessary for economic reasons
even if small area displays are produced. According to
recent reports from Candescent, the requirement for
micron scale lithography for well fabrication may be
avoided by using a low-current, high-energy ion beam
[7]. The ion beam is scanned across a resist coated panel
where it produces damage tracks; these track are then
preferentially etched with a developer, exposing the un-
derlying gate metal. This technique yields 5000 ran-
domly disbursed emitters per color pixel (100100
lm2 ), with gate diameter of 0.1 lm. A scanning electron
micrograph (SEM) of a Candescent cathode is shown in
Fig. 4. The precise location of emitters in a pixel is not
critical in the Candescent approach since their design
also includes a focusing electrode placed above the gate
[8].
Another diculty associated with the scale-up of the
Spindt process is the large size of the evaporator re-
quired to deposit the Spindt tips. To ensure that the
evaporant reaches the cathode at near normal incidence,
the distance required between the metal source and the
panel must be large. The tip evaporator used at Moto-
rola has a throw of 170 cm, and is shown in Fig. 5.
Cathodes as large as 370  470 mm2 with uniform
emitter tips could be produced using this tool. Evapo-
rators with a smaller throw result in less uniform cones,
particularly as one moves from the center of the cathode
to the edges. A study performed at Samsung found that
for evaporator throw of 72 cm, an angle variation of 0.8°
resulted in a tip radius of curvature change of ‡2 nm
over a 6 cm distance along the substrate [9]. This vari-
ation in turn caused a 75% decrease in emission cur-
rent for tips at the edge of the panel versus those in the
966 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976

Fig. 3. (a) Process ¯ow of diagram for fabrication of Spindt type ®eld emission arrays and (b) a cross-section SEM taken prior to lift-
o€.

Fig. 4. SEM images of Candescent ®eld emitter array cathode showing the random position of the emitters (courtesy of L.S. Pan).

center. As demand grows for larger displays, an alter-
native method for fabricating Spindt tips will have to be
found in order for this emitter structure to remain cost-
competitive.
3. Low voltage ®eld emission display
In this section we discuss the development of FEDs
designed to operate at anode voltages of a few hundred
volts. LVFEDs are simpler to fabricate than their high
voltage counterparts because they do not require the
additional features intended to handle the high anode
voltage across the narrow vacuum gap. These features
include display structural modi®cations, coatings and
specialized driving schemes, all of which make the fab-
rication of the display more complicated. Consequently,
LVFED prototypes were the ®rst to appear at display
conferences and tradeshows, and have now entered into
a commercial production phase at PixTech and Futaba.
Images of Futaba and Pixtech displays can be viewed by
visiting the web sites of these companies [10,11]. Table 1
summarizes the main performance characteristics of
these LVFED displays.
Futaba uses the blue-green ZnO:Zn phosphor in their
LVFEDs, and claim a brightness of 200 Cd/m2 , which
is adequate for most indoor applications. Despite the
exceptionally high eciency of ZnO:Zn phosphor at low
acceleration voltages, high emission current must never-
theless be supplied to the screen to achieve this level
of luminance. At an acceleration of 250 V, the lumi-
nous eciency of ZnO:Zn is about 7 lm/W [12]. Based
on this eciency we calculate a peak current per pixel of
18 lA for the Futaba display, assuming a 50% phosphor
®ll ratio for the anode screen. This high peak current
per pixel requires a high gate voltage, which in turn,
requires expensive drivers. In addition to high lumi-
 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976 967

Fig. 5. A photograph showing the electron beam evaporator used to manufacture ®eld emitter array panels for Motorola 15 in. di-
agonal FEDs.

Table 1
A list of basic characteristics of Futaba and Pixtech FED products; for more complete information, see Refs. [10,11]
Futaba Pixtech
Screen size (diagonal) (in.) 7.3 5.2
Number of pixels 640  480 (VGA) 320  240 (1/4 VGA)
Brightness (Cd/m2 ) 200 240
Viewing angle (°) 160 160
Power consumption (W) 6 2.4
Weight (g) 340 200

nance, ZnO:Zn does not poison the Mo emitter tips,
which are only 200 lm away from the anode in a
typical LVFED. In Fig. 6, we show the lifetime char-
acteristics of a Futaba monochrome FED, which
maintains 80% of its starting emission current after
10,000 h of continuous operation [13].
Although future use of monochrome LVFEDs is
likely to grow to some extent, application of this tech-
nology beyond instrumentation is unlikely, unless highly
ecient, full color low-voltage phosphors are deve-
loped. Most phosphors have low luminous eciency
at voltages below 3 kV because of the low electron
968 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976
Fig. 6. Emission current versus time curve for a Futaba FED. Luminance is approximately 200 Cd/m2 at relative anode current of
100% (courtesy of S. Itoh).
penetration depth and the high, non-radiative recom-
bination rate at the surface. While raising the emission
current density increases the brightness, most phosphors
tend to rapidly saturate at average current density above
10 lA/cm2 ; furthermore, higher current density leads
to faster coulombic aging of the phosphor, thus further
decreasing the brightness [14]. Attempts to fabricate
ecient low-voltage phosphors include coating existing
high voltage powders with partially conductive ®lms, as
well as synthesizing new materials. In one approach
designed to reduce current saturation, phosphors were
used in a FED such as SrGa2S4:Eu, which have decay
times in the range 0.01±0.1 ls instead of more conven-
tional CRT phosphors such as ZnS:Cu,Ag, which have
decay times of in the range of 10±100 ls [14]. In this
manner, the phosphor choice takes advantage of longer
ÔonÕ times in a typical FED (10±30 ls), where complete
rows are turned ÔonÕ sequentially, as compared to a
CRT, where the pixel address time is only 0.010±0.025
ls.
Despite on-going research at many universities on
low-voltage phosphor development, presently no suit-
able candidates are available with the requisite bright-
ness and color coordinates. However, adequate high
voltage phosphors, those that require electron energies
in excess of 3 kV, are commercially available [15]. Op-
erating FEDs at higher anode voltages has many ad-
ditional bene®ts, including lower gate voltage, longer
phosphor life, ability to use a re¯ective aluminum coat-
ing, and a larger anode-to-cathode gap (since higher
anode voltage better focuses the emitted electrons).
However, operation of FEDs at high anode voltage is
not trivial, and creates many new challenges not en-
countered in the low voltage regime. We discuss these
challenges and some of the solutions in the next sec-
tion.
4. High voltage ®eld emission display
In this section we discuss the development of FEDs
that operate at anode voltages set above 1 kV, and more
typically 3±7 kV. FED panels operating in this regime
are referred to as high voltage, or HVFEDs, although
this voltage is still far lower then the 30 kV potential
commonly used for CRT screens. While no HVFEDs
are currently available on a commercial basis, virtually
every FED company is actively pursuing a high voltage
design. Motorola, from the very beginning of its FED
development e€ort in the early 1990Õs, made the decision
to concentrate on a high voltage FED design, unlike
Pixtech and Futaba, who ®rst chose to pursue a low
voltage approach [16]. This decision was based on the
premise that the challenges of fabricating a high voltage
FED with commercially available phosphors were less
severe than those posed by the advent of synthesizing
completely new phosphors for low voltage FEDs. In
addition to readily available phosphor materials, HVFED
approach o€ers other important advantages over the
LVFED, such as lower power consumption and improved
beam focusing. A Motorola 15 in. diagonal color VGA
display is shown in Fig. 7. These prototype displays
achieved stable operation at 5 kV on the anode, an emis-
sion current of 2 lA/color pixel, and luminance of 160
Cd/m2 .
Compared to LVFED, the HVFED design requires a
substantial increase in complexity and sophistication of
the display components in order to insure stable panel
operation for many thousands of hours. The high anode
voltage applied across a 1 mm gap can cause both
sudden catastrophic failures as well as a rapid decrease
in emission current. These failure mechanisms, in addi-
tion to phosphor aging, limit the usable lifetime of the
panel. For most product applications, such as laptop
 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976
Fig. 7. A photograph of two Motorola FED displays with a cell phone included for size reference. The displays measure 15 in. on the
diagonal, have VGA (640480) resolution with 8 bit/color (16.7 million colors), and a luminance of 160 Cd/m2 .
displays, a minimum lifetime of 10,000 h is required.
Other applications, such as automotive displays, require
a shorter lifetime of 3000 h.
Typical catastrophic failures in HVFEDs include
vacuum arcs across the anode-to-cathode gap, spacer
¯ashover, and row-to-column burnouts. The incorpo-
ration of ballast resistors into ®eld emission cathode
architecture dramatically reduced the anode-to-cathode
arcing frequency by limiting the runaway emission cur-
rent often observed from metallic tips operating in poor
vacuum [17]. However, other sources of arcing are more
dicult to eliminate. As the anode voltage is raised to
several kilovolts, secondary electrons produced at the
anode surface ionize adsorbed gases, which are then
accelerated toward the cathode with sucient energy to
imbed into the dielectric. Sucient charge can thus ac-
cumulate and cause dielectric break down, particularly
at row±column intersections, where the gate voltage al-
ready accounts for 106 V/cm. In Fig. 8 we show an
optical image of a cathode following burnouts at sev-
eral row±column intersections. Approximately a quarter
of such events leads to arcs across the vacuum gap;
otherwise, several rows or columns become inoperable.
Possible solutions to this problem include suspending a
grid over the cathode to capture ions or depositing a thin
resistive ®lm onto the cathode surface to bleed accu-
mulated charge.
FED operation at high anode voltage can also result
in a rapid decrease in emission current. Current stability
such as that shown in Fig. 6 for a Futaba low voltage
display, is essential for commercialization of HVFEDs.
Yet, only Candescent has reported thus far a HVFED
969
package lifetime (time to I ˆ I0 =2) exceeding 10,000 h,
and to date, no packages are available from Candescent
for engineering evaluation [18]. High-energy ion sput-
tering, or accelerated oxidation of emitter tips, have
been postulated in the literature as possible causes for
the decrease in current at high anode voltage [19]. In one
experiment designed to test this hypothesis, we operated
a cathode coated with a thin (7 nm) Au ®lm with a pre-
baked ZnO phosphor anode held at 2500 V and at 1 mm
gap. Au was chosen because it has a sputter yield 3
times greater than that of Mo [20]. In addition, because
Au is more chemically inert than Mo, an improvement
in current stability would occur if tip oxidation were the
dominant degradation mechanism. The emission current
decreased to 50% of its original value after 300 h of
operation, a half-life typical of the uncoated Mo tips in
this particular experiment. Ten individual emitter tips
were imaged using a ®eld emission SEM before and after
operating the cathode. No signi®cant change was ob-
served in the morphology of the tips or the amount of
Au on the tip surfaces, as can be seen in Fig. 9. The
result of this experiment suggests that neither high en-
ergy sputtering nor oxidation are the dominant mecha-
nisms responsible for emission current degradation. In a
related series of experiments, we operated Mo tip cath-
odes with pre-baked anodes in a UHV chamber equip-
ped with a variable anode±cathode gap mechanism. We
observed that decreasing the anode-to-cathode gap from
20 to 2 mm, decreased the emission current by approxi-
mately a factor of 2. We also observed that after the
gap was increased again to 20 mm, the emission current
level was restored. The reversible nature of current
970 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976

Fig. 8. An optical image of a Motorola cathode showing the results of a row±column breakdown which occurred after the anode
voltage was raised to 5 kV.

Fig. 9. SEM images of a Motorola Spindt tip coated with Au and life tested for 300 h at 2.5 kV anode voltage and 70 V gate voltage (a)
before life test and (b) after life test. Emission current decreased by 50% during the 300 h life test.

degradation suggests that adsorption of certain mole-
cules onto tip surfaces leads to loss of emission current.
In a following series of experiments, we examined the
e€ect of cathode surface cleaning on current stability at
high anode voltage. We have found that rapid degra-
dation in emission current at high anode voltage and
small gap can be avoided after thoroughly cleaning and
outgasing the cathode surface. These results can be ex-
plained using a model based on the formation of silanol
groups (±Si±OH) on the surface of the gate dielectric,
which makes up a large fraction of the cathode surface.
Silanols are well known to form on SiO2 upon exposure
to water, and are thermally stable up to about 530°C
[21]. Ions impinging onto the cathode surface break up
the silanol groups, releasing ±OH radicals and H2 O
molecules, both of which have been shown to rapidly
decrease the emission current.
The behavior of the spacers is also strongly in¯uenced
by the anode voltage. The spacers, besides having to
support the display structurally, have to remain com-
pletely invisible to the viewer. As anode voltage is raised
above 1 kV, most materials have a secondary coecient
below 1, since primary electrons are able to penetrate
deeper into the solid at higher energy. The spacer gets
irradiated with electrons at angles below 30°. For these
shallow incident angles, the energy crossover for the
secondary electron coecient is 2000 eV. Thus, the
spacers tend to acquire a positive charge. This charge
can de¯ect electron trajectories in the spacer vicinity,
thus making the spacers highly visible. Furthermore, as
 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976
more electrons get ejected from the spacer and travels to
the anode (the most positive element in the display) the
positive charge on the spacer can extend toward the
cathode, ultimately creating a suciently high ®eld to
cause surface ¯ashover. The e€ects of the secondary
electron coecient on the charging and reliability of
spacers has recently been published by Tirard-Gatel et al.
[22]. These authors report that by coating the spacers
with a special coating which minimizes the secondary
electron coecient, the deviation of the electron beam in
the vicinity of the spacer was minimized. Alternatively,
coating the spacer with a ®lm of MgO, which has a high
secondary electron coecient, resulted in strong devia-
tion of the electron beam (which make the spacer visi-
ble).
Despite the many challenges inherent in high voltage
FEDs, the visual quality and brightness that can be
obtained with high voltage justify the diculties. For the
most part, solutions to all these problems have now been
found. While the solutions may not yet be optimal, high-
quality high-voltage displays have been demonstrated by
Candescent [18] and Motorola (Fig. 7). Further work is
needed to bring the anode voltage above 5 kV for better
phosphor eciency.
5. Next generation ®eld emission displays
First generation FEDs are based on thin ®lm tech-
nology and semiconductor processing methods. Despite
success in achieving performance objectives including
adequate color purity, brightness, lifetime, and 15 in.
scalability, there are still many opportunities to improve
FEDs. The most signi®cant advances will be made in
areas that improve the competitiveness of FEDs in the
display market place, including overall display cost and
large area scalability. Consequently, substantial invest-
ments are being made to develop a second generation of
FEDs which will be larger, less costly, or both.
Approaches for reducing costs and improving scala-
bility generally fall into two categories: (1) replacing the
®eld emitter with an alternate material, and (2) pro-
ducing ®eld emitter designs that do not require ®ne
photolithography or thin ®lm technology. Selection of
the appropriate strategy is determined by the existing
technology in the display market. For example, FEDs
designed for applications with a display size less than 15
in. in diagonal will have to compete with established
LCD technology. LCDs use photolithography and thin
®lm processing to de®ne TFTs in pixels smaller than
300  300 lm2 . FEDs with similar size and resolution
will also require photolithography to de®ne small struc-
tures. However, since LCDs use thin ®lm processing,
FEDs can also support the relatively high cost structure
of photolithography while remaining competitive. Thus,
971
approaches for second generation FEDs in this size
range have focused on replacing the electron source with
better performing, less expensive emitter materials.
Better materials can reduce the drive voltage resulting in
lower electronics costs. They can also reduce the capital
expenses involved with fabricating the emitter, leading
to a less expensive display.
Approaches for second generation FEDs with diago-
nals >40 in. must take into account market competition
from plasma displays and projection CRTs. Neither
plasma display panels nor projection CRTs require sig-
ni®cant thin ®lm processing or ®ne photolithography.
To be cost-competitive in the large display market, FEDs
must eliminate these expensive techniques and empha-
size thick ®lm processing, high yields, and scalability.
Since the Spindt process for producing metal tips is in-
herently a thin ®lm process, large area displays must also
be developed with new methods for producing local
electric ®elds exceeding 109 V/m without ®ne photo-
lithography. Thus, FED designs using thick ®lm pro-
cessing will also require replacing the refractory metal
emitter with alternative cold cathode materials. The re-
quirements for the alternative emitter material for large
(>40 in.) displays can be quite di€erent than those for
small (<15 in.) FEDs.
There is a gap in present ¯at screen technology be-
tween 15 and 40 in. in diagonal where there is no ex-
isting, economical solution. The LCD cost structure is
too expensive to scale to large displays. PDP technology
faces fundamental limitations in scaling to smaller sizes
arising from the basic physics of producing plasmas.
This may provide an interesting niche for FEDs. One
might envision a hybrid thin and thick ®lm structure as a
solution for mid-sized FEDs. The following section fo-
cuses on the small area and large area display applica-
tions, since little work has been reported for the mid-size
niche.
For next generation FEDs sized less than 15 in. in
diagonal, researchers have directed e€orts towards re-
ducing the overall display cost by replacing the refrac-
tory metal emitter material with alternative cold ®eld
emitters. Alternative materials provide a cost bene®t if
the switching voltage is reduced below the 20±60 V range
required for Spindt tips, thus allowing the use of smaller,
less expensive driver ICs. Improved emitter materials
also bene®t displays if they can be incorporated in the
display at a lower cost, or if they allow larger features
with better yield due to their improved performance. For
this purpose, researchers have investigated materials
which possess either a lower electron work function or a
larger intrinsic ®eld enhancement.
While numerous materials have been investigated as
improved ®eld emission sources for FEDs, carbon-based
materials have shown the most encouraging ®eld emis-
sion properties in experiments. However, there has been
considerable debate over which carbon phase produces
972 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976
the best ®eld emission properties and which mechanism
is responsible for these properties. Early interest focused
on diamond [23,24], where special surface treatments to
the (1 1 1) crystal plane produce a property called nega-
tive electron anity [25]. Electrons may be emitted
from this surface into vacuum with no barrier, but the
conduction band must ®rst be populated. If electrons
can be supplied, diamond should emit electrons at very
low applied ®elds, greatly simplifying the structure of
an FED. Experimentally, diamond/graphite composite
materials showed good ®eld emission properties [26,27].
Diamond-like carbon also produced low-voltage ®eld
emission [28]. Researchers correlated the low voltage,
high site density emission property necessary for dis-
plays with the presence of graphitic carbon [29±32].
Many investigators suggested that mechanisms other
than negative electron anity were responsible for the
experimental results [33±35]. Later, investigators showed
that purely graphitic materials including nanostructured
graphite [36] and carbon nanotubes [37±40] were also
excellent emitting materials. The natural structure of the
carbon nanotube gives it an electric ®eld enhancement
that is larger than the ®eld enhancement that can be
engineered into a Spindt tip reproducibly. As a result,
carbon nanotubes require lower electric ®elds, can op-
erate in larger geometries, and can be integrated into
FEDs in thick ®lm form. Presently, the majority of re-
search teams developing second generation displays
have focused their e€orts on carbon nanotube ®eld
emitters.
A number of issues arise when incorporating novel
emitter materials into FEDs. First, emitter materials
must be incorporated into FEDs over large areas with
processing temperatures below the 500±600°C soften-
ing point of display glass. For example, the better
emitting CVD diamond materials are grown at higher
temperatures and are not candidate emitters for FEDs.
Second, the majority of consumer applications require
triode FED architecture in order to provide sucient
brightness using low-cost driver circuitry. While several
diode prototypes have been demonstrated [41,42], they
are not likely to be commercially viable solutions. Small
triode arrays have also been demonstrated using carbon-
coated tips and diamond. Investigators typically report
either improved emission current for a given voltage or
improved stability. However, few displays have been
demonstrated with processes and materials that might
be competitive in the small display market. LETI re-
searchers fabricated a small 36  36 pixel FED display
using thin ®lm amorphous carbon emitters [43]. While
the density of emitters was very low with an 80 V gate
pulse, they do demonstrate the feasibility of producing a
carbon-based triode display.
At Motorola, we created a carbon-based triode FED
display in 1997 to demonstrate the feasibility of carbon
emitters. The triodes used defective nitrogen-containing
amorphous-C as the emitter material, which was de-
posited as a ¯at ®lm in the bottom of the emitter well.
The larger well size than conventional Spindt tips al-
lowed for the use of less expensive photolithography
tools. The gated emitters were ballasted with litho-
graphically de®ned resistors to improve uniformity. The
display, a 5.1 in. diagonal, 14 VGA resolution (320 
720 sub-pixel) device, had four quadrants, each with a
di€erent gate well diameter. The image shown in Fig. 10
is from the best quadrant, a 160 ´ 360 array of fully
addressable sub-pixels with an active area 2 ´ 1.5 in.2 .
Each sub-pixel contained 49 gated emitter wells, 4 lm in
diameter and 1.5 lm high. The display was fabricated
on 1.1 mm glass and was sealed in vacuum package.
Spacers were hidden behind large pads visible in the
image. The display drivers switched a voltage of 45 V to
produce the image in Fig. 10. In order for our driver
electronics to produce an image, the gate current typi-
cally needed to be signi®cantly lower than the anode
current. Gate current arises from both leakage current
due to array defects and from emitter-to-gate ®eld
emission. Both sources of gate current were signi®cant
problems. Motorola is now pursuing new designs to
further reduce the manufacturing costs.
Next generation FED development has recently
turned in an exciting new direction, ¯at displays larger
than 40 in. in diagonal. These displays will require thick
®lm processing to compete with PDPs. If a thick ®lm
FED can be made with a switching voltage below 100 V,
the driver electronics of large FEDs may have a con-
siderable cost advantage over PDPs. Spindt tip based
FEDs achieve switching voltages below 100 V by de-
Fig. 10. Motorola FED prototype using nitrogen-containing
amorphous carbon as the emitter material. The imaged area is a
160  360 pixel array with a 2.55 in. diagonal area in a fully
vacuum-sealed display. The image is obtained with a 45 V
switching voltage. The dark areas are pads where spacers are
placed.
 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976
®ning a sub-micron gate electrode-to-emitter spacing.
Thick ®lm technology cannot de®ne features this small.
Researchers have generally worked to solve this problem
either by introducing emitter structures which de®ne
critical sub-micron geometry with non-lithographic tech-
niques, or by employing extremely sharp emitters that
substantially enhance the electric ®eld. Some of the ap-
proaches discussed here may also be used for smaller-
sized displays, but because these approaches also employ
alternative or low cost manufacturing schemes, they are
included in this section.
Canon is currently developing the ®rst large area ®eld
emission technology designed to compete with PDPs.
Canon prepares a narrow gate-to-emitter spacing with a
cracking technique instead of photolithography. They
deposit a ®lm of nanoparticle PdO and drive electric
current through it until a ®ssure forms across the con-
duction path in the PdO [44]. The nano-®ssure forms a
narrow gate-to-emitter spacing that allows ®eld emission
with a switching voltage below 15 V. When electrons
tunnel across the ®ssure, a small percentage are inelas-
tically scattered to a phospor-coated anode to produce
an image. Their simple ®eld emission structure consists
of laterally-oriented gate and emitter electrodes deposi-
ted through thick ®lm processes. The emitting material is
deposited by inexpensive ink-jet printing. In 1997,
Canon demonstrated a fully addressable color prototype
with a 10 in. diagonal screen at 240  240  3 pixel
resolution (Fig. 11) [45]. A potential drawback of this
approach is that most of the ®eld-emitted electrons
(>95%) are collected at the gate electrode. The large gate
current requires the use of special low voltage, high
current driver electronics. Additionally, the drive scheme
does not allow for the use of ballasting resistors, so
achieving display-quality uniformity is a potential chal-
lenge. Nevertheless, the combination of thick ®lm tech-
niques and the elimination of ®ne photolithography is
an encouraging approach for building a competitive,
low cost FED.
Fig. 11. (a) CanonÕs 10 in. diagonal 240  240  3 pixel display based on a ®eld emission from PdO ®lms along a lateral surface. (b)
The display is produced with thick ®lm metal lines, dielectrics, and emitter materials. The emitter material is deposited via ink jet
printing (permission for reprint, courtesy, Society for Information Display).
973
Matsushita and Hitachi have been investigating dis-
plays based on metal±insulator±metal and metal±oxide±
semiconductor tunneling cathodes. In this approach, the
emitter, the gate oxide, and the gate electrode are fab-
ricated as a stack. The oxide thickness and the gate
thickness are both limited to a few nanometers. Elec-
trons tunnel through the insulating layer and, after
scattering events in the gate layer, they are emitted into
vacuum. As with the Canon FED, the gate current for
this concept is much larger than the anode current, ne-
cessitating low voltage, high current driver electronics.
Matsushita has demonstrated a 4  4 array of triode
elements with spatially uniform ®eld emission [46]. Hit-
achi has reported a 30  30 pixel array with a current
density suitable for an FED display [47]. Since this ®eld
emission concept does not require ®ne photolithography
to set the gate-to-emitter spacing, the overall process
may be inexpensive. In addition, the sensitivity of the
®eld emitter to the vacuum environment is greatly
minimized since the ®eld emitter surface is buried. This
is a large advantage over refractory metal emitters.
While initial results look promising, the feasibility of
controlling the insulator and gate electrode thickness
over large areas remains to be demonstrated. Lifetime at
appropriate current levels also remains an issue.
Several concepts for low cost, large area FEDs are
based on printing carbon-based ®eld emitters. Printed
Field Emitters Ltd. is pursuing an FED concept based
on work by Latham in the 1980s, wherein conductive
particles in an insulating matrix emit electrons at low
applied ®elds [48]. Printable Field Emitters Ltd. is
working to demonstrate that this concept can be applied
to produce a low cost FED. Their ®rst triode prototype,
a 32  32 pixel addressable display, was capable of dis-
playing moving images (Fig. 12) [49,50]. Emitter mate-
rial was deposited via spin-coating onto the substrate.
The rest of the process uses traditional photolithography
to de®ne metal lines and 10 lm wells. Printed Field
Emitters Ltd. is now working to increase the size of their
974 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976
Fig. 12. An addressable display produced by Printed Field
Emitters Ltd. The printable emitter material consists of con-
ductive particles in an insulating matrix (courtesy of PFE Ltd.)
prototype and to incorporate thick ®lm metal patterns
and emitters.
Both Samsung and ISE Electronics have demon-
strated prototype FEDs based on printed carbon
nanotube ®eld emitters. Samsung has concentrated on
scaling up a color FED to demonstrate the large area
scalability of printed nanotubes. To this end, they de-
veloped a 9 in. diagonal 576  240 pixel diode FED and
have publicly displayed moving color images (Fig. 13)
[42]. The nanotube ®eld emitters were deposited by
screen-printing nanotubes with a binder material or by
electrophoretic deposition. Samsung has also demon-
strated triode display prototypes based on carbon na-
Fig. 13. A 9 in. diagonal diode display produced by Samsung.
The 576  240 pixel display uses carbon nanotube emitter ma-
terial deposited with thick ®lm technology (courtesy of J.M.
Kim, Samsung Advanced Institute of Technology).
Fig. 14. The compact exterior of an FED triode display created
by ISE Electronics. The 26  66 pixel display is created with
low cost technology (courtesy of Sashiro Uemura, ISE Elec-
tronics).
notubes showing good spatial uniformity [51]. Their low
cost, thick ®lm approaches may o€er signi®cant reduc-
tions in manufacturing costs over Spindt-type displays,
provided the display speci®cations can be met.
ISE Electronics has utilized their experience in VFD
manufacturing to design a carbon nanotube-based tri-
ode FED [52,53]. They use a metal grid as a gate elec-
trode. Nanotube-containing material is screen-printed
onto the cathode to form the emitter. The entire display
is built with low cost technology. ISE Electronics has
demonstrated a vacuum-sealed, 3.6 in. diagonal color
FED display with moving images. The VFD style device
is shown in Fig. 14. ISE electronics and Mie University
have also produced triode picture tube elements with
printed nanotube emitters. The picture tube elements are
fully-sealed vacuum devices. They have device lifetimes
exceeding 10,000 h, demonstrating the potential for long
lifetime operation with carbon nanotube emitters [54].
While next generation materials have been investi-
gated extensively over the last 10 years, relatively few
triode displays had been demonstrated until recently.
The recent successes have been primarily realized in
large-sized displays. Still, a substantial amount of re-
search and development will be required to transform
any of these next generation technologies into viable
business solutions.
6. Conclusion
FED technology has advanced tremendously since the
®rst prototypes were demonstrated over 15 years ago.
Full color VGA prototypes measuring 15 in. in diagonal
have now been shown by several companies, and many
 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976
challenging problems, including high voltage stability,
spacer visibility, and display lifetime have been suc-
cessfully resolved. Nevertheless, LCD displays have
made signi®cant improvements in visual quality and
manufacturing cost reduction. In order to succeed, the
FED will now have to exhibit not only a superior visual
performance, but also represent a signi®cant reduction
in manufacturing cost. The high capital cost of a FED
factory creates signi®cant risk for any company entering
the display market place. Amortization of the initial
large investment adds a large cost component to the
FED display, erased only by success over time. The risk
of market failure with such a large investment at stake is
also disheartening. We believe that carbon-based emit-
ters, and in particular, carbon nanotubes o€er the most
promising route to achieving this goal and making the
FED a commercial reality.
References
[1] Funaki Y, Mochizuki Y, Flat panel display market to
reach 10 trillion yen by 2010. Nikkei Microdevices, Flat
panel display yearbook, InterLingua, Redondo Beach,
California, USA, 1999. p. 75.
[2] Shoulders KR. Microelectronics using electron beam
activated machining techniques. Adv Comput 1961;2:135.
[3] Spindt CA. A thin ®lm ®eld emission cathode. J Appl Phys
1968;39:3504.
[4] Ghis A, Meyer R, Rambaud P, Levy F, Leroux T. Sealed
vacuum devices: ¯uorescent microtip displays. IEEE Trans
Electron Dev 1993;38:2320.
[5] Ito S. Low-voltage panels move to full-color, high-voltage
panels improve in reliability. Nikkei microdevices, Flat
panel display yearbook, InterLingua, Redondo Beach,
California, United States, 1999. p. 171.
[6] Spindt CA, Brodie I, Humphrey L, Westerberg ER.
Physical properties of thin-®lm ®eld emission cathodes
with molybdenum cones. J Appl Phys 1976;47:5248.
[7] Fahlen TS. Performance advantages and fabrication of
small gate openings in CandescentÕs thin CRT. Technical
digest of the 12th Int Vac Microelectron Conf, Darmstadt,
Germany, 1999. p. 56.
[8] Fahlen TS. Focusing properties of thin CRT display. Soc
Inform Display Int Symp Dig Tech Papers 1999;30:830.
[9] Cho JH, Zoulkarneev AR, Kim JW, Hong JP, Kim JM.
Simulation and fabrication of Spindt type ®eld emitter
arrays. Tech Digest of the 10th Int Vac Microelectron
Conf, Kyongju, Korea, 1997. p. 401.
[10] Futaba FED web site: http://www.futaba-na.com/FED/
fedframe.htm.
[11] Pixtech FED web site: http://www.pixtech.com/product/
spec.htr.
[12] Jacobsen SM, Yang S, Zhang FL, Summers CJ, Bojkov C,
Kumar N, Fredin N, Schmidt H. Improved performance of
low-voltage phosphos for ®eld emission displays. Soc
Inform Display Int Symp Dig Tech Papers 1995;26:631.
975
[13] Itoh S. Futaba application note FAN-E-1101-2. Futaba
Corp., Product Development Center, 1080 Yabutzuka,
Chosei, Chiba 299-4395, Japan.
[14] Summers CJ. Phosphors for ®eld emission displays. Tech
Digest of the 10th Int Vac Microelectron Conf, Kyongju,
Korea, 1997. p. 244.
[15] Petersen R.O. FED phosphors: low or high voltage?
Inform Displays 1997;3:22.
[16] Newman SJ, Smith RT, Penn C. Development of a 5.1 inch
®eld emission display. Soc Inform Display Int Symp Dig
Tech Papers 1998;29:95.
[17] Levine JD, Meyer R, Baptist R, Felter TE, Talin AA. Field
emission from microtip test arrays using resistor stabiliza-
tion. J Vac Sci Technol B 1995;13:474.
[18] Hopple G, Curtin C, Hatano Y. Thin CRT display
technology operating life and reliability issues. Soc Inform
Display Int Symp Dig Tech Papers 2000;31:1257.
[19] Yu ML, Hussey BW, Kratschmer E, Chang THP, Mackie
WA. Improved emission stability of carburized HfC<100>
and ultrasharp tungsten ®eld emitters. J Vac Sci Technol B
1995;13:2436.
[20] Spencer EG, Schmidt PH. Ion-beam techniques for device
fabrication. J Vac Sci Technol 1971;8:52.
[21] Tompkins HG, Deal PW. Kinetics and mechanism for
desorption of H2 O from spin-on-glass. J Vac Sci Technol B
1993;11:727.
[22] Tirard-Gatel N, Perrin A, Levy F. Boronnat JF. Charging
and reliability e€ects associated with FED spacers. Soc
Inform Display Int Symp Dig Tech Papers 1999;30:1138.
[23] Geis MW, Efremow NN, Woodhouse JD, McAleese MD,
Marchywka M, Socker DG, Hochedez JF. Diamond cold
cathodes. IEEE Electron Dev Lett 1991;12:456±9.
[24] Geis MW, Twichell JC, Efremow NN, Krohn K, Lyszczarz
T. Comparison of electric ®eld emission from nitrogen-
doped, type Ib diamond, and boron-doped diamond. Appl
Phys Lett 1996;68:2294±6.
[25] Himpsel FJ, Knapp JA, van Vechten JA, Vechten DE.
Quantum photoyield of diamond (111)±a stable negative
anity emitter. Phys Rev B 1979;20:624±7.
[26] Wang C, Garcia A, Ingram DC, Lake M, Kordesch ME.
Cold ®eld emission from CVD diamond ®lms observed in
emission electron microscopy. Electron Lett 1991;27:1459±
61.
[27] Zhu W, Kochanski GP, Jin S, Seibles L, Jacobson DC,
McCormack M, White AE. Electron ®eld emission from
ion-implanted diamond. Appl Phys Lett 1995;67:1157±9.
[28] Amartunga GAJ, Silva SRP. Nitrogen containing hydro-
genated amorphous carbon for thin ®lm ®eld emission
cathodes. Appl Phys Lett 1996;68:2529±31.
[29] Zhu W, Kochanski GP, Jin S, Seibles L. Defect-enhanced
electron ®eld emission from chemical vapor deposited
diamond. J Appl Phys 1995;78:2707±11.
[30] Lacher F, Wild C, Behr D, Koidl P. Electron emission
from thin ®ne-grained CVD diamond ®lms. Diamond
Relat Mater 1997;6:1111±6.
[31] Karabutov AV, Frolov VD, Pimenov SM, Konov VI.
Grain boundary ®eld emission from CVD diamond ®lms.
Diamond Relat Mater 1999;8:763±7.
[32] Groning O, Kuttel OM, Groning P, Schlapbach L. Field
emitted energy distribution from nitrogen-containing dia-
mondlike carbon. Appl Phys Lett 1997;71:2253±5.
976 A.A. Talin et al. / Solid-State Electronics 45 (2001) 963±976
[33] Xu NS, Tzeng Y, Latham RV. A diagnostic study of
the ®eld emission characteristics of individual micro-
emitters in CVD diamond ®lms. J Phys D 1994;27:1988±
91.
[34] Shovlin JD, Kordesch ME. Electron emission from chemi-
cal vapor deposited diamond and dielectric breakdown.
Appl Phys Lett 1994;65:863±5.
[35] Jou S, Doerr HJ, Bunshah RF. Electron emission charac-
terization of diamond thin ®lms grown from a solid carbon
source. Thin Solid Films 1996;280:256±61.
[36] Coll BF, Jaskie JE, Markham JL, Menu EP, Talin AA, von
Allmen P. Field emission properties of disordered and
partially ordered nano clustered carbon ®lms. In: Siegal
MP, Milne WI, Jaskie JE, editors. Covalently bonded
disordered thin-®lm materials. Mater Res Soc Symp Proc,
vol. 498. Warrendale, PA: Materials Research Society,
1998. p. 185±96.
[37] de Heer WA, Heer A, Chatelain D. A carbon nanotube
®eld-emission electron source. Science 1995;270:1179±80.
[38] Kuttel OM, Groening O, Emmenegger Ch, Schlapbach L.
Electron ®eld emission from phase pure nanotube ®lms
grown in a methane/hydrogen CVD plasma. Appl Phys
Lett 1998;73:2113±5.
[39] Fan S, Chapline MG, Franklin NR, Tombler TW, Cassell
AM, Dai H. Self-oriented regular arrays of carbon
nanotubes and their ®eld emission properties. Science
1999;283:512±4.
[40] Xu X, Brandes GR. A method for fabricating large-area,
patterned, carbon nanotube ®eld emitters. Appl Phys Lett
1999;74:2549±51.
[41] Kumar N, Schmidt H, Xie C. Diamond-based ®eld
emission ¯at panel displays. Solid State Technol 1995;
38(4):71±2.
[42] Choi WB, Chung DS, Kang JH, Kim HY, Jim YW, Han
IT, Lee YH, Jung JE, Lee NS, Park GS, Kim JM. Fully
sealed, high-brightness carbon-nanotube ®eld-emission
display. Appl Phys Lett 1999;75:3129±31.
[43] Semeria MN, Baylet J, Montmayeul B, Germain C,
Angleraud B, Catherinot A. Carbon FED requirements-
application to a PLD carbon cathode. Diamond Relat
Mater 1999;8:801±4.
[44] Sakai K, Nomura I, Yamaguchi E, Yamonobe M, Ikeda S,
Hara T, Hatanaka H, Osada Y, Yamamoto H, Nakagiri T.
Proc 16th Int Display Res Conf, EuroDisplay 96, 1996. p.
569.
[45] Yamaguchi E, Sakai K, Nomura I, Ono T, Yamanobe M,
Abe N, Hara T, Hatanaka K, Osada Y, Yamamoto H,
Nakagiri T. J SID 1997;5:345.
[46] Komoda T, Honda Y, Hatai T, Watabe Y, Ichihara T,
Aizawa K, Kondo Y. IDW 99 1999:939.
[47] Kusunoki T, Suzuki M. Increasing emission current from
MIM cathodes by using an Ir±Pt±Au multilayer top
electrode. IEEE Trans Electron Dev 2000;47:1667±72.
[48] Latham RV, editor. High voltage vacuum insulation. New
York: Academic Press; 1995.
[49] Tuck RA, Burden AP, Bishop HE, Brierly M, Bull MK,
Friday JM, Gray JJ, Hood C, Jones PGA, Khazov AY,
Lee W, Riggs RJ. Proc IDMC 2000. p. 27±31.
[50] Tuck RA. Printable large-area FEDs. Inform Display
2000;16:14±6.
[51] Lee NS, Kang JH, Choi WB, Choi YS, Park YJ, Kim HY,
Lee YJ, Chung DS, Jung JE, Lee CJ, Kim JH, You JH, Jo
SH, Lee CG, Kim JM. Triode structure ®eld emission
displays using carbon nanotube emitters. 13th Int Vac
Microelectron Conf, IVMC 2000. p. 193.
[52] Uemura S, Yotani J, Nagasako T, Saito Y, Yumura M.
EuroDisplayÕ99, Late News, 1999. p. 93.
[53] Uemura S, Yotani J, Nagasako T, Saito Y, Yumura M.
Soc Inform Display Int Symp Dig Tech Papers
2000;31:320.
[54] Saito Y, Hamaguchi K, Mizushima R, Uemura S, Naga-
sako T, Yotani J, Shimojo T. Field emission from carbon
nanotubes and its application to cathode ray tube lighting
elements. Appl Surf Sci 1999;146:305±11.