VIT

UNIVERSITY

ECE 301: VLSI System Design

FALL 2010

Course Information

School of Electronics Engineering

VIT University
Vellore Tamilnadu
Vellore,
 Course Faculty
S.Sivanantham,, Assistant Professor ((Selection Grade))
E-mail: ssivanantham@vit.ac.in

Rajeev Pankaj Nelapati, Assistant Professor

E-mail: rajeevpankaj@vit.ac.in

Satheesh Kumar, Assistant Professor

E-mail: satheeshkumar.s@vit.ac.in

Suchendranath Popuri, Assistant Professor

E mail suchendranath@vit.ac.in
E-mail: s chend anath@ it ac in

FALL2010 ECE301 – VLSI System Design 2

 “Executives might make the final decisions
about what would be produced, but
engineers would provide most of the
ideas for new products. After all,
engineers were the people who really
knew the state of the art and who were
therefore best equipped to prophesy
changes
c a ges in it.”
t
The Soul of a New Machine, Kidder, pg 35

FALL2010 ECE301 – VLSI System Design

 Program Educational Objectives
The ECE Program graduates:

• will have a solid foundation in Electronics and Communication

Engineering along with competencies to apply knowledge in
Mathematics and Science.
Science

• will have the analytical and practical skills to solve engineering

p
problems.

• will have professional and communication skills to function as

leaders and members of multi-disciplinary teams in engineering and
other industries.
industries

• will have the skills to function as ethically responsible professionals.

• will be prepared to undertake lifelong learning.

• will be prepared to assume leadership role in addressing some of

the technical issues of the society.
FALL2010 ECE301 – VLSI System Design
 Program Outcome
a) an ability to apply knowledge of mathematics, science, and
engineering
b) an ability to design and conduct experiments, as well as to
analyze and interpret data
c) an ability to design a system, component, or process to
meet desired needs within realistic constraints such as
economic, environmental, social, political, ethical, health and
safety, manufacturability, and sustainability
d) an ability to function on multidisciplinary teams
e) an ability to identify, formulate, and solve engineering problems
f) an understanding of professional and ethical responsibility
g) an ability to communicate effectively
h) the broad education necessary to understand the impact of
engineering solutions in a global, economic, environmental, and
societal context
i) a recognition of the need for, and an ability to engage in life-
long learning
j) a knowledge of contemporary issues
k) an ability to use the techniques,
techniques skills,
skills and modern engineering
tools necessary for engineering practice.
FALL2010 ECE301 – VLSI System Design
 Course outline

• CMOS Logic Design

• Circuit Characterization and Performance
estimation
• Verilog HDL Basics
• Digital
g System
y Design
g usingg Verilog
g HDL
• Introduction to Timing Analysis

FALL2010 ECE301 – VLSI System Design

 Course Plan
• Lectures
• Problem Solving
• Home Assignments
• Lab assignment using EDA tools like Design Architect from
Mentor Graphics to simulate the CMOS circuits using Eldo-
SPICE simulator
• Lab assignments to Simulate and synthesize the Digital
circuits described by Verilog HDL using EDA tools

FALL2010 ECE301 – VLSI System Design

 Grading structure

Component Weight (in %)

Continuous Assessment Test – I 15

Continuous Assessment Test – II 15

Quiz 05

Assignment/Lab work 15

Term End Examination 50

FALL2010 ECE301 – VLSI System Design

 Prerequisite
• Semiconductor Devices and Circuits
• Digital Logic Design

FALL2010 ECE301 – VLSI System Design

 Study Guidelines

• Active Participation in the class

• Doing Home Assignments on time

• Use the IC Design Laboratory to simulate and synthesis the

Digital Design described by Verilog HDL. The students are
encouraged to use many kind of EDA tools available in the
lab. The tutorials for various EDA tools are available and
accessed from the ftp://192.168.34.224.

• Please regularly visit the course page in the VIT intranet:

(Some lecture materials, More reference materials, Home
assignments and any other information relevance to the
course are updated
d t d regularly
l l by
b the
th course faculty)
f lt )

• I am available to see students outside of class time. You

can contact
t t me via,
i email,il or in
i my cabin
bi during
d i the
th open
hours.
FALL2010 ECE301 – VLSI System Design
 Study Guidelines
• Participation
p in g
guest lectures will help
p the
students to understand the contemporary issues

• Students are encouraged to refer the following

website in addition to their class participation and
reading required texts and reference books.
books
– http://www.vlsi-design.net/
– www.asic-world.com
– http://www.vlsichipdesign.com
– http://nptel.iitm.ac.in/ ( A video course on “VLSI
Circuits” by
y Prof. S.Srinivasan,, A web course on “VLSI
Design” by Prof. A.N. Chandorkar will be really helpful)
– http://ocw.mit.edu/courses/ (MIT OpenCourseWare is a
free p
publication of MIT course materials that reflects
almost all the undergraduate and graduate subjects
FALL2010 taught at MIT) ECE301 – VLSI System Design
 Required Text Books

Neil H. E. Weste and David Harris, CMOS

VLSI Design: A Circuits and Systems
Perspective Pearson Education,
Perspective, Education 3/e
2006

Samir Palnitkar, Verilog® HDL: A Guide to

Digital Design and Synthesis, PHI, Second
Edition 2004
Edition,2004.

FALL2010 ECE301 – VLSI System Design

 References

• Jan M.
M Rabaey,
Rabaey Anantha Chandrakasan,
Chandrakasan Borivoje Nikolic,
Nikolic
Digital Integrated Circuits: A Design Perspective,
Prentice Hall India, 2nd Ed, 2002.

• Sung-Mo Kang & Yusuf Leblebici, “CMOS Digital

Integrated Circuits –Analysis and Design”, Tata
McGraw-Hill, New Delhi, 2005

• John P.Uyemura, “CMOS Logic Circuit Design” ,

Springer International Edition.2005

• J. Bhasker, “A Verilog HDL Primer”, BP Publications.

FALL2010 ECE301 – VLSI System Design

 Course Objective
• Outlines the VLSI design flow and show how CMOS transistors act
as switches and develop basic CMOS logic gates,
gates latches and
explore how to represent the basic gates in layout.

• Examine the characteristics of MOS transistors to lay the

foundation for predicting their performance.

• Examine the DC characteristics of the CMOS inverter and analyse

th performance
the f characteristics
h t i ti off the
th CMOS digital
di it l circuits.
i it

• Explain the basic concepts of Verilog HDL and discuss the different
levels of abstraction used to describe hardware.
hardware

• Design combinational logic circuits, sequential logic circuits and

VLSI subsystem
y components
p using
g Verilog
g HDL.

• Simulate and Synthesize the digital circuits using Verilog HDL for
a given problem statement using industry standard EDA tools.

• Discuss the timing issues of VLSI circuits and compute the critical
path.
FALL2010 ECE301 – VLSI System Design
 Course Outcome
After successful completion of this course, you will have the
• Able to apply knowledge of mathematics, science, and
engineering in the design, and analysis and modeling of
digital integrated circuits.

• Able to describe and model digital design using a hardware

description language.

• Able to design and conduct experiments in digital design

using Verilog HDL and able to illustrate the outcome of the
design.
design

• Able to design and analyze the performance (speed, Power,

Area) of CMOS digital integrated circuits for different design
specifications.
•
• Identify Verilog HDL constructs and operators accepted in
logic synthesis and show how logic synthesis tool interprets
these constructs. ECE301 – VLSI System Design
FALL2010
 Course Outcome

After successful completion of this course, you will have the

• Ability to compute gate sizes on a path to optimize the path

delay using logic effort.
• Ability to analyze a given problem in Verilog HDL
• Ability to develop problem-solving skills in order to be able
to successfully approach a digital design project of medium
to high complexity in the final semester.
semester
• Ability to identify career paths and requisite knowledge and
skills for career change/higher studies towards
Microelectronics Engineering.
Engineering
• Ability to gain knowledge of contemporary issues on
modern VLSI Design through various websites.
• Ability to use modern EDA tools to Simulate and Synthesize
the digital designs to verify their functionality and analysis
its performance.

FALL2010 ECE301 – VLSI System Design

 Course Syllabi

CMOS LOGIC DESIGN

Introduction to VLSI Design. MOS Transistor Theory: nMOS, pMOS
Enhancement Transistor
Transistor, ideal II-V
V characteristics
characteristics, C-V
C V
characteristics, Non-ideal I-V effects. CMOS logic: Basic gates,
Complex Gates, Multiplexer and Flip-flop.
CIRCUIT CHARACTERIZATION AND PERFORMANCE
ESTIMATION
DC transfer Characteristics of CMOS inverter, Circuit characterization
and performance estimation: Delay estimation,
estimation Logical effort and
Transistor Sizing. Power Dissipation: Static & Dynamic Power
Dissipation.

FALL2010 ECE301 – VLSI System Design

 Course Syllabi cont.
cont
VERILOG HDL BASICS
Overview of Digital Design with Verilog HDL. Hierarchical Modeling
Concepts. Basic Concepts of Verilog HDL: Lexical conventions, data
types. Modules and Ports. Gate level Modeling. Dataflow Modeling:
Continuous Assignment, Delays, Operators. Behavioral Modeling:
Procedural Assignments, Conditional Statements. Writing a test
bench for the design.
DIGITAL SYSTEM DESIGN USING VERILOG HDL
Design of Combinational and Sequential Circuits using Verilog HDL.
g Synthesis
Logic y with Verilogg HDL. ALU sub-system
y components
p
design: Adders, Multipliers, Shift registers, and Memory units.
INTRODUCTION TO TIMING ANALYSIS
Introduction to Static timing analysis.
analysis Setup Time,
Time Hold Time.
Time
Calculation of critical path, slack, setup and hold time violations.

FALL2010 ECE301 – VLSI System Design

Introduction VLSI Design
 VLSI Design
• What is VLSI?
– “Very Large Scale Integration”
– Defines integration level
– 1980s hold
hold-over
over from outdated taxonomy for integration levels
• Obviously influenced from frequency bands, i.e. HF, VHF, UHF
– Sources disagree on what is measured (gates or transistors?)

• SSI – Small-Scale Integration (0-102)

• MSI – Medium
Medium-Scale
Scale Integration (102-10
103)
• LSI – Large-Scale Integration (103-105)
• VLSI – Very Large-Scale Integration (105-107)
• ULSI – Ultra Large-Scale Integration (>=107)

FALL2010 ECE301 – VLSI System Design

 Integration Level Trends

Obligatory historical Moore’s law plot

FALL2010 ECE301 – VLSI System Design

 Integrated Circuits/MEMs
• Today, VLSI refers to systems impl. w/integrated circuits
– Integrated circuit refers mostly to general manufacturing
technique
• micro/nano-scale devices on a semiconductor (crystalline)
substrate
b t t
• Formed using chemical/lithography processing

• What
Wh t kind
ki d off devices
d i / structures?
t t ?
– transistors (bipolar, MOSFET)
– wires (interconnects and passives)
– diodes (junction, LEDs, VCSELs, MSM, photoconductor, PiN)
– MEMs (piezoelectric integration, accelerometers, gyroscopes,
pressure sensors, micro-mirrors)

• For CMOS digital design, we only use MOSFET transistors

(used as switches) and wires

FALL2010 ECE301 – VLSI System Design

 Chips

• Integrated circuits consist of:

– A small square or rectangular “die”, < 1mm thick
• Small die: 1.5 mm x 1.5 mm => 2.25 mm2
• Large
L die:
di 15 mm x 15 mm =>> 225 mm2
– Larger die sizes mean:
• More logic, memory
• Less volume
• Less yield
– Dies are made from silicon (substrate)
• Substrate provides mechanical support and electrical common
point

FALL2010 ECE301 – VLSI System Design

 Solid State Devices
• Silicon
– Doping
• n-type, p-type silicon
– Carriers
• electrons and holes
• P
P-N
N junctions
– 2 terminal devices
• Transistors
– Bipolar Junction Transistors (BJT)
– Metal Oxide Semiconductor (MOS)
• 4 terminal
t i l devices
d i
• Main emphasis of this class

FALL2010 ECE301 – VLSI System Design

 Integrated circuits
• nMOS and ppMOS devices
• Modeled as on-off switches
– But a lot g
goes on inside!
• Complementary MOS (CMOS) circuit design methodology
– Most common and widely y used
technique
– But several other interesting techniques
exist

FALL2010 ECE301 – VLSI System Design

 Moore’s
Moore s Law

FALL2010
Courtesy: Intel, http://www.intel.com/technology/mooreslaw/
ECE301 – VLSI System Design
 Moore’s
Moore s Law continued
continued..

• Number of
components in an
integrated circuit
double everyy2
years

• Signifies
g increase
in computing
capacity, memory
and speed
exponentially

FALL2010 ECE301 – VLSI System Design

 MOS structure

• n-channel
• p-channel

FALL2010 ECE301 – VLSI System Design

 Technology nodes
• Scaling
g
– 0.25um,0.18um,90nm,65nm,45nm,32n
m…
• Pitch
– Gate length
– Device sizes
– Frequencies
F i

FALL2010 ECE301 – VLSI System Design

 Current Computing Capabilities

• Intel’s 80-core processor: ~Terra flops

• Over a billion transistors per chip
• 4-5 GHz chip
h clock
l k

FALL2010 ECE301 – VLSI System Design

 I
Issues and
d challenges
h ll off VLSI today
t d

• High
g Power dissipation
p
• Faster operation
• Methodologies to address these issues

FALL2010 ECE301 – VLSI System Design

 Looking ahead
• CMOS technology
– Stable and well understood process
• Future technologies
– Nanodevices
– Molecular devices
– Single electron devices
– Quantum dots
– Many more…
• The future is basically
y yours
y to invent!

FALL2010 ECE301 – VLSI System Design

FALL2010 ECE301 – VLSI System Design