EGR220
Introduction and Objectives
TTL (Transistor Transistor Logic) are fundamental
components of digital electronics. Therefore, to
understand their characteristic is really important.[1].
Therefore, in this lab, we were instructed to measure
and analyze the characteristic of TTL devices. The
primary objectives of this lab are:
1. To analyze and understand the nature of
terminal characteristic of TTL
2. To understand the propagation delay
3. To understand the transfer function of TTL
Equipments and Components used
In this lab, the equipments and components we used
are:- TTL two-input quad NAND gate SN7400 (x3)
Hex-inverter 7404 (x1)1KΩ Potentiometer, 10KΩ
Potentiometer, a breadboard, a waveform generator,
±20V power supply, a multi-meter, wires and cords.
Procedures
Procedure 1: Analyzing the Terminal
Characteristic of TTL
+5V
Gate
Under 1k 
Test
Input Output
Figure 1.
We built the circuit in figure 1. We applied an
input voltage equal to the maximum of the low level
voltage specified by the manufacturer (0.8V), and then
adjusted the output current of the gate under test to be
equal to the maximum low level output current (IOL)
specified by the manufacturer (4mA). The resistance
was calculated by V/I = 200Ω.
Then, we measured VIH and IIH at the gate under test,
Than & Gab Lab #7
and compared to the manufacturer's data. We got VIH
for 3.8V, which was greater than min VIH ind data
sheet, which is 2V. For IIH, we got 10μA which was
less than max IIH (20μA). We expected that these
parameters would change with a change in output
current. Then, we measured VOL, and we got VOL =
0.16V, which was a little bit less than typical VOL
(0.25V)
Gate
Under
Test
Input Output
10k 
Figure 2.
We connected the circuit in figure 2. We applied
an input voltage equal to the minimum of the high
level voltage specified by the manufacturer (2V), and
then adjusted the output current of the gate under test
to be equal to the minimum high level output current
(IOH) specified by the manufacturer (0.4mA). The
resistance was calculated by V/I = 5KΩ.
hen, we measured VIL and IIL at the gate under test,
and compared to the manufacturer's data. We got VIL
for 0.7V, which was less than max VIL ind data sheet,
which is 0.8V. For IIL, we got 1.04mA which was less
than max IIL (1.6mA). We expected that these
parameters would change with a change in output
current. Then, we measured VOH, and we got VOH =
1.8V, which was close to min of VOH (2.4V)
Then, we calculated NH = IOH/ IIH and NL = IOL /
IIL; NH = 40 and NL = 3.8.
Procedure 2: Analyzing Propagation Delay of TTL
tPHL is the high to low propagation delay and tPLH is the
low to high propagation delay.
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EGR220 Than & Gab Lab #7

We connected 8 TTL gates in series and the input
square wave was provided. Then, the output square
wave was connected to oscilloscope and compared
with the input square wave.
We used the 7404 Hexinverter IC and varied the input
voltage VIN from 0 to 5V in 1.0V increments. And we
used a Multimeter to measure and record the output
voltage, and plotted the input voltage vs. output
voltage.

When Vin = 0, Vout = VOH. Therefore, VOH = 3.3V.

Again, we found that VOL = 0.35V. Between 1V and
2V, there should be some values which has a slope = -
1. After examining, VIL ≈ 0.9V and VIH ≈ 1.8V. When
compared these values to data sheet, we found that the
measured data was close enough.

Discussion

Total tPHL = 50ns. Therefore, 50/8 =6.25 ns for each

gate. Typical tPHL = 7ns. Therefore, the measurement
was close enough.
In order to understand 3 characteristic of TTL
gates, we analyzed terminal characteristic,
propagation delay and transfer function. Although
the measurement are close enough to the values
described in data sheet, there are many factors
which can affect the measurement, such as
temperature, the equipments and measurement
methods.

References
[1] Sedra, Adel S., and Smith. Kenneth C. “Microelectronics
Circuits”. 5th. New York: Oxford University Press, 2004.
Total tPLH = 100ns. Therefore, 100/8 =12.5 ns for each
gate. Typical tPLH = 11ns. We concluded that the
measurement was close enough.

Procedure 3: Analyzing Transfer Function of TTL

3.5

2.5

2
Vout
1.5

0.5

0
0 1 2 3 4 5 6

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