MALLA REDDY COLLEGE OF ENGINEERING FOR WOMEN (RG)

B-TECH (CSE) - II YEAR – I SEM(R-18)

Computer Organization and Architecture

UNIT- 1 (Digital Computers)
The digital computer is a digital system that performs various computational
tasks. The word digital implies that the information in the computer is
represented by variables that take a limited number of discrete values. These
values are processed internally by components that can maintain a limited
number of discrete states.

• A computer system is subdivided into two functional entities: Hardware

and Software.
• The Hardware consists of all the electronic components and
electromechanical devices that comprise the physical entity of the device.
• The Software of the computer consists of the instructions and data that the
computer manipulates to perform various data-processing tasks.

The decimal digits 0, 1, 2, ..., 9, for example, provide 10 discrete

values. The first electronic digital computer, developed in the late 1940s, was
used primarily for numerical computations and the discrete elements were the
digits. From this application the term digital computer emerged.
In practice, digital computers function more reliably if only two states are used.
Because of the physical restriction of components, and because human logic
tends to be binary (i.e. true or false, yes or no statements), digital components
that are constrained to take discrete values are further constrained to take only
two values and are said to be binary.
Digital computers use the binary number system, which has two digits: 0 and 1. A
binary digit is called a bit. Information is represented in digital computers in
groups of bits. By using various coding techniques, groups of bits can be made to
represent not only binary numbers but also other discrete symbols, such as
decimal digits or letters of the alphabet.
Generations
• First Generation(1940 – 1956) – Vacuum Tubes. These early computers
used vacuum tubes as circuitry and magnetic drums for memory. The first
generation computers worked on binary-coded concept (i.e., language of 0
-1).

• As you’re most likely aware, these first computers were huge, and would
quite often take up an entire room. Not only this, they were expensive to
run, used a lot of electricity, and were limited to what they could do they
certainly couldn’t multitask, that was for sure

• Second Generation(1956–1963) – Transistors– to its

predecessor. Which was introduced by Bell Labs. The size of second
generation was smaller & computing time was less. Their only downside
was that they generated a lot of heat, which could cause damage to the
 computer. However, it was still a great improvement

Third Generation (1964 – 1971) – Integrated Circuits(IC) -the size of second

generation was smaller & computing time was less . The first two generations
relied on punch cards and printouts, whereas now, we finally start seeing
keyboards and monitors that are interfaced with an operating system.

• Fourth Generation (1972–2010)– Microprocessors-very small in size, they

became portable, very low amount of heat was generated, faster &
accuracy production cost reduced and also It became available for the
common people as well. the fourth generation of computers, (commonly
known as CPU) helped to get computers to the desk and, later, lap-size that
we still know and use today.
 • Fifth Generation(2010):By the time, the computer generation was being
categorized on the basis of hardware only, but the fifth generation
technology also included software, large memory capacity, multiple task
performed simultaneously which include AI, Nanotechnology, parallel
processing

Definition: Digital Computers: Computer Organization

Computer Organization is concerned with the way the hardware components
operate and the way they are connected together to form the computer system.
The various components are assumed to be in place and the task is to investigate
the organizational structure to verify that the computer parts operate as
intended.
Analogy: civil engineers task during building construction (cement, Bricks, iron
rods etc

Definition: Digital Computers: Computer Architecture

Computer Architecture is concerned with the structure and behavior of the
computer as seen by the user.
It includes the information, formats, the instruction set, and techniques for
addressing memory. The architectural design of a computer system is concerned
with the specifications of the various functional modules, such as processors and
memories, and structuring them together into a computer system.
Analogy : Architect task during planning of building (overall plan , floor layout )
Two basic types of computer architecture are:
 1. von Neumann architecture
2. Harvard architecture

1. von Neumann architecture

The von Neumann architecture describes a general framework, or structure, that
a computer's hardware, programming, and data should follow. Although other
structures for computing have been devised and implemented, the vast majority
of computers in use today operate according to the von Neumann architecture.
Von Neumann envisioned the structure of a computer system as being composed
of the following components:

1. ALU: Arithmetic-Logic unit that performs the computer's computational

and logical functions.
2. RAM: Memory; more specifically, the computer's main, or fast, memory,
also known as Random Access Memory (RAM).
3. Control Unit: This is a component that directs other components of the
computer to perform certain actions, such as directing the fetching of data
or instructions from memory to be processed by the ALU; and
4. Man-machine interfaces; i.e. input and output devices, such as keyboard
for input and display monitor for output.

2. Harvard architecture: The Harvard architecture uses physically

separate storage and signal pathways for their instructions and data. The term
originated from the Harvard Mark I and the data in relay latches (23- digits
wide).In a computer with Harvard architecture, the CPU can read both an
instruction and data from memory at the same time, leading to double the
memory bandwidth.
Microcontroller (single-chip microcomputer)-based computer systems and DSP
(Digital Signal Processor)-based computer systems are examples of Harvard
architecture.
Block Diagram of Digital Computers
• Computer consists of FIVE Functional Independent units :
• Input unit , Memory unit, Arithmetic & logic unit ,Control Unit, Output unit
1.Input unit : The input unit accepts the digital information from user with
the help of input devices like keyboard , mouse , and microphones.
2. Memory unit : The memory unit is used to store programs and data.
Usually two types of memory devices are stored to form memory unit
1.Primary storage memory
2.Secondary storage memory
• The Primary Memory commonly called as main memory is fastest memory
used for the storage of programs and active data. here data cannot be
retained if power failure.it is fast compared to secondary coz it is volatile in
nature. Here data is directly accessed by processing unit.
• The secondary storage unit if referred as external memory which is permanent
it cannot be accessed directly by processor. storage devices are DVD’S, hard
disk , flash drives etc. comparatively it is slow than primary memory.
• Arithmetic and Logic Unit (ALU) : Is responsible for performing arithmetic
operations such as add, subtract,division & multiplication logical operations
like AND, OR , NAND Etc…
• To perform these operations operands from the main memory are brought
into the high speed storage elements called registers of the processor.
• Each register can store one word of data an they are used to store frequently
used operands. After performing these operations the result is either stored in
the register or memory location.
• Output unit: The output unit send the processed result to the user using
output devices like Monitor, Printer, Plotter.
• Control Unit: it co-ordinates an controls the activities amongst the functional
units. CU fetches the instructions stored in the main memory identify the
operations and the devices involved in it and accordingly generates the control
signals to execute the desired operations. It controls I/O Operations data
transfer between processor, Memory, I/O devices using timing signals.
 Register Transfer Language (RTL)
A digital computer system exhibits an interconnection of digital modules such as
registers, decoders, arithmetic elements, and Control logic.These digital modules
are interconnected with some common data and control paths to form a
complete digital system.

Moreover, digital modules are best defined by the registers and the operations
that are performed on the data stored in them.The operations performed on the
data stored in registers are called Micro-operations.

The internal hardware organization of a digital system is best defined by

specifying:

o The set of registers and the flow of data between them.

o The sequence of micro-operations performed on the data which are stored
in the registers.
o The control paths that initiates the sequence of micro-operation

The Register Transfer Language is the symbolic representation of notations used

to specify the sequence of micro-operations.

In a computer system, data transfer takes place between processor registers and
memory and between processor registers and input-output systems. These data
transfer can be represented by standard notations given below:

o Notations R0, R1, R2..., and so on represent processor registers.

o The addresses of memory locations are represented by names such as LOC,
PLACE, MEM, etc.
o Input-output registers are represented by names such as DATA IN, DATA
OUT and so on.
o The content of register or memory location is denoted by placing square
brackets around the name of the register or memory location.
 Register Transfer:
The term Register Transfer refers to the availability of hardware logic circuits that
can perform a given micro-operation and transfer the result of the operation to
the same or another register.

Most of the standard notations used for specifying operations on various registers
are stated below.

o The memory address register is designated by MAR.

o Program Counter PC holds the next instruction's address.
o Instruction Register IR holds the instruction being executed.
o R1 (Processor Register).
o We can also indicate individual bits by placing them in parenthesis. For
instance, PC (8-15), R2 (5), etc.
o Data Transfer from one register to another register is represented in
symbolic form by means of replacement operator. For instance, the
following statement denotes a transfer of the data of register R1 into
register R2.

1. R2 ← R1
o Typically, most of the users want the transfer to occur only in a
predetermined control condition. This can be shown by following if-then
statement:
If (P=1) then (R2 ← R1); Here P is a control signal generated in the control
section.
o It is more convenient to specify a control function (P) by separating the
control variables from the register transfer operation. For instance, the
following statement defines the data transfer operation under a specific
control function (P).

1. P: R2 ← R1

The following image shows the block diagram that depicts the transfer of data
from R1 to R2.
Here, the letter 'n' indicates the number of bits for the register. The 'n' outputs of
the register R1 are connected to the 'n' inputs of register R2.

A load input is activated by the control variable 'P' which is transferred to the
register R2.

Bus and Memory Transfers :

A digital system composed of many registers, and paths must be provided to

transfer information from one register to another. The number of wires
connecting all of the registers will be excessive if separate lines are used between
each register and all other registers in the system.

A bus structure, on the other hand, is more efficient for transferring information
between registers in a multi-register configuration system.

A bus consists of a set of common lines, one for each bit of register, through
which binary information is transferred one at a time. Control signals determine
which register is selected by the bus during a particular register transfer.

The following block diagram shows a Bus system for four registers. It is
constructed with the help of four 4 * 1 Multiplexers each having four data inputs
(0 through 3) and two selection inputs (S1 and S2).

We have used labels to make it more convenient for you to understand the input-
output configuration of a Bus system for four registers. For instance, output 1 of
register A is connected to input 0 of MUX1.
The two selection lines S1 and S2 are connected to the selection inputs of all four
multiplexers. The selection lines choose the four bits of one register and transfer
them into the four-line common bus.

When both of the select lines are at low logic, i.e. S1S0 = 00, the 0 data inputs of
all four multiplexers are selected and applied to the outputs that forms the bus.
This, in turn, causes the bus lines to receive the content of register A since the
outputs of this register are connected to the 0 data inputs of the multiplexers.

Similarly, when S1S0 = 01, register B is selected, and the bus lines will receive the
content provided by register B.

The following function table shows the register that is selected by the bus for
each of the four possible binary values of the Selection lines.
 Memory Transfer:
Most of the standard notations used for specifying operations on memory
transfer are stated below.

o The transfer of information from a memory unit to the user end is called
a Read operation.
o The transfer of new information to be stored in the memory is called
a Write operation.
o A memory word is designated by the letter M.
o We must specify the address of memory word while writing the memory
transfer operations.
o The address register is designated by AR and the data register by DR.
o Thus, a read operation can be stated as:

1. Read: DR ← M [AR]
o The Read statement causes a transfer of information into the data register
(DR) from the memory word (M) selected by the address register (AR).
o And the corresponding write operation can be stated as:

1. Write: M [AR] ← R1
o The Write statement causes a transfer of information from register R1 into
the memory word (M) selected by address register (AR).
Arithmetic Micro-operations :

In general, the Arithmetic Micro-operations deals with the operations performed

on numeric data stored in the registers.

The basic Arithmetic Micro-operations are classified in the following categories:

1. Addition
2. Subtraction
3. Increment
4. Decrement
5. Shift

Symbolic Description
Representation
R3 ← R1 + R2 The contents of R1 plus R2
are transferred to R3.

R3 ← R1 - R2 The contents of R1 minus R2

are transferred to R3.

R2 ← R2' Complement the contents of

R2 (1's complement)

R2 ← R2' + 1 2's complement the contents

of R2 (negate)

R3 ← R1 + R2' + 1 R1 plus the 2's complement

of R2 (subtraction)

R1 ← R1 + 1 Increment the contents of R1

by one

R1 ← R1 - 1 Decrement the contents of

R1 by one
Binary Adder :

The Add micro-operation requires registers that can hold the data and the digital components
that can perform the arithmetic addition.

A Binary Adder is a digital circuit that performs the arithmetic sum of two binary numbers
provided with any length.

A Binary Adder is constructed using full-adder circuits connected in series, with the output carry
from one full-adder connected to the input carry of the next full-adder.

The following block diagram shows the interconnections of four full-adder circuits to provide a
4-bit binary adder.

o The augend bits (A) and the addend bits (B) are designated by subscript numbers from
right to left, with subscript '0' denoting the low-order bit.
o The carry inputs starts from C0 to C3 connected in a chain through the full-adders. C4 is
the resultant output carry generated by the last full-adder circuit.
o The output carry from each full-adder is connected to the input carry of the next-high-
order full-adder.
o The sum outputs (S0 to S3) generates the required arithmetic sum of augend and
addend bits.
o The n data bits for the A and B inputs come from different source registers. For instance,
data bits for A input comes from source register R1 and data bits for B input comes from
source register R2.
o The arithmetic sum of the data inputs of A and B can be transferred to a third register or
to one of the source registers (R1 or R2).
Binary Adder-Subtractor :

The Arithmetic micro-operations like addition and subtraction can be combined

into one common circuit by including an exclusive-OR gate with each full adder.

The block diagram for a 4-bit adder-subtractor circuit can be represented as:

o
o When the mode input (M) is at a low logic, i.e. '0', the circuit act as an adder and when
the mode input is at a high logic, i.e. '1', the circuit act as a subtractor.
o The exclusive-OR gate connected in series receives input M and one of the inputs B.
o When M is at a low logic, we have B⊕ 0 = B.
The full-adders receive the value of B, the input carry is 0, and the circuit performs A
plus B.
o When M is at a high logic, we have B⊕ 1 = B' and C0 = 1.
The B inputs are complemented, and a 1 is added through the input carry. The circuit
performs the operation A plus the 2's complement of B.

SHIFT MICRO OPERATIONS:

Shift rnicrooperations are used for serial transfer of data. They are also used in conjunction
with arithmetic, logic, and other data-processing operations. The contents of a register can be
shifted to the left or the right. At the same time that the bits are shifted, the first flip-flop
receives its binary information from the serial input. During a shift-left operation the serial
input transfers a bit into the rightmost position. During a shift-right operation the serial input
transfers a bit into the leftmost position. The information transferred through the serial input
determines the type of shift. There are three types of shifts: logical, circular, and arithmetic.
Logical shift: A logical shift is one that transfers 0 through the serial input. We will adopt the
symbols shl and shr for logical shift-left and shift-right rnicrooperations. For example:

R1 ← shl R1

R2 ← shr R2

are two rnicrooperations that specify a 1-bit shift to the left of the content of
register R 1 and a 1-bit shift to the right of the content of register R2. The register
symbol must be the same on both sides of the arrow. The bit transferred to the
end position through the serial input is assumed to be 0 during a logical shift.
he circular shift (also known as a rotate operation) circulates the bits of the
register around the two ends without loss of information. This is accomplished
by connecting the serial output of the shift register to its serial input. We will use
the symbols cil and cir for the circular shift left and right, respectively. The
symbolic notation for the shift rnicrooperations is shown in Table 4-7
An arithmetic shift is a rnicrooperation that shifts a signed binary number to the
left or right. An arithmetic shift-left multiplies a signed binary number by 2. An
arithmetic shift-right divides the number by 2. Arithmetic shifts must leave the
sign bit unchanged because the sign of the number remains the same
when it is multiplied or divided by 2. The leftmost bit in a register holds the sign bit, and the
remaining bits hold the number. The sign bit is 0 for positive and 1 for negative. Negative
numbers are in 2's complement form. Figure 4-11 shows a typical register of n bits. Bit Rn- 1 in
the leftmost position holds the sign bit. Rn-2 is the most significant bit of the number and Ro is
the least significant bit. The arithmetic shift-right leaves the sign bit unchanged and shifts the
number (including the sign bit) to the right. Thus Rn-1 remains the same, Rn-2 receives the bit
from Rn-1 and so on for the other bits in the register. The bit in Ro is lost.

Logic Micro operations:

• Logic microoperations specify binary operations for strings of bits stored in registers.
These operations consider each bit of the register separately and treat them as binary
variables.

List of Logic Micro operations:

• There are 16 different logic operations that can be performed with two binary variable

Each bit of the register is treated as a binary variable and the microoperation is performed on
the string of bits stored in the registers.
Hardware Implementation:
• Although there are 16 logic micro operations, most computers use only four-AND, OR,
XOR (exclusive-OR), and complement from which all others can be derived.

• It consists of four gates and a multiplexer. Each of the four logic operations is
generated through a gate that performs the required logic.
Some Applications:
Selective set : If bit in B is set to 1 then set the corresponding bit in A to 1

– 1010–A

– 1100–B

– 1 1 1 0 – RESULT

Set Compliment: if a bit in B is set to 1 the corresponding potion in A gets complimented.

1010–A

1100–B

0 1 1 0 - RESULT

Set clear : if a bit n B is set to 1 then a bit in A go to 0

1 0 1 0 –A

1100–B

0 0 1 0 – RESULT

Mask Operation: if a bit in B is set to 0 then same portion in A get set to 0 corresponding A
values remain same .

1010-A

1100–B

1 0 0 0 – RESULT

A L U ( ARITHMETIC LOGIC SHIFT UNIT )

• Instead of having individual registers performing the micro operations directly,
computer systems employ a number of storage registers connected to a common
operational unit called an arithmetic logic unit, abbreviated ALU.

• To perform a micro operation, the contents of specified registers are placed in the
inputs of the common ALU. The ALU performs an operation and the result of the
operation is then transferred to a destination register. The ALU is a
 combinational circuit, so that the entire register transfer operation from the source
registers through the ALU and into the destination register can be performed during one
clock pulse period. The shift micro operations are often overall in a separate unit, but
sometimes the shift unit is made part of the overall ALU.

• The arithmetic, logic, and shift circuits can be combined into one ALU with common
selection variables. One stage of an arithmetic logic shift unit is shown in. The subscript i
designates a typical stage. Inputs A1 and B1 are applied to both the arithmetic and
logic units.

Basic Computer Organization and Design:

Instruction codes:

An instruction code is a group of bits that tells the computer to perform a specific operation
part.
Processor Register & instruction code with two parts. The first part specifies the operation to be
performed and second specifies an address. The memory address tells where the operand in
memory will be found.
An instruction code therefore specifies not only operations to be performed but also the
registers where the operands(data) will be found as well as the registers where the result has to
be stored Instructions are stored in one section of memory and data in another.
The operation code of an instruction is a group of bits that define operations such as add,
subtract, multiply, shift and compliment. The number of bits required for the operation code
depends upon the total number of operations available on the computer. The operation code
must consist of at least n bits for a given 2^n operations. The operation part of an instruction
code specifies the operation to be performed.

The simples way to organize a computer is to have one processor register and an instruction
code format with two parts

• The simplest design is to have one processor register(called the accumulator) and two fields
in the instruction, one for the opcode and one for the operand.

MEMORY = 4096 * 16

= 2 16 * 2 4

Computer Instructions:

Computer instructions are a set of machine language instructions that a particular processor
understands and executes. A computer performs tasks on the basis of the instruction provided.
An instruction comprises of groups called fields.

These fields include:

The Operation code (Opcode) field which specifies the operation to be performed.
The Address field which contains the location of the operand, i.e., register or memory location.
The Mode field which specifies how the operand will be located.
A basic computer has three instruction code formats which are:
1. Memory - reference instruction
2. Register - reference instruction
3. Input-Output instruction

Memory - reference instruction:

In Memory-reference instruction, 12 bits of memory is used to specify an address and

one bit to specify the addressing mode 'I'.

Register - reference instruction :

The Register-reference instructions are represented by the Opcode 111 with a 0 in the
leftmost bit (bit 15) of the instruction.

Note: The Operation code (Opcode) of an instruction refers to a group of bits that define
arithmetic and logic operations such as add, subtract, multiply, shift, and compliment.

A Register-reference instruction specifies an operation on or a test of the AC (Accumulator)

register.

Input-Output instruction :

Just like the Register-reference instruction, an Input-Output instruction does not need a
reference to memory and is recognized by the operation code 111 with a 1 in the leftmost bit of
the instruction. The remaining 12 bits are used to specify the type of the input-output
operation or test performed.
Direct operand - an operand stored in the register or in the memory location specified.
Indirect operand - an operand whose address is stored in the register or in the memory
location specified.
Immediate operand - an operand whose value is specified in the instruction

Timing and Control

• All sequential circuits in the Basic Computer CPU are driven by a master clock, with the
exception of the INPR register.

• At each clock pulse, the control unit sends control signals to control inputs of the bus,
the registers, and the ALU.

• Control unit design and implementation can be done by two general methods:

• A hardwired control unit : is designed from scratch using traditional digital logic design
techniques to produce a minimal, optimized circuit. In other words, the control unit is
like an ASIC (application-specific integrated circuit).
 • A microprogrammed control unit : is built from some sort of ROM. The desired control
signals are simply stored in the ROM, and retrieved in sequence to drive the
microoperations needed by a particular instruction.

It consists of two decoders, a sequence counter, and a number of control logic gates. An
instruction read from memory is placed in the instruction register (IR). The instruction register
is divided into three parts: the I bit, the operation code, and bits 0 through 11. The operation
code in bits 12 through 14 are decoded with a 3 x 8 decoder. The eight outputs of the decoder
are designated by the symbols D0 through D7•

• Bit 15 of the instruction is transferred to a flip-flop designated by the symbol I. Bits 0

through 11 are applied to the control logic gates. The 4-bit sequence counter can count
in binary from 0 through 15. The outputs of the counter are decoded into 16 timing
signals T0 through T15• The internal logic of the control gates will be derived later when
we consider the design of the computer in detail.
 • The sequence counter SC can be incremented or cleared synchronously (see the counter
of Fig. 2-11). Most of the time, the counter is incremented to provide the sequence of
timing signals out of the 4 x 16 decoder. Once in awhile, the counter is cleared to 0,
causing the next active timing signal to be To.

Difference between Hardwired Control and Micro programmed Control

Hardwired Control Microprogrammed Control

Technology is circuit based. Technology is software based.

It is implemented through flip-flops, Microinstructions generate signals to control the

gates, decoders etc. execution of instructions.

Fixed instruction format. Variable instruction format (16-64 bits per instruction).

Instructions are register based. Instructions are not register based.

ROM is not used. ROM is used.

It is used in RISC. It is used in CISC.

Faster decoding. Slower decoding.

Difficult to modify. Easily modified.

Chip area is less. Chip area is large.

Instruction cycle:

A program residing in the memory unit of a computer consists of a sequence of instructions.

These instructions are executed by the processor by going through a cycle for each
instruction.

In a basic computer, each instruction cycle consists of the following phases:

1. Fetch instruction from memory.

2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.
1. Fetch instruction: Read instruction code from address in PC and place in IR. ( IR ←
Memory[PC] )
2. Decode instruction: Hardware determines what the opcode/function is, and determines
which registers or memory addresses contain the operands.
3. Fetch operands from memory if necessary: If any operands are memory addresses, initiate
memory read cycles to read them into CPU registers. If an operand is in memory, not a
register, then the memory address of the operand is known as the effective address, or EA
for short. The fetching of an operand can therefore be denoted as Register ← Memory[EA].
On today's computers, CPUs are much faster than memory, so operand fetching usually
takes multiple CPU clock cycles to complete.
4. Execute: Perform the function of the instruction. If arithmetic or logic instruction, utilize
the ALU circuits to carry out the operation on data in registers. This is the only stage of the
instruction cycle that is useful from the perspective of the end user. Everything else is
overhead required to make the execute stage happen. One of the major goals of CPU design
is to eliminate overhead, and spend a higher percentage of the time in the execute stage.
Details on how this is achieved is a topic for a hardware-focused course in computer
architecture.

Memory Reference Instructions:

In Memory reference instruction:
First 12 bits(0-11) specify an address.
Next 3 bits specify operation code (opcode).
Left most bit specify the addressing mode I
I = 0 for direct address
I = 1 for indirect address
 first 12 bits (0-11) specify an address.
The address field is denoted by three x’s (in hexadecimal notation) and is equivalent to
12-bit address.
The last mode bit of the instruction represents by symbol I.
When I = 0, the last four bits of an instruction have a hexadecimal digit equivalent from
0 to 6 since the last bit is zero (0).
When I = 1 the last four bits of an instruction have a hexadecimal digit equivalent from 8
to E since the last bit is one (1).

AND to AC :
This is an instaruction that perform the AND logic operation on pairs of bits in AC and the
memory word specified by the effective address. The result of

the operation is transferred to AC . The microoperations that execute this instruction are:

D0T4:DR<-M[AR]
D0T5:AC<-AC/\DR, SC<---0

The control function for this instruction uses the operation decoder D0 since this output of the
decoder is active when the instruction has an AND operation whose binary code value
000. Two timing signals are needed to execute the instaruction. The clock transition associared
with timing signal T4 transfers the operand from memory into DR . The clock transition
associated with the next timing signal T5 transfers to AC the result of the AND logic operation
between the contents of DR and AC. The same clock transition clears SC to 0, transferring
control to timing signal T0 to start a new instruction cycle.

INPUT OUTPUT & INTERRUPT:

A computer can serve no useful purpose unless it communicates with the external
environment. Instructions and data stored in memory must come from some input device.
Computational results must be transmitted to the user through some output device.
Commercial computers include many types of input and output devices. To demonstrate the
most basic requirements for input and output communication, we will use as an illustration a
terminal unit with a keyboard and printer.

Input-Output Configuration

The terminal sends and receives serial information. Each quantity of information has eight bits
of an alphanumeric code. The serial information from the keyboard is shifted into the input
register INPR. The serial information for the printer is stored in the output register OUTR.
These two registers communicate with a communication interface serially and with the AC in
parallel. The input-output configuration is shown in Fig. 5-12. The transmitter interface
receives serial information from the keyboard and transmits it to INPR. The receiver interface
receives information from OUTR and sends it to the printer serially. The operation of the serial
communication interface is explained in Sec. 11-3.
Input register:
The input register INPR consists of eight bits and holds an alpha numeric input information. The
1-bit input flag FGI is a control flip-flop. The flag bit is set to 1 when new information is available
in the input device and is cleared to 0 when the information is accepted by the computer. The
flag is needed to synchronize the timing rate difference between the input device and the
computer. The process of information transfer is as follows. Initially, the input flag FGI is cleared
to 0. When a key is struck in the keyboard, an 8-bit alphanumeric code is shifted into INPR and
the input flag FGI is set to 1. As long as the flag is set, the information in INPR cannot be
changed by striking another key. The computer checks the flag bit; if it is 1, the information
from INPR is transferred in parallel into AC and FGI is cleared to 0. Once the flag is cleared, new
information can be shifted into INPR by striking another key.
INPUT OUTPUT INSTRUCTIONS:
 Interrupts:
In early years of computing processor has to wait for the signal for processing, so processor has
to check each and every hardware and software program in the system if it has any signal to
process. This method of checking the signal in the system for processing is called polling
method. In this method the problem processor has to waste number of clock cycles just for
checking the signal in the system, by this processor will become busy unnecessarily. If any signal
came for the process, processor will take some time to process the signal due to the polling
process in action. So system performance also will be degraded and response time of the
system will also decrease.

So to over come this problem engineers introduced a new mechanism, in this mechanism
processor will not check for any signal from hardware or software but instead
hardware/software will only send the signal to the processor for processing. The signal from
hardware or software should have highest priority because processor should leave the current
process and process the signal of hardware or software. This mechanism of processing the
signal is called interrupt of the system.

What is an Interrupt?

Interrupt is a signal which has highest priority from hardware or software which processor

should process its signal immediately.

TYPES OF INTERRUPTS:
Although interrupts have highest priority than other signals, there are many type of interrupts
but basic type of interrupts are ->

1.Hardware Interrupts: If the signal for the processor is from external device or hardware is
called hardware interrupts.

Example: from keyboard we will press the key to do some action this pressing of key in
keyboard will generate a signal which is given to the processor to do action, such interrupts are
called hardware interrupts.
Hardware interrupts can be classified into two types ->

Maskable Interrupt: The hardware interrupts which can be delayed when a much highest
priority interrupt has occurred to the processor.

Non Maskable Interrupt: The hardware which cannot be delayed and should process by the
processor immediately.

2. Software Interrupts: Software interrupt can also divided in to two types they are ->

Normal Interrupts: the interrupts which are caused by the software instructions are called
software instructions.

Exception Interrupt: unplanned interrupts while executing a program is called Exception. For
example: while executing a program if we got a value which should be divided by zero is called
a exception.