MCP102/103/121/131

Micropower Voltage Supervisors

Features Package Types
• Ultra low supply current: 1.75 µA SOT23-3/SC-70 TO-92
(steady-state max.)

MCP102/121/131
• Precision monitoring options of:
RST 1
- 1.90V, 2.32V, 2.63V, 2.93V, 3.08V, 4.38V
and 4.63V
3 VSS RST
• Resets microcontroller in a power-loss event VDD VSS
• RST pin (Active-low):
VDD 2
- MCP121: Active-low, open-drain
- MCP131: Active-low, open-drain with internal
pull-up resistor SOT23-3/SC-70
- MCP102 and MCP103: Active-low, push-pull
• Reset Delay Timer (120 ms delay, typ.) VSS 1

MCP103
• Available in SOT23-3, TO-92 and SC-70
packages 3 VDD
• Temperature Range:
- Extended: -40°C to +125°C RST 2
(except MCP1XX-195)
- Industrial: -40°C to +85°C (MCP1XX-195 only)
• Pb-free devices Block Diagram
Applications VDD
• Critical Microcontroller and Microprocessor
R (1)
Power-monitoring Applications
Comparator
• Computers
• Intelligent Instruments + Reset Output
Delay Driver
• Portable Battery-powered Equipment – Circuit RST
General Description
The MCP102/103/121/131 are voltage supervisor Band Gap
devices designed to keep a microcontroller in reset Reference
until the system voltage has reached and stabilized at
the proper level for reliable system operation. Table 1 VSS Note 1: MCP131 Only
shows the available features for these devices.
TABLE 1: DEVICE FEATURES
Output Reset Package Pinout
Device Comment
Type Pull-up Resistor Delay (typ) (Pin # 1, 2, 3)

MCP102 Push-pull No 120 ms RST, VDD, VSS

MCP103 Push-pull No 120 ms VSS, RST, VDD
MCP121 Open-drain External 120 ms RST, VDD, VSS
MCP131 Open-drain Internal (~95 kΩ) 120 ms RST, VDD, VSS
MCP111 Open-drain External No VOUT, VSS, VDD See MCP111/112 Data Sheet
(DS21889)
MCP112 Push-Pull No No VOUT, VSS, VDD See MCP111/112 Data Sheet
(DS21889)

© 2005 Microchip Technology Inc. DS21906B-page 1

MCP102/103/121/131
1.0 ELECTRICAL † Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
CHARACTERISTICS a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
Absolute Maximum Ratings† operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V may affect device reliability.
Input current (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA
Output current (RST) . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA
Rated Rise Time of VDD . . . . . . . . . . . . . . . . . . . . . . 100V/µs
All inputs and outputs (except RST) w.r.t. VSS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to (VDD + 1.0V)
RST output w.r.t. VSS . . . . . . . . . . . . . . . . . . . -0.6V to 13.5V
Storage temperature . . . . . . . . . . . . . . . . . . -65°C to + 150°C
Ambient temp. with power applied . . . . . . . -40°C to + 125°C
Maximum Junction temp. with power applied . . . . . . . . 150°C
ESD protection on all pins . . . . . . . . . . . . . . . . . . . . . . . . . ≥ 2 kV

DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only),
TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Operating Voltage Range VDD 1.0 — 5.5 V

Specified VDD Value to RST low VDD 1.0 — V IRST = 10 uA, VRST < 0.2V
Operating Current MCP102, IDD — <1 1.75 µA Reset Power-up Timer (tRPU) Inactive
MCP103,
MCP121 — — 20.0 µA Reset Power-up Timer (tRPU) Active
MCP131 IDD — <1 1.75 µA VDD > VTRIP and Reset Power-up
Timer (tRPU) Inactive
— — 75 µA VDD < VTRIP and Reset Power-up
Timer (tRPU) Inactive (Note 3)
— — 90 µA Reset Power-up Timer (tRPU) Active
(Note 4)
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: RST output is forced low. There is a current through the internal pull-up resistor.
4: This includes the current through the internal pull-up resistor and the reset power-up timer.
5: This specification allows this device to be used in PICmicro® microcontroller applications that require In-Circuit Serial
Programming™ (ICSP™) (see device-specific programming specifications for voltage requirements). This specification
DOES NOT allow a continuos high voltage to be present on the open-drain output pin (VOUT). The total time that the
VOUT pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the VOUT pin should be
limited to 2 mA and it is recommended that the device operational temperature be maintained between 0°C to 70°C
(+25°C preferred). For additional information, please refer to Figure 2-33.
6: This parameter is established by characterization and not 100% tested.

DS21906B-page 2 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only),
TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

VDD Trip Point MCP1XX-195 VTRIP 1.872 1.900 1.929 V TA = +25°C (Note 1)
1.853 1.900 1.948 V TA = -40°C to +85°C (Note 2)
MCP1XX-240 2.285 2.320 2.355 V TA = +25°C (Note 1)
2.262 2.320 2.378 V Note 2
MCP1XX-270 2.591 2.630 2.670 V TA = +25°C (Note 1)
2.564 2.630 2.696 V Note 2
MCP1XX-300 2.886 2.930 2.974 V TA = +25°C (Note 1)
2.857 2.930 3.003 V Note 2
MCP1XX-315 3.034 3.080 3.126 V TA = +25°C (Note 1)
3.003 3.080 3.157 V Note 2
MCP1XX-450 4.314 4.380 4.446 V TA = +25°C (Note 1)
4.271 4.380 4.490 V Note 2
MCP1XX-475 4.561 4.630 4.700 V TA = +25°C (Note 1)
4.514 4.630 4.746 V Note 2
VDD Trip Point Tempco TTPCO — ±100 — ppm/°C
Threshold MCP1XX-195 VHYS 0.019 — 0.114 V TA = +25°C
Hysteresis MCP1XX-240 0.023 — 0.139 V
(min. = 1%,
max = 6%) MCP1XX-270 0.026 — 0.158 V
MCP1XX-300 0.029 — 0.176 V
MCP1XX-315 0.031 — 0.185 V
MCP1XX-450 0.044 — 0.263 V
MCP1XX-475 0.046 — 0.278 V
RST Low-level Output Voltage VOL — — 0.4 V IOL = 500 µA, VDD = VTRIP(MIN)
RST High-level Output Voltage VOH VDD – 0.6 — — V IOH = 1 mA, For MCP102/MCP103
(MCP102 and MCP103 only) only (push-pull output)
Internal Pull-up Resistor RPU — 95 — kΩ VDD = 5.5V
(MCP131 only)
Open-drain High Voltage on Output VODH — — 13.5 (5) V VDD = 3.0V, Time voltage > 5.5V
(MCP121 only) applied ≤ 100s,
current into pin limited to 2 mA, 25°C
operation recommended
(Note 5, Note 6)
Open-drain Output Leakage Current IOD — 0.1 — µA
(MCP121 only)
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: RST output is forced low. There is a current through the internal pull-up resistor.
4: This includes the current through the internal pull-up resistor and the reset power-up timer.
5: This specification allows this device to be used in PICmicro® microcontroller applications that require In-Circuit Serial
Programming™ (ICSP™) (see device-specific programming specifications for voltage requirements). This specification
DOES NOT allow a continuos high voltage to be present on the open-drain output pin (VOUT). The total time that the
VOUT pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the VOUT pin should be
limited to 2 mA and it is recommended that the device operational temperature be maintained between 0°C to 70°C
(+25°C preferred). For additional information, please refer to Figure 2-33.
6: This parameter is established by characterization and not 100% tested.

© 2005 Microchip Technology Inc. DS21906B-page 3

MCP102/103/121/131

VTRIP

1V
VDD tRPU
tRPD

VOH
1V
RST VOL

tRT

FIGURE 1-1: Timing Diagram.

AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only),
TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

VDD Detect to RST Inactive tRPU 80 120 180 ms Figure 1-1 and CL = 50 pF
VDD Detect to RST Active tRPD — 130 — µs VDD ramped from VTRIP(MAX) +
250 mV down to VTRIP(MIN) –
250 mV, per Figure 1-1,
CL = 50 pF (Note 1)
RST Rise Time After RST Active tRT — 5 — µs For RST 10% to 90% of final value
(MCP102 and MCP103 only) per Figure 1-1, CL = 50 pF
(Note 1)
Note 1: These parameters are for design guidance only and are not 100% tested.

TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only),
TA = -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA -40 — +85 ºC MCP1XX-195
Specified Temperature Range TA -40 — +125 ºC Except MCP1XX-195
Maximum Junction Temperature TJ — — +150 ºC
Storage Temperature Range TA -65 — +150 ºC
Package Thermal Resistances
Thermal Resistance, 3L-SOT23 θJA — 336 — ºC/W
Thermal Resistance, 3L-SC-70 θJA — 340 — ºC/W
Thermal Resistance, 3L-TO-92 θJA — 131.9 — ºC/W

DS21906B-page 4 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
2.0 TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.

1.8 16
MCP102-195 5.5V MCP102-195
1.6 14
5.0V
1.4 12 5.5V
1.2 4.0V 5.0V
10
IDD (uA)

IDD (uA)
1
8
0.8 2.8V 4.0V
2.1V 6
0.6
1.7V
0.4 4 2.8V
1.0V 2.1V
0.2 2
0 0
-40

-20

20

40

60

80

100

120

140

-40

-20

20

40

60

80

100

120

140
Temperature (°C) Temperature (°C)

FIGURE 2-1: IDD vs. Temperature FIGURE 2-4: IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP102-195). (Reset Power-up Timer Active) (MCP102-195).

35 80
MCP131-315 2.9V MCP131-315
30 70

25 60 5.5V
5.0V
50
IDD (uA)

IDD (uA)

20 4.5V
40 4.0V
15 3.3V
30
10 20
1.0V
5 3.3V, 4.0V, 5.0V, 5.5V 10
0 0
-40

-20

20

40

60

80

100

120

140

-40

-20

20

40

60

80

100

120

140
Temperature (°C) Temperature (°C)

FIGURE 2-2: IDD vs. Temperature FIGURE 2-5: IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP131-315). (Reset Power-up Timer Active) (MCP131-315).

0.9 16
MCP121-450 MCP121-450
0.8 5.5V
14
0.7 12 5.5V
0.6 5.0V
10 5.0V
IDD (uA)

IDD (uA)

0.5 4.8V 4.8V

8 4.6V
0.4
4.6V 6
0.3 4.1V 3.0V
0.2 4
0.1 1.0V 2
0 0
-40

-20

20

40

60

80

100

120

140

-40

-20

20

40

60

80

100

120

140

Temperature (°C) Temperature (°C)

FIGURE 2-3: IDD vs. Temperature FIGURE 2-6: IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP121-450). (Reset Power-up Timer Active) (MCP121-450).

© 2005 Microchip Technology Inc. DS21906B-page 5

MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.

1.8 16
MCP102-195 MCP102-195 -40°C 0°C
1.6 14 +25°C
1.4 +25°C +70°C
12 +85°C
+125°C
1.2 +125°C
10
IDD (uA)

IDD (uA)
1 +85°C
8 Device in Reset
0.8 tRPU inactive
6
0.6 0°C
0.4 -40°C 4
0.2 2
0 0
1.0 2.0 3.0 4.0 5.0 6.0 1.0 2.0 3.0 4.0 5.0 6.0
VDD (V) VDD (V)

FIGURE 2-7: IDD vs. VDD FIGURE 2-10: IDD vs.VDD

(Reset Power-up Timer Inactive) (MCP102-195). (Reset Power-up Timer Active) (MCP102-195).

35 80
MCP131-315 0°C, +25°C MCP131-315 -40°C, 0°C +25°C
30 -40°C
70 +70°C
60 +85°C
25
Device in Reset +125°C
20 IDD (uA) 50 tRPU inactive
IDD (uA)

+70°
15 C 40
+85°C
10 30
5 +125°C
20
0 10
-5 0
1.0 2.0 3.0 4.0 5.0 6.0 1.0 2.0 3.0 4.0 5.0 6.0
VDD (V) VDD (V)

FIGURE 2-8: IDD vs. VDD FIGURE 2-11: IDD vs.VDD

(Reset Power-up Timer Inactive) (MCP131-315). (Reset Power-up Timer Active) (MCP131-315).

0.9 16 -40°C
MCP121-450 MCP121-450
0.8 14 0°C
+25°C
0.7 12 +70°C
+125°C Device in Reset
0.6 +70°C 10 +85°C
IDD (uA)

IDD (uA)

0.5 8 tRPU inactive +125°C

0.4 +85°C 6
0.3 4
0°C
0.2 2
-40°C
0.1 +25°C 0
0 -2
1.0 2.0 3.0 4.0 5.0 6.0 1.0 2.0 3.0 4.0 5.0 6.0
VDD (V) VDD (V)

FIGURE 2-9: IDD vs. VDD FIGURE 2-12: IDD vs.VDD

(Reset Power-up Timer Inactive) (MCP121-450). (Reset Power-up Timer Active) (MCP121-450).

DS21906B-page 6 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121;
see Figure 4-1), TA = -40°C to +125°C.

0.120
1.945 0.050 MCP102-195
VTRIP, increasing VDD 0.100 VDD = 1.7V
1.940 0.045 +70°C
1.935 VHYS, Hysteresis 0.040 0.080 +125°C
1.930 0.035

VOL (V)
VTRIP (V)

0.060

Hyst (V)
1.925 0.030 +85°C
1.920 0.025 0.040 +25°C
1.915 0.020
1.910 0.015 0.020
0°C -40°C
1.905 VTRIP, decreasing VDD 0.010
0.000
1.900 MCP102-195 0.005
1.895 0.000 -0.020
-60 -10 40 90 140 0.00 0.25 0.50 0.75 1.00
Temperature (°C) IOL (mA)

FIGURE 2-13: VTRIP vs. Temperature vs. FIGURE 2-16: VOL vs. IOL
Hysteresis (MCP102-195). (MCP102-195 @ VDD = 1.7V).

0.070
3.200 0.108 MCP131-315
VTRIP, increasing VDD 0.060 VDD = 2.9V +70°C
3.180 0.106
0.050 +125°C
0.104
3.160 VHYS, Hysteresis 0.102

VOL (V)
0.040
VTRIP (V)

Hyst (V)

+85°C
3.140 0.100
0.098 0.030
3.120
0.096 0.020
3.100 VTRIP, decreasing VDD -40°C
0.094 0°C
3.080 0.010
0.092 +25°C
MCP131-315
3.060 0.090 0.000
-60 -10 40 90 140 0.00 0.25 0.50 0.75 1.00
Temperature (°C) IOL (mA)

FIGURE 2-14: VTRIP vs. Temperature vs. FIGURE 2-17: VOL vs. IOL
Hysteresis (MCP131-315). (MCP131-315 @ VDD = 2.9V).

4.550 0.190 0.060

MCP121-450
0.180 0.050
VDD = 4.1V +85°C
4.500 VTRIP, increasing VDD 0.170 +125°C

VHYS, Hysteresis 0.160 0.040 +70°C

VTRIP (V)

Hyst (V)

VOL (V)

4.450
0.150
0.030
0.140
4.400
VTRIP, decreasing VDD 0.130 0.020 +25°C
4.350 0.120
0.010 0°C
0.110 -40°C
MCP121-450
4.300 0.100 0.000
-60 -20 20 60 100 140 0.00 0.25 0.50 0.75 1.00
Temperature (°C) IOL (mA)

FIGURE 2-15: VTRIP vs. Temperature vs. FIGURE 2-18: VOL vs. IOL
Hysteresis (MCP121-450). (MCP121-450 @ VDD = 4.1V).

© 2005 Microchip Technology Inc. DS21906B-page 7

MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.

0.140 2.110
MCP102-195
MCP102-195
0.120 VDD = 1.7 V 2.090
IOL = 1.00 mA VDD = 2.1V

0.100 2.070
IOL = 0.75 mA 0°C -40°C
2.050
VOL (V)

VOH (V)
0.080
IOL = 0.50 mA
2.030
0.060 +125°C
2.010
0.040 IOL = 0.25 mA +85°C
1.990
+70°C
0.020 1.970 +25°C
IOL = 0.00 mA
0.000 1.950
-40 0 40 80 120 0.00 0.25 0.50 0.75 1.00
Temperature (°C) IOL (mA)

FIGURE 2-19: VOL vs. Temperature FIGURE 2-22: VOH vs. IOL
(MCP102-195 @ VDD = 1.7V). (MCP102-195 @ VDD = 2.1V).

0.070 IOL = 1.00 mA

MCP131-315
0.060 VDD = 2.9V
IOL = 0.75 mA
0.050
VOL (V)

0.040 IOL = 0.50 mA

0.030
IOL = 0.25 mA
0.020
0.010
IOL = 0.00 mA
0.000
-40 0 40 80 120
Temperature (°C)

FIGURE 2-20: VOL vs. Temperature

(MCP131-315 @ VDD = 2.9V).

0.060
MCP121-450
VDD = 4.1V IOL = 1.00 mA
0.050
IOL = 0.75 mA
0.040
VOL (V)

0.030 IOL = 0.50 mA

0.020 IOL = 0.25 mA

0.010
IOL = 0.00 mA
0.000
-40 0 40 80 120
Temperature (°C)

FIGURE 2-21: VOL vs. Temperature

(MCP121-450 @ VDD = 4.1V).

DS21906B-page 8 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.

300 160
VDD decreasing MCP102-195 MCP102-195
from: 5V - 1.7V
250 150
VDD decreasing from: VDD increasing from:
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V 0V - 2.1V
200 140

tRPU (µs)
VDD increasing from:
tRPD (µs)

0V - 2.8V
150 130

100 120 VDD increasing

from: 0V - 4.0V
50 110
VDD decreasing VDD increasing
from: 5V - 0V from: 0V - 5.5V
0 100
-40 -15 10 35 60 85 110 -40 -15 10 35 60 85 110
Temperature (°C) Temperature (°C)

FIGURE 2-23: tRPD vs. Temperature FIGURE 2-26: tRPU vs. Temperature
(MCP102-195). (MCP102-195).

250 160
VDD decreasing from: MCP131-315 VDD increasing from: MCP131-315
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V 0V - 3.3V
200 150
VDD increasing from:
0V - 4.0V
140
tRPD (µs)

tRPU (µs)
150 VDD decreasing from:
5V - 2.7V
130
100
VDD decreasing from: 120
VDD increasing from:
5V - 0V
50 0V - 4.5V
110
VDD increasing from:
0V - 5.5V
0 100
-40 -15 10 35 60 85 110 -40 -15 10 35 60 85 110
Temperature (°C) Temperature (°C)

FIGURE 2-24: tRPD vs. Temperature FIGURE 2-27: tRPU vs. Temperature
(MCP131-315). (MCP131-315).

38 145
MCP121-450 MCP121-450
37.5 140 VDD increasing from:
VDD increasing from:
0V - 4.6V 0V - 4.8V
VDD increasing from: 135
37 0V - 4.8V
tRT (µs)

tRPU (µs)

130
36.5
125
36 VDD increasing from:
120
0V - 5.0V
35.5 VDD increasing from: VDD increasing from: 115 VDD increasing from:
0V - 5.0V 0V - 5.5V 0V - 5.5V
35 110
-40 -15 10 35 60 85 110 -40 -15 10 35 60 85 110
Temperature (°C) Temperature (°C)

FIGURE 2-25: tRPD vs. Temperature FIGURE 2-28: tRPU vs. Temperature
(MCP121-450). (MCP121-450).

© 2005 Microchip Technology Inc. DS21906B-page 9

MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.

0.45 1400
VDD increasing from: MCP102-195 MCP121-450

Transient Duration (µS)

0.4 0V - 2.1V
1200
0.35 VDD increasing from:
0V - 2.8V 1000
0.3
tRT (µs)

0.25 800
MCP102-195
0.2 600
0.15 VDD increasing from: 400
0.1 0V - 4.0V
MCP131-315
VDD increasing from:
0.05 0V - 5.5V
VDD increasing from: 200
0V - 5.0V
0 0
-40 -15 10 35 60 85 110 0.001 0.01 0.1 1 10
Temperature (°C) VTRIP(Min) - VDD

FIGURE 2-29: tRT vs. Temperature FIGURE 2-32: Transient Duration vs.
(MCP102-195). VTRIP (min) - VDD.

10m
1.00E-02

45
VDD increasing from: VDD increasing from: 1m
1.00E-03

43

Open-Drain Leakage (A)

0V - 5.5V 0V - 5.0V 100µ
1.00E-04

41 VDD increasing from: 10µ

1.00E-05

39 0V - 4.5V
1µ
1.00E-06

37
tRT (µs)

100n
1.00E-07 +125°C
35 10n
1.00E-08

33 1n
1.00E-09

31 100p
1.00E-10
+25°C
VDD increasing from:
29 0V - 3.3V 10p
1.00E-11
- 40°C
VDD increasing from: 1p
27 MCP131-315
1.00E-12

0V - 4.0V
25 100f
1.00E-13

-40 -15 10 35 60 85 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14

Temperature (°C) Pull-Up Voltage (V)

FIGURE 2-30: tRT vs. Temperature FIGURE 2-33: Open-Drain Leakage

(MCP131-315). Current vs. Voltage Applied to VOUT Pin
(MCP121-195).
38
MCP121-450

37.5 VDD increasing from:

0V - 4.6V VDD increasing from:
37 0V - 4.8V
tRT (µs)

36.5

36

35.5 VDD increasing from: VDD increasing from:

0V - 5.0V 0V - 5.5V
35
-40 -15 10 35 60 85 110
Temperature (°C)

FIGURE 2-31: tRT vs. Temperature

(MCP121-450).

DS21906B-page 10 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
3.0 PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

Pin No.

MCP102 Symbol Function

MCP121 MCP103
MCP131

1 1 RST Output State

VDD Falling:
H = VDD > VTRIP
L = VDD < VTRIP

VDD Rising:
H = VDD > VTRIP + VHYS
L = VDD < VTRIP + VHYS
2 3 VDD Positive power supply
3 2 VSS Ground reference

© 2005 Microchip Technology Inc. DS21906B-page 11

MCP102/103/121/131
4.0 APPLICATION INFORMATION 4.1 RST Operation
For many of today’s microcontroller applications, care The RST output pin operation determines how the
must be taken to prevent low-power conditions that can device can be used and indicates when the system
cause many different system problems. The most should be forced into reset. To accomplish this, an
common causes are brown-out conditions, where the internal voltage reference is used to set the voltage trip
system supply drops below the operating level momen- point (VTRIP). Additionally, there is a hysteresis on this
tarily. The second most common cause is when a trip point.
slowly decaying power supply causes the When the falling edge of VDD crosses this voltage
microcontroller to begin executing instructions without threshold, the reset power-down timer (TRPD) starts.
sufficient voltage to sustain volitile memory (RAM), thus When this delay timer times out, the RST pin is forced
producing indeterminate results. Figure 4-1 shows a low.
typical application circuit.
When the rising-edge of VDD crosses this voltage
The MCP102/103/121/131 are voltage supervisor threshold, the reset power-up timer (TRPU) starts.
devices designed to keep a microcontroller in reset When this delay timer times out, the RST pin is forced
until the system voltage has reached and stabilized at high, TRPU is active and there is additional system
the proper level for reliable system operation. These current.
devices also operate as protection from brown-out
conditions. The actual voltage trip point (VTRIPAC) will be between
the minimum trip point (VTRIPMIN) and the maximum
trip point (VTRIPMAX). The hysteresis on this trip point
VDD
and the delay timer (TRPU) are to remove any “jitter”
VDD that would occur on the RST pin when the device VDD
VDD is at the trip point.
0.1 RPU PICmicro®
µF MCP1XX Microcontroller Figure 4-2 shows the waveform of the RST pin as deter-
mined by the VDD voltage, while Table 4-1 shows the
MCLR
RST (Reset input) state of the RST pin. The VTRIP specification is for falling
(Active-low) VDD voltages. When the VDD voltage is rising, the RST
VSS will not be driven high until VDD is at VTRIP + VHYS. Once
VSS
VDD has crossed the voltage trip point, there is also a
minimal delay time (TRPD) before the RST pin is driven
low.
Note 1: Resistor RPU may be required with the
MCP121 due to the open-drain output. TABLE 4-1: RST PIN STATES
Resistor RPU may not be required with State of RST Pin when:
the MCP131 due to the internal pull-up
resistor. The MCP102 and MCP103 do Device VDD < VTRIP VDD > Ouput Driver
not require the external pull-up resistor. VTRIP + VHYS

FIGURE 4-1: Typical Application Circuit. MCP102 L H Push-pull

MCP103 L H Push-pull
(1)
MCP121 L H Open-drain (1)
MCP131 L H (2) Open-drain (2)
Note 1: Requires External Pull-up resistor
2: Has Internal Pull-up resistor

VDD VTRIPAC + VHYSAC

VTRIPMAX
VTRIPAC
VTRIPMIN VTRIPAC

1V

RST tRPU
< 1V is outside the tRPU
tRPD
tRPD device specifications

FIGURE 4-2: RST Operation as Determined by the VTRIP and VHYS.

DS21906B-page 12 © 2005 Microchip Technology Inc.


4.2 Negative Going VDD Transients
The minimum pulse width (time) required to cause a
reset may be an important criteria in the implementa-
tion of a Power-on Reset (POR) circuit. This time is
referred to as transient duration, defined as the amount
of time needed for these supervisory devices to
respond to a drop in VDD. The transient duration time is
dependant on the magnitude of VTRIP – VDD. Generally
speaking, the transient duration decreases with
increases in VTRIP – VDD.
Figure 4-3 shows a typical transient duration vs. reset
comparator overdrive, for which the
MCP102/103/121/131 will not generate a reset pulse. It
shows that the farther below the trip point the transient
pulse goes, the duration of the pulse required to cause
a reset gets shorter. Figure 2-32 shows the transient
response characteristics for the MCP102/103/121/131.
A 0.1 µF bypass capacitor, mounted as close as
possible to the VDD pin, provides additional transient
immunity (refer to Figure 4-1).
MCP102/103/121/131
4.3 Reset Power-up Timer (tRPU)
Figure 4-4 illustrates the device current states. While
the system is powering down, the device has a low
current. This current is dependent on the device VDD
and trip point. When the device VDD rises through the
voltage trip point (VTRIP), an internal timer starts. This
timer consumes additional current until the RST pin is
driven (or released) high. This time is known as the
Reset Power-up Time (tRPU). Figure 4-4 shows when
tRPU is active (device consuming additional current).
VDD
VTRIP
RST
tRPU

Reset Power-up
5V
VTRIP(MAX)
Supply Voltage

Timer Active
VTRIP(MIN)
VTRIP(MIN) - VDD Reset
Power-up
Reset Power-up Timer
tTRANS Timer Inactive Inactive

0V Time (µs)
See Figures 2-1, See Figures 2-1,
FIGURE 4-3: Example of Typical 2-2 and 2-3 2-2 and 2-3
Transient Duration Waveform.
See Figures 2-4,
2-5 and 2-6

FIGURE 4-4: Reset Power-up Timer

Waveform.

4.3.1 EFFECT OF TEMPERATURE ON

RESET POWER-UP TIMER (TRPU)
The Reset Power-up timer time-out period (tRPU)
determines how long the device remains in the reset
condition. This is affected by both VDD and temperature.
Typical responses for different VDD values and
temperatures are shown in Figures 2-26, 2-27 and 2-28.

© 2005 Microchip Technology Inc. DS21906B-page 13

MCP102/103/121/131
4.4 Using in PICmicro®
Microcontroller, ICSP™
Applications (MCP121 only)
Figure 4-5 shows the typical application circuit for using
the MCP121 for voltage superviory function when the
PICmicro microcontroller will be programmed via the
ICSP feature. Additional information is available in
TB087, “Using Voltage Supervisors with PICmicro®
Microcontroller Systems which Implement In-Circuit
Serial Programming™”, DS91087.
Note: It is recommended that the current into the
RST pin be current limited by a 1 kΩ
resistor.

VDD/VPP
0.1µF VDD
VDD RPU
PICmicro®
MCP121 MCU
MCLR
RST (Reset Input)
1 kΩ (Active-low)
VSS
VSS

FIGURE 4-5: Typical Application Circuit

for PICmicro® Microcontroller with the ICSP™
feature.

DS21906B-page 14 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
5.0 PACKAGING INFORMATION

5.1 Package Marking Information

3-Lead TO-92 Example:

XXXXXX MCP102
XXXXXX 195I
XXXXXX e3
TO^^
YWWNNN 547256

Example:

MCP1xx =
3-Pin SOT-23 Part Number
MCP102 MCP103 MCP121 MCP131
MCP1xxT-195I/TT JGNN TGNN LGNN KGNN
MCP1xxT-240ETT JHNN THNN LHNN KHNN
XXNN MCP1xxT-270E/TT JJNN TJNN LJNN KJNN
MCP1xxT-300E/TT JKNN TKNN LKNN KKNN
MCP1xxT-315E/TT JLNN TLNN LLNN KLNN
MCP1xxT-450E/TT JMNN TMNN LMNN KMNN
MCP1xxT-475E/TT JPNN TPNN LPNN KPNN

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
e3 Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.

© 2005 Microchip Technology Inc. DS21906B-page 15

MCP102/103/121/131
Package Marking Information (Continued)

Example:

3-Pin SC-70 MCP1xx =

Part Number
MCP102 MCP103 MCP121 MCP131
MCP1xxT-195I/LB BGN FGN DGN CGN
MCP1xxT-240E/LB BHN FHN DHN CHN
XXN YWW MCP1xxT-270E/LB BJN FJN DJN CJN
MCP1xxT-300E/LB BKN FKN DKN CKN
MCP1xxT-315E/LB BLN FLN DLN CLN
Top Side Bottom Side MCP1xxT-450E/LB BMN FMN DMN CMN
MCP1xxT-475E/LB BPN FPN DPN CPN

OR Example:
MCP1xx =
Part Number
MCP102 MCP103 MCP121 MCP131
MCP1xxT-195I/LB BGNN FGNN DGNN CGNN
MCP1xxT-240E/LB BHNN FHNN DHNN CHNN
XXNN MCP1xxT-270E/LB BJNN FJNN DJNN CJNN
MCP1xxT-300E/LB BKNN FKNN DKNN CKNN
MCP1xxT-315E/LB BLNN FLNN DLNN CLNN
Top Side MCP1xxT-450E/LB BMNN FMNN DMNN CMNN
MCP1xxT-475E/LB BPNN FPNN DPNN CPNN

DS21906B-page 16 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
3-Lead Plastic Small Outline Transistor (TT) (SOT-23)

E1

B p1 D
n p

1
α

c
A A2

φ A1

β
L

Units INCHES* MILLIMETERS

Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n 3 3
Pitch p .038 0.96
Outside lead pitch (basic) p1 .076 1.92
Overall Height A .035 .040 .044 0.89 1.01 1.12
Molded Package Thickness A2 .035 .037 .040 0.88 0.95 1.02
Standoff § A1 .000 .002 .004 0.01 0.06 0.10
Overall Width E .083 .093 .104 2.10 2.37 2.64
Molded Package Width E1 .047 .051 .055 1.20 1.30 1.40
Overall Length D .110 .115 .120 2.80 2.92 3.04
Foot Length L .014 .018 .022 0.35 0.45 0.55
Foot Angle φ 0 5 10 0 5 10
Lead Thickness c .004 .006 .007 0.09 0.14 0.18
Lead Width B .015 .017 .020 0.37 0.44 0.51
Mold Draft Angle Top α 0 5 10 0 5 10
Mold Draft Angle Bottom β 0 5 10 0 5 10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-236
Drawing No. C04-104

© 2005 Microchip Technology Inc. DS21906B-page 17

MCP102/103/121/131
3-Lead Plastic Small Outline Transistor (LB) (SC-70)

E1

B 2
p1 D
3 p

c A A2

b A1
L

Units INCHES MILLIMETERS*

Dimension Limits MIN MAX MIN MAX
Number of Pins 3 3
Pitch p .026 BSC. 0.65 BSC.
Outside lead pitch (basic) p1 .051 BSC. 1.30 BSC.
Overall Height A .031 .043 0.80 1.10
Molded Package Thickness A2 .031 .039 0.80 1.00
Standoff A1 .000 .0004 0.00 .010
Overall Width E .071 .094 1.80 2.40
Molded Package Width E1 .045 .053 1.15 1.35
Overall Length D .071 .089 1.80 2.25
Foot Length L .004 .016 0.10 0.41
Lead Thickness c .003 .010 0.08 0.25
Lead Width B .006 .016 0.15 0.40
Mold Draft Angle Top a 8° 12° 8° 12°
Mold Draft Angle Bottom b 8° 12° 8° 12°
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions
shall not exceed .005" (0.127mm) per side.

JEITA (EIAJ) Equivalent: SC70

Drawing No. C04-104

DS21906B-page 18 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
3-Lead Plastic Transistor Outline (TO) (TO-92)

E1

1 n

1
2
3

α
B
p
c

R
β

Units INCHES* MILLIMETERS

Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n 3 3
Pitch p .050 1.27
Bottom to Package Flat A .130 .143 .155 3.30 3.62 3.94
Overall Width E1 .175 .186 .195 4.45 4.71 4.95
Overall Length D .170 .183 .195 4.32 4.64 4.95
Molded Package Radius R .085 .090 .095 2.16 2.29 2.41
Tip to Seating Plane L .500 .555 .610 12.70 14.10 15.49
Lead Thickness c .014 .017 .020 0.36 0.43 0.51
Lead Width B .016 .019 .022 0.41 0.48 0.56
Mold Draft Angle Top α 4 5 6 4 5 6
Mold Draft Angle Bottom β 2 3 4 2 3 4
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-92
Drawing No. C04-101

© 2005 Microchip Technology Inc. DS21906B-page 19

MCP102/103/121/131
5.2 Product Tape and Reel Specifications

FIGURE 5-1: EMBOSSED CARRIER DIMENSIONS (8, 12, 16 AND 24 MM TAPE ONLY)

Top
Cover
Tape A0
W

K0 B0

TABLE 1: CARRIER TAPE/CAVITY DIMENSIONS

Carrier Cavity
Dimensions Dimensions Output Reel
Case Package
Quantity Diameter in
Outline Type W P A0 B0 K0 Units mm
mm mm mm mm mm
TT SOT-23 3L 8 4 3.15 2.77 1.22 3000 180
LB SC-70 3L 8 4 2.4 2.4 1.19 3000 180

FIGURE 5-2: 3-LEAD SOT-23/SC70 DEVICE TAPE AND REEL SPECIFICATIONS

User Direction of Feed

Device
Marking
W

PIN 1
P
Standard Reel Component Orientation

DS21906B-page 20 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
FIGURE 5-3: TO-92 DEVICE TAPE AND REEL SPECIFICATIONS

User Direction of Feed

P
Device
Marking
MARK MARK MARK
FACE FACE FACE

Seal
Tape
Back W
Tape

Note: Bent leads are for Tape and Reel only.

© 2005 Microchip Technology Inc. DS21906B-page 21

MCP102/103/121/131
NOTES:

DS21906B-page 22 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
APPENDIX A: REVISION HISTORY

Revision B (March 2005)

The following is the list of modifications:
1. Added Section 4.4 “Using in PICmicro®
Microcontroller, ICSP™ Applications
(MCP121 only)” on using the MCP121 in
PICmicro microcontroller ICSP applications.
2. Added VODH specifications in Section 1.0
“Electrical Characteristics” (for ICSP
applications).
3. Added Figure 2-33.
4. Updated SC-70 package markings and added
Pb-free marking information to Section 5.0
“Packaging information”.
5. Added Appendix A: “Revision History”.

Revision A (August 2004)

• Original Release of this Document.

© 2005 Microchip Technology Inc. DS21906B-page 23

MCP102/103/121/131
NOTES:

DS21906B-page 24 © 2005 Microchip Technology Inc.

 MCP102/103/121/131
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO. – X XXX X / XX
a) MCP102T-195I/TT: Tape and Reel,
Device Tape/Reel Monitoring Temperature Package 1.95V MicroPower
Option Range Voltage Supervisor,
Options
push-pull, -40°C to +85°C,
SOT-23B-3 package.
Device: MCP102: MicroPower Voltage Supervisor, push-pull b) MCP102-300E/TO: 3.00V MicroPower
MCP102T: MicroPower Voltage Supervisor, push-pull Voltage Supervisor,
(Tape and Reel) push-pull,
MCP103: MicroPower Voltage Supervisor, push-pull -40°C to +125°C,
MCP103T: MicroPower Voltage Supervisor, push-pull TO-92-3 package.
(Tape and Reel)
a) MCP103T-270E/TT: Tape and Reel,
MCP121 MicroPower Voltage Supervisor, open-drain
2.70V MicroPower
MCP121T: MicroPower Voltage Supervisor, open-drain
Voltage Supervisor,
(Tape and Reel)
push-pull,
MCP131 MicroPower Voltage Supervisor, open-drain
-40°C to +125°C,
MCP131T: MicroPower Voltage Supervisor, open-drain
SOT-23B-3 package.
(Tape and Reel)
b) MCP103T-475E/LB: Tape and Reel,
4.75V MicroPower
Monitoring Options: 195 = 1.90V Voltage Supervisor,
240 = 2.32V push-pull,
270 = 2.63V -40°C to +125°C,
300 = 2.93V SC-70-3 package.
315 = 3.08V
a) MCP121T-315I/LB: Tape and Reel,
450 = 4.38V
3.15V MicroPower
475 = 4.63V
Voltage Supervisor,
open-drain,
-40°C to +125°C,
Temperature Range: I = -40°C to +85°C (MCP11X-195 only)
SC-70-3 package.
E = -40°C to +125°C (Except MCP11X-195 only)
b) MCP121-300E/TO: 3.00V MicroPower
Voltage Supervisor,
Package: TT = SOT-23B, 3-lead open-drain,
LB = SC-70, 3-lead -40°C to +125°C,
TO = TO-92, 3-lead TO-92-3 package.

a) MCP131T-195I/TT: Tape and Reel,

1.95V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +85°C,
SOT-23B-3 package.
b) MCP131-300E/TO: 3.00V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +125°C,
TO-92-3 package.

© 2005 Microchip Technology Inc. DS21906B-page 25

MCP102/103/121/131
NOTES:

DS21906B-page 26 © 2005 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,
MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,
PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,
rfPICDEM, Select Mode, Smart Serial, SmartTel, Total
Endurance and WiperLock are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

© 2005 Microchip Technology Inc. DS21906B-page 27

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DS21906B-page 28 © 2005 Microchip Technology Inc.