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METAL OXIDE SEMI-CONDUCTOR

FILED EFFECT TRANSISTOR


LECTURE #03

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FINITE OUTPUT RESISTANCE IN SATURATION
• Equation (9) indicate that in saturation,𝑖𝐷 is independent
of 𝑣𝐷𝑆 .
• Thus a change Δ𝑣𝐷𝑆 in the drain-to-source voltage causes
a zero change in 𝑖𝐷 , which implies that the incremental
resistance looking into the drain o f a saturated MOSFET
is infinite.
• This, however, is an idealization based on the premise
that once the channel is pinched off at the drain end,
further increases 𝑣𝐷𝑆 in have no effect on the channel's
shape.
• But, in practice, increasing 𝑣𝐷𝑆 beyond 𝑣𝐷𝑆𝑠𝑎𝑡 does affect FIGURE 4.1 S Increasing 𝑣𝐷𝑆 beyond 𝑣𝐷𝑆𝑠𝑎𝑡
the channel somewhat. causes the channel pinch-off point to move
slightly away from the drain, thus reducing
• Specifically, as 𝑣𝐷𝑆 is increased, the channel pinch-off the effective channel length (by ΔL ).
point is moved slightly away from the drain, toward the
source.

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FINITE OUTPUT RESISTANCE IN SATURATION
• From Fig. 4.15, the voltage across the channel remains constant
at 𝑣𝐺𝑆 - 𝑉𝑡 = 𝑣𝐷𝑆𝑠𝑎𝑡 , and the additional voltage applied to the
drain appears as a voltage drop across the narrow depletion
region between the end of the channel and the drain region.
• This voltage accelerates the electrons that reach the drain end of
the channel and sweeps them across the depletion region into
the drain.
• With depletion layer widening the channel length is in effect
reduced, from L to L-ΔL. a phenomenon known as channel- FIGURE 4.1 S Increasing 𝑣𝐷𝑆 beyond
length modulation. 𝑣𝐷𝑆𝑠𝑎𝑡 causes the channel pinch-off
point to move slightly away from the
• Now, since 𝑖𝐷 is inversely proportional to the channel length (Eq. drain, thus reducing the effective
9), 𝑖𝐷 increases with 𝑣𝐷𝑆 with the result that the new 𝑖𝐷 is channel length (by ΔL ).

…….(11)

λ is a process-technology parameter with the dimensions of 𝑉 −1

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FINITE OUTPUT RESISTANCE IN SATURATION
• From Fig. 4.16 we observe that when the straight-line
𝑖𝐷 -𝑣𝐷𝑆 characteristics are extrapolated they intercept
the 𝑣𝐷𝑆 axis at the point 𝑣𝐷𝑆 = -𝑉𝐴 , where 𝑉𝐴 is a
positive voltage.
• At 𝑣𝐷𝑆 = −1Τλ . It follows that

• and thus 𝑉𝐴 is a process-technology parameter with


the dimensions of V. For a given process, 𝑉𝐴 is
proportional to the channel length L that the
designer selects for a MOSFET and output resistance
is given by : FIGURE 4 . 1 6:Effect of 𝑣𝐷𝑆 on 𝑖𝐷 in the saturation region. The
MOSFET parameter 𝑉𝐴 depends on the process technology and,
for a given process, is proportional to the channel length L.

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THE P-CHANNEL MOSFET
• A p-channel enhancement-type MOSFET (PMOS
transistor), fabricated on an n-type substrate with
p+ regions for the drain and source, has holes as
charge carriers.
• The device operates in the same manner as the n-
channel device except that 𝑣𝐺𝑆 and 𝑣𝐷𝑆 are
negative and the threshold voltage 𝑉𝑡 is negative.
• Also, the current 𝑖𝐷 enters the source terminal and
leaves through the drain terminal.
• NMOS is smaller , faster and requires lower supply
voltages than PMOS ,hence NMOS has replaced
PMOS .
• However PMOS devices are still available for
discrete-circuit design.
• Both PMOS and NMOS transistors are utilized in
complementary MOS or CMOS circuits, which is (a) Physical structure of the PMOS transistor
currently the dominant MOS technology. (b) Biased PMOS transistor

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CIRCUIT SYMBOL (ENHANCEMENT TYPE P-MOSFET)
• The circuit symbol for the p-channel
enhancement-type MOSFET is shown in Fig.
4.18(a).
• Figure 4.18(b) shows a modified circuit symbol in
which an arrowhead pointing in the normal
direction of current flow is included on the source
terminal.
• For the case where the source is connected to the
substrate, the simplified symbol of Fig. 4.18(c) is
usually used.

Fig 4.18(a)Circuit symbol for the p-channel enhancement-type


MOSFET. (b) Modified symbol with an arrowhead on the
source lead. (c) Simplified circuit symbol for the case where the
source is connected to the body.

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CHARACTERISTICS OF THE P-CHANNEL MOSFET
• The voltage and current polarities for normal operation are
indicated in Fig. 4.18(d).
• for the p-channel device the threshold voltage 𝑉𝑡 is negative.
To induce a channel we apply a gate voltage that is more
negative than 𝑉𝑡
• To induce a channel we apply a gate voltage that is more
negative than 𝑉𝑡
𝑣𝐺𝑆 ≤ 𝑉𝑡 (induced channel) ………..(12)
Fig 4.18(d) :The MOSFET with voltages applied
and the directions of current flow indicated.

• And apply a drain voltage that is more negative than the


source voltage (i.e., 𝑣𝐷𝑆 is negative or, equivalently, 𝑣𝑆𝐷 is
positive). To operate in the triode region 𝑣𝐷𝑆 must satisfy

……….(13)

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CHARACTERISTICS OF THE P-CHANNEL MOSFET
• The current 𝑖𝐷 flows out of the drain terminal.
• The current 𝑖𝐷 is given by the same equation as for NMOS, Eq. (3), except for replacing
𝑘 , 𝑛 with 𝑘 , 𝑝

……………(14)

where 𝑣𝐺𝑆 , 𝑉𝑡 and 𝑣𝐷𝑆 are negative and the trans conductance parameter 𝑘 , 𝑝 is given
by

where µ𝑝 is the mobility of holes in the induced p channel. Typically, µ𝑝 = 0.25 to 0 . 5 µ𝑛


and is process-technology dependent.

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CHARACTERISTICS OF THE P-CHANNEL MOSFET
• To operate in saturation, 𝑣𝐷𝑆 must satisfy the relationship

…………(15)

• The current 𝑖𝐷 is given by

……………….(16)

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COMPLEMENTARY MOS OR CMOS
• Complementary MOS technology employs MOS
transistors of both polarities.
• Although CMOS circuits are somewhat more
difficult to fabricate than NMOS, the availability
of complementary devices makes possible many
powerful circuit-design possibilities.
• CMOS is the most widely used of all the IC
technologies in both digital and analog circuits .
• In Figure 4.9 observe that while the NMOS
transistor is implemented directly in the p-type
substrate, the PMOS transistor is fabricated in a
FIGURE 4 .9 Cross-section of a CMOS integrated circuit. Note that the
specially created n region, known as an n well. PMOS transistor is formed in a separate n-type region, known as an n
well. Another arrangement is also possible in which an n-type body is
• The two devices are isolated from each other by used and the n device is formed in a p well. Not shown are the
a thick region of oxide that functions as an connections made to the p-type body and to the n well; the latter
functions as the body terminal for the p-channel device.
insulator.

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EXAMPLE 4.2
Design the circuit of Fig. 4.20 so that the transistor operates at 𝐼𝐷 =
0.4 mA and 𝑉𝐷 = +0.5 V. The NMOS transistor has 𝑉𝑡 = 0.7 V, μ𝑛 𝐶𝑜𝑥 =
100 μ𝐴ൗ𝑉 2 , L = 1 μm, and W = 32μm. Neglect the channel-length
modulation effect (i.e., assume that λ = 0).

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EXAMPLE 4.3
Design the circuit in Fig. 4.21 to obtain a current 𝐼𝐷 of 80μA. Find
the value required for R, and find the dc voltage 𝑉𝐷 . Let the
NMOS transistor have 𝑉𝑡 = 0.6 V, μ𝑛 𝐶𝑜𝑥 = 200 μAI𝑉 2 .L= 0.8 μm ,
and W = 4 μm. Neglect the channel-length modulation effect
(i.e., assume λ = 0).

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