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Notes on synchronous vs asynchronous counter?

Asked in Colleges at 12:36 AM on December 14, 2008

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*Asynchronous counter :-

The simplest counter circuit is a single D-type flip-flop, with its D (data) input fed from its own inverted output. This circuit can store one bit, and
hence can count from zero to one before it overflows (starts over from 0). This counter will increment once for every clock cycle and takes two
clock cycles to overflow, so every cycle it will alternate between a transition from 0 to 1 and a transition from 1 to 0. Notice that this creates a new
clock with a 50% duty cycle at exactly half the frequency of the input clock. If this output is then used as the clock signal for a similarly arranged D
flip-flop (remembering to invert the output to the input), you will get another 1 bit counter that counts half as fast. Putting them together yields a two
bit counter:

*Synchronous counter:-

Where a stable count value is important across several bits, which is the case in most counter systems, synchronous counters are used. These
also use flip-flops, either the D-type or the more complex J-K type, but here, each stage is clocked simultaneously by a common clock signal.
Logic gates between each stage of the circuit control data flow from stage to stage so that the desired count behavior is realized. Synchronous
counters can be designed to count up or down, or both according to a direction input, and may be presetable via a set of parallel "jam" inputs.
Most types of hardware-based counter are of this type. A simple way of implementing the logic for each bit of an ascending counter (which is
what is shown in the image to the right) is for each bit to toggle when all of the less significant bits are at a logic high state. For example, bit 1
toggles when bit 0 is logic high; bit 2 toggles when both bit 1 and bit 0 are logic high; bit 3 toggles when bit 2, bit 1 and bit 0 are all high; and so
on.

Synchronous counters can also be implemented with hardware finite state machines, which are more complex but allow for smoother, more
stable transitions.

Answered by Ashutosh , an ibibo Advisor, at 5:48 AM on December 14, 2008

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