Draft copy for adoption:

LABORATORY MANUAL

ELECTRONIC CIRCUITS
B.Tech II nd yr ECE

Prepared at Aurora Engg College

With
Participation &
Valuable contributions for use of

Aurora Engg college,

Santh Samrth Engg college,
Karshak Engg college,
Church Institute of technology.
Ramappa Engg college.

Design and review by.

Satish Kauashik, AEC

Prof K.Appa Rao. CIT.
 ELECTRONIC CIRCUITS LAB
EXP . NO. 1. TWO STAGE RC-COUPLED AMPLIFIER

1. AIM:

To Design and study the response of a two stage RC-coupled amplifier and calculation of
gain and band width.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS
1. CRO (Dual channel)DC-20 MHz 1 No
2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 ½ Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii.COMPONENTS:

1. 62kΩ Resistor – 2 No.

2. 4.7kΩ Resistor – 3 No.
3. 1.5Ω Resistor – 2 No
4. 33kΩ Resistor – 2 No
5. 1kΩ Resistor – 2 No
6. 10 μ F/ 16 V Electrolytic Capacitor – 3 No.
7. 0.1 μF/16 V Electrolytic Capacitor – 2 No
8. Transistors – BC107 – 2 No.

• All resistors are carbon / metal film ¼ W 5% unless otherwise specified.

3. THEORY:

As the gain provided by a single stage amplifier is usually not sufficient to drive
the load, so to achieve extra gain multi-stage amplifier are used. In multi-stage amplifiers
output of one-stage is coupled to the input of the next stage. The coupling of one stage to
another is done with the help of some coupling devices. If it is coupled by RC then the
amplifier is called RC-coupled amplifier.
Frequency response of an amplifier is defined as the variation of gain with
respective frequency. The gain of the amplifier increases as the frequency increases from
zero till it becomes maximum at lower cut-off frequency and remains constant till higher
cut-off frequency and then it falls again as the frequency increases.
At low frequencies the reactance of coupling capacitor CC is quite high and hence
very small part of signal will pass through from one stage to the next stage.
At high frequencies the reactance of inter electrode capacitance is very small and
behaves as a short circuit. This increases the loading effect on next stage and service to
reduce the voltage gain due to these reasons the voltage gain drops at high frequencies.
At mid frequencies the effect of coupling capacitors is negligible and acts like
short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit
becomes resistive at mid frequencies and the voltage gain remains constant during this
range.

4. CIRCUIT DIAGRAM:

Vcc 12.0
62 .0k

33 .0k

33 .0k
62 .0k
100.0n
10.0u
6.63v 6.63v
100.0n 1.0k
4.7k
T1 !NPN T2 !NPN
842mv 842mv Vout+
245mv 245mv
V

1.0 k
4.7 k
Vin

1.5 k

1.5 k

10 .0u
10 .0u

4.7 k
ALTERNATE CIRCUIT :

Vcc 12.0

47 .0k

2.2 k

47 .0k

2.2 k
10.0u 10.0k 10.0u
8.94v 8.94v

10 .0u
10.0k 10.0u
T1 !NPN T2 !NPN
2.05v 2.05v Vout+
1.4v 1.4v
V

10 .0k

2.2 k
10 .0k
Vin

1.0 k

1.0 k
10 0.0 u

10 0.0 u
10 .0k
5. PROCEDURE:

i.. Connect the circuit on bread board as shown in the circuit diagram.

ii. Measure base ,emitter and collector D.C voltages of both stages and compare
against estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vb2, Vc2, Ve2

iii. By keeping the amplitude of the input signal constant, vary the frequency from zero
to 1 MHz.

iv. Note down the amplitude of the output signal for corresponding values of input
frequencies.

v. Calculate the voltage gain in decibels.

vi. Plot in semi-log graph between gain vs frequency and calculate the band width.
6. OBSERVATIONS:

S.NO FREQUENCY VOUT GAIN= VOUT /VIN GAIN in dB

7. CALCULATIONS:

i. Determine lower cut-off frequency and upper cut-off frequency from the graph.

ii. Calculate Band width.

8. GRAPH:
9. RESULT:

i. Lower cut-off frequency =

ii. Upper cut-off frequency =

iii. Band width =

10. INFERENCES:

This circuit is useful for amplification by providing higher gain in the range __________

11. PRECAUTIONS:

i. Test Transistors before assembling the circuits

ii. Mark polarities of electrolytic capacitors and connect.

iii. Apply voltage from the power supply and proceed further only after obtaining expected DC
voltages at base emitter collector of the transistors.
iv. If above are correct you can apply signal from function generator and monitor the output on
CRO and adjust signal amplitude such that output seen in CRO is free from rounding and clipping
of the signals.

v. If you face any problem with signal on CRO due to wrong settings of the controls check up
connections to CRO

vi Resistors should be connected properly with out interchanging the values.

vii .Check the continuity of the connecting wires.

12. APPLICATIONS:

1. Audio amplifiers

2. Radio Transmitters and Receivers.

13. EXTENSIONS:

In general multi-stage amplifiers are used to provide high overall gain for the applied
input signal. In this experiment, we verified this with two stages coupled with resistors
and capacitors. We can extend the circuit diagram with one or more stages cascading
with the given two stages RC coupled amplifier. We can extend low frequency range by
increasing coupling and bypass capacitors. By employing negative feedback, we can
ensure constant gain against device parameters.

This experiment is carried on with two stages of amplifiers operating with low current.
RC coupling can be made between amplifiers with any type of biasing methods instead of
voltage divider bias as shown. An alternate circuit is shown to enlarge this scope of study
of RC amplifier (1) study effect of individual LF cutoff on the overall cutoff.

(2) Measure input impedance of amplifier

(3) Study effect on overall LF cutoff due to individual RC couplings at the input and
emitter by capacitors.

(4) Apply small square wave and measure rise times on individual stages and verify
formula on rise times.

(5) Since high frequency cutoff is determined by output capacitance of transistors 1:1
probes used on CRO can lower HF cutoff. In order to avoid this effect intentionally a
large capacitors of 0.1 microfarad or the like is connected such that high frequency
cutoff falls well below 1 megahertz.
14. TROUBLE SHOOTING:

S.NO FAULT DIAGNOSIS

1. If there is no output Check Vcc and all DC voltages.

Check function generator.
Check CRO connections.
2. If the output is distorted Check Vcc and all DC voltages
Check amplitude of input signal.
3. If DC voltages differ very much Check entire circuit for connections,
resistance values and placements
Check Transistors.

15. Special tip to measure Bandwidth without graph. graph.

Note amplitude at mid band and vary frequency towards low frequency till
amplitude falls by 30% .Let this be f1. Repeat this step towards high frequency end
until amplitude falls by 30%.Let this be f2. Band width is f2-f1.

15. QUESTIONS:

i. What are the advantages and disadvantages of multi-stage amplifiers?

ii. Why gain falls at HF and LF?

iii. Why the gain remains constant at MF?

iv. Explain the function of emitter bypass capacitor, Ce?

v. How the band width will effect as more number of stages are cascaded?

vi. Define frequency response?

vii. Give the formula for effective lower cut-off frequency, when N-number of stages
are cascaded.

viii. Explain the effect of coupling capacitors and inter-electrode capacitances on

overall gain.

ix. By how many times effective upper cut-off frequency will be reduced, if three
identical stages are cascaded?

x. Mention the applications of two-stage RC-coupled amplifiers.

 EXP.NO.2 SERIES VOLTAGE REGULATOR

1. AIM:

To design a transistorized series voltage regulator and study the regulation action for

i. Different values of input voltages

ii Different values of load resistors and also to find percentage regulation.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 ½ Digit LCD hand held 1No

ii. COMPONENTS:

1. 1kΩ Resistor – 1 No.

2. 560Ω Resistor – 1 No.
3. 1k , 2k , 4.7k, 10k (load resistors ) – 1 No each.
4. Zener diode – 1 No.
5. Transistor – SL100 – 1 No.

• All resistors are carbon / metal film ¼ W 5% unless otherwise specified.

3. THEORY:

Voltage regulator is a device designed to maintain the output voltage as nearly constant
as possible. It monitors the output voltage and generates feed back that automatically
increases are decreases the supply voltage to compensate for any changes in output
voltage that might occur because of change in load are changes in load voltages.
In transistorized series voltage regulator the control element is a transistor which
is in series with load. must be operated in reverse break down region, where it provides
constant voltage irrespective of changes in applied voltages.The output voltage of the
series voltage regulator is Vo = Vz – Vbe.
 Since, Vz is constant, any change in Vo must cause a change in Vbe in order to
maintain the above equation. So, when Vo decreases Vbe increases, which causes
the transistor to conduct more and to produce more load current, this increase in
load causes an increase in Vo and makes Vo as constant. Similarly, the regulation
action happens when Vo increases also.

4. CIRCUIT DIAGRAM:

560.0 T1 !NPN
1.0k

Vout

Z1 BZD27 -C5 V1
+
V

1.0k
10 30v
Vin 1.0

5. PROCEDURE:

i. Connect the circuit as shown in the circuit diagram.

ii. Apply the input voltage from power supply.

iii. Measure base ,emitter and collector D.C voltages and compare against estimated
values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vz

iv. For a specific value of load resistor, vary the input voltage from 10 to a maximum
of 20 volts and not the values of output voltage.

v. Change the load resistor and repeat steps 2 and 3.

vi. Remove the load resistor and note down the voltage at no load.
vii. Find percentage regulation.
V NL −V FL
Percentage regulation = x100
V FL
viii. Plot the graph for load regulation and line regulation.

6. OBSERVATIONS:

S.no Vin Output voltage

RL= RL= RL=

7. CALCULATIONS:

V NL −V FL
Percentage load regulation = x100 =
V FL

Percentage Line Regulation = (change in output ) / (change in input) X 100

8. GRAPH:

9. RESULT:

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

10. INFERENCES:

This Series Regulator is useful for the input voltage range ______________
11. PRECAUTIONS:

i. Test Transistors, zener diode before assembling in the circuits.

ii. Apply voltage from 15 V and ensure the DC voltages as shown the circuit are
obtained. Check circuit connections and components if expected voltages are not
obtained.

iii. Check resistor values properly otherwise power supply may be over loaded due to
small values.

iv. If Zener is reversed no damage will occur but output voltage will fall down to 0 V.

v. Don't short the output as this would result in large current through the series
transistor which will lead to burning of the same due to overheat.

12. APPLICATIONS:

1. Low current applications.

2. Fixed voltage applications

3. Extention of zener regulator for higher currents.

13. EXTENSIONS:

The main function of voltage regulator is to regulate the changes in output voltage
for the changes occur either in input voltage variations or output load variations. In this
experiment we have verified for one particular value of output voltage. We can obtain
voltage regulation at higher voltages with the help of more number of Zener diode
operating in break down region, must be connected in series. For example, to obtain
voltage regulation at 8.2 volts, we can use the same circuit with two Zener diodes of
values 3.1 volts and 5.1 volts respectively.
By employing a series regulator with error amplifier , variable regulated voltage can be
obtained from circuit given below.
The experiment is conducted is of simplest type to demonstrate use of zener and series
pass transistor without any unregulated voltage power supply. In real application
regulated power supply used at the input of this experiment will be replaced by a full
wave or bridge rectifier with capacitor input filter suitable to the load and ripple voltages
expected. The series transistor would be a power transistor with high current capacity and
would be mounted to heat sink. Ripple can be simulated by change in input and the
corresponding change in output at a constant load current.
One can obtain different fixed voltages by suitably changing the zener diode. One can
obtain higher current ratings by employing suitable series power transistor and heat sinks.

14. TROUBLE SHOOTING:

S.NO FAULT DIAGNOSIS

1. If there is no output Check Vi and all DC voltages.

Check CRO connections.

.
2. If DC voltages differ very much Check entire circuit for connections,
resistance values and placements
Check Transistors.

15. QUESTIONS:

i. Define voltage regulator.

ii. Give the advantages of series voltage regulator. .

iii.. Explain the feed back mechanism in series voltage regulator.

iv. In series voltage regulator which is control element and explain its function.

v. Define load and line regulation. What is ideal value ?.

vi. Which element determines output ripple ?

vii. What determines maximum load current allowed in this circuit ?

viii. Mention the applications of series voltage regulator.

ix. Define no load voltage and full load voltage.

x. Explain the term percentage regulation.

 EXP .NO. 3 SHUNT VOLTAGE REGULATOR

1. AIM:

To design a transistorized shunt voltage regulator and observing the regulation action for

i. Different values of input voltages

ii Different values of load resistors and also to find percentage regulation.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 ½ Digit LCD hand held 1No

ii.COMPONENTS:

1. 1kΩ Resistor – 1 No.

2. 560Ω Resistor – 1 No.
3. 1k , 2k , 4.7k, 10k (load resistors ) – 1 No each.
4. Zener diode – IN 4007 - 1No.
5. Transistor – SL100 – 2No.

• All resistors are carbon / metal film ¼ W 5% unless otherwise specified.

3. THEORY:

A voltage regulator is a device or a combination of devices, design to maintain the output

voltage of a power supply as nearly constant as possible even if there are changes in load
or in input voltage. In shunt voltage regulator transistor Q1 acts as control element, which
is in shunt with load voltage.
The output voltage is given as

Vo = Vz + VR1 = Vz + Vbe1 + Vbe2

The regulation action of the circuit is explained below :

Since Vz is constant, any changes in output voltage reflects a propositional
change in R1. If the output voltage decreases, voltage across R1 decreases which in turn
decreases the base voltage of Q2. As a result the base current of Q1 decreases which
allows the load voltage to rise and makes it constant the same regulation action follows
even if the output voltage increases.

4. CIRCUIT DIAGRAM:

R S
+
+
5 6 0 E
+

D 1 V z

U n r e g u l a t e d P o w e r -
Q 1
S u p p l y R L V o
S L 1 0 0+
Q 2 V b e 2
- R 1
S L 1 0 0+ 1 k
V b e 1
-

- -

ALTERNATE CIRCUIT :

180.0
1N3 78 5
Vdc 2 0.0

Vz = 6.3v R L = 1k,2k ,
1.0 k

T1 !NPN
4.7k ,10k
1.0 k
5. PROCEDURE:

i. Connect the circuit as shown in the circuit diagram.

ii. Apply the input voltage from power supply.

iii. Measure base ,emitter and collector D.C voltages and compare against
estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vb2 ,Vc2, Ve2
Vz

iv. For a specific value of load resistor, vary the input voltage from zero to a
maximum of 20 volts and note the values of output voltage.

iv. Change the load resistor and repeat steps 2 and 3.

v. Remove the load resistor and note down the voltage at no load.

vi. Find percentage regulation.

V NL −V FL
Percentage regulation = x100
V FL
vii. Plot the graph for load regulation and line regulation.
6. OBSERVATIONS:

VOLTAGE AT NO-LOAD =

S.no Vin Output voltage

RL= RL= RL=

7. CALCULATIONS:

V NL −V FL
Percentage regulation = x100
V FL

8. GRAPH:
9. RESULT:

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

10. INFERENCES:

This Shunt Regulator is useful for the input voltage range ______________

11. PRECAUTIONS:

i. Proceed on the experiment only after obtaining expected DC voltages do not apply
more than 20 V without connecting load on the output as this would result in
maximum current in shunt transistors.

ii. Shorting the output will result in overheating series resistors which may burn at high
voltage.

iii. Reversing the zener may not damage the circuit but result in output voltage to drop
2 V or less.

12. APPLICATIONS:

1. Low current applications.

2. Fixed voltage applications

13. EXTENSIONS:

The main function of voltage regulator is to regulate the changes in output voltage for the
changes occur either in input voltage variations or output load variations. In this
experiment we have verified for one particular value of output voltage. We can obtain
voltage regulation at higher voltages with the help of more number of Zener diode
operating in break down region, must be connected in series. For example, to obtain
voltage regulation at 8.2 volts, we can use the same circuit with two Zener diodes of
values 3.1 volts and 5.1 volts respectively.
The experiment is conducted is of simplest type to demonstrate use of zener and series pass
transistor without any unregulated voltage power supply. In real application regulated power
supply used at the input of this experiment will be replaced by a full wave or bridge rectifier with
capacitor input filter suitable to the load and repule voltages expected. The series transistor would
be a power transistor with high current capacity and would be mounted to heat sink.Ripple can be
simulated by change in input and the corresponding change in output at a constant load current.

One can obtain different fixed voltages by suitably changing the zener diode. One can obtain
higher current ratings by employing suitable series power transistor and heat sinks.

14. TROUBLE SHOOTING:

S.NO FAULT DIAGNOSIS

1. If there is no output Check Vi and all DC voltages.

Check CRO connections.

.
2. If DC voltages differ very much Check entire circuit for connections,
resistance values and placements
Check Transistors.

15. QUESTIONS:

i. Mention the differences between shunt and series voltage regulators.

ii. What is the function of Q1 and Q2 in the shunt regulator .circuit ?

iii. Define the line regulation. And load regulation.

iv. What is current through zener in this circuit ?

v.. When is dissipation maximum in this circuit ?

vi. In the circuit of shunt voltage regulator which element is considered control
element and explain its function.

vii. Can you do the experiment without Q2 ?.

viii. How can you increase current range of regulator ?

ix. . If output is 1.4 v for input of 20v what was the wrongly connected ?

x. Mention the applications of shunt voltage regulator.

 EXP. NO. 4 SERIES FED CLASS-A POWER AMPLIFIER

1. AIM:

To design a series fed class-A power amplifier in order to achieve max out put ac power
and efficiency.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 ½ Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii. COMPONENTS:

1. 20kΩ Resistor – 1 No.

2. 1kΩ Resistor – 2 No.
3. 0.1 μF/16 V Electrolytic Capacitor – 2 No.
4. Transistor – SL100 – 1No.

• All resistors are carbon / metal film ¼ W 5% unless otherwise specified.

3. THEORY:

The above circuit is called as “series fed” because the load RL is connected in series with
transistor output. It is also called as direct coupled amplifier.
ICQ = Zero signal collector current
VCEQ = Zero signal collector to emitter voltage
Power amplifiers are mainly used to deliver more power to the load. To deliver more
power it requires large input signals, so generally power amplifiers are preceded by a
series of voltage amplifiers.
In class-A power amplifiers, Q-point is located in the middle of DC-load line. So output
current flows for complete cycle of input signal. Under zero signal condition, maximum
power dissipation occurs across the transistor. As the input signal amplitude increases
power dissipation reduces.
The maximum theoretical efficiency is 25%.
4.CIRCUIT DIAGRAM:

Vcc 5.0

20 .0k

1.0 k
2.83v 100.0n
100.0n +
iL
T1 !NPN A +
666mv V
Vin

1.0 k
Vout

5. PROCEDURE:

i. Make the connections as per the circuit diagram.

ii. Measure base ,emitter and collector D.C voltages of both stages and compare
against estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
i.
iii. Apply the input at input terminals of the circuit from the function generator.

iv. Keep the input signal at constant frequency under mid frequency region and
adjust the amplitude such that output voltage undistorted.

v. Calculate the power efficiency and compare it with theoretical efficiency.

6. OBSERVATIONS:

Efficiency is defined as the ratio of AC output power to DC input power

DC input power = Vcc x ICQ

AC output power = VP-P2 / 8RL

7. CALCULATIONS:

Under zero signal condition:

Vcc = IBRB + VBE

IBQ =( Vcc - VBE ) / RB

ICQ = β x IBQ

VCE = Vcc - ICRC

8. GRAPH:
9. RESULT:

The maximum input signal amplitude which produces undistorted output signal is
_________

The practical efficiency of the circuit is ________

10. INFERENCES:

The efficiency observed is ___________ against theoretical maximum of 25%,

since ___________________

11. PRECUATIONS:

i. It is a necessary to find a suitable RB required for biasing the amplifier collector at the
centre of voltage VCC/2 i.e. 6 V. this shall be done by trial and error or using a
decade resistance box.

ii. While observing on CRO at collector of the transistor you can verify whether you are
getting undistorted peak to peak signal of at least 10 to 11 V

iii. Since AC and DC load lines are different peak to peak signal without connecting
capacitor and load on the collector of transistor will be different than the reading with
above connected.

12. APPLICATIONS:

This is used for low power linear applications in audio and wideband RF range,
where high efficiency is not required.

13. EXTENSIONS:

In series fed class-A power amplifier we have calculated the efficiency i.e. how
efficiently DC-power is converted into AC-power depending on the magnitude of input
signal
Once we design a power amplifier for a particular efficiency, the circuit will not give that
efficiency to all its input signals of different amplitudes. Hence, depending on the input
signal we have to choose Vcc to obtain a particular efficiency.
.
By employing Transformer coupling, efficiency can be improved to 50%.
The experiment is conducted using low power transistors like BC107, SL100 only to get familiarity
in biasing and measurement. Actual power amplifiers operate at 1 watt to 100 watts. This will call
for operating transistors high current and small value resistors of greater than 1/4 to 1 watt which
are used in the laboratory. Actual power amplifiers use heat sinks on the transistors.

14. TROUBLE SHOOTING:

S.NO FAULT DIAGNOSIS

1. If there is no output Check Vcc and all DC voltages.

Check function generator.
Check CRO connections.
2. If the output is distorted Check Vcc and all DC voltages
Check amplitude of input signal.
3. If DC voltages differ very much Check entire circuit for connections,
resistance values and placements
Check Transistors.

15. QUESTIONS:

i. Differentiate between voltage amplifier and power amplifier

ii. Why power amplifiers are considered as large signal amplifier?

iii. When does maximum power dissipation happen in this circuit ?.

iv. What is the maximum theoretical efficiency?

v. Sketch wave form of output current with respective input signal.

vi. What are the different types of class-A power amplifiers available?

vii. What is the theoretical efficiency of the transformer coupled class-A power
amplifier?

viii. What is difference in AC, DC load line?.

ix. How do you locate the Q-point ?

x. What are the applications of class-A power amplifier?

 EXP. NO. 5 TRANSFORMER COUPLED CLASS-A POWER AMPLIFIER

1.AIM:

To design a transformer coupled class-A power amplifier in order to achieve

maximum out put AC power and efficiency.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 ½ Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii. COMPONENTS :

1. 1kΩ Resistor – 1No.

2. 10kΩ Resistor – 1No.
3. 100KΩ Resistor – 1No.
4. 0.1 μF/16 V Electrolytic Capacitor – 1 No.
5. Impedance matching Transformer – 1 No.
6. Transistor – SL100 – 1No.

• All resistors are carbon / metal film ¼ W 5% unless otherwise specified.

3. THEORY:

In direct coupled class-A power amplifier, power is wasted in load resistance which
leads to decrease in efficiency. To achieve maximum efficiency we can use
transformer to couple the load. Since transformer is used for impudence matching
which facilitates the coupling between lower resistance and source impudence? Due
to AC coupling no DC power is wasted in the load resistor. The load DC resistance of
transformer primary allows any desired level of collector current, while transferring
only variations to RL. By this way the efficiency is increased. The maximum
theoretical efficiency of transformer coupled power amplifier is 50%.
 Efficiency is defined as the ratio of AC output power to DC input power
DC input power = Vcc x ICQ
AC output power = VP-P2 / 8RL

4. CIRCUIT DIAGRAM:

+
A Ic
Vcc 12.0 Vout
T/ F +

1.0 k
10 0.0 k
V
11.49v
100.0n
T1 !NPN
626m v
10 .0k

Vin

5. PROCEDURE:

i. Make the connections as per the circuit diagram.

ii. Measure base, emitter and collector D.C voltages and compare against
estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1

iii. Apply the input at input terminals of the circuit from the function
generator.
 iv. Keep the input signal at constant frequency under mid frequency region
and adjust the amplitude such that output voltage undistorted.

v. Calculate the power efficiency and compare it with theoretical efficiency.

6. OBSERVATIONS:

Efficiency is defined as the ratio of AC output power to DC input power

DC input power = Vcc x ICQ

AC output power = VP-P2 / 8RL

7. CALCULATIONS:

Input DC power = Vcc x ICQ

Output AC power = Vrms x Irms

= VPP2 / 8RL

OutputACpo wer
η = InputDCpow er

8. GRAPH:
9. RESULT:

a) The maximum input signal amplitude which produces undistorted output

signal is _________
b) The practical efficiency of the circuit is ________

10. INFERENCES:

The efficiency observed is ___________ against theoretical maximum of 50%,

since ___________________

11. PRECUATIONS:

i. Check the circuit connections before switching on the power supply.

ii. Check the continuity of the connecting wires.
iii. Power handling capacity of resistor should be kept in mind
iv. Control wires must be checked before use
v. Maximum forward current should not exceed value given in data sheet
vi. Resistors should be connected properly with out interchanging the values.
 12. APPLICATIONS:

This circuit is used for Impedance matching and DC isolation.

13. EXTENSIONS:

In Transformer coupled class-A power amplifier we have calculated the efficiency

i.e. how efficiently DC-power is converted into AC-power depending on the magnitude
of input signal.

Once we design a power amplifier for a particular efficiency, the circuit will not give that
efficiency to all its input signals of different amplitudes. Hence, depending on the input
signal we have to choose Vcc to obtain a particular efficiency.

By employing Transformer coupling, efficiency can be improved to 50%.

The experiment is conducted using low power transistors like BC107, SL100 only to get
famimiliarity in biasing and measurement. Actual power amplifiers operate at 1 watt to
100 watts. This will call for operating transistors high current and small value resistors of
greater than 1/4 to 1 watt which are used in the laboratory. Actual power amplifiers use
heat sinks on the transsistors.

This concept can be applied for RF and Impedance matching.

14. TROUBLE SHOOTING:

S.NO FAULT DIAGNOSIS

1. If there is no output Check Vcc and all DC voltages.

Check function generator.
Check CRO connections.
Check transformer.

2. If the output is distorted Check Vcc and all DC voltages

Check amplitude of input signal.
3. If DC voltages differ very much Check entire circuit for connections,
resistance values and placements.
Check transistors.
 15. QUESTIONS:

i. Differentiate between voltage amplifier and power amplifier

ii. Explain impedance matching provided by transformer?

iii . How do you determine ratings for transistor in this circuit ?.

iv. What is the maximum theoretical efficiency of this amplifier ?

v. What is the range of conduction angle of output current with respective input
signal?

vi.. Sketch DC load line and AC load line for this amplifier.

vii. What is collector voltage of transistor with no and maximum signal?

viii. How is DC and AC power measured in this circuit?

ix. For class-A operation how did you locate the Q-point.

x. What are the applications of class-A power amplifier?

 EXP. NO. 6 COMPLEMENTARY-SYMMETRY CLASS-B POWER
AMPLIFIER

1. AIM:

To design a complementary-symmetry class-B push-pull power amplifier in

order to achieve maximum out put AC power and efficiency.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 ½ Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii.COMPONENTS:

1. 8Ω ¼ W 5% CF Resistor – 1 No.
2. 1 μ F /16 V Electrolytic Capacitor – 1 No.
3. Transistors - SL100 – 1 No.
4. Transistor – SK 100 – 1 No.

3. THEORY:

Power amplifiers are designed using different circuit configuration with the sole
purpose of delivering maximum undistorted output power to load. Push-pull
amplifiers operating either in class-B are class-AB are used in high power audio
system with high efficiency.
In complementary-symmetry class-B power amplifier two types of transistors, NPN
and PNP are used. These transistors acts as emitter follower with both emitters
connected together.
In class-B power amplifier Q-point is located either in cut-off region or in
saturation region. So, that only 180o of the input signal is flowing in the output.
In complementary-symmetry power amplifier, during the positive half cycle of
input signal NPN transistor conducts and during the negative half cycle PNP
transistor conducts. Since, the two transistors are complement of each other and they
are connected symmetrically so, the name complementary symmetry has come
Theoretically efficiency of complementary symmetry power amplifier is 78.5%.
4.CIRCUIT DIAGRAM:

Vcc 5.0

SL100 !NPN

1.0u 0v Vout

Vin

8.0
SK100 !PNP +
V
Vee 5.0
ALTERNATE CIRCUIT :

Vcc 12.0

22 0.0k
10.0u
SL100 !NPN
658mv

18 .0 k
4.3
1.0k
4.3 Vout

+
18 .0 k
Vin

1.0k
10.0u V
SK100 !PNP
-658mv
22 0.0k

Vee 12.0

5. PROCEDURE:

i. Connect the circuit has shown in the circuit diagram.

ii. Measure base ,emitter and collector D.C voltages of both transistors and
compare against estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vb2, Vc2, Ve2
 iii. Apply the input at input terminals of the circuit from the function generator.

iv. Keep the input signal at constant frequency under mid frequency region and
adjust the amplitude such that output voltage undistorted.

v. Calculate the power efficiency and compare it with theoretical efficiency.

6. OBSERVATIONS:

Efficiency is defined as the ratio of AC output power to DC input power

DC input power = Vcc x ICQ

AC output power = VP-P2 / 8RL

7. CALCULATIONS:

Input DC power = Vcc x ICQ

Output AC power = Vrms x Irms

= VPP2 / 8RL

OutputACpo wer
η = InputDCpow er

8. GRAPH:
9. RESULT:

The maximum input signal amplitude which produces undistorted output signal is
_________

The practical efficiency of the circuit is ________

10. INFERENCES:

The practical efficiency of the circuit is ________, because of ______________.

11. PRECUATIONS:

i. Use matched pair NPN & PNP transistors for this experiments. Matching can be done
by observing hfe of the transistor using DMM.
 ii. Transistors recommended are SL100, SK100.

iii. Transistors heat up at large signal which is necessary to obtain high efficiency.

iv. Do not short the output which will result in burning of the transistors.

v. In the absence of signal DC voltage at emitters is 0 V.

vi. When alternate circuit uses series resistors to compensate any difference in VBE of
transistors, ensure obtaining expected DC voltages and proceeds after that.

12. APPLICATIONS:

This circuit is used to drive low impedance without Transformer.

This circuit is used to drive low impedance from DC onwards.

13. EXTENSIONS:

This experiment is designed with low power and low load current only to demonstrate basic
principles of maximum efficiency, crossover distortion and driving small loads without transformer.
Actual amplifier circuits of above type can be found in audio systems, radio output stages of
modern designs. These drive loud speakers directly without any transformers. Present audio
systems have power ratings as much as 1000 watts and radios have above 10 watts. These use
complementary class B power amplifiers in the basic are modified forms. In view of large power
involved special ICs, Transistors with heat sinks are common.

14. TROUBLE SHOOTING:

S.NO FAULT DIAGNOSIS

1. If there is no output Check + and – ve DC voltages.

Check function generator.
Check CRO connections.
2. If the output is distorted Check Vcc and all DC voltages
Check amplitude of input signal.
3. If DC voltages differ very much Check entire circuit for connections,
resistance values and placements
Check Transistors.
15. QUESTIONS:

i. Differentiate between voltage amplifier and power amplifier

ii. Explain impedance matching provided by transformer?

Iii . Under what condition power dissipation is maximum for transistor in this circuit?

iv. What is the maximum theoretical efficiency?

v. Sketch current waveform in each transistor with respective input signal?

vi. How do you test matched transistors required for this circuit with DMM?.

vii. What is the theoretical efficiency of the complementary stage amplifier.

viii. How do you measure DC and AC out put of this amplifier?

ix. Is this amplifier working in class A or B. ?

x. How can you reduce cross over distortion?

 EXP. NO. 7 CLASS-C TUNED POWER AMPLIFIER

1. AIM:

To design class-C tuned power amplifier and to study the class-c tuned power amplifier.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 ½ Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii.COMPONENTS :

1. 4.7kΩ Resistor – 1 No.

2. 10kΩ Resistor – 1 No.
3. 0.1 μF/16 V Electrolytic Capacitor – 1 No.
4.10 nF/16 V Electrolytic Capacitor – 1 No.
5. 10 mH Inductor – 1 No
6. Transistor – SL100 – 1No.

• All resistors are carbon / metal film ¼ W 5% unless otherwise specified.

3. THEORY:

The efficiency of output circuit of an amplifier increases as the operation is shifted from
class-A to B and then to C. In class-C amplifiers efficiency approaches 100%. But the
difficulty with class-C operation is harmonic distortion is more. It is tuned amplifier and
only one frequency fo is to be amplified and power to be handled Po is large. Since
efficiency is high and harmonic distortion will not be a problem since only one frequency
is to be amplified and the tuned circuit will reject the other frequencies.

The function of resonant circuits are:

1. To provide correct load impedance to the amplifier.
2. To reject unwanted harmonics.
3. To couple the power to load
The resonant circuits in tuned power amplifier are called tank circuits.
4. CIRCUIT DIAGRAM:

Vcc=+5V

10nF
10
m
H

100nF 10k

+
SL 100
DC INPUT VOLTAGE
Vout
4.7k
+

Vin

5. PROCEDURE:

i. Connect the circuit as shown in diagram.

ii. The input terminals are connected to function generator and output terminals are
connected to CRO.

iii. Apply the DC voltage (Vcc) from regulated power supply.

iv. Adjust the input frequency such that output voltage is a perfect since sinusoidal
waveform at a fixed frequency..
v. Note down corresponding output voltages at different frequencies.

vi. Plot the waveforms of both input and output

vii. The frequency at which the voltage is max and the frequency should be compared
with theoretical values.

6. OBSERVATIONS:

The value of Resonant frequency at which maximum gain occurred is _________.

7. CALCULATIONS:

Theoretical value of resonant frequency =____________________

8. GRAPH:
9. RESULT:

The frequency at which the maximum amplification possible is _________.

10. INFERENCES:

This circuit can be used as class – C tuned power amplifier at the resonant
frequency possible is _________________

11. PRECUATIONS:

i. Check the circuit connections before switching on the power supply.

ii. Check the continuity of the connecting wires.

iii. Power handling capacity of resistor should be kept in mind

iv. Control wires must be checked before use

v. Maximum forward current should not exceed value given in data sheet

vi. Resistors should be connected properly with out interchanging the values.

vii. check all diodes transistors, coils ,with multi meter before putting in circuits.

viii. donot proceed unless you get expected dc voltages.

12. APPLICATIONS:

This is mainly used In radio transmitters and radio receivers

13. EXTENSIONS:

This experiment is conducted with simplest circuit to demonstrate class C operation and small
power. To make measurements simple the resonant frequency is chosen around 10 to 20 Khz. In
real application class C amplifiers are used at higher power and frequencies of RF range which
will call for low values of inductance and high quality capacitors and transistors.

By changing value of the load one can obtain different band width as employed in the circuit
used. But real application load is a part of resonant circuit to reflect load on tank circuit to
determine Q of the circuit.

Real circuits employing class C operations are found in radio transmitters, ultrasonic cleaners.
Radio transmitters operate at 10 to 30 Kwatts employing vaccum tubes.

14. TROUBLE SHOOTING:

S.NO FAULT DIAGNOSIS

1. If no output Check whether C.R.O .

Check if signal around resonance

freq

2. Small output Check function generator output.

15. QUESTIONS:
i. What are the different types of tuned circuits ?

ii. How do you measure DC and AC power in the class C amplifier ?

iii. What is Q of Tuned circuit employed in circuit ?

iv. How is class C operation obtained in this circuit ?

v. State relation between resonant frequency and bandwidth of a Tuned

amplifier.

vi. Differentiate between Narrow band and Wideband tuned amplifiers ?

vii. How is harmonic distortion is reduced in class-C Tuned amplifiers?

viii. Sketch current waveform in the transistor..

ix. Calculate bandwidth of a Tuned amplifier whose resonant frequency is 15KHz

and Q-factor is 100.

x. Specify the applications of Tuned amplifiers.

EXP.NO.8 VARIABLE SERIES VOLTAGE REGULATOR

1. AIM:

To design a transistorized variable series voltage regulator and study the regulation
action for
i. Different values of input voltages

ii Different values of load resistors

And also to find percentage regulation.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 ½ Digit LCD hand held 1No

ii. COMPONENTS:

1. 1.8kΩ Resistor – 1 No.

2. 4.7kΩ Resistor – 1 No.
3. 10kΩ Resistor – 1No
4. 10kΩ variable Resistor – 1 No
5. 1k , 2k , 4.7k, 10k (load resistors ) – 1 No each.
6. Zener diode – IN 5253 – 1 No.
7. Transistor – SL100 – 2 No.

• All resistors are carbon / metal film ¼ W 5% unless otherwise specified.

3. THEORY:

Voltage regulator is a device designed to maintain the output voltage as nearly constant
as possible. It monitors the output voltage and generates feed back that automatically
increases are decreases the supply voltage to compensate for any changes in output
voltage that might occur because of change in load are changes in load voltages.
In transistorized series voltage regulator the control element is a transistor which
is in series with load.
The main element used for regulation of output voltage is Zener diode, which
must be operated in reverse break down region, where it provides constant
voltage irrespective of changes in applied voltages.
The output voltage of the series voltage regulator is Vo = Vz – Vbe.
 Since, Vz is constant, any change in Vo must cause a change in Vbe in order to
maintain the above equation. So, when Vo decreases Vbe increases, which causes
the transistor to conduct more and to produce more load current, this increase in
load causes an increase in Vo and makes Vo as constant. Similarly, the regulation
action happens when Vo increases also.

4. CIRCUIT DIAGRAM:

SL100

4.7k
10.0k
1.8k

SL100 RL 0.0
15-30V

Vout
10.0k

5.1V

5. PROCEDURE:

i. Connect the circuit as shown in the circuit diagram.

ii. Apply the input voltage from power supply.
iii. Measure base ,emitter and collector D.C voltages and compare against estimated
values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vz

iii. For a specific value of load resistor, vary the input voltage from 10 to a maximum
of 20 volts and not the values of output voltage.
iv. Change the load resistor and repeat steps 2 and 3.
v. Remove the load resistor and note down the voltage at no load.
vi. Find percentage regulation.
V NL −V FL
Percentage regulation = x100
V FL
vii. Plot the graph for load regulation and line regulation.
6. OBSERVATIONS:

S.no Vin Output voltage

RL= RL= RL=

7. CALCULATIONS:

V NL −V FL
Percentage load regulation = x100 =
V FL

Percentage Line Regulation = (change in output ) / (change in input) X 100

8. GRAPH:
9. RESULT:

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

10. INFERENCES:

This Series Regulator is useful for the input voltage range ______________

11. PRECAUTIONS:
 i. Test Transistors, zener diode before assembling in the circuits.

ii. Apply voltage from 15 V and ensure the DC voltages as shown the circuit are
obtained. Check circuit connections and components if expected voltages are not
obtained.

iii. Check resistor values properly otherwise power supply may be over loaded due to
small values.

iv. If Zener is reversed no damage will occur but output voltage will fall down to 0 V.

v. Don't short the output as this would result in large current through the series
transistor which will lead to burning of the same due to overheat.

12. APPLICATIONS:

1. Low current applications.

2. Fixed voltage applications

3. Extension of zener regulator for higher currents.

13. EXTENSIONS:

The main function of voltage regulator is to regulate the changes in output voltage for the
changes occur either in input voltage variations or output load variations. In this
experiment we have verified for one particular value of output voltage. We can obtain
voltage regulation at higher voltages with the help of more number of Zener diode
operating in break down region, must be connected in series. For example, to obtain
voltage regulation at 8.2 volts, we can use the same circuit with two Zener diodes of
values 3.1 volts and 5.1 volts respectively.
By employing a series regulator with error amplifier , variable regulated volatage can be
obtained from circuit given below.
The experiment is conducted is of simplest type to demonstrate use of zener and series pass
transistor without any unregulated voltage power supply. In real application regulated power
supply used at the input of this experiment will be replaced by a full wave or bridge rectifier with
capacitor input filter suitable to the load and repule voltages expected. The series transistor would
be a power transistor with high current capacity and would be mounted to heat sink.Ripple can be
simulated by change in input and the corresponding change in output at a constant load current.

One can obtain different fixed voltages by suitably changing the zener diode. One can obtain
higher current ratings by employing suitable series power transistor and heat sinks.
14. TROUBLE SHOOTING:

S.NO FAULT DIAGNOSIS

1. If there is no output Check Vcc and all DC voltages.

.
2.. If DC voltages differ very much Check entire circuit for connections,
resistance values and placements
Check Transistors.

15. QUESTIONS:

i. Define voltage regulator.

ii. Give the advantages of series voltage regulator. .

iii.. Explain the feed back mechanism in series voltage regulator.

iv. In series voltage regulator which is control element and explain its function.

v. Define load and line regulation. What is ideal value ?.

vi. Which element determines output ripple ?

vii. What determines maximum load current allowed in this circuit ?

viii. Mention the applications of series voltage regulator.

ix. Define no load voltage and full load voltage.

x. Explain the term percentage regulation.

APPENDIX - I :

INTRODUCTION TO INSTRUMENTS USED

1. THE MULTIMETER STRUCTURE

Fig. 1

1. LCD Display: A 3 ½ digit display (maximum reading 1999) indicates measured

values, and features symbols indicating ranges, Low battery.

2. Function Selector: To select ACV, DCV, ACA, DCA, Resistance, Diode,

Continuity & Transistor test.

3. Input Jacks (VΩ, mA, A and COM): Test leads are inserted into these jacks for
Voltage, Resistance, Current measurements, Continuity & Diode checks.

4. Input Socket for Transistor Test: NPN or PNP transistors are inserted in the
sockets provided to measure their ratings.

Functional Buttons: Below table indicates the functional button operations

Buttons Operation Performed

POWER (Yellow Switch) Turn the Meter ON and OFF
  Rotate the SWITCH to turn ON the
Meter
 Rotate the SWITCH to OFF
position to turn OFF the Meter

Display Symbols:

Fig. 2

SYMBOL MEANING
1 — Indicates negative reading
The battery is low.
- + Warning:
!
2
To avoid false readings, which could lead to possible electric
shock or personal injury, replace the battery as soon as the
battery indicator appears.
3  Indicates the range in which the switch position is placed.
 2. FUNCTION GENERATOR

FRONT PANEL CONTROLS

1. Power: Push button switch for supplying power to instrument.

2. Digital Display: (7-segment LED): 4-digit frequency / amplitude meter, LED
indicators for Hz, KHz, mV & V.
3. FREQ/AMP: Selects display of frequency or amplitude.
4. AMP (adjusting knob): Continuous adjustment of the output amplitude from 0 –
20 dB when terminated with 50Ω.
5. –20dB, -20dB (Push button): Two fixed attenuators, -20dB each. They can be
used separately. When both push buttons are activated, a total attenuation of –40
dB results. Including the amplitude control for the max. attenuation amounts to 60
dB (factor 1000).
6. Output (BNC connector): Short-circuit-proof signal output of the generator. The
output impedance is 50Ω switch selectable. Max output amplitude is 30 Vpp
(o.c.) or 15 Vpp when terminated with 50Ω.
(Attention! Do not apply any DC voltage to the output socket)
7. 50 Ω / 600 Ω: Push button when pressed selects 600 Ω else 50Ω in released
position.
8. DC (On), Offset (adjusting knob): Adjustment of the positive or negative offset
voltage. This DC voltage can be superimposed on the output signal. The max
offset voltage is ± 12.5 V (o.c.) or ± 6.25 V respectively when terminated with
50Ω. This voltage is also available in DC mode.
9. Function: Mode selection DC- sine triangle – square desired function selection
indicated by glowing LEDs.
10. Over drive (LEDs): When working in the offset mode, and the output amplifier is
overdriven either in positive or in negative direction, the corresponding LED lit up.
11. FVAR (adjusting knob): Continuous and linear frequency adjustment from 1 Hz
to 1 MHz in steps, selected with frequency range.
12. Frequency: Frequency coarse adjustment from 1 Hz to 1 MHz in 7 decade steps.
Desired frequency selection indicated by glowing LEDs.
13. VAR: When trigger output is selected in CMOS output can be set with VAR, to
approx. 15 Vpp.
14. Trig output (BNC connector): This short-circuit-proof output supplies square
waves signal in synchronous with the output signal. It is switch selectable
TTL/CMOS and has a duty-factor or approx 50%.

-x-
 15. TTL/CMOS: Switch selects trigger output TTL or CMOS.
16. FM in (BNC connector): Applying a DC voltage to this input will vary the
oscillator frequency linearly to max. 1:100. The maximum allowable input
voltage is +30V.
17. AMPL (adjusting knob): Attenuation of input voltage for FM-input. This permits
the user to change the sweep width.

TECHNICAL SPECIFICATIONS

Operating Modes:
Sine – Square – Triangle – DC, Free running or external frequency modulated, with or
without DC offset.

Frequency Range:
0.1 Hz – 1 MHz in 7 decade steps variable control between steps.

Waveform Characteristics

Sine wave distortion:

0.1 Hz to 100 KHz : max. 0.5%
100 KHz to 500 KHz : max. 1.5%
500 KHz to 1 MHz : max. 3%

Square wave rise time:

Max. 70ns (10 to 90%)

Overshoot:
≤5% (when output is terminated with 50 Ω

Triangle Non-linearity:
≤1% (upto 100 kHz) approx.

Display:

Display switch able for frequency and amplitude, with automatically positioned decimal
point LED indicator for Hz, KHz, mV and V.

Frequency:
4 digit 7 segment LED
up to 100 KHz : ± 1% ±LSD
up to 1 MHz : ± 3% ±LSD
Amplitude:
3 digit 7 segment LED
Accuracy:
3Vpp-30Vpp : ± 3%
300mVpp – 3Vpp : ± 5%
30mVpp – 300mVpp : ± 5%
Amplitude:
3 digit 7 Segment LED

Accuracy:
3Vpp – 30Vpp : ± 3%
300mVpp – 3Vpp : ± 5%
30mVpp – 300mVpp : ± 5%
Overdrive:
Indicates with two LEDs

-xi-
Outputs:
Signal output : short-circuit proof
Impedance : 50 Ω / 600 Ω switch able
Output voltage: max. 15 Vpp into 50Ω, 30 Vpp open circuit
Attenuation : 2 steps: 20dB ± 0.2dB each. Variable attenuation:
0 to 20 dB total of 60dB
Amplitude Flatness: (sine/triangle) with 50 Ω termination.
0.1 Hz to 100 KHz max. 0.2 dB
100 KHz to 1 MHz max. 0.5 dB
DC offset : Continuously variable (switch able)
Offset range : max. ± 6.25 V into 50Ω
Max. ± 12.5 V open circuit
Trigger output: Switch selectable TTL/CMOS TTL more than 4V CMOS level
adjustable up to 14V (approx.)

FM input / External Sweep:

Frequency change : approx. 1 : 100
Input Impedance : 100kΩ || 25pF
Input voltage : max ± 30 Vpp

General Information:
Supply : 220 V AC ± 10%, 50 Hz
Power Consumption : 20 VA (approx.)
Operating Conditions : 0-50˚C, 95% RH
Dimensions (mm) : W196 x H80 x D 262
Weight : 2.5 kg (approx.)
-xii-
 3. CATHODE RAY OSCILLOSCOPE

TECHNICAL SPECIFICATIONS

Operating modes:
Channel I, Channel II, Channel I & II alternate / chopped (approx. 500 KHz) X – Y
(Ratio 1:1 input via CH II), Add/Sub, Invert CH II.
Vertical deflection (y): (Identical channels)
Bandwidth:
DC-20 MHz (-3 dB)
DC-28 MHz (-6dB)
Rise Time: 17.5 ns (approx.)
Deflection coefficients:
12 calibrated steps 2mV/cm – 10V/cm (1-2-5 sequence)
Accuracy: ± 3%
Input Impedance: 1 MΩ || 25 pF.
Input coupling: DC-AC-GND
Input voltage: Max. 400V (DC + Peak AC).

Time base:
Time coefficients: 18 calibrated steps. 0.5 µ s/cm – 0.2s/cm (1-2-5 sequence) with
magnifier x 5 to 100ns/cm. With variable control to 40 ns/cm.
Accuracy: ± 3% (in cal position)
Ramp output: 5 Vpp (approx.)
Hold-Off: Variable control for stable trigger.

Trigger System:
Modes: automatic or variable trigger level
Source: Ch I, Ch II, ALT Ch I / Ch II, Line, Ext.
Slope: Positive or Negative
Coupling: AC
Sensitivity: Int. 5mm, Ext 0.8 V (approx.)
Trigger Bandwidth: 40 MHz

Horizontal Deflection (x):

Bandwidth: DC – 2.3 MHz (-3 dB).
X – Y mode: Phase shift < 3˚ at 60 KHz.
Deflection coefficients: 12 calibrated steps 2mV/cm-10V/cm(1-2-5 sequence)
Input Impedance: 1 M Ω || 25 pF.

Component Tester:
Test Voltage: Max 8.6 Vrms (Open)
Test Current: Max 8 mA rms (Shorted)
Test Frequency: 50Hz, Test circuit grounded to chassis.
Continuity Tester:
Beeper sounds < 75Ω (approx.)

General Information:

Cathode Ray Tube: Rectangular medium short persistence (P-31)

Accelerating potential: 2000 VDC (approx.)

Display: 8 x 10 cm

Trace rotation: Adjustable on front panel

Calibrator: Square wave generator 1KHz (approx.). 0.2V ±1% for probe compensation.

Z Modulation: TTL level

Stabilized Power Supply: All operating voltages including the EHT

Mains Voltage: 220 V, 50Hz

Mains fluctuations: ±10% (max.)

Power Consumption: 33 VA (approx.)

Weight (approx): 7.5 kg.

Dimensions (mm): W285 x H145 x D380

Operating Temperature: 0-40˚, 95% RH

Finish: Off white with handle and tilt stand.

SPECIFICATION FOR LOGIC SCOPE :

Logic Inputs: 8 Nos. (TTL timing diagrams)

Output: To oscilloscope.
PANEL CONTROLS

1 Power On/Off Push buttons switch for supplying power to instrument.

2 X5 Switch when pushed inwards gives 5 times
magnification of the X signal.
3 XY Switch when pressed cuts off the time base & allows
access the ext. horizontal signal to be fed through CH II
(used for X-Y display)
4 CH-I/CH-II Trig I/Trig II Switch when out selects & triggers CH I and when
pressed, selects & triggers CH II.
5 Mono/Dual Switch selects the dual operation
6 ALT/CHOP/ADD Switch selects alternate or chopped in DUAL mode. If
mono is selected then this switch enables addition or
subtraction of channel i.e. CHI ± CHII
7 Time/Div Switch selects time base speeds
8 AT/Norm Switch selects Auto/Normal position. Auto is used to
get trace when no signal is fed at the input. In NORM
the trigger level can be varied from the positive peak to
negative peak with LEVEL control
9 Level Controls the trigger level from peak to peak amplitude
of signal
10 Trig. Input Socket provided to feed external trigger signal in EXT.
mode
11 Cal out Socket provided for square wave output 200 m V; used
for probe compensation and checking vertical
 sensitivity, etc.
12 Hold Off Controls hold of time between sweeps. Normal position
= full ccw
13 X-POS Controls Horizontal position of the trace
14 Ext. Switch when pressed allows external triggering signal to
be fed from the socket marked TRIG. INP.

-xv-
 15 Variable Controls the time speed in between two steps of
TIME/DIV switch. For calibration put this fully
anticlockwise. (At CAL pos)

16 Line Switch when pressed displayed signal gets synchronized

with mains line frequency
17 Alt Selects alternate trigger mode from CH I & CH II
18 +/- Switch selects the slope of triggering, whether positive
going or negative going
19 Inv Ch. II Switch when pressed inverts the CH II
20 Intensity Controls the brightness of the trace
21 TR Controls the alignment of the trace with gratitude
(Screw driver adjustment)
22 Focus Controls the sharpness of the trace
23 CT Switch when pressed starts CT operation
24 DC/AC/GD Input coupling switch for each channel. In AC the signal
is coupled through 0.1 MFD capacitor.
25 Ch. I(Y) & Ch. II(X) BNC connectors serve as input connection for CH I &
CH II Channel II input connector also serves as
Horizontal external signal.
26 CT-IN To test any components in the CT mode, put one test
probe in this socket and connect the other test probe in
ground socket.
27 Volts/Div Switches select the sensitivity of each channel
28 Y POS I & II Controls provided for vertical deflection of trace for
each channel.
LOGIC SCOPE
29 Inputs Terminals provided for feeding logic levels (Timing
Diagram) use 1 mm patch cords (bunch of 8)
30 Output Connect output to CH I or CH II of oscilloscope by
using 1 mm patch cord
Back Panel Controls
31 Fuse 350 mA fuse is provided at the back panel. Spare fuses
are provided inside the instrument
32 Z mod Banana socket provided for modulating signal input i.e.
Z-modulation.
 4. REGULATED POWER SUPPLY

1. POWER:
Push button switch for supplying power to instrument.

2. OUTPUT ON:
Push button for switching On / Off all the three output voltages.

3 & 6 V/mA (Push button):

For switching the display from voltage to current reading or vice versa. When
pushbuttons are pressed, the current supplied from the terminals 12 & 17 is displayed
with a resolution of 1mA. In released position voltages across the terminals 12 & 17 are
displayed with a resolution of 0.1 V.

4 & 7 DIGITAL DISPLAYS (7-Segment LED):

Dual display with two 3-digit readout for output voltage and current. On the left side of
the instrument the voltage and current readings for terminals 3 is indicated. The
corresponding values for the terminals 4 are indicated on the right side of the display.

5 & 8 V & mA INDICATORS:

Two LEDs indicate the unit of the display. The mA LED flashes when the 0 – 30VDC
output is used in constant current mode, or output current required is in excess of
specified value, in CV mode.

9 OUTPUT + 5 V (fixed) (4mm banana sockets):

Output terminals for 4mm banana plugs or cable connection for the fixed +5V output.
The output voltage is short circuit protected.
DC Output:
2 x 0 – 30V, 500 mA
1 x 5V fixed, 1A

Output Voltage Range:

0-30V, continuously variable by means of coarse and fine controls

Resolution: ≤ 0.1%
Internal resistance: ≤ 15mΩ (typical 7mΩ)
Stability: ≤ 2.5mV (max.: 2 x 200mA) at line voltage variations of up to 10%
Recovery time: ≤ 80µ s
Load regulation: ≤ 0.05%
Temperature coefficient: ≤ 0.1%/˚C
Ripple and noise: ≤ 1mVrms
Output current: max. 500 mA
Current limit: 10mA to 500mA continuously adjustable
Resolution: ≤1%

+5V Fixed Output

Tolerance: ± 0.2V
Internal resistance: ≤ 0.06Ω
Stability: ≤ 5mV at line voltage variations of up to 10%
Recovery time: ≤ 100 µ s
Temperature coefficient: ≤ 0.1%/˚C
Ripple and noise: ≤ 5mVrms
Output current: max. 1A

Display
2 x 3-digit 7-segment LED display for Voltage & Current. Two LED (for V and mA)
indicate the unit of display.
General Information
All outputs are floating. Outputs are switch able from front panel.
Built-in overheat protection.
Supply: 230 V AC ± 10%, 50 Hz
Operating Conditions: 0-40˚C, 95% RH
Dimension (mm): W 196, H80, D262
Weight: 3.9 Kgs
APPENDIX II

GENERAL PRECAUTIONS IN ASSEMBLING CIRCUITS :

i. 100 percent knowledge about color code of Resistors is required.

ii. Full knowledge about bread board and contact information is required.

iii. 100 percent knowledge about transistor lead connections i.e. base , emitter and
collector connections.

iv. 100 percent knowledge about diode and zener lead connections i.e. anode and
cathode connections.

v. Polarity marking of the electrolytic capacitors must be observed , while

connecting.

vi. It will be a good practice to test diodes and transistors with DMM before using .

vii. Test connecting leads and probes before using.

viii. After completing assembly –

before connecting RPS , ensure that supply and ground leads of the circuit are
not shorted . This can be verified by multi meter .
APPENDIX III :

GENERAL PRECAUTIONS IN USING INSTRUMENTS :

Regulated Power supply :

i. Before connecting RPS , ensure that supply and ground leads of the circuit
are not shorted . This can be verified by multi meter .

ii. Set voltage controls to zero reading , before connecting to the circuit.

iii. Set current setting to mid or less than the mid position.

CRO :
i. Obtain trace on channel and set position control to get the trace to the
middle .
ii. See to which channel you are applying input .

iii. Touch the probe with hand to know whether it is responding. This will detect
broken probes , wrong setting of channels .

iv. Set volts/div and time/div as required.

v. AC and DC coupling of input , positive / negative level settings must be

understood.

vi. Generally CRO must in AUTO mode of sweep.

vii. Learn how to trigger the CRO and set controls to get stable trace and full
control with level and slope .

viii. One should also know component tester mode of CRO.

FUNCTION GENERATOR :

i. Set the output controls to minimum before connecting to circuit.

ii. Select sine / square / triangular waveform with desired frequency .

 iii. One should know attenuator , DC offset settings and output terminals
properly.

MOVING COIL AMMETERS AND VOLTMETERS :

i. polarity of connections to above must be perfectly correct, otherwise meters will

be damaged due to wrong connections.

ii. The proper ( Full Scale reading )rated meters must be used , otherwise meters
will be damaged by over currents / voltages.

DIGITAL MULTIMETERS :

i. Before connecting and switching on , set to proper function i.e. V-A-R ac or dc

and range .

ii. Applying voltages in resistance mode will damage DMM’s.

iii. Turning knobs with voltages / currents ON will damage DMM’s.

iv. SET THE RANGE AND APPLY VOLTAGE OR CURRENT.

APPENDIX – IV :

Specifications of BC 107:

Collector –base voltage (open emitter), VCBO max = 60V

Collector – emitter voltage (open base), VCEO max. = 45V

Emitter base voltage (open collector) VEBO max = 5V

Collector current (d.c.) IC max = 200mA

Total Power dissipation , Ptot max = 250 mW

Max. Junction temperature at 25 oC = 150 oC

Forward Current Gain = 150

Specifications of SL100 :

Collector –base voltage (open emitter) VCBO max = 60V

Collector – emitter voltage (open base) VCEO max. = 45V

Emitter base voltage (open collector) VEBO max = 5V

Collector current (d.c.), IC max = 1A

Total Power dissipation, Ptot max = 2W

Max. Junction temperature at 25 oC = 150 oC

Forward Current Gain = 20

SPECIFICATIONS OF ZENER DIODE IN5253 :

Working Zener voltage range, Vz = 4.7 to 33 volts

Maximum power consumption at room temp. P max = 300mW

Maximum Junction temp. T max = 1500C

APPENDIX IV :

SPICE PROGRAMS OF ECA LAB EXPERIMENTS :

1. TWO STAGE RC COUPLED CE AMPLIFIER :

** two stage RC coupled amplifier

vcc 4 0 dc 12v
vin 1 0 ac 50mv
rb1 1 2 4.7k
cb1 2 3 10u
r11 3 4 62k
r12 3 0 4.7k
rc1 4 5 33k
re1 6 0 560
ce1 6 0 10u
q1 5 3 6 bc107
.model bc107 npn (bf=100)
cc1 5 7 0.1u
rb2 7 8 1k
r21 8 4 62k
r22 8 0 4.7k
rc2 9 4 33k
re2 10 0 560
ce2 10 0 10u
cc2 9 11 10u
q2 9 8 10 bc107a
.model bc107a npn (bf=100)
rl 11 0 1k
csh 11 0 5n
.ac dec 10 50hz 100khz
.print ac v(11)
.plot ac V(11)
.probe
.end
 1.B. ALTERNATE TWO STAGE RC COUPLED AMPLIFIER

**alternate circuit for two stage RC coupled CE amplifier

vin 0 12 ac 10mv sin(0 10mv 15khz)
rb 12 1 10k
cb1 1 2 10u
vcc 5 0 dc 12v
r11 2 5 47k
r12 2 0 10k
rc1 3 5 2.2k
re1 4 0 1k
ce1 4 0 100u
q1 3 2 4 bc107
.model bc107 npn (bf=100)
cc1 3 6 10u
rb2 6 0 10k
cb2 7 8 10u
rb1 6 7 10k
r21 8 5 47k
r22 8 0 10k
rc2 9 5 2.2k
re2 10 0 1k
ce2 10 0 100u
q2 9 8 10 bc107a
.model bc107a npn (bf=100)
cc3 9 11 10u
rl 11 0 2.2k
csh 11 0 2n
.ac dec 10 10hz 100khz
.print ac v(11)
.plot ac V(11)
.probe
.end
 2. SIMPLE SERIES VOLTAGE REGULATOR :

**SERIES VOLTAGE REGULATOR

vin 1 0 dc 20v
r1 1 2 560
r2 2 3 1k
q1 2 3 4 sl100
.model sl100 npn ( bf=20)
d1 0 3 dname
.model dname d(bv=5.1v)
rl 4 0 1k
.dc vin 0 30v 1v
.plot dc v(4) v(1)
.print dc v(4) v(1)
.probe
.end

3.SHUNT VOLTAGE REGULATOR :

**SHUNT VOLTAGE REGULATOR

VIN 1 0 20V
R1 1 2 560
Q1 2 4 3 SL100A
.MODEL SL100A NPN (BF=20)
Q2 2 3 0 SL100B
.MODEL SL100B NPN (BF=20)
D1 4 2 DNAME
.MODEL DNAME D(BV=6.8V)
R2 4 0 1K
RL 2 0 1K
.dc vin 0 30v 1v
.plot dc v(2) v(1)
.print dc v(2) v(1)
.probe
.end
 3A . SIMPLE SHUNT VOLTAGE REGULATOR

**simple shunt voltage regulator

vin 1 0 20v
r1 1 2 180
d1 3 2 dname
.model dname d(bv=6.8v)
q1 2 3 0 sl100
.model sl100 npn (bf=20)
r2 3 0 1k
rl 2 0 2k
.dc vin 0 30v 1v
.plot dc v(2) v(1)
.print dc v(2) v(1)
.probe
.end

4. SERIES FED CLASS – A POWER AMPLIFIER :

**series fed class-A power amplifier

vcc 3 0 dc 5v
vin 1 0 sin(0 10mv 1khz)
rb 3 2 20k
c1 1 2 0.1u
rc 3 4 1k
q1 4 2 0 sl100
.model sl100 npn (bf=20)
c2 4 5 0.1u
rl 5 0 1k
.tran 10us 10ms 10us
.print dc i(rc)
.probe
.end
5. COMPLIMENTARY – SYMMETRY CLASS – B POWER AMPLIFIER :

** complimentary symmetry class-B power amplifier

vin 1 0 sin(0 2v 1khz)
q1 3 2 4 sl100
.model sl100 npn (bf=20)
q2 5 2 4 sk100
.model sk100 pnp (bf=20)
c1 1 2 1u
rl 4 0 8
vcc 3 0 5v
vee 0 5 5v
.tran 10us 2ms 10us
.probe
.end

6. ALTERNATE CIRCUIT FOR CLASS-B COMPLIMENTARY SYMMETRY

POWER AMPLIFIER

**alternate circuit for class-B com-sym power amplifier

vin 1 0 sin(0 2v 10khz)
r1 1 2 1k
c1 2 3 0.1u
c2 2 4 0.1u
r2 3 5 220k
r3 3 0 18k
r4 4 0 18k
r5 4 9 220k
vee 0 9 dc 12v
vcc 5 0 dc 12v
q1 5 3 6 sl100
.model sl100 npn (bf=20)
q2 9 4 8 sk100
.model sk100 pnp (bf=20)
r6 6 7 4.3
r7 8 7 4.3
rl 7 0 1k
.tran 10us 2ms 10us
.probe
.end
 7. CLASS – C TUNED POWER AMPLIFIER :

**class - C tuned power amplifier

vin 1 0 ac 2v sin(0 2v 15.9khz)
vcc 4 0 dc 5v
c1 1 2 0.1u
r1 2 0 4.7k
q1 3 2 0 sl100
.model sl100 npn (bf=20)
l1 4 3 10mh
c2 4 3 10n
rl 3 0 10k
.ac dec 100 1khz 100khz
.tran 10us 2ms 10us
.probe
.end

8. VARIABLE SERIES VOLTAGE REGULATOR :

** variable series voltage regulator

vin 1 0 dc 20v
r1 1 2 4.7k
r2 1 4 1.8k
r3 3 5 10k
r4 5 0 10k
rl 3 0 2k
q1 1 2 3 sl100a
.model sl100a npn (bf=20)
q2 2 5 4 sl100b
.model sl100b npn (bf=20)
d1 0 4 dname
.model dname d(bv=5.1v)
.dc vin 0 30v 1v
.print dc v(1) v(3)
.plot dc v(1) v(3)
.probe
.end