Version Date Remark

V1.0 2019-11-18 First

 1 2 3 4

A NC SDI_2(G0) SDI_1(G0)

B SDI_3(G0) SCK(G0) SSN(G0)

C VDD1 RFSDA RFSEN RFSCK

AVDD1V8_
D APCOUT1 VSS APCOUT0
BB

LVDSRF_RE CLK26M_O
E
XT UT

LVDSRF_D LVDSRF_D AVDD1V8_

F
L_DIV_N L_DIV_P BB

LVDSRF_D LVDSRF_D
G VSS
L_PRI_N L_PRI_P

LVDSRF_UL
H VSS
_P

LVDSRF_UL
J VSS VSS
_N

K VSS VSS VDDMEM

 EMVREF_D
L VDDMEM RFCTL0
Q

M RFFE_SDA RFFE_SCK VDDMEM RFCTL2

N RFCTL5 RFCTL3 RFCTL1

P RFCTL6 RFCTL4 RFCTL11

R RFCTL7 RFCTL9 RFCTL8 GPIO17

T GPIO16 RFCTL10 GPIO21

U GPIO18 RFCTL19 RFCTL20

V RFCTL17 RFCTL16 KEYOUT1 KEYOUT2

W TCK_ARM KEYOUT0 KEYOUT4 KEYIN1

Y NC TMS_ARM KEYIN2

1 2 3 4
 5 6 7 8

CCIRD3 CCIRD1 CMPCLK0

CCIRD7 CCIRD0 CCIRVS CCIRD2

EXTINT5

EXTINT6 CCIRHS

SDI_0(G0) CCIRD5 CCIRD6

CLK26M_I
VSS VIO1V8
N

VDDCORE VSS

VSS VDDCORE VSS

VSS VSS VDDCORE

VSS VSS VSS

 VSS VDDCORE VDDCORE

VSS VSS VSS

VSS VSS VSS

VDDCORE VDDCORE VSS

VIO1V8 VDDCORE

VDD1 VIO1V8

LCM_FMA
KEYOUT3 LCM_RSTN EXTINT1
RK

KEYIN0 SPI0_DO SPI0_CLK

KEYIN3 SPI0_CSN SPI0_DI SCL1

KEYIN4 SPI0_CD EXTINT0

5 6 7 8
 Other
VSS VDDCORE VDDMEM
Power
 9 10 11 12

CMMCLK IIS1LRCK IIS1DI

SDA0 SCL0 SD2_CLK IIS1DO

CMPD IIS1CLK

CMRST SD2_D1 SD2_CMD

CCIRD4 SD2_D2 SD2_D3 SD2_D0

VIO1V8

VDDCORE VSS VDDCORE VSS

VDDCORE VSS VDDCORE VSS

VDDCORE VDDCORE VDDCORE VDDCORE

VDDCORE VSS VSS VDDCORE

VDDCORE VSS VSS VDDCORE

VSS VSS VSS VDDCORE

VSS VSS VSS VDDCORE

VSS VSS VSS VDDCORE

VDDCORE VSS

AVDD1V8_
MPLL

AUD_DAD
TF_DET VSS ADI_SCLK
1

BUA_DET ANA_INT

XTL_BUF_E AUD_ADSY
SDA1 CLK_32K
N NC

AUD_DASY
ADI_D
NC
9 10 11 12
 LVDS/USB/
DDR Digital
CLK
 13 14 15 16

U1RXD U0RTS

VCO_MON
CLK_AUX0 U1TXD U0CTS
ITOR

U0TXD VSS VSS

U0RXD VSS VSS

VSS VSS VSS VSS

AVDD1V2_
TRX

VSS VSS VSS

VDDCORE VDDCORE VDDCORE VSS

VSS VSS VSS

VSS VSS VSS VSS

 VSS VSS VDDCORE VSS

VSS VDDCORE VDDCORE NF_CEN1

VSS VDDCORE VIO1V8 NF_DQS

VSS VSS VIO1V8 NF_RE_T

VDDCORE VDDCORE VDD1

VIO1V8

CLKOUT_T
VSS VSIM0 VSIM1
EST_MPLL

AUD_DAD
VSD0
0

AUD_ADD CHIP_SLEE
SD0_CLK SD0_CMD
0 P

AUD_SCLK EXT_RST_B SD0_D3

13 14 15 16
 17 18 19 20
AVDD3V3_
VSS NC A
BT_PA

VSS BT_TRX_N BT_TRX_P B

VSS VSS VSS FM_LANT C

VSS VSS FM_SANT AVSS_FM D

AVDD1V2_
E
TRX

AVDD1V2_ AVDD1V2_
VSS VSS F
AFE1 AFE2

AVDD1V8_
VDD1 G
PLL

VSS EMZQ H

EMVREF_C
VSS VDDMEM ZQ J
A

NF_DATA_ NF_DATA_
VDDMEM K
1 0
NF_DATA_ NF_DATA_
VDDMEM NF_CEN0 L
3 2

NF_DATA_
NF_WEN_T M
6

NF_DATA_ NF_DATA_
N
5 7

NF_DATA_
NF_CLE NF_ALE NF_RBN P
4

NF_WPN VSS VSS R

VSS USB_DP USB_DM T

SIMCLK1 VDDMEM USB_REXT U

AVDD3V3_ AVDD1V8_
SIMRST1 SIMDAT1 V
USB USB

SD0_D1 SD0_D0 SIMCLK0 SIMRST0 W

SD0_D2 SIMDAT0 NC Y

17 18 19 20
Ball No. Ball Name
LPDDR
L2 EMVREF_DQ
J19 EMVREF_CA
H19 EMZQ
J20 ZQ
EMMC and NAND Interface
K20 NF_DATA_0
K19 NF_DATA_1
L20 NF_DATA_2
L17 NF_DATA_3
P20 NF_DATA_4
N19 NF_DATA_5
M19 NF_DATA_6
N20 NF_DATA_7
L19 NF_CEN0
M16 NF_CEN1
P17 NF_CLE
P18 NF_ALE
P16 NF_RE_T
M17 NF_WEN_T
R17 NF_WPN
P19 NF_RBN
N16 NF_DQS
RF SPI
C4 RFSCK
C2 RFSDA
C3 RFSEN
RF Control
L4 RFCTL0
N4 RFCTL1
M4 RFCTL2
N2 RFCTL3
P3 RFCTL4
N1 RFCTL5
P2 RFCTL6
R1 RFCTL7
R3 RFCTL8
R2 RFCTL9
T2 RFCTL10
P4 RFCTL11
V2 RFCTL16
V1 RFCTL17
U3 RFCTL19
U4 RFCTL20
RFFE
M2 RFFE_SCK
M1 RFFE_SDA
 GPIO
T1 GPIO16
R4 GPIO17
U2 GPIO18
T4 GPIO21
System IO
B13 CLK_AUX0
F6 CLK26M_IN
E4 CLK26M_OUT
U14 CLKOUT_TEST_MPLL
Keypad Interface
W2 KEYOUT0
V3 KEYOUT1
V4 KEYOUT2
U5 KEYOUT3
W3 KEYOUT4
V5 KEYIN0
W4 KEYIN1
Y4 KEYIN2
W5 KEYIN3
Y5 KEYIN4
JTAG
W1 TCK_ARM
Y2 TMS_ARM
LCM Interface
V7 SPI0_DO
W7 SPI0_DI
V8 SPI0_CLK
W6 SPI0_CSN
Y7 SPI0_CD
U6 LCM_RSTN
U7 LCM_FMARK
SDIO Interface
W15 SD0_CLK
W16 SD0_CMD
W18 SD0_D0
W17 SD0_D1
Y17 SD0_D2
Y16 SD0_D3
B11 SD2_CLK
D12 SD2_CMD
E12 SD2_D0
D10 SD2_D1
E10 SD2_D2
E11 SD2_D3
SIM Interface
W19 SIMCLK0
Y19 SIMDAT0
W20 SIMRST0
U17 SIMCLK1
V18 SIMDAT1
V17 SIMRST1
IIS Interface
A12 IIS1DI
B12 IIS1DO
C12 IIS1CLK
A11 IIS1LRCK
UART Interface
C13 U0TXD
D13 U0RXD
B15 U0CTS
A15 U0RTS
B14 U1TXD
A14 U1RXD
ADI Interface
U11 ADI_SCLK
Y10 ADI_D
Y13 AUD_SCLK
W11 AUD_ADSYNC
W13 AUD_ADD0
Y11 AUD_DASYNC
V13 AUD_DAD0
U12 AUD_DAD1
Y14 EXT_RST_B
V11 ANA_INT
W14 CHIP_SLEEP
W12 CLK_32K
U10 VSS
W10 XTL_BUF_EN
Camera Interface
A9 CMMCLK
A8 CMPCLK0
C9 CMPD
D9 CMRST
B10 SCL0
B9 SDA0
W8 SCL1
W9 SDA1
B6 CCIRD0
A6 CCIRD1
B8 CCIRD2
A5 CCIRD3
E9 CCIRD4
E7 CCIRD5
E8 CCIRD6
B5 CCIRD7
D7 CCIRHS
B7 CCIRVS
B3 SCK(G0)
B4 SSN(G0)
E6 SDI_0(G0)
A3 SDI_1(G0)
A2 SDI_2(G0)
B2 SDI_3(G0)
EXTINT
Y8 EXTINT0
U8 EXTINT1
C6 EXTINT5
D6 EXTINT6
U9 TF_DET
V10 BUA_DET
LVDSRF Interface
J2 LVDSRF_UL_N
H2 LVDSRF_UL_P
G1 LVDSRF_DL_PRI_N
G2 LVDSRF_DL_PRI_P
F1 LVDSRF_DL_DIV_N
F2 LVDSRF_DL_DIV_P
E2 LVDSRF_REXT
APC Interface
D3 APCOUT0
D1 APCOUT1
USB2.0 Interface
T19 USB_DP
T20 USB_DM
U19 USB_REXT
BT and FM
B18 BT_TRX_N
B19 BT_TRX_P
D19 FM_SANT
C20 FM_LANT
D20 AVSS_FM
System Power Input
V19 AVDD3V3_USB
V20 AVDD1V8_USB
D4 AVDD1V8_BB
F4 AVDD1V8_BB
G17 AVDD1V8_PLL
T11 AVDD1V8_MPLL
F13 AVDD1V2_TRX
E18 AVDD1V2_TRX
F18 AVDD1V2_AFE1
F19 AVDD1V2_AFE2
A17 AVDD3V3_BT_PA
B16 VCO_MONITOR
C1 VDD1
R15 VDD1
T6 VDD1
G18 VDD1
N15 VIO1V8
P15 VIO1V8
R5 VIO1V8
F8 VIO1V8
F11 VIO1V8
T8 VIO1V8
T15 VIO1V8
V15 VSD0
U15 VSIM0
U16 VSIM1
G7 VDDCORE
G9 VDDCORE
G11 VDDCORE
H7 VDDCORE
H9 VDDCORE
H11 VDDCORE
H13 VDDCORE
H14 VDDCORE
H15 VDDCORE
J8 VDDCORE
J9 VDDCORE
J10 VDDCORE
J11 VDDCORE
J12 VDDCORE
K9 VDDCORE
K12 VDDCORE
L7 VDDCORE
L8 VDDCORE
L9 VDDCORE
L12 VDDCORE
L15 VDDCORE
M12 VDDCORE
M14 VDDCORE
M15 VDDCORE
N12 VDDCORE
N14 VDDCORE
P5 VDDCORE
P7 VDDCORE
P12 VDDCORE
R7 VDDCORE
R9 VDDCORE
R13 VDDCORE
R14 VDDCORE
J18 VDDMEM
K3 VDDMEM
K18 VDDMEM
L3 VDDMEM
L18 VDDMEM
M3 VDDMEM
U18 VDDMEM
Ground
A18 VSS
B17 VSS
C15 VSS
C16 VSS
C17 VSS
C18 VSS
C19 VSS
D2 VSS
D15 VSS
D16 VSS
D17 VSS
D18 VSS
E13 VSS
E14 VSS
E15 VSS
E16 VSS
F5 VSS
F17 VSS
F20 VSS
G3 VSS
G8 VSS
G10 VSS
G12 VSS
G13 VSS
G14 VSS
G15 VSS
H3 VSS
H6 VSS
H8 VSS
H10 VSS
H12 VSS
H16 VSS
H18 VSS
J1 VSS
J3 VSS
J6 VSS
J7 VSS
J13 VSS
J14 VSS
J15 VSS
J17 VSS
K1 VSS
K2 VSS
K6 VSS
K7 VSS
K8 VSS
K10 VSS
K11 VSS
K13 VSS
K14 VSS
K15 VSS
K16 VSS
L6 VSS
L10 VSS
L11 VSS
L13 VSS
L14 VSS
L16 VSS
M6 VSS
M7 VSS
M8 VSS
M9 VSS
M10 VSS
M11 VSS
M13 VSS
N6 VSS
N7 VSS
N8 VSS
N9 VSS
N10 VSS
N11 VSS
N13 VSS
P8 VSS
P9 VSS
P10 VSS
P11 VSS
P13 VSS
P14 VSS
R12 VSS
R18 VSS
R19 VSS
T18 VSS
U13 VSS
NC
A1 NC
A20 NC
Y1 NC
Y20 NC
 Description
LPDDR
reference voltage
reference voltage
LPDDR2 PHY Impedance calibration
LPDDR2 Impedance calibration
EMMC and NAND Interface
NAND data 0
NAND data 1
NAND data 2
NAND data 3
NAND data 4/SPI NAND DATA0
NAND data 5/SPI NAND DATA1
NAND data 6/SPI NAND DATA2
NAND data 7/SPI NAND DATA3
NAND chip select enable 0/SPI NAND SELECT ENABLE 0
NAND chip select enable 1/SPI NAND SELECT ENABLE 1
NAND command latch enable/SPI NAND CLOCK
NAND address latch enable
NAND read enable
NAND write enable
NAND write protect
NAND read/busy
NAND data strobe
RF SPI
RF SPI0 clock output
RF SPI0 data line
RF SPI0 chip select
RF Control
RF control pin 0
RF control pin 1
RF control pin 2
RF control pin 3
RF control pin 4
RF control pin 5
RF control pin 6
RF control pin 7
RF control pin 8
RF control pin 9
RF control pin 10
RF control pin 11
RF control pin 16
RF control pin 17
RF control pin 19
RF control pin 20
RFFE
RFFE clock output
RFFE data line
 GPIO
GPIO 16
GPIO 17
GPIO 18
GPIO 21
System IO
AUX clock 0 output
26M clock input
26M clock output
MPLL clock test point
Keypad Interface
Keypad output 0
Keypad output 1
Keypad output 2
Keypad output 3
Keypad output 4
Keypad input 0
Keypad input 1
Keypad input 2
Keypad input 3
Keypad input 4
JTAG
ARM JTAG test clock input
ARM JTAG test mode select
LCM Interface
SPI data output
SPI data input
SPI data clock output
SPI data chip select
SPI data and command output
LCM reset output
LCM frame mark input
SDIO Interface
SDIO port 0 clock output
SDIO port 0 Command
SDIO port 0 data 0
SDIO port 0 data 1
SDIO port 0 data 2
SDIO port 0 data 3
SDIO port 2 clock output
SDIO port 2 Command
SDIO port 2 data 0
SDIO port 2 data 1
SDIO port 2 data 2
SDIO port 2 data 3
SIM Interface
SIM 0 clock
SIM 0 data line
SIM 0 reset control
SIM 1 clock
SIM 1 data line
SIM 1 reset control
IIS Interface
I2S port 1 data input
I2S port 1 data ouput
I2S port 1 bit clock
I2S port 1 Left/Right clock
UART Interface
UART port 0 TX
UART port 0 RX
UART port 0 CTS
UART port 0 RTS
UART port 1 TX
UART port 1 RX
ADI Interface
ADI synchronous clock
ADI data
Audio synchronous clock
Audio data synchronous singal
Audio ADC data 0
Audio dac synchronous
Audio DAC data 0
Audio DAC data 1
External reset signal input from PMIC
PMIC interrupt input
Chip sleep signal output to PMIC
32K clock input from A die
Ground
system interrupt output pin
Camera Interface
Camera clock output
Camera clock input
Camera power down output
Camera reset output
I2C port 0 clock
I2C port 0 data
I2C port 1 clock
I2C port 1 data
Camera data0
Camera data1
Camera data2
Camera data3
Camera data4
Camera data5
Camera data6
Camera data7
camera horizontal synchronous input
camera vertical synchronous
Camera series clock
Serial synchronous
Camera series data0
Camera series data1
Camera series data2
Camera series data3
EXTINT
External interrupt 0
External interrupt 1
External interrupt 5
External interrupt 6
TF card hot plug detect
Battery remove detect
LVDSRF Interface
LVDSRF TX data negative
LVDSRF TX data positive
LVDSRF Primary RX data negative
LVDSRF Primary RX data positive
LVDSRF Diversity RX data negative
LVDSRF Diversity RX data positive
LVDSRF calibration pin
APC Interface
APC output 0
APC output 1
USB2.0 Interface
USB data positive
USB data negative
USB2.0 calibration pin
BT and FM
BT RF input/output negative
BT RF input/output positive
FM short antenna input
FM long antenna input
FM module anlaog ground
System Power Input
USB 3.3V power supply
USB 1.8V power supply
Baseband DAC & PLL 1.8V analog power supply
Baseband DAC & PLL 1.8V analog power supply
PLL 1.8V analog power supply
MPLL 1.8V analog power supply
1.2V supply for BT TRX and VCO
1.2V supply for BT TRX and VCO
1.2V supply for BT analog front end(ADC/PLL)
1.2V supply forBT analog front end(ADC/PLL)
3.3V supply for BT/WIFI PA
VCO monitor test ball
LPDDR2 VDD1 power input
LPDDR2 VDD1 power input
LPDDR2 VDD1 power input
LPDDR2 VDD1 power input
Power supply for digital IO
Power supply for digital IO
Power supply for digital IO
Power supply for digital IO
Power supply for digital IO
Power supply for digital IO
Power supply for digital IO
Power supply for SDIO0 IO
power supply for SIM0 IO
power supply for SIM1 IO
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
Power supply for core
power supply for core and IO
power supply for core and IO
power supply for core and IO
power supply for core and IO
power supply for core and IO
power supply for core and IO
power supply for core and IO
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
NC
Not Connect
Not Connect
Not Connect
Not Connect
 Coordinates
Ball No. Ball Name
X Y
L4 RFCTL0 -2.6 -0.2
N4 RFCTL1 -2.6 -1
M4 RFCTL2 -2.6 -0.6
N2 RFCTL3 -3.4 -1
P3 RFCTL4 -3 -1.4
N1 RFCTL5 -3.8 -1
P2 RFCTL6 -3.4 -1.4
R1 RFCTL7 -3.8 -1.8
R3 RFCTL8 -3 -1.8
R2 RFCTL9 -3.4 -1.8
T2 RFCTL10 -3.4 -2.2
P4 RFCTL11 -2.6 -1.4
V2 RFCTL16 -3.4 -3
V1 RFCTL17 -3.8 -3
U3 RFCTL19 -3 -2.6
M2 RFFE_SCK -3.4 -0.6
M1 RFFE_SDA -3.8 -0.6
Y8 EXTINT0 -1 -3.8
U8 EXTINT1 -1 -2.6
A12 IIS1DI 0.6 3.8
B12 IIS1DO 0.6 3.4
C12 IIS1CLK 0.6 3
A11 IIS1LRCK 0.2 3.8
V7 SPI0_DO -1.4 -3
W7 SPI0_DI -1.4 -3.4
V8 SPI0_CLK -1 -3
W6 SPI0_CSN -1.8 -3.4
W15 SD0_CLK 1.8 -3.4
W16 SD0_CMD 2.2 -3.4
B11 SD2_CLK 0.2 3.4
D12 SD2_CMD 0.6 2.6
W19 SIMCLK0 3.4 -3.4
W20 SIMRST0 3.8 -3.4
U17 SIMCLK1 2.6 -2.6
V17 SIMRST1 2.6 -3
C13 U0TXD 1 3
D13 U0RXD 1 2.6
B15 U0CTS 1.8 3.4
A15 U0RTS 1.8 3.8
B14 U1TXD 1.4 3.4
A14 U1RXD 1.4 3.8
B13 CLK_AUX0 1 3.4
U11 ADI_SCLK 0.2 -2.6
Y10 ADI_D -0.2 -3.8
Y13 AUD_SCLK 1 -3.8
W11 AUD_ADSYNC 0.2 -3.4
W13 AUD_ADD0 1 -3.4
Y11 AUD_DASYNC 0.2 -3.8
V13 AUD_DAD0 1 -3
U12 AUD_DAD1 0.6 -2.6
Y14 EXT_RST_B 1.4 -3.8
V11 ANA_INT 0.2 -3
W14 CHIP_SLEEP 1.4 -3.4
W12 CLK_32K 0.6 -3.4
B10 SCL0 -0.2 3.4
B9 SDA0 -0.6 3.4
W8 SCL1 -1 -3.4
W9 SDA1 -0.6 -3.4
U6 LCM_RSTN -1.8 -2.6
A1 NC -3.8 3.8
A20 NC 3.8 3.8
Y1 NC -3.8 -3.8
Y20 NC 3.8 -3.8
A18 VSS 3 3.8
B17 VSS 2.6 3.4
C15 VSS 1.8 3
C16 VSS 2.2 3
C17 VSS 2.6 3
C18 VSS 3 3
C19 VSS 3.4 3
D2 VSS -3.4 2.6
D15 VSS 1.8 2.6
D16 VSS 2.2 2.6
D17 VSS 2.6 2.6
D18 VSS 3 2.6
E13 VSS 1 2.2
E14 VSS 1.4 2.2
E15 VSS 1.8 2.2
E16 VSS 2.2 2.2
F5 VSS -2.2 1.8
F17 VSS 2.6 1.8
F20 VSS 3.8 1.8
G3 VSS -3 1.4
G8 VSS -1 1.4
G10 VSS -0.2 1.4
G12 VSS 0.6 1.4
G13 VSS 1 1.4
G14 VSS 1.4 1.4
G15 VSS 1.8 1.4
H3 VSS -3 1
H6 VSS -1.8 1
H8 VSS -1 1
H10 VSS -0.2 1
H12 VSS 0.6 1
H16 VSS 2.2 1
H18 VSS 3 1
J1 VSS -3.8 0.6
J3 VSS -3 0.6
J6 VSS -1.8 0.6
J7 VSS -1.4 0.6
J13 VSS 1 0.6
J14 VSS 1.4 0.6
J15 VSS 1.8 0.6
J17 VSS 2.6 0.6
K1 VSS -3.8 0.2
K2 VSS -3.4 0.2
K6 VSS -1.8 0.2
K7 VSS -1.4 0.2
K8 VSS -1 0.2
K10 VSS -0.2 0.2
K11 VSS 0.2 0.2
K13 VSS 1 0.2
K14 VSS 1.4 0.2
K15 VSS 1.8 0.2
K16 VSS 2.2 0.2
L6 VSS -1.8 -0.2
L10 VSS -0.2 -0.2
L11 VSS 0.2 -0.2
L13 VSS 1 -0.2
L14 VSS 1.4 -0.2
L16 VSS 2.2 -0.2
M6 VSS -1.8 -0.6
M7 VSS -1.4 -0.6
M8 VSS -1 -0.6
M9 VSS -0.6 -0.6
M10 VSS -0.2 -0.6
M11 VSS 0.2 -0.6
M13 VSS 1 -0.6
N6 VSS -1.8 -1
N7 VSS -1.4 -1
N8 VSS -1 -1
N9 VSS -0.6 -1
N10 VSS -0.2 -1
N11 VSS 0.2 -1
N13 VSS 1 -1
P8 VSS -1 -1.4
P9 VSS -0.6 -1.4
P10 VSS -0.2 -1.4
P11 VSS 0.2 -1.4
P13 VSS 1 -1.4
P14 VSS 1.4 -1.4
R12 VSS 0.6 -1.8
R18 VSS 3 -1.8
R19 VSS 3.4 -1.8
T18 VSS 3 -2.2
U13 VSS 1 -2.6
U10 VSS -0.2 -2.6
A2 SDI_2(G0) -3.4 3.8
A3 SDI_1(G0) -3 3.8
A5 CCIRD3 -2.2 3.8
A6 CCIRD1 -1.8 3.8
A8 CMPCLK0 -1 3.8
A9 CMMCLK -0.6 3.8
A17 AVDD3V3_BT_PA 2.6 3.8
B2 SDI_3(G0) -3.4 3.4
B3 SCK(G0) -3 3.4
B4 SSN(G0) -2.6 3.4
B5 CCIRD7 -2.2 3.4
B6 CCIRD0 -1.8 3.4
B7 CCIRVS -1.4 3.4
B8 CCIRD2 -1 3.4
B16 VCO_MONITOR 2.2 3.4
B18 BT_TRX_N 3 3.4
B19 BT_TRX_P 3.4 3.4
C1 VDD1 -3.8 3
C2 RFSDA -3.4 3
C3 RFSEN -3 3
C4 RFSCK -2.6 3
C6 EXTINT5 -1.8 3
C9 CMPD -0.6 3
C20 FM_LANT 3.8 3
D1 APCOUT1 -3.8 2.6
D3 APCOUT0 -3 2.6
D4 AVDD1V8_BB -2.6 2.6
D6 EXTINT6 -1.8 2.6
D7 CCIRHS -1.4 2.6
D9 CMRST -0.6 2.6
D10 SD2_D1 -0.2 2.6
D19 FM_SANT 3.4 2.6
D20 AVSS_FM 3.8 2.6
E2 LVDSRF_REXT -3.4 2.2
E4 CLK26M_OUT -2.6 2.2
E6 SDI_0(G0) -1.8 2.2
E7 CCIRD5 -1.4 2.2
E8 CCIRD6 -1 2.2
E9 CCIRD4 -0.6 2.2
E10 SD2_D2 -0.2 2.2
E11 SD2_D3 0.2 2.2
E12 SD2_D0 0.6 2.2
E18 AVDD1V2_TRX 3 2.2
 F1 LVDSRF_DL_DIV_N -3.8 1.8
F2 LVDSRF_DL_DIV_P -3.4 1.8
F4 AVDD1V8_BB -2.6 1.8
F6 CLK26M_IN -1.8 1.8
F8 VIO1V8 -1 1.8
F11 VIO1V8 0.2 1.8
F13 AVDD1V2_TRX 1 1.8
F18 AVDD1V2_AFE1 3 1.8
F19 AVDD1V2_AFE2 3.4 1.8
G1 LVDSRF_DL_PRI_N -3.8 1.4
G2 LVDSRF_DL_PRI_P -3.4 1.4
G7 VDDCORE -1.4 1.4
G9 VDDCORE -0.6 1.4
G11 VDDCORE 0.2 1.4
G17 AVDD1V8_PLL 2.6 1.4
G18 VDD1 3 1.4
H2 LVDSRF_UL_P -3.4 1
H7 VDDCORE -1.4 1
H9 VDDCORE -0.6 1
H11 VDDCORE 0.2 1
H13 VDDCORE 1 1
H14 VDDCORE 1.4 1
H15 VDDCORE 1.8 1
H19 EMZQ 3.4 1
J2 LVDSRF_UL_N -3.4 0.6
J8 VDDCORE -1 0.6
J9 VDDCORE -0.6 0.6
J10 VDDCORE -0.2 0.6
J11 VDDCORE 0.2 0.6
J12 VDDCORE 0.6 0.6
J18 VDDMEM 3 0.6
J19 EMVREF_CA 3.4 0.6
J20 ZQ 3.8 0.6
K3 VDDMEM -3 0.2
K9 VDDCORE -0.6 0.2
K12 VDDCORE 0.6 0.2
K18 VDDMEM 3 0.2
K19 NF_DATA_1 3.4 0.2
K20 NF_DATA_0 3.8 0.2
L2 EMVREF_DQ -3.4 -0.2
L3 VDDMEM -3 -0.2
L7 VDDCORE -1.4 -0.2
L8 VDDCORE -1 -0.2
L9 VDDCORE -0.6 -0.2
L12 VDDCORE 0.6 -0.2
L15 VDDCORE 1.8 -0.2
L17 NF_DATA_3 2.6 -0.2
L18 VDDMEM 3 -0.2
L19 NF_CEN0 3.4 -0.2
L20 NF_DATA_2 3.8 -0.2
M3 VDDMEM -3 -0.6
M12 VDDCORE 0.6 -0.6
M14 VDDCORE 1.4 -0.6
M15 VDDCORE 1.8 -0.6
M16 NF_CEN1 2.2 -0.6
M17 NF_WEN_T 2.6 -0.6
M19 NF_DATA_6 3.4 -0.6
N12 VDDCORE 0.6 -1
N14 VDDCORE 1.4 -1
N15 VIO1V8 1.8 -1
N16 NF_DQS 2.2 -1
N19 NF_DATA_5 3.4 -1
N20 NF_DATA_7 3.8 -1
P5 VDDCORE -2.2 -1.4
P7 VDDCORE -1.4 -1.4
P12 VDDCORE 0.6 -1.4
P15 VIO1V8 1.8 -1.4
P16 NF_RE_T 2.2 -1.4
P17 NF_CLE 2.6 -1.4
P18 NF_ALE 3 -1.4
P19 NF_RBN 3.4 -1.4
P20 NF_DATA_4 3.8 -1.4
R4 GPIO17 -2.6 -1.8
R5 VIO1V8 -2.2 -1.8
R7 VDDCORE -1.4 -1.8
R9 VDDCORE -0.6 -1.8
R13 VDDCORE 1 -1.8
R14 VDDCORE 1.4 -1.8
R15 VDD1 1.8 -1.8
R17 NF_WPN 2.6 -1.8
T1 GPIO16 -3.8 -2.2
T4 GPIO21 -2.6 -2.2
T6 VDD1 -1.8 -2.2
T8 VIO1V8 -1 -2.2
T11 AVDD1V8_MPLL 0.2 -2.2
T15 VIO1V8 1.8 -2.2
T19 USB_DP 3.4 -2.2
T20 USB_DM 3.8 -2.2
U2 GPIO18 -3.4 -2.6
U4 RFCTL20 -2.6 -2.6
U5 KEYOUT3 -2.2 -2.6
U7 LCM_FMARK -1.4 -2.6
U9 TF_DET -0.6 -2.6
U14 CLKOUT_TEST_MPLL 1.4 -2.6
U15 VSIM0 1.8 -2.6
U16 VSIM1 2.2 -2.6
U18 VDDMEM 3 -2.6
U19 USB_REXT 3.4 -2.6
V3 KEYOUT1 -3 -3
V4 KEYOUT2 -2.6 -3
V5 KEYIN0 -2.2 -3
V10 BUA_DET -0.2 -3
V15 VSD0 1.8 -3
V18 SIMDAT1 3 -3
V19 AVDD3V3_USB 3.4 -3
V20 AVDD1V8_USB 3.8 -3
W1 TCK_ARM -3.8 -3.4
W2 KEYOUT0 -3.4 -3.4
W3 KEYOUT4 -3 -3.4
W4 KEYIN1 -2.6 -3.4
W5 KEYIN3 -2.2 -3.4
W10 XTL_BUF_EN -0.2 -3.4
W17 SD0_D1 2.6 -3.4
W18 SD0_D0 3 -3.4
Y2 TMS_ARM -3.4 -3.8
Y4 KEYIN2 -2.6 -3.8
Y5 KEYIN4 -2.2 -3.8
Y7 SPI0_CD -1.4 -3.8
Y16 SD0_D3 2.2 -3.8
Y17 SD0_D2 2.6 -3.8
Y19 SIMDAT0 3.4 -3.8
Ball No. STDLIB pin name
C4 RFSCK
C2 RFSDA
C3 RFSEN
M2 RFFE_SCK
M1 RFFE_SDA
Y8 EXTINT0/EXT_XTL_EN0/GPIO45
U8 EXTINT1/CMPCLK1/CLK_AUX1/GPIO46
A12 IIS1DI/KEYIN6/GPIO87
B12 IIS1DO/KEYOUT6/GPIO88
C12 IIS1CLK/KEYOUT7/GPIO89
A11 IIS1LRCK/KEYIN7/EXT_XTL_EN1/GPIO90
W1 TCK_ARM/GPIO26
Y2 TMS_ARM/GPIO27
V5 KEYIN0
W4 KEYIN1
Y4 KEYIN2
W2 KEYOUT0/GPIO28
V3 KEYOUT1/GPIO29
V4 KEYOUT2/GPIO30
V7 SPI0_DO/LCMD5G1/GPIO41
W7 SPI0_DI/LCMD6G1/GPIO42
V8 SPI0_CLK/LCMD7G1/GPIO43
W6 SPI0_CSN/LCM_CS/GPIO40
W16 SD0_CMD/GPIO53
W18 SD0_D0/GPIO54
W17 SD0_D1/GPIO55
Y17 SD0_D2/GPIO52
Y16 SD0_D3/GPIO51
B11 SD2_CLK/SPI1_CLK/GPIO91
D12 SD2_CMD/SPI1_DI/GPIO92
E12 SD2_D0/SPI1_DO/GPIO93
D10 SD2_D1/GPIO94
E10 SD2_D2/GPIO95
E11 SD2_D3/SPI1_CSN/GPIO96
W19 SIMCLK0/GPIO57
Y19 SIMDAT0/GPIO58
W20 SIMRST0/GPIO59
U17 SIMCLK1/GPIO60
V18 SIMDAT1/GPIO61
V17 SIMRST1/GPIO62
C13 U0TXD/EXT_XTL_EN2/GPIO80
D13 U0RXD/EXT_XTL_EN3/GPIO81
B15 U0CTS/PWMC/GPIO82
A15 U0RTS/EXTINT7/GPIO83
B14 U1TXD/GPIO84
A14 U1RXD/GPIO85
B13 CLK_AUX0/GPIO86
U11 ADI_SCLK
Y10 ADI_D
Y13 AUD_SCLK
W11 AUD_ADSYNC
W13 AUD_ADD0
Y11 AUD_DASYNC
V13 AUD_DAD0
U12 AUD_DAD1
Y14 EXT_RST_B
V11 ANA_INT
W14 CHIP_SLEEP
W12 CLK_32K
C9 CMPD/GPIO101
D9 CMRST/GPIO100
B10 SCL0/GPIO97
B9 SDA0/GPIO98
W8 SCL1/GPIO47
W9 SDA1/GPIO48
U7 LCM_FMARK/GPIO39
U6 LCM_RSTN/GPIO38
H2 LVDSRF_UL_P
J2 LVDSRF_UL_N
G2 LVDSRF_DL_PRI_P
G1 LVDSRF_DL_PRI_N
F2 LVDSRF_DL_DIV_P
F1 LVDSRF_DL_DIV_N
U19 USB_REXT
V20 AVDD1V8_USB
V19 AVDD3V3_USB
U10 VSS
D2 VSS
F5 VSS
G3 VSS
H3 VSS
J1 VSS
H16 VSS
A1 NC
A2 SDI_2G0/LCMD3G1/GPIO119
A3 SDI_1G0/LCMD1G1/IIS2DI/GPIO117
A5 CCIRD3/LCMD3G0/SDI_3G1/GPIO108
A6 CCIRD1/LCMD1G0/SDI_1G1/GPIO106
A8 CMPCLK0/SCKG1/GPIO102
A9 CMMCLK/CLK_AUX2/DTCK/GPIO99
A17 AVDD3V3_BT_PA
A18 VSS
A20 NC
B2 SDI_3G0/LCMD4G1/GPIO0
B3 SCKG0/LCMD2G1/IIS2CLK/GPIO118
B4 SSNG0/LCMWRG1/IIS2LRCK/GPIO115
B5 CCIRD7/LCMD7G0/GPIO112
B6 CCIRD0/LCMD0G0/SDI_0G1/GPIO105
B7 CCIRVS/LCMWRG0/SSNG1/GPIO103
B8 CCIRD2/LCMD2G0/SDI_2G1/GPIO107
B16 VCO_MONITOR
B17 VSS
B18 BT_TRX_N
B19 BT_TRX_P
C1 VDD1
C6 EXTINT5/LCMRDG1/GPIO113
C15 VSS
C16 VSS
C17 VSS
C18 VSS
C19 VSS
C20 FM_LANT
D1 APCOUT1
D3 APCOUT0
D4 AVDD1V8_BB
D6 EXTINT6/GPIO114
D7 CCIRHS/LCMRDG0/GPIO104
D15 VSS
D16 VSS
D17 VSS
D18 VSS
D19 FM_SANT
D20 AVSS_FM
E2 LVDSRF_REXT
E4 CLK26M_OUT
E6 SDI_0G0/LCMD0G1/IIS2DO/GPIO116
E7 CCIRD5/LCMD5G0/GPIO110
E8 CCIRD6/LCMD6G0/GPIO111
E9 CCIRD4/LCMD4G0/GPIO109
E13 VSS
E14 VSS
E15 VSS
E16 VSS
E18 AVDD1V2_TRX
 F4 AVDD1V8_BB
F6 CLK26M_IN
F8 VIO1V8
F11 VIO1V8
F13 AVDD1V2_TRX
F17 VSS
F18 AVDD1V2_AFE1
F19 AVDD1V2_AFE2
F20 VSS
G7 VDDCORE
G8 VSS
G9 VDDCORE
G10 VSS
G11 VDDCORE
G12 VSS
G13 VSS
G14 VSS
G15 VSS
G17 AVDD1V8_PLL
G18 VDD1
H6 VSS
H7 VDDCORE
H8 VSS
H9 VDDCORE
H10 VSS
H11 VDDCORE
H12 VSS
H13 VDDCORE
H14 VDDCORE
H15 VDDCORE
H18 VSS
H19 EMZQ
J3 VSS
J6 VSS
J7 VSS
J8 VDDCORE
J9 VDDCORE
J10 VDDCORE
J11 VDDCORE
J12 VDDCORE
J13 VSS
J14 VSS
J15 VSS
J17 VSS
J18 VDDMEM
J19 EMVREF_CA
J20 ZQ
K1 VSS
K2 VSS
K3 VDDMEM
K6 VSS
K7 VSS
K8 VSS
K9 VDDCORE
K10 VSS
K11 VSS
K12 VDDCORE
K13 VSS
K14 VSS
K15 VSS
K16 VSS
K18 VDDMEM
K19 NF_DATA_1/GPIO78
K20 NF_DATA_0/GPIO77
L2 EMVREF_DQ
L3 VDDMEM
L4 RFCTL0/GPIO4
L6 VSS
L7 VDDCORE
L8 VDDCORE
L9 VDDCORE
L10 VSS
L11 VSS
L12 VDDCORE
L13 VSS
L14 VSS
L15 VDDCORE
L16 VSS
L17 NF_DATA_3/GPIO74
L18 VDDMEM
L19 NF_CEN0/SPI_CS0/GPIO79
L20 NF_DATA_2/GPIO76
M3 VDDMEM
M4 RFCTL2/GPIO6
M6 VSS
M7 VSS
M8 VSS
M9 VSS
M10 VSS
M11 VSS
M12 VDDCORE
M13 VSS
M14 VDDCORE
M15 VDDCORE
M16 NF_CEN1/SPI_CS1/GPIO73
M17 NF_WEN_T/GPIO72
M19 NF_DATA_6/SPI_D2/GPIO70
N1 RFCTL5/GPIO9
N2 RFCTL3/GPIO7
N4 RFCTL1/GPIO5
N6 VSS
N7 VSS
N8 VSS
N9 VSS
N10 VSS
N11 VSS
N12 VDDCORE
N13 VSS
N14 VDDCORE
N15 VIO1V8
N16 NF_DQS/GPIO71
N19 NF_DATA_5/SPI_D1/GPIO68
N20 NF_DATA_7/SPI_D3/GPIO69
P2 RFCTL6/GPIO10
P3 RFCTL4/GPIO8
P4 RFCTL11/EXTINT2/GPIO15
P5 VDDCORE
P7 VDDCORE
P8 VSS
P9 VSS
P10 VSS
P11 VSS
P12 VDDCORE
P13 VSS
P14 VSS
P15 VIO1V8
P16 NF_RE_T/GPIO75
P17 NF_CLE/SPI_CLK/GPIO65
P18 NF_ALE/GPIO66
P19 NF_RBN/GPIO64
P20 NF_DATA_4/SPI_D0/GPIO67
R1 RFCTL7/GPIO11
R2 RFCTL9/GPIO13
R3 RFCTL8/GPIO12
R4 GPIO17/PWMA/KEYIN5
R5 VIO1V8
R7 VDDCORE
R9 VDDCORE
R12 VSS
R13 VDDCORE
R14 VDDCORE
R15 VDD1
R17 NF_WPN/GPIO63
R18 VSS
R19 VSS
T1 GPIO16/SIM_DET0
T2 RFCTL10/GPIO14
T4 GPIO21/SIM_DET1
T6 VDD1
T8 VIO1V8
T11 AVDD1V8_MPLL
T15 VIO1V8
T18 VSS
T19 USB_DP
T20 USB_DM
U2 GPIO18/PWMB/KEYOUT5
U3 RFCTL19/U2TXD/GPIO22
U4 RFCTL20/U2RXD/GPIO23
U5 KEYOUT3/GPIO31
U9 TF_DET/GPIO49
U13 VSS
U14 CLKOUT_TEST_MPLL
U15 VSIM0
U16 VSIM1
U18 VDDMEM
V1 RFCTL17/EXTINT4/GPIO20
V2 RFCTL16/EXTINT3/GPIO19
V10 BUA_DET/GPIO50
V15 VSD0
W3 KEYOUT4/GPIO32
W5 KEYIN3/SCL2/GPIO36
W10 XTL_BUF_EN
W15 SD0_CLK/GPIO56
Y1 NC
Y5 KEYIN4/SDA2/GPIO37
Y7 SPI0_CD/LCM_CD/GPIO44
Y20 NC