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DESCRIPTION
The UTC BT169 is glass passivated, sensitive gate
thyristors in a plastic envelope, intended for use in
general purpose switching and phase control
applications. These devices are intended to be
interfaced directly to microcontrollers, logic integrated
circuits and other low power gate trigger circuits.
1
TO-92
THERMAL RESISTANCES
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
Thermal resistance junction to lead Rth j-lead 60 K/W
Thermal resistance junction to Rth j-a pcb mounted; 150 K/W
ambient lead length=4mm
ITSM / A
Ptot / W Tc(max) / C 10
0.8 77
conduction form a=1.57 IT ITSM
0.7 angle factor 83
degrees a 1.9 8
0.6 30 4
89 T
60 2.8 2.2
90 2.2 2.8 time
0.5 120 1.9 95 6 Tj initial=25¢XC max
180 1.57
0.4 101
4
4
0.3 107
0.2 113 2
0.1 119
0 125 0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 1 10 100 1000
IF(AV) / A
Number of half cycles at 50Hz
FIG.1 Maximum on-state dissipation, P tot , versus average FIG.4 Maximnum permissible non-repetitive peak on-state current
on-state current, I T(AV) , where a=form factor=I T(RMS) / IT(AV) ITSM , versus number of cycles, for sinusoidal currents, f = 50Hz.
IT(RMS) / A
ITSM / A 2.0
1000
1.5
100
IT ITSM 1.0
10
T
time 0.5
Tj initial=25¢XC max
1 0
10µs 100µs 1ms 10ms 0.01 0.1 1.0 10
T/s
surge duration / s
FIG.2 Maximum permissible non-repetitive peak on-state current FIG.5 Maximum permissible repetitive rms on-state current I T(RMS) ,
ITSM ,versus pulse width tp,for sinusoidal currents, t p <=10ms. versus surge duration, for sinusoidal currents, f= 50Hz; Tlead<=83¢XC
IT(RMS) / A VGT(Tj)
1.0
VGT(25¢XC)
83¢XC 1.6
0.8
1.4
0.6 1.2
1.0
0.4
0.8
0.2
0.6
0 0.4
-50 50 0 100 150 -50 0 50 100 150
Tlead / C Tj / C
FIG.3 Maximum permissible rms current I T(RMS) , versus FIG.6 Normalised gate trigger voltage V GT (Tj)/V GT( 25¢XC),
lead temperature, Tlead versus junction temperature Tj
IGT(Tj) IT / A
VGT(25¢XC) 5
3.0 Tj=125¢XC - - -
Tj= 25¢XC
2.5 4
Vo=1.067V typ max
2.0 Rs=0.187Ω
3
1.5
2
1.0
0.5 1
0
-50 0 50 100 150 0
Tj / C 0 0.5 1.0 1.5 2.0
VT / V
I (Tj)/IGT(25¢XC),
FIG.7 Normalised gate trigger current GT
FIG.10 Typical and maximum on-state characteristic.
versus junction temperature Tj
1.0 PD
tp
0.1
0.5
0 t
-50 0 50 100 150 0.01
Tj / C
10us 0.1ms 1ms 10ms 0.1s 1s 10s
tp / s
FIG.8 Normalised latching current L(I Tj)/IL(25¢XC),versus
junction temperature Tj, RGK= 1KΩ FIG.11 Transient thermal impedance Zth j-lead, versus pulse width tp.
IH(Tj)
IH(25¢XC) dVD/dt(V/us)
3.0 1000
2.5
2.0 100
RGK=1KΩ
1.5
1.0 10
0.5
0 1
-50 0 50 100 150 0 0 50 150
Tj / C Tj / C
FIG.9 Normalised holding current HI (Tj)/IH(25¢XC),versus FIG.12 Typical, critical rate of rise of off-state voltage,
junction temperature Tj, RGK=1KΩ dVD/dt versus junction temperature Tj.
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