Ch03 Addressing Modes

Chapter 3
8088/8086 Assembly Language Programming
The Addressing Modes
µProcessors & Assembly Language Dr. Bassel Soudan 1
Assembly Language
• The native language for all microprocessors is
machine language.
– However, machine language is very difficult to
deal with.
– Therefore, a matching symbolic language was
created – Assembly Language.
• The assembly language instructions are identical to
those of the processor’s machine language – except in
symbolic form.
• Each machine language instruction has a single unique
matching assembly language instruction (and vice
versa).

Assembly Language Instruction
• Every assembly language instruction is made up of 2
parts:
– Mnemonic (Opcode) – Symbolic name for the operation the
instruction performs.
– Operands – Specifiers for where the data for the instruction
is coming from (sources) and where are the results going to
go (destination).
• Two optional parts can be added to the instruction for

readability:
– Label – Symbolic name for the address of the instruction.
– Comment – textual description of what is the instruction
being used for.
Example Instructions
ADD AX, BX ; Add variable X to Y
Opcode Operands Comment
– The Opcode for this instruction is ADD.

– The sources for the data are the AX and BX registers.
– The destination for the result is AX.
– The meaning of the instruction is:
Add the value in register BX to the value in register AX.
– The comment indicates that register BX has the value of
variable X and it is being added to variable Y which is in AX.

Example Instructions
START: MOV AX, BX ; Keep a copy of X
Label Operands Comment

Opcode
– An instruction may be preceded by a label.
• A label is a symbolic name for the address of this
instruction.
• It allows other parts of the program to refer to this point
without having to know the exact address.
– Extremely useful for loops
– This instruction copies the contents of BX to AX.
• The comment indicates that this is being done for safe
keeping.
The 8088/8086 Instruction Set

• The 8088 and 8086 can implement 117 different
instructions.
• These instructions are grouped into six major
categories:
– Data Transfer Instructions
– Arithmetic Instructions
– Logic Instructions
– String Operation Instructions
– Control Transfer Instructions
– Processor Control Instructions.

The 8088/8086 Addressing Modes
• Each instruction may operate on data in different
locations.
– For example, an instruction may operate on data that exists
in a register or in a memory location.
• The method of specifying the location of the data is called
the addressing mode of the instruction.
• The 8088 and 8086 instructions can handle three types of

data:
– Data stored in registers
• Register Operands
– Data given as part of the instruction
• Immediate Operands
– Data stored in memory
• Memory Operands
The MOV Instruction

• To assist in explaining the different addressing
modes, we will use the MOV instruction.
– The MOV instruction allows copying data from the
source to a destination.
– A very versatile instruction that allows operating
on many data types and on data in basically all
possible locations.
Mnemonic Meaning Format operation Flags affected

MOV Copy MOV D, S D←S None

Register Operand Addressing
• Most of the operations are done on values stored
in the internal registers of the microprocessor.
– Therefore, almost every assembly language
instruction will need a way to access values in
registers.
• Values in registers are accessed by specifying

the register’s name in the operands section of an
instruction.
– Some instructions operate only on data in
registers while others combine data in registers
with other types of data.
• Instructions that operate only on data in registers are
called register addressing mode instruction.
Register Addressing Mode

• All sources of the instruction are registers.
• The destination of the result is also a register.
• All user accessible registers can be specified as

source or destination.
– Only the Data Registers can be accessed as byte
(8 bits) or word (16 bits).
• All other registers can only be accessed as words
(16 bits).
• Operand sizes must match.

Register Mode Example
MPU Main Memory
0100 IP
Address Memory Instruction
Content
0100 CS
0200 DS 01100 8C MOV DX, CS
SS
ES 01101 CA
01102 Next Instruction

AX
BX
CX
xxxx DX
SP
BP 02000 xx
SI
DI 02001 xx
Register Mode Example

MPU Main Memory
IP
Content
CS
DS 01100 8C MOV DX, CS
SS
ES 01101 CA

AX
BX
CX
DX
SP
BP 02000 xx
SI
DI 02001 xx

Register Mode Exception
• Some instruction use registers implicitly.
– For example, multiplication results always go to
registers AX and DX. Can not change this
combination.
• Reason: To save machine language
combinations.
• Disadvantage: programmer/compiler restricted.
• Some of these were removed in later versions of

the x86 architecture.
Immediate Addressing Mode

MOV AX, 15H
• One of the operands is available immediately as

part of the instruction.
– The immediate operand is constant data.
• The data is fixed at the time the program is written and
will not change from execution to execution.
• Used to implement high level language initialization
statements like: a = 21;
– Immediate should match size of other operand.
Opcode Immediate operand

Immediate Mode Example
MPU Main Memory
0000 IP
Content
0100 CS
DS 01000 B0 MOV AH, 15H
SS
ES 01001 15

xx AX
BX
CX
DX
SP
BP
SI
DI

MPU Main Memory
IP
Content
CS
DS 01000 B0 MOV AH, 15H
SS
ES 01001 15

AX
BX
CX
DX
SP
BP
SI
DI

• Write a set of instructions to store the value
1245H into register CX.
Addressing Operands in Memory

• There are five modes for addressing operands
stored in memory:
1. Direct Addressing
2. Register Indirect Addressing
3. Based Addressing
4. Indexed Addressing
5. Based-indexed Addressing

Addressing Operands in Memory
• To reference an operand in memory, the
8088/8086 must calculate the physical address
(PA) for the operand and then initiate a read or
write operations of this storage location
• PA is computed from a Segment Base Address

(SBA) and an offset.
• The different memory addressing modes differ in

how you specify the SBA and the offset.
Direct Addressing Mode

MOV AX, [1234H]
• The offset is a constant determined at program

time and is given explicitly in the instruction.
• The brackets around the number tell the assembler that
this is a direct mode instruction and not an immediate
mode.
– The offset is taken to be from the start of the Data
Segment.
– Therefore, the PA addressed in this instruction is
DS:1234H

Direct Mode Example
Main Memory
MPU
IP Address Memory Instruction
0000 Content
0100 CS 01000 8B MOV CX, [1234H]

0200 DS 01001 0E
SS 01002 34
ES
01003 12
AX 01004 xx
BX
xxxx CX 02000 xx
DX 02001 xx
SP 03234 ED
BP 03235 FE
SI
DI
Direct Mode Example

Main Memory
MPU
Content
CS 01000 8B MOV CX, [1234H]

DS 01001 0E
SS 01002 34
ES
01003 12
AX 01004 xx
BX
CX 02000
DX 02001
SP 03234
BP 03235
SI
DI

Register Indirect Addressing Mode
MOV AX, [SI]
• The offset is taken from a register.

– The offset is no longer fixed. It is now dynamic.
– Only a specific set of registers can be used to hold
the offset:
• BX, BP, SI, and DI.
• The offset is taken from the start of the Stack Segment if
BP is used. Otherwise it’s the Data Segment.
– Useful for implementing pointer operations in high
level languages:
a = *b;
Register Indirect Mode Example

Main Memory
MPU
0000 Content
0100 CS 01000 8B MOV AX, [SI]

0200 DS 01001 04
SS 01002 xx
ES
01003 xx
xxxx AX 01004 xx
BX
CX 02000 xx
DX 02001 xx
SP 03234 ED
BP 03235 FE
1234H SI
DI

Register Indirect Mode Example
Main Memory
MPU
Content
0100 CS 01000 8B MOV AX, [SI]

0200 DS 01001 04
SS 01002 xx
ES
01003 xx
AX 01004 xx
BX
CX 02000 xx
DX 02001 xx
SP 03234 ED
BP 03235 FE
SI
DI
Based Addressing Mode

• The offset is generated by adding either a direct
or indirect displacement to a base register.
– Allows for accessing elements of an array.

• To implement a[6] in a high level language, a base
register is used to hold the address of a[0] and a direct
offset (6) is used to reach the actual element.
• To implement a[i], a base register is used to hold the
address of a[0] and an indirect displacement is used to
specify the i.
– To access the next element in the array, the register
holding the indirect displacement is simply incremented.

Based Addressing Mode
MOV [BX]+1234H, AL
• The offset is generated by adding either a direct

or indirect displacement to a base register.
– Only the base register BX or base pointer BP can
be used as the base.
– The displacement can be:
• A 16 bit direct displacement.
• An indirect displacement from one of the 4 registers BX,
BP, SI, and DI.
• The offset is taken from the start of the Stack Segment if
Based Addressing Mode Example 1

Main Memory
MPU
0000 Content
0100 CS 01000 88 MOV [BX]+1234H, AL

0200 DS 01001 87
SS 01002 34
ES
01003 12
BE ED AX 01004 xx
1000 BX
CX 02000 xx
DX 02001 xx
SP 03234 xx
BP 03235 xx
SI
DI

Main Memory
MPU
Content
0100 CS 01000 88 MOV [BX]+1234H, AL

0200 DS 01001 87
SS 01002 34
ES
01003 12
AX 01004 xx
BX
CX 02000
DX 02001
SP 03234
BP 03235
SI
DI

Main Memory
MPU
0000 Content
0100 CS 01000 88 MOV [BX]+[SI], AX

0200 DS 01001 87
SS 01002 34
ES
01003 12
BEED AX 01004 xx
1000 BX
CX 02000 xx
DX 02001 xx
SP 03234 xx
BP 03235 xx
1234 SI
DI

Main Memory
MPU
0000 Content
0100 CS 01000 88 MOV [BX]+[SI], AX

0200 DS 01001 87
SS 01002 34
ES
01003 12
AX 01004 xx
BX
CX 02000
DX 02001
SP 03234
BP 03235
SI
DI
Indexed Addressing Mode

MOV AL, [SI]+1234H
• The offset is generated by either adding a direct

or indirect displacement to an index register.
– Only the Source Index (SI) or Destination Index
(DI) registers can be used.
– The displacement can be:
• A 16 bit direct displacement.
• An indirect displacement from one of BX, BP, SI, and DI.
– The offset is taken from the start of the Stack Segment if
– Another method for accessing array elements.

Indexed Addressing Mode Example 1
Main Memory
MPU
0000 Content
0100 CS 01000 8A MOV AL, [SI]+1234H

0200 DS 01001 84
SS 01002 34
ES
01003 12
xx xx AX 01004 xx
BX
CX 02000 xx
DX 02001 xx
SP 05234 BE
BP 05235 xx
2000 SI
DI
Indexed Addressing Mode Example 1

Main Memory
MPU
Content
0100 CS 01000 8A MOV AL, [SI]+1234H

0200 DS 01001 84
SS 01002 34
ES
01003 12
AX 01004 xx
BX
CX 02000
DX 02001
SP 05234
BP 05235
SI
DI

Based-Indexed Addressing Mode
MOV AH, [BX][SI]+1234H
• The offset is generated by adding Base register
and Indexed register and an optional immediate
displacement.
– Useful for high level language array operations
like a[i+5].
• The base register would be set to the address of a[0].
• The index register would be used for i.
• The immediate displacement would be the constant
value 5.
– The offset is taken from the start of the Stack

Segment if BP is used. Otherwise it’s the Data
Segment.
Based-Indexed Addressing Mode Example 1

Main Memory
MPU
0000 Content
0100 CS 01000 8A MOV AH, [BX][SI]+1234H

0200 DS 01001 A0
SS 01002 34
ES
01003 12
xx xx AX 01004 xx
1000 BX
CX 02000 xx
DX 02001 xx
SP 06234 BE
BP 06235 ED
2000 SI
DI

Based-Indexed Addressing Mode Example 1
Main Memory
MPU
0000 Content
0100 CS 01000 8A MOV AH, [BX][SI]+1234H

0200 DS 01001 A0
SS 01002 34
ES
01003 12
AX 01004 xx
BX
CX 02000
DX 02001
SP 06234
BP 06235
SI
DI
Based-Indexed Addressing Examples

Assume
CS = 0000H
00040 09
BX = 0040H
SI = 0002H 00041 08
00042 07
ORG 0040H 00043 06
TBL: DB 9, 8, 7 ,6 ,5
00044 05
MOV AX, CS
MOV DS, AX DS = 0000H
MOV AL, [BX]+1
PA = 00000 + 0040 + 1 = 00041 AL = 08
MOV AL, [SI]+TBL
PA = 00000 + 0002 + 0040 = 00042 AL = 07
MOV AL, [BX+SI]+1
PA = 00000 + 0040 + 0002 + 1 = 00043 AL = 06

Memory Addressing Summary
• Direct Addressing
PA = DS : {Direct}

• Register Indirect Addressing
⎧BX ⎫
⎪ ⎪
⎧ SS ⎫ ⎪ BP ⎪
PA = ⎨ ⎬ : ⎨ ⎬
⎩DS⎭ ⎪ SI ⎪
⎪⎩ DI ⎪⎭

• Based Addressing
⎧ SS ⎫ ⎧BX ⎫ ⎧ 8 − bit displacement ⎫

PA = ⎨ ⎬ : ⎨ ⎬ + ⎨ ⎬
⎩ ⎭ ⎩ ⎭ ⎩
DS BP 16 − bit displacement ⎭

• Indexed Addressing
⎧ SI ⎫ ⎧ 8 − bit displacement ⎫
PA = DS : ⎨ ⎬ + ⎨ ⎬
⎩DI⎭ ⎩16 − bit displacement ⎭

• Based Indexed Addressing
⎧ SS ⎫ ⎧BX ⎫ ⎧ SI ⎫ ⎧ 8 − bit displacement ⎫

PA = ⎨ ⎬ : ⎨ ⎬ + ⎨ ⎬ + ⎨ ⎬
⎩ ⎭ ⎩ ⎭ ⎩ ⎭ ⎩
DS BP DI 16 − bit displacement ⎭
The very versatile MOV instruction
Mnemonic Meaning Format operation Flags affected

MOV Copy MOV D, S D←S None
Destination Source
Memory Accumulator
Accumulator Memory
Register Register
Register Memory
Memory Register
Register Immediate
Memory Immediate
Seg-reg Reg16
Seg-reg Mem16
Reg16 Seg-reg
Mem16 Seg-reg

Development of an Assembly Language Program
• An assembly language program passes through

several stages.
• Edit Time – Writing of the source program

– Symbolic Assembly Language
• Output is “prog.asm”
– The program will contain symbolic names such as
labels, named constants, initialized memory
arrays, reserved memory areas, etc.
– Will use symbolic names for instructions.
• What appears to be the same instruction may translate to
different machine codes when addressing mode info is
incorporated.
Development of an Assembly Language Program
• Assembly Time – Translation of the symbolic assembly

language to the matching machine language.
– Labels, symbolic constants, etc. are replaced with their
equivalent values.
– Two output files:
• “prog.lst” – Listing file
– Text file that shows the actual translation of the assembly
language to the matching machine language.
• “prog.obj” – Object file
– Binary program file that will be executed by the processor.
• Link Time – (Optional) combine several files together to
create one executable program.
• Output file “prog.exe”
• Run Time – Actual execution of the machine language on
the microprocessor.
Assembler Directives
• Directives are commands given to the assembler to tell it
what to do.
– They are not part of the program.
• The ORG directive

ORG 1000H
– This directive tells the Assembler where in memory the first
instruction should go.
• The location of all other instructions is determined based on
this.
– Every program needs to start with an ORG.
– It is possible to have multiple ORG directives.
• This will place different sections of the program in different
locations in memory.
• EQU directive
LEN EQU 32
– Used for defining named constants.
– Everywhere the assembler sees the sequence
LEN in the following program, it will replace it with
32.
• This is done before instructions are translated to machine
code.
– Allows for quickly changing sizes of arrays or lists.

• DB Directive
MSG DB ‘hello’
– Define Byte – reserve a sequence of bytes and set them to
the values indicated.
– The first byte will be reserved wherever this directive
appears relative to the ORG.
– Example:
ORG 1000H
MSG: DB ‘hello’
START: MOV AX, MSG
– This program segment will reserve 5 memory locations

starting at offset 1000H and fill them up with the ASCII code
for the characters h e l l o respectively.
– The instruction at the label START sets the AX register to
the address associated with the label MSG.
• The address of the first of the 5 bytes.
• DW Directive
MSG DW 4455H
– Define Word – reserve a sequence of words and set them to
the values indicated.
– The first byte will be reserved wherever this directive
appears relative to the ORG.
– Example:
ORG 1000H
CONST: DW 4455H
START: MOV AX, MSG
– This program segment will reserve the memory location at

offset 1000H and fill it with the value 55H and location at
offset 1001H and fill it with the value 44H.

• RESB Directive
INPUT RESB 5
– Reserve a number of byte sized memory
locations.
– This directive simply reserves the locations. It
does not set their contents.
– Useful for reserving storage space for values that
will be generated during program execution.
– Example usage:
ORG 1000H
INPUT: RESB 5
START: MOV AX, INPUT
MOV [AX], BL ; Save 8 bit value in reserved word
• RESW Directive
INPUT RESW 5
– Reserve a number of word sized memory
locations.
– This directive simply reserves the locations. It
does not set their contents.
– Useful for reserving storage space for values that
will be generated during program execution.
– Example usage:
ORG 1000H
INPUT: RESW 5
START: MOV AX, INPUT
MOV [AX], BX ; Save 16 bit value in reserved word

Operand Specification
• The assembler is smart enough to do some translations
and/or calculations.
• An operand may be specified as one of the following:
– A decimal value (-390 is an acceptable value)
– An ASCII code (‘a’, ‘0’)
– A symbolic name (LEN)
– A simple operation (LEN+2)
• The assembler will replace LEN with its value, add 2 to that
value and use the result in coding the equivalent machine
instruction.
– LEN + 2 is not calculated during assembly not execution.
• The assembler will automatically translate all of these to
Hexadecimal before coding the machine instructions.

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Chapter 3

8088/8086 Assembly Language Programming

The Addressing Modes

µProcessors & Assembly Language Dr. Bassel Soudan 1

µProcessors & Assembly Language Dr. Bassel Soudan 2

• Two optional parts can be added to the instruction for

µProcessors & Assembly Language Dr. Bassel Soudan 3

Opcode Operands Comment

– The Opcode for this instruction is ADD.

µProcessors & Assembly Language Dr. Bassel Soudan 4

Label Operands Comment

The 8088/8086 Instruction Set

µProcessors & Assembly Language Dr. Bassel Soudan 6

• The 8088 and 8086 instructions can handle three types of

µProcessors & Assembly Language Dr. Bassel Soudan 7

The MOV Instruction

Mnemonic Meaning Format operation Flags affected

µProcessors & Assembly Language Dr. Bassel Soudan 8

• Values in registers are accessed by specifying

Register Addressing Mode

• All user accessible registers can be specified as

• Operand sizes must match.

µProcessors & Assembly Language Dr. Bassel Soudan 10

01102 Next Instruction

µProcessors & Assembly Language Dr. Bassel Soudan 11

Register Mode Example

01102 Next Instruction

µProcessors & Assembly Language Dr. Bassel Soudan 12

• Some of these were removed in later versions of

µProcessors & Assembly Language Dr. Bassel Soudan 13

Immediate Addressing Mode

• One of the operands is available immediately as

Opcode Immediate operand

µProcessors & Assembly Language Dr. Bassel Soudan 14

01002 Next Instruction

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Immediate Mode Example

01002 Next Instruction

µProcessors & Assembly Language Dr. Bassel Soudan 16

µProcessors & Assembly Language Dr. Bassel Soudan 17

Addressing Operands in Memory

µProcessors & Assembly Language Dr. Bassel Soudan 18

• PA is computed from a Segment Base Address

• The different memory addressing modes differ in

µProcessors & Assembly Language Dr. Bassel Soudan 19

Direct Addressing Mode

• The offset is a constant determined at program

µProcessors & Assembly Language Dr. Bassel Soudan 20

0100 CS 01000 8B MOV CX, [1234H]

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Direct Mode Example

CS 01000 8B MOV CX, [1234H]

µProcessors & Assembly Language Dr. Bassel Soudan 22

• The offset is taken from a register.

µProcessors & Assembly Language Dr. Bassel Soudan 23

Register Indirect Mode Example

0100 CS 01000 8B MOV AX, [SI]

µProcessors & Assembly Language Dr. Bassel Soudan 24

0100 CS 01000 8B MOV AX, [SI]

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Based Addressing Mode

– Allows for accessing elements of an array.

µProcessors & Assembly Language Dr. Bassel Soudan 26