Programmable Voltage-to-Current Converter with

Linear Voltage Control Resistor

Hong-Wei Huang*, Wei-Lun Hsieh+, Ke-Horng Chen+
*
RichTek Technology Corporation, Hsinchu, Taiwan, R.O.C
+
Department of Electrical and Control Engineering National Chiao Tung University, Hsinchu, Taiwan, R.O.C

Abstract—A programmable voltage-to-current converter with

linear voltage control resistor (VCR) is presented in this
paper. It uses a cascoded flipped voltage follower (CASFVF)
to be the input stage in order to enhance the response time
and accuracy. Programmability is achieved by using the
control signal Vctrl to adjust the equivalent resistance of VCR.
Simulation results in 0.25-μm CMOS technology demonstrate
the high linearity of the proposed voltage-to-current
converter and VCR circuit.
Index Terms—Flipped voltage follower, V-I converter,
voltage control resistor, floating-gate technique.
Fig. 2. Voltage followers. (a) Conventional voltage follower. (b)
I. INTRODUCTION Flipped voltage follower (FVF). (c) Cascoded flipped voltage follower
(CASFVF). (Rout-VF=1/gm1, Rout-FVF=1/(gm1gm2ro1),
In many applications, a precise and stable V-I converter Rout-CASFVF =1/(gm1gm2 gm3ro1ro3) )
is widely used in analog design to implement continuous-
time linear and nonlinear VLSI circuits with programmable II. PROPOSED PROGRAMMABLE V/I CONVERTER
characteristics. Recently, many approaches have been
developed a fixed gain V-I converter input stage with A. Flipped Voltage Follower
programmable gain current mirrors [1-4]. However, those
The voltage follower is used to be a voltage buffer that
structure increase complexity and power dissipation. In
is characterized by very low output impedance, high input
this paper, the block diagram of proposed circuit is shown
impedance and high bandwidth. The several voltage
in Fig. 1. The cascaded flipped voltage follower is used to
follower are shown in Fig. 2 (a)-(c) which are the
be the input stage for enhancing the response time and
conventional voltage follower, flipped voltage follower
accuracy. Moreover, programmability is controlled by
(FVF) and cascoded flipped voltage follower (CASFVF),
linear voltage control resistor and basic current mirror to
respectively [5, 6]. Owing to the constant bias current IB,
achieve Iout = 2KID. K is the ratio of current mirror and ID
the gate-source voltage VGS1 is kept to be a constant
is the drain current of VCR circuit. Hence, not only the
voltage. This causes output signal variations to follow
proposed architecture of programmable V-I converter is
input signal by a level-shifted voltage, VGS1. Compared
simple, but also linearity performance can be achieved.
with each other, CASFVF is much better than others
because the better performance of signal swing, slew rate,
×K bandwidth, power dissipation and the lowest output
Current impedance [5]. That is the reason why we choose the
Vo1 RVCR
Vin1 CASFVF Mirror + CASFVF structure to be the input stage of programmable
Iout V-I converter.
ID Σ B. Schematic of Proposed V-I Converter
Vo2
Vin2 CASFVF Current +
The schematic of proposed programmable V-to-I
VCR Mirror
Circuit converter based on VCR circuit is shown in Fig. 3. By
×K using two CASFVF structures which are composed of
Fig. 1. Block diagram of programmable linear V-to-I converter.
three transistors M1, M2, M5 (M1a, M2a, M5a) and two bias

978-1-4244-1684-4/08/$25.00 ©2008 IEEE 2310

 VDD
(1 : K)

M4 M4a
I0+I1 I0+I1

M5 M5a Iout
Vin1 M1 M1a Vin2
VB VB
ID
Vo1 VCR Vo2
M2 M2a
M3 Vctrl M3a

I1 I1
Fig. 4. Voltage control resistor (VCR) circuit.
( 1 : 1 ) (1 : K )
amplifiers, six resistors, two capacitors, and a NMOS
Fig. 3. Schematic of proposed programmable V-to-I converter based
on the linear voltage control resistor (VCR).
transistor working in triode region. By the control of the
op-amps and components R1~6, the voltages V3 is derived
currents (I1 and I0+I1), the difference voltage between input as:
voltages (Vin1 and Vin2) is equal to the difference voltage
between output voltages (Vo1 and Vo2). Thus, the output V3 = VDS ( M a ) + 2VS , when VDS > 0 and R1~6 = R (3)
current Iout can be generated by utilizing current mirror
transistors M3, 4 and transistors M3a, 4a to sense the current Carefully matching two resistors R5 and R6, then the
ID. The output current is given by: quantity of drain-source voltage VDS(Ma) can be certainly
obtained for voltage V3. Besides, by using two capacitors
Vo1 -Vo2 V -V with the same capacitance (C1=C2=C) to implement the
I out = 2KI D = 2K × = 2K × in1 in2 (1)
R(VCR ) R(VCR ) floating-gate technique [9-11], the gate source voltage of
transistor Ma is given by:

( )
where R(VCR) is the equivalent resistance of VCR circuit. As 1
a result, by using the control signal Vctrl to adjust the value VGS ( M a ) = Vctrl +VDS ( M a ) (4)
2
of equivalent resistance in VCR circuit, the
programmability of output current can be achieved. where Vctrl is the control voltage. According to (2) and (4),
the drain current of transistor Ma is given by:
C. Voltage Control Resistor
⎛1 ⎞
Voltage control resistor (VCR) with electronically I D = β ⎜ Vctrl -Vth ⎟ VDS ( M a ) (5)
variable resistance magnitude is important. Several ⎝ 2 ⎠
literatures [7, 8] have been published for this topic. Obviously, (5) shows the linear relationship between drain
Although a MOSFET operates in triode region is current ID and drain source voltage VDS(Ma). In other words,
equivalent to a resistor, but it contains the non-linear term the VCR circuit is a linear resistor with the value is:
to deteriorate the linearity of the equivalent resistance. In
this paper, a new approach to realize the linearity is 1
R(VCR ) = (6)
proposed. ⎛1 ⎞
β ⎜ Vctrl -Vth ⎟
The drain current of an NMOS transistor that operates in ⎝ 2 ⎠
the triode region can be expressed as:
The value equivalent RVCR is linearly proportional to the
⎡ ⎤
⎣
( ) 1 2
I D = β ⎢ VGS ( M a ) -Vth VDS ( M a ) - VDS
2
(Ma ) ⎥
⎦
(2) value of the control signal Vctrl. Similarly, we can derive
the same result as (6) when the drain-source voltage VDS is
less than zero.
where β=μnCox(W/L), μn is the carrier mobility, Cox is the Besides, in order to keep the linear resistance
oxide capacitance, Vth is the threshold voltage, W and L are characteristic, the condition in (7) must be guaranteed for
the width and length of MOSFET, respectively. In order to ensuring that transistor Ma operates in triode region.
eliminate the non-linear component of (2), i.e. (β/2)VDS2(Ma),
the voltage control resistor circuit is proposed as shown in VGS ( M a ) >VDS ( M a ) +Vth (7)
Fig. 4. This VCR circuit is composed of two operational

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 Current of Transistor Ma (A)
(a)
Fig. 5. Simulation result of voltage control resistor circuit (-0.55 V < VDS = Vin < +0.55 V). (a) ID characteristics with Vctrl as a parameter (from 3 V to
1.6 V with a step of 0.2 V). (b) Derivative of simulation results of Fig. 5(a).
Owing to (4), the minimum value of control signal is:
Vctrl _min = VDS ( M a ) + 2Vth
According to (6) and (8), the maximum equivalent
resistance of proposed VCR circuit is described as:
2 the structure illustration of Section II, the output current
R(VCR )_max =
βVDS ( M a )
III. SIMULATION RESULTS
The proposed programmable V-I converter with linear
voltage control resistor has been simulated by TSMC 0.25-
µm process. The threshold voltages of nMOSFET and
pMOSFET are 0.5 V and 0.6 V, respectively. In order to
achieve low-power specification, the bias current I0 and I1
are designed as 10 µA and 2 µA, respectively. The drain
current ID must be smaller than the bias current I0 to make
sure that all MOSFETs of CASFVF structure operate in
saturation region. In other words, the designed value of
RVCR should have a large value.
Fig. 5 is the simulation result of voltage control resistor
circuit. Owing to the limited condition of input swing in
cascoded flipped voltage follower, the test VDS swing is
from -0.55 V to +0.55 V. Resorted to (8), the minimum
value of control signal, Vctrl_min, is designed to be equal to
1.6 V. Hence, Fig. 5 (a) shows the characteristics of drain
current of transistor Ma with the control signal Vctrl as a
parameter (from 3 V to 1.6 V with a step of 0.2 V). Fig. 5
(b) is the derivative of simulation results in Fig. 5 (a). As
Fig .5 shown, the linearity of proposed voltage control
resistor is demonstrated by the linear relationship between
the drain current ID and the drain-source voltage VDS(Ma).
(b)
Fig. 6 shows the simulation results of the proposed
programmable V-to-I converter with linear VCR circuit (-
(8)
0.55 V < Vin1 – Vin2 =
Vin < +0.55 V). Characteristic of
Iout with Vctrl as a parameter (from 3 V to 1.6 V with a step
of 0.2 V) is shown in Fig. 6 (a), and Fig. 6 (b) is the
derivative of simulation results of Fig. 6 (a). According to
(9)
Iout should be two times the value of drain current of
transistor Ma. It means that the current of Fig. 6 (a) is two
times the value in Fig. 5 (a).
Fig. 7 is the frequency response of proposed
programmable V-to-I converter with linear VCR circuit.
As the waveform shown, the DC gain is increased when
the controlled signal Vctrl increases from 1.6 V to 3 V. It
demonstrates the validity of (1) and programmable char-
acteristic. Besides, the unity gain frequency is about 200
MHz, and it is contributed to enhance the response time.
However, the DC gain of this V-I converter is slightly
lower than that of the previous design owing to the value
of RVCR should be large enough to achieve low power
specification.
IV. CONCLUSIONS
A programmable voltage-to-current converter with
linear voltage control resistor is presented. By using the
cascoded flipped voltage follower to be the input stage,
response time is enhanced as shown in simulation result.
Besides, dependent on the control signal Vctrl, the
equivalent resistance of proposed voltage control resistor
can be programmable for controlling the gain of V-I
converter. Therefore, with the capability of pro-
grammability, the design is more flexible. Simulation
results in 0.25-µm CMOS technology also demonstrate the
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 Vctrl = 3 Vctrl = 3.0

Vctrl = 2.8

Derivative of Output Current (A)

Vctrl = 2.6
Output Current (A)

Vctrl = 2.4

Vctrl = 1.6 Vctrl = 2.2

Vctrl = 2.0

Vctrl = 1.8

Vctrl = 1.6

Differential Input Voltage (V) Differential Input Voltage (V)

(a) (b)
Fig. 6. Simulation results of the proposed programmable linear V-to-I converter (-0.55 V < Vin1 – Vin2 =
Vin < +0.55 V). (a) Output current Iout
characteristics adjusted by the control voltage Vctrl (from 3 V to 1.6 V with a step of 0.2 V). (b) Derivative of simulation results of Fig. 6 (a).

International Symposium on Circuits and Systems, pp. 1372-1375,

Vctrl = 3
May 1992.
Magnitude Plot
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Vctrl = 3
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