Semester II

Subject : Advanced Digital Signal Processing Hours Per

Week : 04

Subject Code : 09MECSV21 Credits :

05

Chapter1
Review of digital Filters

Chapter2
Basic multirate operations, polyphase representation, multistage
implementations.
Lab excersice on the above topics

Chapter3
A Simple alias free QMF system, Power symmetric QMF banks, perfect
reconstruction (PR) systems, tree structured filter banks.

Lab excersice on the above topics

Chapter4
Two channel FIR paraunitary QMF banks, M-Channel FIR paraunitary filter
banks.

Chapter5
Lattice structure for linear phase FIR PR QMF banks.
Lab excersice on the above topics

Chapter6
Cosine modulated filter banks, design of psuedo QMF bank, efficient
polyphase structures.

Chapter7
The Wavelet transform and its relations to multirate filter banks.

Lab excersice on the above topics

Text Books:
1)”Multirate Systems and Filter Banks” By Vaidyanathan PP
2)”Multirate Digital Signal Processing” By Filege N.J & Johan Wiley,

1
Subject : Analog and Mixed VLSI design Hours Per
Week : 04

Subject Code : 09MECSV22 Credits : 04

Chapter1
Introduction to CMOS Analog Circuits : MOS transistor DC and AC
small signal parameters from large signal model,
Single stage amplifier: Common Source Amplifier, Common drain and
Common gate amplifiers : with resistive load, diode load and current
source load, Source follower, Common gate amplifier, Cascode amplifier,
Folded Cascode, Frequency response of amplifiers, Current
source/sink/mirror, Matching, Wilson current source and Regulated Cascode
current source, Band gap reference,

Chapter2
Analysis of analog circuits: Stability and Frequency response, Nonlinear
and mismatching, noise analysis, band gap reference.

Chapter3
Differential Amplifier, Gilbert cell, Op-Amp, Design of 2 stage Op-Amp,DC
and AC response, Frequency compensation, slew rate, Offset effects, PSRR,
Noise, Comparator

Chapter4
Sense Amplifier, Sample and Hold, Sampled data circuits, Switched
capacitor filters, DAC, ADC, RF amplifier, Oscillator, PLL, Mixer.

Chapter5
Short channel effects and Submicron process flow

1. Razavi B., “Design of Analog CMOS Integrated Circuits”, McGraw

Hill, 2001
2. R. Jacob Baker,”CMOS: Mixed-Signal Circuit Dedsign”, John Wiley,
2008
3. Baker, Li, Boyce, “CMOS: Circuit Design, Layout and Simulation”,
Prentice Hall of India, 2000
4. E. Allen, Douglas R. Holberg, “CMOS Analog circuit Design”
5. Grey and Meyer, “Analog Circuit Design”
6. R. Jacob Baker,”CMOS: Mixed-Signal Circuit Dedsign; Volume II”.

2
Subject : Adaptive Signal Processing Hours Per Week
: 04

Subject Code : 09MECSV23 Credits : 05

Chapter1
Linear estimation of Signals – Predication, Filtering, Smoothing, co-relation
cancellation, wiener filter, recursive LMS estimation, Kalman filter.
Lab excersice on the above topics

Chapter2
Adaptive filtering, delay line structure, Least Mean Squares (LMS) &
Recursive Least Squares (RLS) algorithms and their convergence
performance.

Chapter3
IIR Adaptive filtering & transform domain filtering.

Lab excersice on the above topics

Chapter4
Applications- Noise & Echo cancellation, Side lobe nulling in Antennas,
Channel identification & Equalization.
Lab excersice on the above topics

Text Books:
1)”Adaptive Filters –Theory & Applications” By B. Farhang Boroujeny,
PHI, 1998
2) “Adaptive filter Theory” By Haykins S. PH USA, 1996.

Subject : Digital Signal Compression Hours Per

Week : 04

Subject Code : 09MECSV24 Credits :

04

Chapter1
Huffman Coding & arithmetic coding Adaptive Huffman Coding, Golomb
Codes, Rice Codes, Tunstall Codes, Applications of Huffman Coding,
3
Overview, Introduction, Coding a Sequence, Generating a Binary Code,
Comparison of Huffman and Arithmetic Coding, Applications.

Chapter2
Predictive Coding Introduction, Prediction with partial match, the burrows-
wheeler transforms, CALIC, JPEG-LS, Multiresolution Approaches,
Facsimile Encoding, Dynamic Markov Compression.

Chapter3
Source Modules and Quantization Overview, Introduction, Distortion
Criteria, Models, Scalar Quantization, The Quantization Problem, Uniform
Quantizer, Adaptive Quantization, Nonuiform Quantization, Vector
Quantization, Advantages of Vector Quantization over Scalar Quantization,
The Linde-Buzo-gray Algorithm, Tree-Structured Vector Quantizers,
Structured Vector Quantizers, variations on the Theme, Trellis-Coded
Quantization.

Chapter4
Differential Coding Overview, Introduction, The Basic Algorithm,
Predication in DPCM, Adaptive DPCM, Delta Modulation, Speech Coding,
Image Coding.

Chapter5
Transform and Sub band Coding, Overview, Introduction, The transform,
Transforms of Interest, Quantization and Coding of Transform Coefficients,
Application to image compression-JPEG, Application to Audio
compression, Subband Coding, Filters, The basic subband coding
Algorithm, bit Allocation, Application to Speech Coding,-G.722,
Application to Audio Coding-MPEG Audio, Application to Image
Compression.

Chapter6
Wavelet Based Compression Wavelet-Based Compression, Overview,
Introduction, Wavelets, Multiresolution analysis and the scaling functions,
Implementation using filters, Image Compression, Embedded Zero tree
Coder, Set partitioning in Hierarchical trees, JPEG-2000.

Text Books:
1)”Introduction to Data Compression” By Khalid Sayood, Elsevier
Publications.
4
Reference Books:
1) “Digital Coding of waveforms- Principles and Application to Speech and
Video” by
Jayant N.S., Noll P, Prentice Hall 1984.
2) “The Data Compression Book” By Mark Nelson and Jean-Loup Gailly.

ELECTIVE II
Subject : VLSI algorithms, synthesis and automation Hours Per
Week : 04

Subject Code : 09MECSV251 Credits : 04

Chapter1
Algorithms for VLSI Design Automation: Introduction to Design
Methodologies, The VLSI Design problem, The Design Domains, Design
Actions, Design methods and technologies. A quick tour of VLSI Design
Automation Tools, Algorithmic and System Design, Structural and Logic
Design, Transistor –level design, Layout Design, Verification methods,
Design Management Tools. Algorithmic graph theory and computational
complexity, Terminology, Data structures for the representation of graphs,
Computational complexity, Examples of graph algorithms, Depth – first
search, Breadth – first search, Dijkstras shortest path algorithm, Frims
algorithm for minimum spanning trees.

Chapter2
Tractable and Intractable problems, Combinatorial optimization problems,
Decision problems, Complexity classes, NP – completeness and NP
hardness, Consequences. Layout Compaction, Design rules, Symbolic
layout, Problem formulation, Application of compaction, Informal problem
formulation, Graph theoretical formulation, Maximum distance constraints,
Algorithms for constraint – graph compaction, A longest path algorithm for
DAGS, The longest path in graph with cycles, The Liao – wong algorithm,
The Bellman – Ford Algorithm, Discussion shortest paths, longest paths and
time complexity, Other Issues.

Chapter3
Partitioning for Synthesis, Software versus Hardware, General Guidelines,
Technology Independence, Clock Related Logic, No Glue Logic at the Top,
Module Name Same as File Name, Pads Separate from Core Logic,
Minimize Unnecessary Hierarchy, Register All Outputs, Guidelines for FSM
Synthesis, Logic Inference, Incomplete Sensitivity Lists, Memory Element
5
Inference, Multiplexer Inference, Three-State Inference, Order Dependency,
Environment and Constraints, Design Environment, Design Constraints,
Advanced Constraints, Clocking Issues, Pre-Layout, Post-Layout, Generated
Clocks, Design Space Exploration, Total Negative Slack, Compilation
Strategies, Top-Down Hierarchical Compile, Time-Budgeting Compile,
Compile-Characterize-Write-Script-Recompile, Design Budgeting,
Resolving Multiple Instances, Optimization Techniques, Compiling the
Design, Flattening and Structuring, Removing Hierarchy, Optimizing Clock
Networks, Optimizing for Area; Physical synthesis: Initial Setup, Important
Variables, Modes of Operation, RTL 2 Placed Gates, Gates to Placed Gates,
Other PhyC Commands, Physical Compiler Issues, Back-End Flow.
Chapter4
Placement and partitioning, Circuit representation, Wire length estimation,
Types of placement problem, Placement Algorithms, Constructive
placement, Iterative improvement, Partitioning, The Kernighan – Lin
partitioning Algorithm. Floor planning, Floor planning concepts,
Terminology and floor plan representation, Optimization problems in floor
planning, Shape functions and floor plan sizing. Routing, Types of local
routing problems, Area routing, Channel routing, Channel routing models,
The vertical constraints graph, Horizontal constraints and the left-edge
algorithm Channel routing algorithm, Introduction to global routing,
Standard cell layout, Building lock layout and channel ordering, Algorithms
for global routing, Problem definition and discussion, Efficient rectilinear
Steiner tree construction, Local transformations for global routing.
Text Book:
1) “ASIC” By Michael John Sebistion Smith
2) ADVANCED ASIC CHIP SYNTHESIS by Himanshu Bhatnagar

ELECTIVE II
Subject : Operating System and RTOS Hours Per Week
: 04

Subject Code : 09MECSV252 Credits :

04

Chapter1
Introduction to process and CPU scheduling; Fundamental concepts of
multi-programmed OS, Implementation techniques, Microkernel architecture
of OS. Basic concepts of threads, Types of threads, Multithreading and
Thread implementation.

Chapter2
Interprocess synchronization and communication (critical section problem,
Sema-phore monitor) Dead Locks. Interrupt Service routines, device drivers,
6
Protection and security.
Chapter3
Introduction to parallel processing. Pipeline processing and distributed
system and computing.
Chapter4
Introduction RTOS, comparison between general OS and RTOS, design
concepts of RTOS.
Chapter5
Case studies: Windows 2000-Server, Linux, RT linux, Vx-Works, etc...
Text Books:
1) “Operating System Concepts” By Silberschatz & Galvin 6 th / 7th
Edition.
2) “Parallel Computer Architecture” By David Culler.
3) “Modern Operating Systems” By Andrew S Tanenbaum.
4) “Real time systems” By CM Krishna
5) “Embedded Systems” By Rajkamal

ELECTIVE II
Subject : Artificial Neural Networks Hours Per Week
: 04

Subject Code : 09MECSV253 Credits : 04

Chapter1
Introduction: Models of a Neuron, Neural Networks viewed as directed
graphs, Feedback, Networks Architectures, knowledge representation,
Artificial intelligence and Neural Networks.

Chapter2
Learning Processes:Error Correction, Memory based, Hebbian, Competitive,
Boltzmann learning methods. Learning with a teacher and without a teacher,
memory, Adaptation, Statistical nature of the learning process, Statistical
Learning theory.

Chapter3
Supervised learning: Single Layer Networks, Perceptions, Linear
separability, perceptron training algorithm, Guarantee of success
modifications. -Multilayer Networks I, Multilevel discrimination,
preliminaries, back propagation algorithm, Setting parameter values,

7
Theoretical results, Acceleration of learning process and Applications.

Chapter4
Multilayer Networks II: Madalines, Adaptive multilayer networks,
prediction networks, RBF, polynomial networks and regularization.

Chapter5
Unsupervised Learning: Winner-Take-All Networks, Learning Vector
quantities, Counter propagation networks, Adaptive resonance theory,
Topologically organized networks, Distance based learning recognition,
principal component analysis networks.

Chapter6
Associative Models: Non-iterative procedure for Association, Hopfield
Networks, Brain-State-in-a-Box Network, Boltzmann Machines and Hetero
associators.

Chapter7
Optimization Methods: Optimization using Hopfield Networks, Iterated
gradient descent, simulated annealing, Random search, Evolutionary
Computation.

Text Books:
1) “Neural Networks: A Comprehensive Foundation” by Simon Haykin
Prentice Hall, NJ 2nd Edition.

2) “Elements of Artificial Neural Networks” by Kishan Mehrotra, Chilukuri

K Mohan & Sanjay Ranka, Penram International Publisher (India) Pvt.Ltd.

Reference Books:
1) “Artificial Neural Networks” by B. Yagnanarayana, PHI,
2) “Artificial Neural Networks” by Robort J. Schalkoff MGH
international edition.

ELECTIVE II
Subject : Pattern Recognition Hours Per Week
: 04

Subject Code : 09MECSV254 Credits : 04

8
Chapter1
Introduction: Applications of pattern recognition, statistical decision theory,
image processing and analysis.

Chapter2
Probability: Introduction, probability of events, random variables, Joint
distributions and densities, moments of random variables, estimation of
parameters from samples, minimum risk estimators.

Chapter3
Statistical Decision Making: Introduction, Bay’s Theorem, multiple features,
conditionally independent features, decision boundaries, unequal costs of
error, estimation of error rates, the leaving-one-out technique, characteristic
curves, estimating the composition of populations.

Chapter4
Nonparametric Decision Making: Introduction, histograms, Kernel and
window estimators, nearest neighbor classification techniques, adaptive
decision boundaries, adaptive discriminant functions, minimum squared
error discriminant functions, choosing a decision making technique.

Chapter5
Clustering: Introduction, hierarchical clustering, partitional clustering.

Chapter6
Artificial Neural Networks: Introduction, nets without hidden layers, nets
with hidden layers, the back propagation algorithms, Hopfield nets, an
application.
Chapter7
Processing of Waveforms and Images: Introduction, gray level scaling
transformations, equalization, geometric image and interpolation, smoothing
transformations, edge detection, Laplacian and sharpening operators, line
detection and template matching, logarithmic gray level scaling, the
statistical significance of image features.

Text Books:
1) “Pattern Recognition and Image Analysis” Eart Gose, Richard
Jonsonbaugh and Steve Jost Prentice-Hall of India-2003.

9
Semester III

Subject : DSP algorithm implementation in VLSI Hours

Per Week : 04

Subject Code : 09MECSV31 Credits : 05

Chapter1
Introduction to Digital Signal Processing Systems, Behavior and
Architecture: Dedicated and Programmable VLSI architectures, Instruction
sets and through enhancement techniques (Parallelism, pipelining, cache,
etc.)

Chapter 2
DSP Architecture Concepts: Typical DSP instruction set and its VLSI
implementation Dedicated Hardware Architecture Concepts: Example
and Case studies. Dedicated DSP architecture Concepts: Synthesis,
Scheduling and Resource allocation, Conventional Residue number,
distributed arithmetic architecture

Chapter 3
Iteration Bound, Pipelining and Parallel Processing, Retiming, Unfolding,
Folding, Systolic Architecture Design, Fast Convolution, Algorithmic
Strength Reduction in Filters and Transforms, Pipelined and Parallel
Recursive and Adaptive Filters, Scaling and Round off Noise, Digital Lattice
Filter Structures, Bit-Level Arithmetic Architectures, Redundant Arithmetic,
Numerical Strength Reduction, Synchronous, Wave, and Asynchronous
Pipelines, Low-Power Design, Programmable Digital Signal Processors.
Lab excersice on the above topics

Chapter 4
DSP kernels implementation architecture, Hardware multiplier-based and
multiplex-less architectures Different implementation styles, several
algorithmic and architectural transformations, implement weighted-sum
based DSP kernels. Programmable DSP-based implementation;
Programmable processors with no dedicated hardware multiplier;
Implementation using hardware multiplier(s) and adder(s); Distributed

10
Arithmetic (DA)-based implementation; Residue Number System (RNS)-
based implementation; and Multiplier-less implementation (using adders and
shifters), fixed coefficient DSP kernels. Analysis of several algorithmic and
architectural transformations, Classification of the transformations based on
the properties that they exploit and their encapsulation.
Lab excersice on the above topics

Chapter 5
Data converter modeling, SNR, Noise shaping, implementation of data
converters, integrator based CMOS filters.
Lab excersice on the above topics

Reference Books:
1. VLSI Synthesis of DSP Kernels: Algorithmic and Architectural
Transformations by Mahesh Mehendale, Sunil D. Sherlekar.
2.VLSI Digital Signal Processing Systems: Design and Implementation by
Keshab K. Parhi
3. Lars Wanhammar, “DSP Integrated Circuits”, Academic Press 1999.
4. Mixed-signal and DSP Design Techniques (Analog Devices) by Walt
Kester
5. CMOS Mixed Signal Circuit Design Volume II by R. Jacob Baker

Subject : STATISTICAL SIGNAL PROCESSING Hours

Per Week : 04

Subject Code : 09MECSV32 Credits : 04

Chapter1

Random Processes: Random variables, random processes, white noise,

filtering random processes, spectral factorization, ARMA, AR and MA
processes.

Chapter2
Signal Modeling: Least squares method, Padé approximation, Prony's
method, finite data records, stochastic models, Levinson-Durbin recursion;
Schur recursion; Levinson recursion.

Chapter3
Spectrum Estimation: Nonparametric methods, minimum-variance
spectrum estimation, maximum entropy method, parametric methods,
frequency estimation, principal components spectrum estimation.
11
Chapter4
Optimal and Adaptive Filtering: FIR and IIR Wiener filters, Discrete
Kalman filter, FIR Adaptive filters: Steepest descent, LMS, LMS-based
algorithms, adaptive recursive filters, RLS algorithm.

Chapter4
Array Processing: Array fundamentals, beam-forming, optimum array
processing, performance considerations, adaptive beam-forming, linearly
constrained minimum-variance beam-formers, side-lobe cancellers,
spacetime adaptive processing.

REFERENCE BOOKS:
1. Monson H. Hayes, “Statistical Digital Signal Processing and
Modeling”, John Wiley & Sons (Asia) Pte. Ltd., 2002.
2. Dimitris G. Manolakis, Vinay K. Ingle, and Stephen M. Kogon,
"Statistical and Adaptive Signal Processing: Spectral Estimation, Signal
Modeling, Adaptive Filtering and Array Processing”, McGraw-Hill
International Edition, 2000.
3. Bernard Widrow and Samuel D. Stearns, "Adaptive Signal Processing”,
Pearson Education (Asia) Pte. Ltd., 2001.
4. Simon Haykin, "Adaptive Filters”, Pearson Education (Asia) Pte. Ltd,
4th edition, 2002

Elective III
Subject : Embedded System Design Hours Per Week
: 04

Subject Code : 09MECSV351 Credits :

04

Chapter 1
Introduction to Embedded System: An embedded system, processor,
hardware unit, soft ware embedded into a system, Example of an embedded
system, OS services, I/O, N/W, O/S, Real time and embedded OS. Processor
and Memory Organization, Devices And Buses for Device Networks: I/O
devices, serial communication using FC, CAN devices, device drivers,
parallel port device driver in a system, serial port device driver in a system,
device driver for internal programmable timing devices, interrupt servicing
mechanism, V context and periods for switching networked I/O devices

12
using ISA, PCI deadline and interrupt latency and advanced buses. Process
Communication and Synchronization of Processors Tasks

Chapter 2
Introduction to ASIC: Full Custom with ASIC, Semi custom ASICS,
Standard Cell based ASIC, Gate array based ASIC, Channeled gate array,
Channel less gate array, structured get array, Programmable logic device,
FPGA design flow, ASIC cell libraries Data Logic Cells: Data Path
Elements, Adders, Multiplier, Arithmetic Operator, I/O cell, Cell Compilers.
Programmable ASIC: programmable ASIC logic cell, ASIC I/O cell.
(Programming using Verilog)

Chapter 3
Introduction to FPGA: Logic block, Interconnection resources, Economy
of FPGA, Applications of FPGA, Implementation Process, Concluding
remarks, Programming technology, Static RAM programming technology,
Anti-fuse programming technology, EPROM and EEPROM technology,
Commercially available FPGA’s, FPGA design flow example. Technology
mapping of FPGA, Logic synthesis and optimization, Register- transfer level
systems, Execution Graph, Organization of System, Implementation of RTL
Systems, Analysis of RTL Systems, and Design of RTL Systems. Data
Subsystems, Storage Modules, Functional Modules, Data paths, Control
Subsystems, Micro programmed Controller, Structure of a micro
programmed controller, Micro instruction Format, Micro instruction
sequencing, Micro instruction Timing, Basic component of a micro system,
memory subsystem. (Programming using VHDL/Verilog)

Chapter 4
High performance embedded processors: An detailed architectural design,
Instruction set and programming in ARM-11, philips/TI/Free scale cold fire
embedded processors and programming concepts.

Chapter 5
Hardware and software co-design: Hardware-software background:
embedded systems, models of design representation, the virtual machine
hierarchy, the performance modeling, hardware software development,
ADEPT modeling environment. Motivation for object oriented technique,
data types, modeling hardware components as classes, designing specialized
components, data decomposition, and processor example.

Chapter 6
Wireless Embedded system design: Protocol design and validation,
network embedded systems operating systems and programming, Bluetooth
13
and IrDA, wireless sensor networks and ZigBee, wireless LAN- IEEE
802.11, RFID, GSM and GPRS, ubiquitous computing.

REFERENCE BOOKS:
1. Raj Kamal, “Embedded systems Architecture, Programming and
Design”, TMH.
2. Jane W. S., Liu, “Real Time Systems”, Pearson Education Asia Pub
3. M.J.S .Smith, - “Application - Specific Integrated Circuits” –
Pearson Education, 2003.
4. M. Ercegovac, T. Lang and L.J. Moreno, “Introduction to Digital
Systems”, Wiley,2000.
5. Sanjaya Kumar, James H. Ayler “The Co-design of Embedded
Systems: A Unified Hardware Software Representation”, Kluwer
Academic Publisher, 2002 .
6. Peter Marwedel, G. Goosens, “Code Generation for Embedded
Processors”, Kluwer Academic Publishers, 1995.
7. Computers as Components: Principles of Embedded Computing
System Design, by Wayne Wolf, Morgan Kaufmann Publishers, 2001.
8. Programming Microsoft Windows CE, Second Edition, by Doug
Boling, Microsoft Press, 2003
9. Field Programmable Gate Arrays, Stephen D Brown, Robert J
Francies, Kulwer Academic Publications.
10.Reference data manuals of ARM/ Freescale cold fire MCF5223X/
HCS12X microcontroller/ TI/Philips processors.

Elective III

Subject: Wireless Communication Networks Hours Per

Week: 04

Subject Code: 09MECSV352 Credits: 04

Chapter1
Fundamentals of Wireless Communications, Modulations Techniques for
Wireless Communication, Propagations Modules, Structerd Spectrum
Techniques.

Chapter2
Cellular Wireless Networks and Standards Principles of Cellular Networks,
Wireless Standards, AMPS and ETACS, USDC, GSM, CDMA (IS-95).

14
Chapter3
Wireless Networking Mobile IP and Wireless Access Protocol, Cordles
Systems and Wireless Local Loop.

Chapter4
Wireless LAN Wireless LAN Technology, IEEE 802.11 Wireless LAN
structured, Bluetooth Technology.

Text Books:
1)”Wireless Communications and Networks” By William Stallings, Pearson
Education, 2004
2)”Wireless Communications: Principles and Paractice” By T.S. Rappaport,
Pearson
Education 2nd Ediition, 2003.

Elective III

Subject : BIOMEDICAL SIGNAL PROCESSING Hours Per

Week : 04

Subject Code : 09MECSV353 Credits : 04

Chapter 1
FINITE AND INFINITE IMPULSE RESPONSE FILTERS: Characteristics
of FIR filters, Smoothing filters, Notch filters and derivatives, Window
Design, Frequency Sampling and Minimax design. Generic Equations of IIR
Filters, Integrators and design Methods of two pole filters.

Chapter 2
VLSI IN DIGITAL SIGNAL PROCESSING: Digital signal processors,
High-performance VLSI signal processing, VLSI applications in medicine ,
VLSI sensors for biomedical signals VLSI tools.

Chapter 3

15
Data Compression Techniques: Lossy and Lossless data reduction
Algorithms. ECG data compression using Turning point, AZTEC, CORTES,
Huffman coding, vector quantisation, DCTand the K L transform.

Chapter 4
Cardiological Signal Processing: Pre-processing. QRS Detection Methods.
Rhythm analysis. Arrhythmia Detection Algorithms. Automated ECG
Analysis. ECG Pattern Recognition. Heart rate variability analysis.

Chapter 5
Adaptive Noise Cancelling: Principles of Adaptive Noise Cancelling.
Adaptive Noise Cancelling with the LMS Adaptation Algorithm. Noise
Cancelling Method to Enhance ECG Monitoring. Fetal ECG Monitoring.

Chapter 6
Signal Averaging, polishing - mean and trend removal, Prony's method.
Linear prediction. Yule - walker (Y -W) equations.

Chapter 7
Neurological Signal Processing: Modeling ofEEG Signals. Detection of
spikes and spindles Detection of Alpha, Beta and Gamma Waves. Auto
Regressive(A.R.) modeling of seizure EEG. Sleep Stage analysis. Inverse
Filtering. Least squares and polynomial modeling. UNIT -VIII Original
Prony's Method. Prony's Method based on the Least Squares Estimate.
Analysis of Evoked Potentials.

TEXT BOOKS
1. Rangaraj M. Rangayyan - Biomedical Signal Analysis.
2. D.C.Reddy, Biomedical Signal Processing- principles and techniques,
Tata McGraw-Hill, 2005.
REFERENCE BOOKS:
1. Weitkunat R, Digital Bio signal Processing, Elsevier, 1991.
2. Akay M , Biomedical Signal Processing, Academic: Press 1994
3. Cohen. A, Biomedical Signal Processing -Vol. I Time & Frequency
Analysis, CRC Press, 1986.
4. Biomedical digital Signal Processing, willis J.Tompkins, PHI,

Elective III

16
 Subject : Advanced Computer Architecture Hours Per Week
: 04
Subject Code : 09MECSV354 Credits : 04

Chapter1
Parallel Computer Models The State of Computing, Multiprocessors and
Multicomputers, Multivector and SIMD Computers.

Chapter2
Processors and Memory Hierarchy, Advanced Processor Technology,
Superscalar and
Vector Processors, Memory Hierarchy Technology, Virtual Memory
Technology.

Chapter3
Bus, Cache, and Shared Memory Backplane Bus Systems, Cache Memory
Organizations, Shared Memory Organization.

Chapter4
Pipelining and Superscalar Techniques, Linear pipeline Processors,
Nonlinear Pipeline
Processors, Instruction Pipeline Design, Arithmetic Pipeline Design, Super
Scalar and
Super Pipeline Design.

Chapter5
Multiprocessors and Multicomputers, Multiprocessors System
Interconnects, The Cache coherence and Synchronization Mechanism, Three
Generations of Multicomputers, Message–Passing Mechanisms,

Chapter6
Scalable, Multithreaded, and Dataflow Architectures, Latency-Hiding
Techniques, Principles of Multithreading, Fine-Grain Multicomputers,
Scalable and Multithread Architecture, Data flow and Hybrid Architectures.

Chapter7
UNIX, Mach, and OSF/1 for Parallel Computers, Multiprocessor UNIX
Design Goals, Master –Slave and Multithread UNIX, Multicomputer UNIX
17
 Extensions, Mach/OS Kernel Architecture and applications.

Text Books:
1) “Advanced Computer Architecture- Parallelism, Scalability,
Programmability ” By
Kai Hwang.

Reference Books:
1) “Computer Architecture A Quantitative Approach” By Hennssey &
Petterson.

18