3106 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO.

8, AUGUST 2009

Load-Adaptive Control Algorithm of Half-Bridge

Series Resonant Inverter for Domestic
Induction Heating
Óscar Lucía, Student Member, IEEE, José M. Burdío, Member, IEEE, Ignacio Millán, Student Member, IEEE,
Jesús Acero, Member, IEEE, and Diego Puyal

Abstract—Domestic induction cookers operation is based on T Switching period.

a resonant inverter which supplies medium-frequency currents td Dead time.
(20–100 kHz) to an inductor, which heats up the pan. The variable PDM Pulse density modulation.
load that is inherent to this application requires the use of a reli-
able and load-adaptive control algorithm. In addition, a wide out- TPDM PDM pulse period.
put power range is required to get a satisfactory user performance. ton PDM pulselength.
In this paper, a control algorithm to cover the variety of loads F Power fluctuation shape factor.
and the output power range is proposed. The main design criteria U Mains rms voltage.
are efficiency, power balance, acoustic noise, flicker emissions, and V̂bus Peak bus voltage.
user performance. As a result of the analysis, frequency limit and
power level limit algorithms are proposed based on square wave I Mains current.
and pulse density modulations. These have been implemented in a PF Power factor.
field-programmable gate array, including output power feedback dc Stable relative power fluctuation.
and mains-voltage zero-cross-detection circuitry. An experimental dmax Maximum relative power fluctuation.
verification has been performed using a commercial induction tf Equivalent holding time.
heating inverter. This provides a convenient experimental test
bench to analyze the viability of the proposed algorithm. PPDM Power fluctuation with PDM.
Pst Short-time power fluctuation.
Index Terms—Digital control, home appliances, induction Plt Long-time power fluctuation.
heating, pulsewidth modulation, resonant power conversion.
LISN Line impedance stabilization network.
ZLISN Mains impedance operating with an LISN.
N OMENCLATURE
ZVS Zero-voltage switching.
Req Equivalent resistance of the induction system. DCM Discontinuous current mode.
Leq Equivalent inductance of the induction system. PL Power level limit.
Cres Resonance capacitor. FL Frequency limit.
f Excitation frequency. EMC Electromagnetic compatibility.
ω Angular excitation frequency. VHSIC Very high speed integrated circuit.
Q Quality factor. VHDL VHSIC hardware description language.
Qres Quality factor at resonant frequency. FSM Finite-state machine.
fres Resonant frequency of the induction system. FPGA Field-programmable gate array.
ωres Angular resonant frequency of the induction system.
Isw-off Transistor switch-off current.
Po Converter output power. I. I NTRODUCTION
P Target output power.
SW
ADC
Square wave.
Asymmetrical duty cycle.
D OMESTIC induction technology has become more pop-
ular in recent years due to features such as efficiency,
safety, and accurate output power control, which outperform
fs Switching frequency.
other traditional domestic heating technologies. The design
D Duty cycle.
of these appliances involves the research and development of
efficient reliable cost-effective power electronics systems [1].
Manuscript received October 15, 2008; revised April 28, 2009. First pub-
lished May 15, 2009; current version published July 24, 2009. This work was The main blocks of an induction cooking appliance are
supported in part by the Spanish Ministry of Science and Innovation (MICINN) outlined in Fig. 1. The energy taken from the mains is filtered
under Project TEC2007-64188 and University Professor Formation (FPU) by an EMC filter, which prevents the device from inserting
Grant AP2007-03276, in part by Diputación General de Aragón (DGA) under
Project PI008/08, and in part by the Bosch and Siemens Home Appliances interferences, and it provides immunity to voltage transients.
Group. Afterward, the voltage is rectified and filtered, generating a dc
The authors are with the Department of Electronic Engineering and Commu- bus. A low value of filter capacitor is chosen to get a high
nications and the Aragon Institute for Engineering Research (I3A), University
of Zaragoza, 50018 Zaragoza, Spain (e-mail: olucia@unizar.es). PF, and, as a consequence, a high-ripple dc bus is obtained.
Digital Object Identifier 10.1109/TIE.2009.2022516 Then, the resonant inverter supplies variable-frequency current
0278-0046/$26.00 © 2009 IEEE
LUCÍA et al.: CONTROL ALGORITHM OF RESONANT INVERTER FOR DOMESTIC INDUCTION HEATING
Fig. 1. Induction cooking appliance block diagram.
Fig. 2. Half-bridge series resonant inverter. (a) Schematic. (b) Main wave-
forms and control parameters.
(20–100 kHz) to the induction coil. This current produces an
alternating magnetic field, which causes eddy currents and
magnetic hysteresis heating up the pan.
The half-bridge series resonant inverter (Fig. 2) is the most
employed topology due to its simplicity, its cost-effectiveness,
and the electrical requirements of its components [2]–[4]. The
resonant tank consists of the pan, the induction coil, and the
resonance capacitor (Cres ). Induction-coil-and-pan coupling is
modeled as a series connection of an inductor and a resistor,
based on the analogy of a transformer, and it is defined by
the values of Leq and Req [5]. These values change mainly
with excitation frequency ω, pan material, temperature, and
inductor–pan coupling.
Designing an appliance that is able to heat different ma-
terials with the same precision has been a challenging task
since the beginning of technology development [6], [7]. In
addition, cooking appliances require accurate power control
over a wide range to fulfill the user requirements. This implies a
wide operation range, where a ZVS condition must be fulfilled
to ensure high efficiency [8], [9]. Previous works propose
constant-frequency modulations to achieve simply power con-
trol. In [10], constant-frequency PDM for a 1.6-kW appliance
is proposed. However, acoustic noise and flicker regulations are
not considered. Other approximations are based on constant-
frequency ADC modulation [11], [12]. This provides an ef-
ficient mode to control power, but it has some drawbacks,
such as reduced power range and ZVS operation region, and
asymmetrical device losses. Recent trends suggest DCM to
3107
supply low/medium power with improved efficiency [13]. Nev-
ertheless, control complexity and reduced power levels make
unfeasible to fulfill the requirements. In [14], several control
algorithms are proposed but without detailing the flicker design
and digital implementation.
The aim of this paper is to present the design of a load-
adaptive control algorithm designed for a 3-kW output power
inverter. This paper is focused on EMC standard requirements,
efficiency, easy digital integration, and user performance.
This paper is organized as follows. The main criteria consid-
ered in designing the control algorithm are briefly outlined in
Section II. Section III explains the modulation strategies and
their combinations to complete the control algorithm. After-
ward, the digital implementation of the control algorithm is
detailed in Section IV. Section V summarizes the experimental
analysis performed, comparing power balance, user perfor-
mance, flicker emission, and efficiency. Finally, in Section VI, a
comparison with previous control strategies is performed. The
main conclusions of this paper are outlined in Section VII.
In addition, the flicker design guidelines are presented in the
Appendix.
II. D ESIGN C RITERIA
Designing the control algorithm for an inverter operating un-
der varying load conditions implies the proper balance between
standards fulfillment, efficiency, and performance. The main
factor which determines the modulation strategy is the variable-
load operation of the inverter. Moreover, the output power
range, acoustic noise, user performance, and flicker standards
must be also considered. The main implications of these factors
are highlighted in the following paragraphs.
A. Variable-Load Operation
Different pan materials, relative position between pan and
inductor, excitation frequency, and temperature change the
equivalent load (Req and Leq ) of the inverter [15], [16]. The
load is usually described by its quality factor Q, defined by
the following, which depends on the excitation frequency ω
Xeq ωLeq
Q= = . (1)
Req Req
In addition, it is common to classify the loads by the quality
factor at the resonant frequency fres (Qres ). The resonant fre-
quency depends on Cres , and it is given by
1
fres =  . (2)
2π Leq Cres
Fig. 3 shows the Req and Leq variations for an inductor de-
signed to deliver 3000 W coupled to a standard induction load.
The variation of these parameters changes the inverter operation
conditions, and, as a consequence, efficiency and power control
capabilities are altered [17]. The proposed control algorithm
must be adaptable and reliable enough to supply the target
output power to different ferromagnetic materials.
3108
Fig. 3. Experimental and calculated results from the analytical models for
the induction system. (a) Frequency-dependent resistance. (b) Frequency-
dependent inductance.
B. Wide Output Power Range
Domestic cooking application requires accurate power con-
trol to achieve satisfactory cooking experience. The output
power (Po ) for a standard inductor has to vary from 50 to
3000 W. Inverter modulation strategies are not able to op-
erate in the complete power range due to efficiency, EMC
standards, and user performance restrictions. As a conse-
quence, an adequate combination of modulation strategies is
required.
C. Acoustic Noise
Switching frequencies near to an audible range (20 Hz up
to 20 kHz) generate acoustic noise [18] due to the vibration of
the magnetic elements, the inductor, and the pan. Furthermore,
for multiple-burner appliances operating at different switching
frequencies, audible-frequency beating interferences could ap-
pear. Since induction cooker users do not expect to hear any
noise coming from the electronics or the pan, restrictions in
switching frequency must be taken. Inverter switching frequen-
cies must be above 20 kHz, and the transition between different
modulations must be carried out at frequencies below 20 Hz. A
complete noise sources analysis in induction heating appliances
can be found in [19].
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 8, AUGUST 2009
D. Flicker Standards
EMC standards impose limits to flicker emission in order
to prevent failure of sensitive devices, particularly lighting ap-
pliances [20], [21]. These regulations determine the maximum
switched power as a function of period, establishing limits to
pulsed control strategies. The design example of this paper has
been carried out following the International Electrotechnical
Commission (IEC) standards [22], which have been studied
and proposed for use by the IEEE workgroup p1453 [23].
This text provides an analytical method, based on experimental
results, to calculate the maximum allowed power fluctuations.
The complete design flow is detailed in the Appendix.
III. C ONTROL S TRATEGY
A. Modulation Strategies Overview
The modulation strategies traditionally used in domestic
induction heating are SW modulation [24], ADC modulation
[25], [26], and PDM [27], [28]. The basic operation of these
modulations is explained as follows.
SW modulation varies the output power by changing the
switching frequency fs [Fig. 4(a)], whereas ADC modulation
varies the fs and the duty cycle (D) to set the target power
[Fig. 4(b)]. These modulations are used in the middle/high
output power range (500–3200 W) because of their high ef-
ficiency that is close to the resonant frequency. However, the
efficiency decreases in the lower power range due to the high
switching frequency required, which implies higher switching
losses. Considering the wide output power range required and
the low quality factor that is typical of induction loads, SW and
ADC modulations become unpractical in the low power range.
The power control curves and the ZVS region with SW and
ADC modulations for two different ferromagnetic loads with
Qres = 1.66 and Qres = 8 are shown in Fig. 5. It is shown that
the ZVS region and the frequency and duty cycle ranges are
considerably load dependent. To satisfy the ZVS condition, the
snubber capacitor (Cs ) charge time (tsnubber ) must be lower
than the diode conduction time (tdiode ). Considering the low
value of the snubber capacitor and the high switch-off currents,
the charge current can be considered constant and equal to
the transistor switch-off current (Isw-off ). Then, the following
condition calculated as a function of Cs must be satisfied:
2Cs Vbus
tsnubber = < tdiode . (3)
Isw-off
Since the voltage across the load vo is known, the con-
verter simulation can easily be performed through harmonic
decomposition. The simulation has been carried out starting at
maximum fs for each D and finishing when the aforementioned
ZVS condition is not fulfilled. In addition, ADC modulation
implies asymmetrical switches current distribution, and, as a
consequence, the most restrictive condition must be considered.
PDM is used in the low output power range in order to
improve efficiency and to limit maximum fs . It is based on
applying SW or ADC modulations discontinuously along time
to reduce the output power (Fig. 6) [29]. As a consequence, the
LUCÍA et al.: CONTROL ALGORITHM OF RESONANT INVERTER FOR DOMESTIC INDUCTION HEATING
Fig. 4. Continuous modulation schemes main waveforms. (a) SW modulation. (b) ADC modulation.
Fig. 5. Continuous modulation schemes. Power control and ZVS region with
Cs = 15 nF for different D for (a) Qres = 1.66 and (b) Qres = 8.
power fluctuation (PPDM ) with this modulation strategy is the
same for all power levels. The control parameters are switching
frequency (fs,PDM ) and duty cycle (DPDM ) of PDM, pulse
period (TPDM ), and pulselength (ton ).
The maximum and minimum values of TPDM are deter-
mined by user performance considerations and flicker emission
3109
Fig. 6. PDM main waveforms and parameters.
limits, respectively. One of its main advantages is the linear
dependence of output power with ton . Since the dynamics of
Req −Leq −Cres circuit is faster enough than TPDM and ton
[30], the output power is calculated as follows:
ton ton
Po = Po (fs = fs,PDM ) = PPDM . (4)
TPDM TPDM
Usually, SW and ADC modulations are preferred to the PDM
control strategy due to the lower maximum power required,
lower flicker emission, and the lack of user perceptible boiling
pulses and bus capacitor discharge noises. However, a combina-
tion of these strategies is required to cover the complete output
power range. Table I summarizes the modulation strategies,
their control parameters, and the application range.
B. Control Algorithms
A control algorithm that is composed of several modulation
strategies must be implemented to satisfy the power control
requirements. The proposed algorithms are based on the use
of SW modulation in the medium/high output power range
and PDM in the low output power range. SW modulation is
preferred over ADC due to its symmetrical loss distribution in
the devices and lower harmonics content.
PDM is implemented, keeping the switching frequency con-
stant and adjusting the output power through TPDM and ton .
3110
TABLE I
INVERTER MODULATION STRATEGIES
Fig. 7. Power control algorithm for different induction loads l1 and l2. (a) FL
algorithm. (b) PL algorithm.
This combination simplifies the final implementation by reduc-
ing freedom degrees. Thus, the considered control parameters
are fs , TPDM , and ton .
Transitions between SW modulation and PDM can be imple-
mented through two different algorithms: maximum FL and PL
algorithms. These are shown in Fig. 7, where power as a func-
tion of switching frequency for different ferromagnetic loads is
represented. The switching frequency has been normalized with
resonant frequency. Moreover, the different modulation strategy
regions for both FL and PL algorithms are detailed.
The FL algorithm [Fig. 7(a)] is based on the change of
the modulation when a certain maximum switching frequency
is reached (fs,t ), independently of the output power. This
algorithm maximizes SW modulation use, but complexity is
increased because transition output power (Pt,i ) and ton vary
with the load.
The PL algorithm [Fig. 7(b)] is based on the change of the
modulation when a certain power level is reached (Pt ). Hence,
PDM becomes easier since ton is equal for all loads. However,
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 8, AUGUST 2009
Fig. 8. Induction heating appliance control loop block diagram.
transition frequency changes with the used load (fs,t,i ), leading
to a bandwidth misuse.
IV. D IGITAL I MPLEMENTATION
The described control algorithms have been implemented in
an FPGA to arrange a versatile test bench [31]. The description
has been performed in VHDL, and it is divided into two blocks,
the digital pulsewidth modulator (DPWM) and the control unit
(CU), which are outlined in Fig. 8.
The control algorithm sets the modulation parameters to the
DPWM, which generates the gating signals for the insulated-
gate bipolar transistor. The control loop is closed with the
output power measurement [32], [33], while the load cur-
rent measurement ensures proper inverter operation. Power
measurements include input-voltage feedforward which allows
adapting the modulation parameters to mains voltage and
reducing devices stress [34]. Moreover, a mains-voltage zero-
cross-detection circuit has been implemented in order to syn-
chronize the PDM pulses with the mains frequency. Thus,
appliance reliability and PF are improved by switching on the
modulation at low voltage levels during an integer number of
mains half-cycles. The PWM (Fig. 9) is based on a 16-b counter
and several comparators defining period (T ), duty cycle (D),
and dead times (td1 and td2 ) [35].
The control algorithm in the CU is implemented through an
FSM that is composed of three states: S_IDLE, S_SW, and
S_PDM (Fig. 10). S_IDLE is the state for the target output
power P = 0. When a certain P is set, S_SW state is reached,
and SW modulation is applied. If the target output power is low
enough, S_SW-to-S_PDM transition condition can be satisfied,
and PDM is applied. This transition condition depends on the
implemented algorithm FL, switching frequency dependent, or
PL, output power dependent. Finally, if S_PDM is the current
LUCÍA et al.: CONTROL ALGORITHM OF RESONANT INVERTER FOR DOMESTIC INDUCTION HEATING
Fig. 9. Counter-based DPWM.
Fig. 10. CU FSM: states, state actions, and transition conditions.
state and the output power is below the target, the transition to
S_SW is carried out to supply the required output power.
Since power converter dynamics is much faster than the
thermal system, the converter transient response is not critical.
As a consequence, the changes in the control parameters are
taken in fixed steps to ensure converter reliability. Moreover,
a certain hysteresis Δ = 3% is applied to the target output
power to ensure algorithm stability. The FSM implemented in
the CU is shown in Fig. 10, where the states, state actions,
and transition conditions are outlined. In addition, the transient
responses for a target output power variation from 0 W to 3 kW
and from 3 kW to 100 W, applying FL algorithm with fs,t =
75 kHz, are shown in Fig. 11. For the considered load, Po,max
is reached when fs = 30 kHz, and the output power with PDM
can be calculated as
ton 0.45
Po = PPDM = · 500 W = 100 W.
TPDM 2.25
V. E XPERIMENTAL V ERIFICATION
A. Experimental Test Bench
The FL and PL algorithms have been implemented and tested
in the full output power range for different ferromagnetic loads.
The experimental setup is based on a commercial induction
heating inverter and its associated inductor (Fig. 12). The
FL and PL algorithms have been implemented in a Xilinx
3111
Spartan-3 FPGA. Measurements have been carried out with
Yokogawa PZ4000 power analyzer and Tektronix 5054B digital
oscilloscope.
The design parameters have been chosen according to flicker
and acoustic noise considerations. It has been selected a transi-
tion frequency of 75 kHz for the FL algorithm and a transition
output power of 900 W for the PL algorithm. A minimum
switching frequency of 20 kHz has been set to avoid acoustic
noise emissions. In addition, Cres has been selected to set the
load resonant frequency above 20 kHz to avoid the audible
range for the most common induction loads. The main inverter
specifications are summarized in Table II.
The flicker design parameters for the FL and PL algorithms
are outlined in Table III. TPDM,min has been chosen to be
2.25 s based on user performance considerations to avoid
boiling pulses. Applying the flicker guidelines detailed in the
Appendix, the short-time power fluctuation Pst for this applica-
tion can be calculated as
  3.2
1
2tf
Pst = (6)
TPDM
where tf is the equivalent holding time, which is calculated
using the following expression as a function of the relative
voltage fluctuation d:
 3.2
ΔU
tf = 2.3(F · d) = 2.3 1 · 100 ·
3.2
U
 3.2
100
≈ 2.3 PPDM · |ZLISN | (7)
U2
where F is the shape factor, and ZLISN is the LISN impedance.
Then, applying (6) and (7) and considering Pst = 1, a maxi-
mum power fluctuation (PPDM,max ) of 900 W is obtained. As
a result, for these parameters, the maximum voltage fluctuation
dmax is 0.8, which is lower than the standards limit.
The induction loads used for the experimental verification
and the resonant frequency for the selected Cres are shown
in Table IV. It has been selected a 16-turn inductor designed
following the procedures shown in [36] and [37]. After that,
the final experimental values have been obtained by means
of a versatile large-signal induction-load characterization test
bench [38]. The measured parameters include fs , D, TPDM ,
ton , Po , and efficiency (η). Efficiency has been measured as
the relation between the output power (inductor) and the input
power (mains).
B. Experimental Results
(5)
The experimental test performed compares FL and PL power
balance, user performance, flicker emission, and efficiency.
The experimental waveforms of SW modulation and PDM are
shown in Fig. 13. Fig. 14 shows the power control as a function
of the control parameter for the considered ferromagnetic loads
A, B, and C. These values show the stationary Po point reached
by the control algorithm.
For the medium/high power range operating with SW
modulation, fs is the control parameter [Fig. 14(a) and (c)].
Furthermore, when maximum frequency is reached, fs is
3112 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 8, AUGUST 2009

Fig. 11. Transient response to a target output power variation from 0 W to 3 kW and from 3 kW to 100 W, applying FL algorithm with fs,t = 75 kHz.

TABLE III
FLICKER DESIGN PARAMETERS

TABLE IV
INDUCTION LOAD PARAMETERS AT RESONANT FREQUENCY
Fig. 12. Experimental setup: induction heating appliance inverter and induc-
tion coil.
TABLE II
INVERTER SPECIFICATIONS

kept constant, and ton /TPDM becomes the control parameter
[Fig. 14(b) and (d)].
The FL algorithm [Fig. 14(a) and (b)] applies the same
transition frequency for all loads, maximizing the use of SW
strategy. This implies better user performance behavior, since
the user will not notice the boiling pulses, and lower flicker
emission. Moreover, in Fig. 14(d), it is shown that, by applying
the PL algorithm, the power is delivered by means of pulses
of 900 W regardless of the load, whereas, applying the FL
algorithm, the power is delivered in pulses of 500 W with
certain loads [Fig. 14(b)]. On the other hand, the PL algorithm
[Fig. 14(c) and (d)] applies the same transition power, making
easier power control in the PDM mode.
Despite the benefits shown by the FL algorithm, its efficiency
is compromised by the use of higher switching frequency.
Fig. 15(a) shows that the efficiency decreases in the low power
range due to the high switching frequencies, which are far
from the resonant frequency. PDM strategy is intended to avoid
efficiency degradation at low power levels, keeping switching
frequency and efficiency constant. The PL algorithm achieves
LUCÍA et al.: CONTROL ALGORITHM OF RESONANT INVERTER FOR DOMESTIC INDUCTION HEATING 3113

aspects concerning the design of a domestic induction heating

appliance have been analyzed, including load and power varia-
tions, flicker emission, user performance, and efficiency.
Two different control algorithms have been proposed: max-
imum FL and PL algorithms. Both of them are based on
SW modulation and PDM. These have been implemented in
an FPGA, which allows controlling a commercial induction
heating inverter to perform experimental verifications.
The experimental analysis carried out shows that the PL
algorithm has better efficiency in the low/medium power range.
However, the lower power fluctuations with FL algorithm imply
lower flicker emission and better user performance due to
the lack of noticeable discontinuous boiling. Considering the
desirable features for a domestic appliance, the FL algorithm is
preferred due to its better user performance.

A PPENDIX
C ONVERTER D ESIGN A CCORDING TO IEC
F LICKER S TANDARDS
Flicker standards impose limits to power fluctuations in
home appliances. The IEC provides in [22] an analytical
method to estimate flicker emission and, thus, to design power
converters properly. The following lines summarize the design
method for a domestic induction heating device.
Fig. 13. Experimental waveforms. (a) SW modulation: 20 A/div, 75 V/div,
and 5 μs/div. (b) PDM: 20 A/div, 75 V/div, and 400 ms/div. The maximum power fluctuations are considered in short-
(Pst ) and long-observation (Plt ) times. However, for domestic
better average efficiency in the low power range as a conse- cookers, only Pst is considered. According to the IEC stan-
quence of its lower transition frequencies to PDM. dards, Pst is based on a 10-min window, and it is defined as
follows:
VI. D ISCUSSION    3.2 1
tf
Traditionally, power converters that are controlled with only Pst = (8)
TP
one modulation technique have been proposed due to their
simplicity and reliability. However, these are intended to op- where tf is the equivalent holding time, and TP is the observa-
erate with a well-defined load or output power. Furthermore, tion time. Several measurements are often required to obtain an
the domestic application implies additional restrictions due to average value (Pst ) of Pst . Thus, the flicker emission limit is
EMC standards and user performance. The proposed control expressed as
algorithms FL and PL and the converter design example focus
on meeting all those requirements. 
n
Pst,i
Table V compares the traditional control schemes SW, ADC, Pst = i=1
< 1. (9)
and PDM with the proposed control schemes applied to the n
same converter. It is shown that the use of a single classical
For electric cookers, n = 5 is required by the IEC standards.
control strategy is unfeasible due to considerations concerning
Moreover, the equivalent holding time tf for a given input
devices stress, efficiency, user performance, flicker emission,
power is
or power controllability. Efficiency is decreased with SW and
ADC modulations in the low power range due to the higher tf = 2.3(F · d)3.2 (10)
switching losses. PDM achieves higher efficiency, although it
presents poor user performance and higher flicker emissions. where F is the power fluctuation shape factor coefficient, and d
However, proper strategy combinations, as the proposed FL is the relative voltage fluctuation. In the case of square-voltage
and PL algorithms, combine the good features in each power fluctuations, F equals to one, and Pst is simplified to
range to obtain the optimum control strategy. These strategies   3.2
1   3.2
1
increase slightly the control complexity. 2tf 4.3
Pst = =d . (11)
TPDM TPDM
VII. C ONCLUSION
Finally, the parameter d is calculated as follows:
This paper presents the design of a load-adaptive inverter
control algorithm and its experimental implementation and ΔU
d= (12)
verification for a 3-kW induction heating converter. The main U
3114 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 8, AUGUST 2009

Fig. 14. Experimental results of the output power as a function of control parameters for different ferromagnetic loads A, B, and C. FL algorithm with (a) SW
modulation and (b) PDM. PL algorithm with (c) SW modulation and (d) PDM.

TABLE V
CONTROL STRATEGY COMPARISON

Fig. 15. Experimental results of power converter efficiency. (a) FL algorithm. easily be calculated using (10)
(b) PL algorithm.
ΔU = |ΔU | = |ΔI · Z LISN |. (13)
where U is the mains rms voltage, and ΔU is the mains voltage
fluctuation. In addition to Pst limits, d between 1-s stable For single-phase and equilibrated three-phase appliances,
conditions (dc ) and maximum d (dmax ) is also limited. ΔU can be simplified as
The mains impedance is stabilized through an LISN, with  
known impedance ZLISN = RLISN + jXLISN . Thus, ΔU can ΔU = ΔRe(I) · RLISN + ΔIm(I) · XLISN  . (14)
LUCÍA et al.: CONTROL ALGORITHM OF RESONANT INVERTER FOR DOMESTIC INDUCTION HEATING
TABLE VI
FLICKER EMISSION LIMITS
[17]
[18]
[19]
The guidelines presented in this paper have been used to
determine the PDM parameters (PPDM,max and TPDM,min )
to achieve proper converter power control and limited flicker [20]
emissions. Table VI summarizes the flicker emission lim-
its for domestic induction heating appliances according to [21]
IEC 1000-3-3.
[22]
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3116 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 8, AUGUST 2009
Óscar Lucía (S’04) received the M.Sc. degree
in electrical engineering from the University of
Zaragoza, Zaragoza, Spain, in 2006. He is currently
working toward the Ph.D. degree in the Department
of Electronic Engineering and Communications,
University of Zaragoza.
He is currently a member of the Aragon Insti-
tute for Engineering Research (I3A), University of
Zaragoza. His main research interests include in-
duction heating applications, multiple-output power
converters, resonant inverters, and digital control and
modulation strategies applied to power converters.
José M. Burdío (M’97) received the M.Sc. and
Ph.D. degrees in electrical engineering from the Uni-
versity of Zaragoza, Zaragoza, Spain, in 1991 and
1995, respectively.
He is with the University of Zaragoza, where he is
currently a Professor in the Department of Electronic
Engineering and Communications and a member of
the Aragon Institute for Engineering Research (I3A).
His main research interests include modeling of
switching converters and resonant power conversion
for induction heating applications.
Ignacio Millán (S’08) received the M.Sc. degree
in electrical engineering from the University of
Zaragoza, Zaragoza, Spain, in 2005. He is currently
working toward the Ph.D. degree in the Department
of Electronic Engineering and Communications,
University of Zaragoza.
He is currently a member of the Aragon Insti-
tute for Engineering Research (I3A), University of
Zaragoza. His main research interests include modu-
lation strategies for resonant converters for induction
heating applications, analysis and modeling of losses
of switching devices, and multiple-output resonant inverter topologies.
Jesús Acero (M’06) received the M.Sc. and Ph.D.
degrees in electrical engineering from the University
of Zaragoza, Zaragoza, Spain, in 1992 and 2005,
respectively.
From 1992 to 2000, he worked on several indus-
try projects, particularly on custom power supplies
for research laboratories. Since 2001, he has been
an Assistant Professor in the Department of Elec-
tronic Engineering and Communications, University
of Zaragoza. He is also a member of the Aragon In-
stitute for Engineering Research (I3A), University of
Zaragoza. His main research interests include resonant converters for induction
heating applications, inductive-type load modeling, and magnetics.
Diego Puyal received the M.Sc. and Ph.D. degrees in
telecommunication engineering from the University
of Zaragoza, Zaragoza, Spain, in 2003 and 2009,
respectively.
He has been an Assistant Professor in the De-
partment of Electronic Engineering and Communi-
cations, University of Zaragoza, where he currently
works in the fields of induction heating load char-
acterization, high-frequency resonant power invert-
ers, and performance comparison of inverter control
strategies. He is also a member of the Aragon Insti-
tute for Engineering Research (I3A), University of Zaragoza.